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External Memory Interfacing: Unit IV

The document discusses interfacing external memory like ROM and RAM to the 8051 microcontroller. It explains that ROM is non-volatile memory that can be up to 64KB in size and connected to the 8051 by grounding the EA pin or when the PC address is greater than the internal ROM address. RAM is volatile memory interfaced using address pins, data pins, a chip select pin set active low, and an output enable pin. Decoders are used when connecting multiple external memory chips. Address latching and multiplexing are also discussed to interface larger memory sizes. Examples are provided of interfacing data and program ROM and RAM using MOVX instructions and address decoding.

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29 views22 pages

External Memory Interfacing: Unit IV

The document discusses interfacing external memory like ROM and RAM to the 8051 microcontroller. It explains that ROM is non-volatile memory that can be up to 64KB in size and connected to the 8051 by grounding the EA pin or when the PC address is greater than the internal ROM address. RAM is volatile memory interfaced using address pins, data pins, a chip select pin set active low, and an output enable pin. Decoders are used when connecting multiple external memory chips. Address latching and multiplexing are also discussed to interface larger memory sizes. Examples are provided of interfacing data and program ROM and RAM using MOVX instructions and address decoding.

Uploaded by

anila kumara
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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External Memory Interfacing

Unit IV
Memory Types

 RAM (Volatile)

 ROM (Non-Volatile)
Interfacing external ROM

 ROM of size 64KB can be connected to 8051

 External ROM selected by grounding 𝐸𝐴 pin


or
 When PC address is greater than the last address of
internal ROM
Generic Pin Configuration of ROM

 Data pins
 Address pins
 Output Enable (OE) – Usually active
LOW
 Chip Select (CS) – Usually active
LOW
Generic Pin Configuration of RAM

 Data pins
 Address pins
 Chip Select (CS) – Usually active LOW
 Output Enable (OE) [Read]
 Write
8051 Pin Diagram

Address/Data
Pins for memory
interfacing

Control Pins for


memory
interfacing

Control Pins for


Address Pins for
memory
memory
interfacing
interfacing
Memory Interfacing - Example
Timing Diagram
Memory address decoding
Use of decoders

 Use decoders when more external memory chips are


interfaced
Data/Address Multiplexing

 Use Address Latches to retain the lower 8-bits of the


16-bit address
ROM interface using Address Latch
ROM interface using Address Latch
(contd)
Use MOVX instruction to read data
from external ROM
Use MOVX instruction to read data
from external RAM
8051 interface with data RAM, data
ROM and program ROM
An Example with decoder chips
Memory segment access
Practice Question

 Draw the diagram which shows the interface


between 8051 and two 8K x 8 RAM chips. The first 8K
x 8 RAM should have address in the range of (0 to
1FFFh) and the second RAM should have address in
the range of (2000 to 3FFFh) .
FIN

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