Scribd
Upload
32 views

Inside The CPU

The CPU contains three main buses - the address bus, data bus, and control bus - that carry information between the CPU and other components like memory. An instruction cycle in the CPU involves 6 stages: (1) the program counter retrieves the next instruction's address and data, (2) the instruction and data are sent to the CPU via buses, (3) the program counter is updated, (4) the instruction is executed, (5) any register updates or memory access is performed, and (6) the process repeats with the next instruction. The CPU directs the computer's operations through its control unit and arithmetic logic unit, using registers to temporarily store data and instructions as they are fetched and executed.

Uploaded by

Kaecee Wong
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
32 views

Inside The CPU

The CPU contains three main buses - the address bus, data bus, and control bus - that carry information between the CPU and other components like memory. An instruction cycle in the CPU involves 6 stages: (1) the program counter retrieves the next instruction's address and data, (2) the instruction and data are sent to the CPU via buses, (3) the program counter is updated, (4) the instruction is executed, (5) any register updates or memory access is performed, and (6) the process repeats with the next instruction. The CPU directs the computer's operations through its control unit and arithmetic logic unit, using registers to temporarily store data and instructions as they are fetched and executed.

Uploaded by

Kaecee Wong
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 2

Inside The CPU • The address of the next instruction is

Buses • placed on the address bus and is


stored in memory
There are 3 Types of Buses
An instruction cycle (Stage 2)
Address bus
• Once the instruction and the data have
- between CPU and Main Memory
been located this data is sent to the
• Carries address of where data is CPU along the data bus
supposed to go
An instruction cycle (Stage 3)
Data Bus
• The PC is updated so it stores the
- between CPU and device (i.e. expansion address of the next instruction • Goes
bus) to next one, two or three bytes for 8-
- Carries actual data bit data bus
Control Bus • On next cycle PC is ready to tell CPU
- between CPU and device where to execute

- Carries control information (i.e. is the An instruction cycle (Stage 4)


device supposed to receive of send bits) • CPU must execute the instruction
retrieved in Stage 2

Registers • The returned instruction is called an OP


Code (Operation Code)
• Temporarily stores bits that the CPU will
process • Op Codes tell CPU what instruction to
carry out
• Each register is specialized
A,B,C,D,E,H,L,PC,SP,SR • CPU might already have loaded data
(operands) which operations use
An instruction cycle (Stage 5)
Step by Step Execution
• CPU is ready to carry out instruction
• The CPU performs the fetch-decode-
execute cycle • If a register is being updated, the
required information is already
• Fetch - gets the next instruction as
available (remember stage 1: PC
indicated by the program counter (PC) retrieves address location and data for
and increment program counter
next instruction)
• Decode - Decode the bit pattern in the • If instruction references another byte of
IR (instruction register)
memory (needs another operand), data
• Execute - Perform the action requested needs to be received or written to
in the IR
An instruction cycle (Stage 6)
An instruction cycle (Stage 1)
• Stage 1 is repeated
• The CPU contains an address counter • The new address stored in the PC in
called the Program Counter (PC) stage 3 must be located and the whole
• The PC contains the memory location process is repeated
of the next instruction along with the
data for that instruction
An instruction cycle (Stage 5)
• Last OP Code tells CPU the program is • Buffer Register – stores data coming
finished and the program will stop from or being sent to primary storage, e.g
running printing a document
• Address Register – stores location of
Central Processing Unit (CPU) data in primary storage

• ‘Brain’ of the computer • Instruction Register – stores the address


if the next instruction to be processed
• Performs the change of data into
information
• Accepts data from any input device, Microprocessor
changes this data according to • A central processing unit contained on
instructions given by the user and send one integrated circuit
the result to an output device • If the processor is built onto a single
microchip it is called a microprocessor
Consists of the • Used in PC’s, cameras, DVD players etc.
• Control Unit • Registers
• Arithmetic Logic Unit (ALU)

Control Unit
• Directs and coordinates the entire
hardware system
• Organizes the flow of data in a computer
• Similar to traffic lights controlling the
flow of traffic
• It interprets each instruction given by a
program and gives appropriate action to
be carried out
Arithmetic Logic Unit (ALU)
• Performs data calculations including
addition, subtraction, division and
multiplication
• Performs comparisons on data items
Registers
• Temporary storage area for small
amounts of data or instructions before and
after processing.
Some of the different registers are:
• Accumulator Register – stores data to
be processed

You might also like