Unit 4: Assembly Language programming

Syllabus:

Assembly Language Programming

⦁ An assembly language is a type of low-level programming language that is
intended to communicate directly with a computer’s hardware .

⦁ It is designed to be used by developers to write programs that can run directly on a

computer’s central processing unit (CPU). It is a low-level language, which means
it is closer to the machine code .

⦁ Unlike machine language, which consists of binary and hexadecimal characters,

assembly languages are designed to be readable by humans.

⦁ Each assembly language is specific to a particular computer architecture, in

contrast to most high-level programming languages, which are generally portable
across multiple architectures, but require interpreting or compiling.

⦁ Assembly language is converted into executable machine code by a utility

program referred to as an assembler; the conversion process is referred to as
assembly, or assembling the code.

⦁ One key benefit of using assembly language is that it allows programmers to write
highly optimized code for the specific hardware a program will run on. This is
because assembly language instructions map directly to the machine language
instructions that the CPU can execute. By writing code optimized for the
hardware, programmers can create programs that run faster and more efficiently
than those written in higher-level languages.

⦁ Another benefit of assembly language is that it allows programmers to directly

access the computer’s hardware resources, such as its memory and input/output
ports. This makes it an ideal language for systems programming, which involves
writing code that interacts with the operating system and the computer’s hardware
devices.

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Programming with Intel 8085 Microprocessor
Instruction and Data Format

Instructions
An instruction is a statement that becomes executable when a program is
assembled. Instructions are translated by the assembler into machine language bytes,
which are loaded and executed by the CPU at runtime. An instruction contains four basic
parts:

⦁ Label (optional)
⦁ Instruction mnemonic (required)
⦁ Operand(s) (usually required)
⦁ Comment (optional)

The basic syntax:

[label:] mnemonic [operands] [;comment]

The fields in the square brackets are optional. A basic instruction has two parts, the
first one is the name of the instruction (or the mnemonic), which is to be executed, and
the second are the operands or the parameters of the command.

Label
A label is an identifier that acts as a place marker for instructions and data. A label placed
just before an instruction implies the instruction’s address. Similarly, a label placed just
before a variable implies the variable’s address.

⦁ Data Label:
A data label identifies the location of a variable, providing a convenient way to
reference the variable in code. The following, for example, defines a variable
named count:

Count DWORD 100

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 Here,
⦁ count: This is the label or name of the variable being defined.
⦁ DWORD: This specifies the data size of the variable. A DWORD
(Double Word) is typically 32 bits or 4 bytes in size, capable of
representing values from 0 to 2^32 - 1 (4294967295 in decimal).
⦁ 100: This is the initial value assigned to the count variable.

So, the line count DWORD 100 is telling the assembler to reserve 4 bytes of
memory to store the variable count and initialize it with the value 100. This memory
space can be used to store and manipulate the variable throughout the program.

⦁ Code Label:
A label in the code area of a program (where instructions are located) must
end with a colon (:) character. Code labels are used as targets of jumping and
looping instructions.

For example, the following JMP (jump) instruction transfers control to the
location marked by the label named target, creating a loop:
target:
mov ax,bx
...
jmp target

Label names are created using the rules for identifiers one can use the same
code label more than once in a program as long as each label is unique within its
enclosing procedure. (A procedure is like a function.)

Instruction Mnemonic
An instruction mnemonic is a short word that identifies an instruction. In English,
a mnemonic is a device that assists memory. Similarly, assembly language instruction
mnemonics such as mov, add, and sub provide hints about the type of operation they
perform.
Following are examples of instruction mnemonics:

⦁ mov: Move (assign) one value to another

⦁ add: Add two values
⦁ sub: Subtract one value from another

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 ⦁ mul: Multiply two values
⦁ jmp: Jump to a new location
⦁ call: Call a procedure

Operands
Assembly language instructions can have between zero and three operands, each of
which can be a register, memory operand, constant expression, or input-output port.

A memory operand is specified by the name of a variable or by one or more registers

containing the address of a variable. A variable name implies the address of the variable
and instructs the computer to reference the contents of memory at the given address.

Following are examples of assembly language instructions having varying numbers of

operands.

Zero operand:
The STC and NOP instruction, for example, has no operands:

⦁ stc ; set Carry flag and

⦁ NOP; no operation

One operand:
The INC instruction has one operand:
inc eax ; add 1 to EAX

Two operand:
The MOV instruction has two operands:
mov count,ebx ; move EBX to count

In a two-operand instruction, the first operand is called the destination. The second
operand is the source.

In general, the contents of the destination operand are modified by the instruction. In a
MOV instruction, for example, data is copied from the source to the destination.

Three operand:
The IMUL instruction has 3 operands, in which the first operand is the destination, and
the following 2 operands are source operands:

imul eax,ebx,5

In this case, EBX is multiplied by 5, and the product is stored in the EAX register.
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Comments
Comments are an important way for the writer of a program to communicate information
about the program’s design to a person reading the source code. The following
information is typically included at the top of a program listing:
⦁ Description of the program’s purpose
⦁ Names of persons who created and/or revised the program
⦁ Program creation and revision dates
⦁ Technical notes about the program’s implementation

Comments can be specified in two ways:

⦁ Single-line comments, beginning with a semicolon character (;). All characters
following the semicolon on the same line are ignored by the assembler.

Mov eax, 5; I am a comment

⦁ Block comments, beginning with the COMMENT directive and a user-specified

symbol. All subsequent lines of text are ignored by the assembler until the same
user-specified symbol appears.
For example,

COMMENT !
This line is a comment.
This line is also a comment.

Typical assembly language statements –

INC COUNT ; Increment the memory variable COUNT

MOV TOTAL, 48 ; Transfer the value 48 in the

; memory variable TOTAL

ADD AH, BH ; Add the content of the

; BH register into the AH register

Instruction set:

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 A binary command that is used to perform a function in the microprocessor over
provided data is known as instruction. In another words it is a binary pattern designed
inside a microprocessor to perform a specific function.

Every instruction includes two parts like Opcode & the Operand where Opcode is used to
specify the function to be executed & operand gives the data to be functioned on.
Instruction format of 8085 microprocessor is given below.

Opcode :
Represents the operation to be performed on the operand. It is also called mnemonic.

Operand :
Data or address is given in this part .That is the operand ( or data) may include 8-bit
or 16-bit data, on the internal register, a memory location, or an 8-bit or 16-bit address.

If the operand is an 8-bit data, only Operand-1 is present in the instruction. If the
operand is a 16-bit data or address, Operand-1 and Operand-2 are specified in the
instruction. Both Operand-1 and Operand-2 are optional.

A set of instructions is known as an instruction set that decides the

microprocessor function. Or in another words the entire group of instructions, called
the instruction set, determines what functions the microprocessor can perform.

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Classification of instructions based on size
There are three groups of instructions in 8085 microprocessor based on the length or size
of the instruction. They are,

1. Single byte (or 1 byte) instructions

2. Two byte instructions
3. Three byte instructions

Single byte instructions

This type of instruction has only Opcode and the operand is specified within the
Opcode itself. That is it includes the opcode and the operand in the same byte.

Example :
⦁ MOV C,A

Copy the contents of the accumulator in Register C

⦁ ADD B

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 Add the contents of the register B to the contents of the accumulator

⦁ CMA

Invert (Complement) each bit in the accumulator

Instruction Machine Code Binary

INR H 24H 0010 0100B
MOV A,B 78H 0111 1000B
ADD B 80H 1000 0000B

Two byte instructions

This type of instruction has Opcode and one operand. The first byte represents the
Opcode and the second byte represents the 8-bit operand data or 8-bit port address.

Example :

⦁ MVI A, 50H
Load an 8-bit data byte in the accumulator

Instruction Machine Code Binary

MVI A, 8-bit data 3EH 0011 1110B
ADI 8-bit data C6H 1100 0110B

Three byte instructions

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 This type of instruction has Opcode and two operands. The first byte represents the
Opcode, the second byte presents the lower order 8-bits of data or address and the third
byte represents the higher order 8-bits of data or address.

Example :

⦁ JMP 2085H
Transfer the program sequence to the memory location 2085H. Here, C3 is 1st
byte, 85 2nd byte, and 20 3rd byte.
⦁ LDA 2050H
Opcode- LDA
Operand- 2050H
Hex Code- 3A, 50,20

Classification of instructions based on Operation Modes

⦁ Data Transfer Instruction

⦁ Arithmetic Instruction
⦁ Logical Instruction
⦁ Branching Instruction
⦁ Control Instruction

⦁ Data Transfer Instruction

An instruction that is used to transfer the data from one register to another is
known as data transfer instruction. So, the data transfer can be done from source
to destination without changing the source contents. Data transfer mainly occurs
from one register to another register, from memory location to register, register to
memory, and between an I/O device & accumulator.

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 Example:
Mov r, M
This instruction transfers data present within the memory (M) to the
register (r). But, the memory location address must be there within the HL
register.

MVI r, Data (Move Immediate)

In this type of instruction, the transmission of data can be done
immediately toward the particular register.
Example: MVI r, 32H

LDA address (Load Accumulator)

LDA is a load accumulator instruction that is mainly used for copying
the data available in the address of memory indicated as the instruction’s
operand to the accumulator. Particularly, in this case, the available data in
the 16-bit address memory is transferred toward the accumulator.
Example: LDA 500H

⦁ Arithmetic Instruction of 8085

The arithmetic instructions perform different operations like addition,
subtraction, increment & decrement on the data within memory & register in the
8085 microprocessor.
ADD r
This arithmetic instruction adds the data which is available in the register to the
data available within the accumulator & the final result will be stored in the
accumulator.
Example: ADD C
ADD M
This type of instruction is mainly used to add the date in the memory address data
denoted at the operand to the data available at the accumulator. So the addition
result will be stored within the accumulator.

⦁ Logical Instruction
Logical instructions are mainly used to perform different operations like
logical or Boolean over the data available in either memory or register. These

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 instructions will modify the flag bits based on the operation executed.

CMP R/M (Compare the Register/Memory with the Accumulator)

This instruction is used to compare the data at the accumulator with the
data present at the register or memory which is given as operand. According to the
result obtained by the comparison, the flags are set. While the data that is
compared remains unchanged.

Example: CMP B

⦁ Branching Instruction
These types of instructions are mainly used to transfer or switch the
microprocessor from one location to another. So, it simply changes the general
sequential flow.
JMP address (Jump unconditionally)

This type of instruction is mainly used to transfer the series of the current
program to that location of memory whose 16-bit address can be simply specified
within the operand of the instruction.
Example: JMP 2014H

⦁ Control Instruction
These instructions are mainly used to control the microprocessor operations.
These instructions are discussed below.
NOP (No operation)
NOP stands for no operation. Once the 8085 microprocessor gets this instruction,
then it does not perform any operation based on execution.

Classification of instructions based on Operation Modes:

More Examples

⦁ Data Transfer:- MOV, IN, OUT, STA,LDA, LXI, LDAX, STAX, XCHG
⦁ Arithmetic and Logic:- ADD, SUB, INR, DCR, AND, OR, XOR, CMP, RLC,
RRC, RAL, RAR
⦁ Branching:- JMP, JNZ, JZ, JNC, JC, CALL
⦁ Stack:- PUSH, POP

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Data Transfer

MOV

⦁ MOV Rd,Rs
⦁ This instruction copies data from source register Rs to the Destination register
Rd.
⦁ The source register Rs and destination register Rd can be any general purpose
register like A,B,C,D,E,H or L.
⦁ The contents of source register remain unchanged.

Mnemonic MOV Rd,Rs

Operation Rd=Rs
No of bytes 1 byte
Machine Cycles 1(OF)
T-states 4

Example:
MOV B,C

⦁ MOV R, M
⦁ This instruction copies data from memory M to register R.
⦁ The term M specifies the HL memory pointer. The contents of HL register pair
are used as the address of the memory location. The contents of that memory
location are transferred to the specified register R.
⦁ The register R can be any general purpose register like A, B, C, D, E, H or L.

Mnemonic MOV R, M
Operation R=M or R= (HL)
No of bytes 1 byte.
Machine Cycles 2 (0F + MR)
T-states 4+3=7

Example

MOV C, M.

⦁ This instruction will copy the data from the memory location pointed by HL
register pair to C register.
⦁ Let the contents of the HL register pair be F000H, register C =20H. At the address
F000H : 10H is stored. The HL register pair contents are used as address. i.e. HL

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 = F000H.
⦁ The contents of memory location F000H are copied to the C register. So contents
of C register will change from 20H to 10H
⦁ The contents of memory location remain unchanged.

Note
⦁ Whenever the term M Comes in an instruction, its memory pointer. The address
will be given by the HL register Pair.
⦁ Brackets around HL specify that the contents are used as address. Hence forth the
brackets will be used to specify the contents used as address.

⦁ MOV M, R
⦁ This instruction will copy the data from the register to memory M.
⦁ The HL register pair is used as the memory pointer. The contents of the
specified register are copied to that memory location pointed by the HL
register pair.
⦁ The specified register may be any general purpose register A, B, C, D, E,
H or L.
⦁ The contents of the specified register remains unchanged.

Mnemonic MOV M, R
Operation M=R or (HL)=R
No of bytes 1 byte.
Machine Cycles 2 (0F + MR)
T-states 4+3=7

Example:
MOV M,C

⦁ Let the contents of HL pair are E200 H, register C = 20H, at address E200 : 10H
is stored. On the instruction MOV M, C the data is transferred from C register to
memory.
⦁ The contents of the register C are copied to memory location E200 H, so contents
of memory location C200 H will change from 10H to 20H.

⦁ MVI R, Data
⦁ This instruction moves the 8 bit immediate data to the specified register. The
data is specified within the instruction.

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 ⦁ It is a two byte instruction, so first byte of instruction will be OPCODE and
second byte will be 8 bit data.
⦁ The register R may be any general purpose register like A, B, C, D, E, H or L.

Mnemonic MVI R,data

Operation R=data
No of bytes 2 byte.
Machine Cycles 2 (0F + MR)
T-states 4+3=7

Example
MVI D, 07H
⦁ This instruction will load the immediate data 07 H in register D
⦁ Let the contents of register D= 10H. Then after the execution of instruction MVI
D, 07H the contents of register D will be changed from 10H to 07H.

⦁ MVI M, data
⦁ This instruction moves immediate data to memory.
⦁ The HL register pair is used as memory pointer. The contents of HL register
pair are used memory address and the immediate data is transferred to that
memory location.

Mnemonic MVI M, data

Operation M= data or (HL)=data
No of bytes 2 byte.
Machine Cycles 3 (0F + MR+MW)
T-states 4+3+3=10

Example
⦁ MVI H, 10H
⦁ MVI L, 00H
⦁ MVI M, 20H

⦁ 10H is transferred to H register.

⦁ 00H is transferred to L register.
⦁ 20H is transferred to memory.
⦁ When the instruction MVI M, 20H is executed the data 20H will be stored in in
the memory location addressed by the HL register pair i.e. 1000H.

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 ⦁ LXI Rp 16-bit Data
⦁ This instruction will load register pair with 16-bit data.
⦁ This instruction loads 16-bit data specified within the instruction to the
specified register pair or stack pointer.
⦁ In the instruction only high order register is specified or register pair. i.e. if
HL pair is to be loaded only H regıster will be specified in the instruction.
⦁ The register pair Rp, can be BC, DE, HL register pairs or stack pointer SP.

Mnemonic LXI Rp, 16-bit Data

Operation Rp =16-bit data
No of bytes 3 byte.
Machine Cycles 3(OF + MR+ MR)
T-states 10 (4 + 3 +3)

Example
i) LXI H, 2030 H.
⦁ Load HL pair with 2030 H. 20H will be loaded in the H register and 30F in the L
register.
ii) LXI SP, 7FFFH.
⦁ This instruction will load stack pointer SP with 7FFFH

⦁ LDA Address
Load accumulator direct from memory
⦁ This instruction copies the contents of the memory location whose address is
specified in the instruction to the accumulator.
⦁ The contents of the memory location remain unchanged.

Mnemonic LDA Address

Operation A=(Address)
No of bytes 3 byte.
Machine Cycles 4 (OF + MR+ MR + MR)
T-states 13 (4 + 3 +3+3)

Example:
LDA 5820H
⦁ This instruction will load the accumulator with the contents of memory location
5820H.
⦁ Let initially A = FO H, contents of memory location 5820H = 15H.
⦁ Then after the execution of instruction LDA 5820H, the accumulator will be
loaded with 15H. The contents of accumulator will change from FOH to 15H.

8. STA Address
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Store accumulator direct to memory:
⦁ This instruction will store the contents of the accumulator to the memory location
specified in the instruction.
⦁ The contents of the Accumulator remain unchanged.
⦁ It is a 3 byte instruction. The first byte is the opcode, second byte is lower order
address and the third byte is higher order address.

Mnemonic STA Address.

Operation (address) = A
No of bytes 3 byte.
Machine Cycles 4 (OF + MR+ MR + MW)
T-states 13 (4 + 3 +3+3)

Example:
STA 5820H
⦁ This instruction will store the contents of accumulator at memory location 5820H.

9.LHLD Address
Load HL pair directly from memory:
⦁ This instruction loads the contents of the memory location to the H and L
registers. The address of memory is specified along with the instruction.
⦁ The contents of memory location whose address is specified in the instruction are
transferred to L register and the contents of the next memory location i.e. (address
+ 1) to the H register.
⦁ This instruction is used to load the H and L registers from memory.
⦁ It is a 3 byte instruction. The first byte is the opcode, second byte is the lower
order address and the third byte is the higher order address.

Mnemonic LHLD Address.

L =(address)
Operation
H=(address + 1)
No of bytes 3 byte.
5 (OF + MR + MR + MR+
Machine Cycles
MR)
T-states 16 (4 + 3+3+3+3)

Example
LHLD 4000 H.
⦁ Load HL pair from memory locations 4000H and 4001H.
⦁ Let H = 05 H, L= 04 H, at memory locations 4000 H and 4001 H the data 20H,
30H is stored.
⦁ The instruction LHLD Will load the contents of memory location 4000H to the L

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 register, and the contents of memory location 4001H to the H register.
⦁ So the contents of register L will change from 04 to 20 H and contents of register
H will change from 05 H to 30 H.

10. SHLD Address

Store HL pair direct in memory
⦁ This instruction copies the contents of registers H and L to the memory locations.
The address of memory location is specified along with the instruction.
⦁ The contents of L register are stored at the memory location whose address is
specified and the contents of the H register to the (address + 1) location.
⦁ It is a three byte instruction. The first byte is the opcode, second byte is the lower
order address and the third byte is the higher order address.

Mnemonic SHLD Address.

(Address) = L register
Operation
(Address + 1) = H register.
No of bytes 3 byte.
5 (OF + MR + MR + MW+
Machine Cycles
MW)
T-states 16 (4 + 3+3+3+3)

Example
SHLD 4000H.
⦁ Store HL pair to memory locations 4000 and 4001.
⦁ Let H = 05H, L = 04H, at memory locations 4000H and 4001FH the data 20H and
30H is stored and the instruction SHLD 4000 H 15 executed the contents of
register L are copied to memory location 4000 H and contents of register H are
copied memory location 4001 H.

11. LDAX Rp
Load accumulator indirect by using a memory pointer.
⦁ This instruction copies the contents of the memory location to the accumulator.
⦁ The address of memory location is given by Rp, register pair specified along with
the instruction.
⦁ The register pair Rp, can be BC or DE only.
⦁ The contents of the memory location remain unchanged.

Mnemonic LDAX Rp
Operation A=(Rp)
No of bytes 1 byte.
Machine Cycles 2 (OF + MR)

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 T-states 7 (4 + 3)

Example:
LDAX B
⦁ This instruction will load accumulator with the contents of memory location
whose address is given by the BC register pair.
⦁ Let A = 1F H, B = 20H, C = 25H, at memory location 2025: 56H is stored.
Then after the execution of instruction LDAX B, the accumulator will be
loaded with the contents of memory location 2025 i.e. 56 H.

12. STAX Rp
Store accumulator indirect by using a memory pointer.
⦁ This instruction copies the contents of accumulator to memory location.
⦁ The address of the memory location is given by the Rp, register pair specified
in the instruction.
⦁ The register pair Rp, can be a valid register pair like BC or DE only.
⦁ The contents of accumulator remain unchanged.

Mnemonic STAX Rp
Operation (Rp)=A
No of bytes 1 byte.
Machine Cycles 2 (OF + MW)
T-states 7 (4 + 3)

Example:
STAX B
⦁ This instruction will store the contents of accumulator to the memory location,
whose address is given by the BC register pair.
⦁ Let A = 1F H, B= 26H, C = 08H, at memory location 2608: 10 is stored.
⦁ Then after the execution of STAX B instruction, the memory location 2608
will contain 1FH.

13. XCHG
Exchange the contents of HL with DE pair.
⦁ This instruction exchanges the contents of H register with D register and L
register with E register.

Mnemonic XCHG
Operation HD
No of bytes 1 byte.

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 Machine Cycles 1 (OF)
T-states 1(4)

Example:
XCHG
⦁ Let H = 12H, L = 11H, D = 30H, E=40H and the instruction XCHA is executed.

Arithmetic and Logic

⦁ ADD
The content of operand are added to the content of the accumulator and the
result is stored in accumulator.
with the addition instruction , the following 3 operations can be done.

⦁ The contents of a register can be added to the contents of the

accumulator and result is stored in the accumulator .

ADD R

Add register R contents to the accumulator.

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 ⦁ This instruction adds the contents of register R and accumulator. The
result is stored in the accumulator.
⦁ The register R can be any general-purpose register like A, B, C, D, E,
H, or L.
⦁ In addition to the result in the accumulator, all the flags are modified to
reflect the result of the operation.

Mnemonics ADD R

Operation A=A+
R

No. of Byte 1 byte

Machine Cycle 1 (OF)

T-states 4

Example

ADD C
Let A = 47 H, C = 51 H and instruction ADD C is executed.

⦁ The contents of a memory location can be added to the contents of the

accumulator and result is stored in accumulator.

ADD M
Add memory location contents to the accumulator.
⦁ This instruction uses the HL register pair as a memory pointer. The
contents of memory location addressed by the HL pair are added to
the contents of the accumulator. The result is stored in the
accumulator.
⦁ To reflect the status of the result all the flags are modified.

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 ⦁ The contents of the memory location remain unchanged.

Mnemonics ADD M
Operation A = A + M or A = A + (HL)
No. of Byte 1 byte
Machine Cycle 2 (OF + MR)
T-states 4+3=7

Example

ADD M

Let A = 15 H, H = CO H, L = 05 H, at memory location C005 :02 H is

stored and the instruction ADD M is executed.

⦁ Any 8 bit number can be added to the contents of the accumulator

and the result is stored in the accumulator.

⦁ SUB
Any 8 bit data or the contents of a register or contents of a memory location
can be subtracted from the contents of the accumulator.

SUB R
Subtract register from the accumulator
⦁ This instruction subtracts the contents of the specified register from the
contents of the accumulator and the result is stored in the accumulator.
⦁ The contents of the registers R are not altered.
⦁ The register R can be any general-purpose register like A, B, C, D, E, H, or
L.

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 Note:
The subtraction is performed by using 2's complement method. 2's
complement is done by the microprocessor itself. The programmer only
specifies the two data bytes.

Mnemonics SUB R
Operation A=A–R
No. of Byte 1 byte
Machine Cycle 1 (OF)
T-states 4
Example
SUB B
Let,
A = 37H,
B = 40H
A = 0011 0111
B = 0100 0000
2’s complement of B = 1100 0000

When the instruction SUB B is executed.

SUB M
Subtract data in memory from accumulator
⦁ This instruction will subtracts the contents of memory location pointed by
HL register pair from the contents of the accumulator . The result is stored
in the accumulator.
⦁ The contents of the registers R are not altered. The HL register pair is used
as a memory pointer.
⦁ The subtraction is done in the same way as the SUB R instruction.
⦁ All the flags are modified to reflect the result of operation

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 Mnemonics SUB M
A=A–M
Operation Or
A=A-(HL)
No. of Byte 1 byte
Machine Cycle 1 (OF+MR)
T-states 7(4+3)
Example

SUB M
A = A-(HL)

Let A=50H, H=C2 H, L=00H at memory location C200 H:20H is stored and
instruction SUB M is executed.

When the instruction SUB M is executed.

Here carry is generated . Hence, the microprocessor complements the carry so

CY=0.
This represents that the result is positive and in normal form

⦁ INR

INR R
Increment specified register
⦁ This instruction increments the contents of specified register by 1 and
result is stored in the same register.
⦁ The register R can be any general purpose register like A, B, C, D, E, H or
L.
⦁ All the flags except the carry flag are modified.

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 Mnemonics INR R
Operation R=R+1
No. of Byte 1 byte
Machine Cycle 1 (OF)
T-states 4

Example
INR E
E--> E+1

Let E = 2FH, flag register = 1X00xL and instruction INR E is

executed.

INR M
Increment contents of memory location contents by one.
⦁ This instruction increments the contents of memory location addressed by
HL register pair by 1 and result is stored back at the same memory
location.
⦁ All other flags except carry are affected.

Mnemonics INR M
(HL)=(HL)+1
Operation Or
(M)=(M)+1
No. of Byte 1 byte
Machine Cycle 1 (OF+MR+MW)
T-states 10(4+3+3)

Example
INR M
Let H=20H,L = 02 H, at memory location 2002 : 05 is stored, flag
INR M register = 00x1x0x1 and the instruction INR M is executed.

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 ⦁ DCR
The contents of the designated register or memory are decremented by 1 and
their result is stored at the same place.

DCR R
Decrement Specified register contents by one
⦁ This instruction decrements register contents by 1 and result is stored in
the same register.
⦁ Register can be any general purpose register like A,B,C,D,H or L.

Mnemonics DCR R
Operation R=R-1
No. of Byte 1 byte
Machine Cycle 1 (of)
T-states 4
Example:
DCR B
B=B-1

Let B=2f , flag register =01x0x0x1 and the instruction DCR B is executed

DCR M
Decrement data in memory
⦁ This instruction decrements the contents of memory location addressed by
HL register pair by 1. The result is stored back at the
⦁ same memory location. The HL register pair acts as the memory pointer.

Mnemonics DCR M
M=M-1 or
Operation
(HL)=(HL)-1
No. of Byte 1 byte
Machine Cycle 3(of+mr+mw)
T-states 10(4+3+3)

Example:

25
DCR M

Let H=20H,L=02H, at memory location 2002 : 3E data is stored, flag register = 01x 0x
0x1 and instruction DCR M is executed.

⦁ AND

⦁ OR

⦁ XOR

⦁ CMP
CMP R
Compare register with accumulator.
⦁ This instruction compares the contents of the accumulator with the content of
the register specified.
⦁ The operation of comparing is performed by subtracting the register contents
from the accumulator contents.
⦁ The contents of the register or accumulator are not altered.

Mnemonic CMP R
Operation A compare R

26
 No. of Bytes 1 byte
Machine cycles 1 (OF)
T-states 4

The result of the comparison is indicated by setting the flags as follows:

⦁ If A > R : CY = 0 and Z = 0
⦁ If A = R : Cy = 0 and Z = 1
⦁ If A < R : CY = 1 and Z = 0

⦁ The S, P, and AC flags are modified to reflect the status of subtraction, or

Z, and CY are used to indicate the result of the comparison.
⦁ The register R is any general-purpose register like A, B, C, D, E, H, or L.

Example:

⦁ CMP B
⦁ CMP C
⦁ CMP D

⦁ Let A = 20H, B = 10H. Now if the instruction CMP B is executed. Then the status
of flags will be CY = 0 and Z = 0 to indicate A > B.

⦁ Let A = 10H, C = 10H. Now if the instruction CMP C is executed. Then the status
of flags will be CY = 0 and Z = 1 to indicate A = B.

⦁ Let A = 10H, D = 20H. Now if the instruction CMP D is executed. Then the status
of flags will be CY = 1 and Z = 0 to indicate A < B.

CMP M:
Compare memory with accumulator.
⦁ This instruction compares the contents of the accumulator and memory location
contents. The HL register pair gives the address of the memory location.
⦁ The contents of the accumulator and memory location are not altered.

Mnemonic CMP M
Operation (A – M)
No. of Bytes 1 byte

27
 Machine cycles 2 (OF + MR)
T-states 7 ( 4+3)

The result of the comparison is indicated by setting the flags as follows:

⦁ If A > M : CY = 0 and Z = 0
⦁ If A = M : Cy = 0 and Z = 1
⦁ If A < M : CY = 1 and Z = 0

The S, P, and AC flags are modified to reflect the status of subtraction, or Z, and CY
are used to indicate the result of the comparison.

Example
CMP M
Let A = 20H, H = C0H, L = 02H at memory location C002: 10H is stored, and the
instruction CMP M is executed.
The flag status will be as follows:
CY = 0, Z = 0, P = 0 S = 0, AC = 0

⦁ RLC
⦁ Rotate Accumulator left.

⦁ This instruction will rotate the content of the accumulator to the left by 1
bit. i.e. it shifts the bits left by one position. B0 will be transferred to B1,
b1 to B2, and so on B6 to b7, B7 to B0 as well as the carry flag.
Mnemonic RLC
For n = 0 to 6, Bn+1 = Bn
Operation
B0 = CY = B7
No. of Bytes 1 byte
Machine cycles 1 (OF )
T-states 4

The operation is shown in the figure below.

Example:

28
Let A = 1F H and instruction RLC is executed. the content of the accumulator will be
rotated by 1 bit to the left and the result will be stored in the accumulator
i.e. A = 3E H

⦁ RRC
Rotate Accumulator Right.
⦁ This instruction rotates the contents of the accumulator to the right by one
position.

Mnemonic RRC
For n = 0 to 6, Bn = Bn+1
Operation
B7 = CY = B0
No. of Bytes 1 byte
Machine cycles 1 (OF )
T-states 4

Bit B0 is placed in B7 as well as CY flag as shown in the figure below.

Example
A = 1CH and
CY = 1

After the execution of the instruction, the accumulator contents will be 0E H and the

29
carry flag will be reset.

⦁ RAL
⦁ Rotate Accumulator left through Carry.
⦁ This instruction will rotate the content of the accumulator to the left by 1-
bit position along with carry. B7 is placed in CY and CY is placed in bit
B0.

Mnemonic RAL
For n = 0 to 6, Bn+1 = Bn
Operation CY = B7
B0 = CY
No. of Bytes 1 byte
Machine cycles 1 (OF )
T-states 4

The below figure shows the operation.

Example:

Let A = 0EH, CY =1. After execution of the instruction, the contents of the accumulator
will be 1DH ad CY = 0.

30
 ⦁ RAR
⦁ Rotate Accumulator Right through Carry.
⦁ This instruction will rotate the content of the accumulator right by 1-bit position
along with carry. B0 is placed in CY and CY is placed in bit B7.

Mnemonic RAR
For n = 0 to 6, Bn = Bn+1
Operation B7 = CY
CY = B0
No. of Bytes 1 byte
Machine
1 (OF )
cycles
T-states 4

⦁ The below figure shows the operation.

Example:
Let A = 0EH and CY = 1 and the instruction RAR is executed. After execution of the
instruction accumulator contents will be (1000 0111) 87H and the carry flag will be reset.

31
Branching:- JMP, JNZ, JZ, JNC, JC, CALL
The Branch Instructions are the most powerful instructions because they allow the
microprocessor to change the sequence of a program, either unconditionally or under
certain test conditions.
These are classified into 3 categories:
⦁ JUMP instructions
⦁ CALL and RETURN instructions
⦁ RESTART instructions.

JMP Instruction:
The jump instruction transfers the program sequence to the memory address given
in the operand based on the specified flag. Jump instructions are 2 types:
⦁ Unconditional Jump Instructions and
⦁ Conditional Jump Instructions.

Unconditional JMP Instructions:

This instruction transfers the program sequence to the described memory address.
That is …
JMP 16-bit address

The program sequence is transferred to memory location specified by the 16-bit

address given in the operand .Example

Example: JMP 2034 H

Conditional JMP Instructions:

⦁ This instruction allows the microprocessor to make decisions based on certain
conditions indicated by the flags.

32
 ⦁ The conditional jump instruction checks the flag conditions and makes decisions
to change or not to change the sequence of a program.
⦁ Out of five flags, 4 (CY, Z, S, and P) flags are used by conditional JMP, but the
AC flag is not used.

Opcode Operand Description

Jump on carry ( if result generates carry and CY=1 )
JC 16-bit That is Jumps to the address if carry flag is 1
Example: JC 2050H
Jump on no carry ( CY=0 )
JNC 16-bit That is Jumps to the address if carry flag is 0
Example: JNC 2050
Jump on zero ( if result is zero and Z=1 )
JZ 16-bit That is Jumps to the address if zero flag is 1
Example: JZ 2050H
Jump on no zero ( Z=0 )
JNZ 16-bit That is Jumps to the address if zero flag is 0
Example: JNZ 2050H
Jump on plus ( if D7=0 and S=0 )
JP 16-bit That is Jumps to the address if sign flag 0
Example : JP 2050H
Jump on minus ( if D7=1 and S=1 )
JM 16-bit That is Jumps to the address if sign flag is 1
Example: JM 2050H
Jump on even parity ( P=1 )
JPE 16-bit That is Jumps to the address if parity flag is 1
Example: JPE 2050H
Jump on odd parity ( P=0 )
JPO 16-bit That is Jumps to the address if parity flag is 0
Example: JPO 2050

CALL Instruction:
⦁ The call instruction transfers the program sequence to the memory address given
in the operand. It is used in the main program to call a subroutine.
⦁ When a subroutine is called, the contents of PC, which is the address of the
instruction following the CALL instruction, is stored on the stack and the program
execution is transferred to the subroutine address. That is before transferring, the
address of the next instruction after CALL is pushed onto the stack.

Call instructions are 2 types:

⦁ Unconditional Call Instructions and
⦁ Conditional Call Instructions.

33
Unconditional CALL Instructions:
⦁ It transfers the program sequence to the memory address given in the operand.
⦁ When it is executed, the microprocessor will store the address of the next
instruction in STACK and the PC is located with a subroutine address.
⦁ 3-byte instruction
⦁ Immediate/Register indirect mode
⦁ 5 MC
⦁ 18 T-States
⦁ No flags are affected
Example:
CALL 2050H
Conditional CALL Instructions:
⦁ In this case, the program is transferred to the subroutine if the condition is met .
⦁ If the condition is not met then the main program is continued
⦁ In this instruction, all flags are used except the AC flag.

Opcode Operand Description

CC 16-bit Call subroutine if carry flag is set ( CY = 1).
That is Call if carry flag is 1
Example: CC 2050H
CNC 16-bit Call subroutine if carry flag is reset (CY = 0)
That is Call if carry flag is 0
Example: CNC 2050
CZ 16-bit Call subroutine if zero flag is set ( Z=1 )
That is Calls if zero flag is 1
Example: CZ 2050
CNZ 16-bit Call subroutine if zero flag is reset ( Z=0 )
That is Calls if zero flag is 0
Example: CNZ 2050
CM 16-bit Call subroutine if sign flag is set ( S=1, negative
number)
That is Calls if sign flag is 1
Example:CM 2050
CP 16-bit Call subroutine if sign flag is reset ( S=0, positive
number)
That is Calls if sign flag is 0
Example: CP 2050

34
 CPE 16-bit Call subroutine if parity flag is set ( P=1, even parity)
That is Calls if parity flag is 1
Example: CPE 2050
CPO 16-bit Call subroutine if parity flag is reset ( P=0, odd parity)
That is Calls if parity flag is 0
Example :CPO 2050

Stack:- PUSH, POP

⦁ The stack in an 8085 microprocessor is a group of memory locations in the R/W

memory that is used for the temporary storage of binary information during the
execution of the program.
PUSH, POP, SPHL, and XHTL are the example of instructions for stack group.

⦁ An 8-bit stack pointer is used to hold the address of the most recent stack entry.
This location which has the most recent entry is called as the top of the stack.
⦁ When the information is written on the stack, the operation is called PUSH. When
the information is read from the stack, the operation is called POP.
⦁ The stack works on the principle of Last in First Out or First in Last Out.

⦁ Above figure shows Stack plates. If we want to remove the first stack 4 plate,
then we will have to remove all the plates 3 above the first i.e. we have to remove
the fourth plate, third plate, second plate and then finally 2 the first plate. This
indicates that the first plate pushed onto the stack is the last one to be popped
from the stack. This operation is called as First In Last Out (FILO).

⦁ The stack is implemented with the help of special memory pointer register called
as the stack pointer. It is of 8 bit. The stack pointer's contents are automatically
adjusted to point to the stack. The memory location that is currently pointed by the
stack pointer is called as top of stack. As shown in Fig. above.

35
 ⦁ When data is to be stored on the stack, the SP increments before storing the data
on stack and when the data is to be retrieved/popped from the stack the SP
decrements to point next available byte of stored data.

Hence in short,
(a) Stack area is usually defined in RAM OLY.
(b) Stack is used to store information (data) temporarily.
(c) Stack is a part of memory defined in program by THE USER.
(b) STACK, the name itself, informs about the way data is stored i.e. stack of data

PUSH Rp
Push the contents of register pair on to the stack.
⦁ This instruction is used to write 16 bit data on the stack.
⦁ When this instruction is executed the contents of the specified register pair are
copied on the stack in the following sequence.
⦁ The stack pointer is decremented by one and the contents of higher order
register of the specified register pair are copied to the memory location
pointed the stack pointer.
⦁ The stack pointer is again decremented by 1 and the contents of lower
order of register pair are copied to memory location pointed by the stack
pointer.
⦁ The register pair can be any 16 bit register pair like BC, DE, HL or PSW (program
status word).
⦁ The PSW is program status word with A register as higher order register and flog
register as low order register.
⦁ Only higher order register is to be specified within the instruction.

Mnemonics PUSH Rp
SP = SP — 1
SP = Higher order Rp
Operation
SP = SP — 1
SP = Lower order Rp
No. of Byte 1 byte
Machine Cycle 3 (OF + MW + MW)
T-states 12 (6 + 3 + 3)

Example: PUSH B

Let BC = 3010H, and the stack pointer is initialized at FFFFH. Now if the
instruction PUSH B is executed, then initially the stock Pointer will decrement by 1. i.e.

36
(SP =FFFD). The contents of register B (30 H) will be copied to the memory location
FFFE H. The stack pointer is then again decremented by one (SP = FFFD H). The
contents of register C (10 H) will be copied to this memory location.

POP Rp

POP off stack contents to register pair.

⦁ When this instruction is executed, the contents of the memory location pointed by
the stack pointer (SP) register are copied to the low order byte of register pair.
⦁ The SP is incremented by one and the contents of that memory location are copied
to the higher order byte of register pair.
⦁ The SP is again incremented by 1.
⦁ The process of POP is exactly opposite to PUSH operation. So the contents stored
by PUSH are taken back using POP instructions.
⦁ The examples of Rp are BC, DE, HL and PSW.
⦁ Only high order register is specified for register pair.

Mnemonics POP Rp
Operation Lower order Rp = (SP)
SP = SP + 1
Higher order Rp = (SP)
SP = SP + 1
No. of Byte 1 byte
Machine Cycle 3 (OF + MR + MR)
T-states 10 (4+ 3 + 3)

Example: POP B
Let BC = 3010 H, stack pointer = FFFD H at memory location FFFD H : 10 H is
stored and at memory location FFFE H : 30 H is stored and the instruction POP B is
executed. The contents of stack location FFFDH are popped off to the C register. The
stack pointer will increment by one. The contents of this location i.e. FFFEH are popped
off the B register. Then the stack pointer will again increment by 1 (i.e. SP = FFFF H).

37
8085 programs

Related to…..

Data transfer
Program 1: Write a program to load data 05H into the accumulator and data 20 H into
the register B.

Code:

MVI A,05H

MVI B,20H

HLT

Explanation:

Instruction Comment Operation

MVI A,05H Load register A with 05H A=05H

MVI B,20H Load register B with 20 H B=20H

HLT halt stop

How program looks in program memory….now assume C000H is the starting memory
location

38
Program 2: Write a program to exchange the contents of memory location D000H and
D001H .Let the contents of memory location D000H be 10 H and Contents of memory
location D001H be 20H.

Code 1:

LDA D000H
MOV B,A
LDA D001H
STA D000H
MOV A,B
STA D001H
HLT

Explanation:

Instruction Comment Operation

LDA D000H Load data from memory A=10H
location D000H to
accumulator
MOV B,A Store data in Register B B=10H
LDA D001H Load data from memory A=20H
location D001H to
accumulator
STA D000H Load data of memory location D000H:20H RESULT
D001H to Memory location
D000H
39
MOV A,B Reload data in A register from A=10H
B register
STA D001H Load data to memory location D001H=10H
D001H
HLT stop STOP

Code2:

LXI H, D000H
LXI D,D001H
MOV B,M
LDAX D
MOV M,A
MOV A,B
STAX D
HLT
Explanation:

Instruction Comment Operation

LXI H, D000H Initialize HL register pair as a HL=D000H
pointer to memory location H=D0H
D000H L=00H
LXI D,D001H Initialize DE register pair as a DE=D001H
pointer to memory location D=D0H
D001H E=01H
MOV B,M Get the contents of memory B=10H
location D000H into register B
LDAX D Get the contents of memory A=20H
location D001H into
accumulator
MOV M,A Store the contents of register D000H=20H
A into memory location Result
D000H

40
 MOV A,B Copy the contents of register B A=10H
into accumulator
STAX D Store the contents of D001H=10H
accumulator into memory Result
location D00!H
HLT Terminate stop

Arithmetic and Logic related program:-

Add two 8 bit number

Program 3:
Write a program to add the contents of memory locations D000H and D001H.Store the
results in memory location D002H. Let the contents of memory location D000H be 20 H
and Contents of memory location D001H be 23H.

Solution:
D000H=20H
D001H=23H
D002H=20H+23H
=43H

Code:

LXI H,D000H
MOV A,M
INX H
ADD M
INX H
MOV M,A
HLT

Explanation:
Instruction Comment Operation

41
 LXI H,D000H Set HL as memory pointer at H=D0,L=00
memory location D000H D000:20H
MOV A,M Load First operand in A=20H
accumulator
INX H Increment HL to point next H=D0, L=01
memory location i.e. D001H D001:23H
ADD M Add second operand to first A=A+M
operand A=20H+23H
A=43H
INX H Increment HL to point next H=D0, L=02
memory location i.e. D002H
MOV M,A Store the result D002:43H
HLT Terminate the program STOP
execution

Subtract two 8 bit number

Program 5:
Subtract the contents of memory location D001H from memory location D000H and
place the result in memory location D002H. Let the contents of memory location D000H
be 50 H and Contents of memory location D001H be 20H.

Solution:
D000H=50H
D001H=20H
D002H=50H-20H
=30H

Code:

LXI H,D000H
MOV A,M
INX H
SUB M
INX H
MOV M,A
HLT

Explanation:

42
 Instruction Comment Operation
LXI H,D000H Set HL as memory pointer at H=D0,L=00
memory location D000H D000:50H
MOV A,M Load First operand in A=50H
accumulator
INX H Increment HL to point next H=D0, L=01
memory location i.e. D001H D001:20H
SUB M subtract second operand from A=A-M
first operand A=50H-20H
A=30H
INX H Increment HL to point next H=D0, L=02
memory location i.e. D002H
MOV M,A Store the result D002:30H
HLT Terminate the program STOP
execution

Add two 16 bit number

Program 6: Write a program to add the number in memory location D000H and D001H
with the 16 bit number in memory location D002 and D003 H. The most significant 8bit
of the two number to be added are in memory location D001H and D003H. store the
results in memory location D004H and D005H with the most significant byte in memory
location D005H.

Solution:
We have two 16bit number. Let the two number be 1234H and 4321H.
D000H=34H
D001H=12H
D002=21H
D003=43H
RESULT=1234H+4321H
=5555H
D004=55H
D005=55H

For adding two number we use two method …

Method 1:Here we will add Two LSBs and two MSBs separately and store the results

43
Code :
LHLD D000H
XCHG
LHLD D002H
MOV A,E
ADD L
MOV L,A
MOV A,D
ADC H
MOV H,A
SHLD D004H
HLT

Explanation:

Instruction Comment Operation

LHLD D000H Load the first 16 bit number in H=12H,L=34H
HL register pair
XCHG Save the 16 bit number in DE D=12H, E=34H
register pair
LHLD D002H Load the second 16 bit number H=43H, L=21H
in HL register pair
MOV A,E Load the lower byte of the first A=34H
number in accumulator

ADD L Add two lower bytes A=A+L=34+21=55

MOV L,A Store the result in L register L=55H

MOV A,D Load the higher byte of first A=12H

number in accumulator
ADC H Add two higher bytes along A=A+H+CY
with carry of the lower byte A=12+43+0
addition A=55
MOV H,A Store the result in h register H=55H

SHLD D004H Store the 16 bit result in D004H=55H

memory location D004 and D005H=55H
D005H
HLT Terminate the program STOP
execution

44
Method 2:
Here we will store two numbers in the register pair DE and HL. Then using DAD
instruction we will add the two 16 bit numbers. The result of addition will be stored in
HL register pair.

Code :
LHLD D000H
XCHG
LHLD D002H
DAD D
SHLD D004H
HLT

Explanation:

Instruction Comment Operation

LHLD D000H Load the first 16 bit number in H=12H,L=34H
HL register pair
XCHG Save the 16 bit number in DE D=12H, E=34H
register pair
LHLD D002H Load the second 16 bit number H=43H, L=21H
in HL register pair
DAD D Add two 16 bit number HL=HL+DE
HL=4321+1234
HL=5555H
H=55H, L=55H
SHLD D004H Store the 16 bit result in D004H=55H
memory location D004 and D005H=55H
D005H
HLT Terminate the program STOP
execution

Subtract two 16 bit numbers:

Program 7:
Subtract the 16 bit number in memory location D002H and D003H from the 16 bit
number in memory location D000H and D001H. The most significant eight bits of the
two number are in memory locations D001H and D003H. Store the result in memory
location D004 and D005H with the most significant bit in memory location D005H.

Solution:

45
D000H=34H
D001H=12H
D002H=00H
D003H=01H

Result=1234H-0100H=1134
D004H=34H
D005H=11H

Code:
LHLD D000H
XCHG
LHLD D002H
MOV A,E
SUB L
MOV L,A
MOV A,D
SBB H
MOV H,A
SHLD D004H
HLT

Explanation:
Instruction Comment Operation
LHLD D000H Load the first 16 bit number in H=12H,L=34H
HL register pair
XCHG Save the 16 bit number in DE D=12H, E=34H
register pair
LHLD D002H Load the second 16 bit number H=01H, L=00H
in HL register pair
MOV A,E Load the lower byte of the first A=34H
number in accumulator
SUB L Subtract lower byte of second A=A-L=34-00=34
number CY=0
MOV L,A Store the result in L register L=34H

MOV A,D Load the higher byte of first A=12H

number in accumulator
SBB H Subtract higher byte of Second A=A-H-CY
number with borrow of A=12-01-0
previous subtraction A=11H
MOV H,A Store the result in H register H=11H

46
 SHLD D004H Store the 16 bit result in D004H=34H
memory location D004 and D005H=11H
D005H
HLT Terminate the program STOP
execution

Logic related program:-

Find the 1st complement of anumber

Program 8:
Find the 1st complement of the number stored at memory location C200H and store the
complemented number at memory location C300H.

Solution:
Let A=AAH
i.e. A=1010 1010

now, 1st complement of A=0101 0101

A=55H

Code:
LDA C200H
CMA
STA C300H
HLT
Explanation:

Instruction Comment Operation

LDA C200H Load the number in A=AAH
accumulator
CMA Complement the number A=55H

STA C300H Store the first complement of C300H=55H

number in memory location
C300H
HLT Terminate the program STOP
execution

Find the 2nd complement of a number

Program 9:
Find the 2nd complement of the number stored at memory location C200H and store the
complemented number at memory location C300H.

47
Solution:
Let A=44H
i.e. A=0100 0100 => 44H

now, 1st complement of A=1011 1011 => BBH

now , second complement will be

A=1011 1011
+ 1
--------------------------
1011 1100

A=1011 1100=>BCH

Code:

LDA C200H
CMA
ADI 01H
STA C300H
HLT

Instruction Comment Operation

LDA C200H Load the number in A=44H
accumulator
CMA Complement the number A=BBH

ADI 01H Add 1 to complemented A=BCH

number
STA C300H Store the result C300H=BCH

HLT Terminate the program STOP

execution

Program -10:Multiplication of two 8 bit number:-

Code:
LXI H,4150
MOV B,M
MVI A,00
MVI D,00

48
 INX H
MOV C,M
LOOP2: ADD B
JNC loop
INR D
loop: DCR C
JNZ LOOP2
STA 4152
MOV A, D
STA 4153
HLT

Instruction Comment Operation

LXI H,4150 H=50,L41
MOV B,M Get the first number in B register
MVI A,00 Initialize Accumulator content to 00
MVI D,00 Initialize register D to 00
INX H
MOV C,M Get the second number in C- reg.
LOOP2: ADD B Add content of A register to register B.
JNC loop Jump on no carry to loop.
INR D Increment content of register D
loop: DCR C Decrement content of register C.
JNZ LOOP2 Jump on no zero to address
STA 4152 Store the result in Memory
MOV A, D
STA 4153 Store the MSB of result in Memory
HLT Terminate the program.

Program -11:Division of two 8 bit number:-

Code:
LXI H, 4150H
MOV B,M
MVI C,00
INX H
MOV A,M
LOOP2: CMP B
JC LOOP
SUB B
INR C
JMP LOOP2
LOOP: STA 4152
MOV A,C
STA 4153

49
 HLT

Explanation:

Instruction Comment Operation

LXI H, 4150
MOV B,M Get the divisor in B – reg.
MVI C,00 Clear C – reg for qoutient
INX H
MOV A,M Get the divident in A – reg.
NEXT: CMP B Compare A - reg with register B.
JC LOOP Jump on carry to LOOP
SUB B Subtract A – reg from B- reg.
INR C Increment content of register C.
JMP NEXT Jump to NEXT
LOOP: STA 152 Store the remainder in Memory
MOV A,C
STA 4153 Store the quotient in memory
HLT Terminate the program.

NOTE: CMP Instruction

⦁ If A > R : CY = 0 and Z = 0
⦁ If A = R : Cy = 0 and Z = 1
⦁ If A < R : CY = 1 and Z = 0

Program 12: Write a program to transfer a block of data stored from memory location
2050H -2060H to the new memory location starting from the address 2070H.
CODE:

LXI H,2050H

LXI D,2070H

MVI B,0A

LOOP: MOV A,M

STAX D

INX H

50
INX D

DCR B

JNZ LOOP

HLT

Explanation:

Instruction Comment Operation

LXI H, 2050H Load the address 2050H into the H and L registers (16-bit)
LXI D, 2070H Load the address 2070H into the D and E registers (16-bit)
MVI B, 0AH Load the value 0AH (10 in decimal) into the B register
LOOP: MOV A, M Load the value from the memory location pointed to by
the HL register pair into the A register
MOV M, A Store the value from the A register into the memory
location pointed to by the DE register pair
INX H Increment the HL register pair to point to the next source
memory location
INX D Increment the DE register pair to point to the next
destination memory location
DCR B Decrement the value in the B register by 1 (loop counter)
JNZ LOOP Jump to the label LOOP if the B register is not zero

HLT Halt the microprocessor

Program 13: Write a program in assembly language to find largest number in array

LXI H, 4200H
MOV A, M
INX H
MOV B,M
DCR B
LOOP: INX H
CMP M
JNC SKIP
MOV A, M
SKIP: DCR B
JNZ LOOP
STA 4300H

51
HLT

Explanation:

Instruction Comment Operation

LXI H, 4200H Load the address of the array in memory (e.g., 4200H) into
the H and L registers
MOV A, M Move the first value from the array into the A register
(assuming it's the largest)
INX H Increment the HL register pair to point to the next element
in the array
MOV B, M Move the second value from the array into the B register
DCR B Decrement the value in the B register by 1
LOOP: INX H Increment the HL register pair to point to the next element
in the array
CMP M Compare the value in the A register with the value from the
array
JNC SKIP Jump to the label SKIP if no carry (A >= M)
MOV A, M Move the value from the array into the A register (as it's
larger)

SKIP: DCR B Decrement the value in the B register by 1

JNZ LOOP Jump to the label LOOP if the B register is not zero

STA 4300H Store the largest value found in the A register at memory
location 4300H

HLT Halt the microprocessor

Program 14: Write a program in assembly language to find smallest number in array

LXI H, 4200H
MOV A, M
INX H
MOV B, M
DCR B
LOOP: INX H
CMP M
JC SKIP
MOV A, M ;
SKIP: DCR B
52
JNZ LOOP
STA 4300H
HLT

Explanation:

Instruction Comment Operation

LXI H, 4200H Load the address of the array in memory (e.g., 4200H) into
the H and L registers
MOV A, M Move the first value from the array into the A register
(assuming it's the smallest)
INX H Increment the HL register pair to point to the next element
in the array
MOV B, M Move the second value from the array into the B register
DCR B Decrement the value in the B register by 1
LOOP: INX H Increment the HL register pair to point to the next element
in the array
CMP M Compare the value in the A register with the value from the
array
JC SKIP Jump to the label SKIP if there is a carry (A < M)
MOV A, M Move the value from the array into the A register (as it's
smaller)
SKIP: DCR B Decrement the value in the B register by 1

JNZ LOOP Jump to the label LOOP if the B register is not zero

STA 4300H Store the smallest value found in the A register at memory
location 4300H

HLT Halt the microprocessor

Program-15: Write a program to sort an array in the ascending order

LXI H,5000
MOV C,M
DCR C
OUTERLOOP: MOV D,C
LXI H,5001
INNERLOOP: MOV A,M
INX H
CMP M
JC SKIP
MOV B,M
MOV M,A
53
 DCX H
MOV M,B
INX H
SKIP: DCR D
JNZ INNERLOOP
DCR C
JNZ OUTERLOOP
HLT

Instruction Comment Operation

LXI H,5000 Set pointer for array
MOV C,M Load the Count
DCR C Decrement Count
OUTERLOOP: MOV
D,C
LXI H,5001
INNERLOOP: MOV copy content of memory location to Accumulator
A,M
INX H
CMP M
JC SKIP Jump to skip if carry generated
MOV B,M Copy content of memory location to B - Register
MOV M,A Copy content of Accumulator to memory location
DCX H Decrement content of HL pair of registers
MOV M,B Copy content of B - Register to memory location
INX H Increment content of HL pair of registers
SKIP: DCR D Decrement content of Register - D
JNZ INNERLOOP Jump to INNERLOOP if not equal to zero
DCR C Decrement count
JNZ OUTERLOOP Jump to OUTERLOOP if not equal to zero
HLT Terminate Program

Program-16: Write a program to sort an array in the descending order

Code:
LXI H,5000
MOV C,M
DCR C
OUTERLOOP: MOV D,C
LXI H,5001
INNERLOOP: MOV A,M
INX H
CMP M
JNC SKIP
MOV B,M

54
 MOV M,A
DCX H
MOV M,B
INX H
SKIP: DCR D
JNZ INNERLOOP
DCR C
JNZ OUTERLOOP
HLT

Code:
Instruction Comment Operation
LXI H,5000 Set pointer for array
MOV C,M Load the Count
DCR C Decrement Count
OUTERLOOP: MOV D,C
LXI H,5001 Load starting address of data array
INNERLOOP: MOV A,M copy content of memory location to
Accumulator
INX H
CMP M
JNC SKIP Jump to skip if carry not generated
MOV B,M copy content of memory location to B -
Register
MOV M,A copy content of A - Register to memory
location
DCX H Decrement content of HL pair of registers
MOV M,B
INX H Increment content of HL pair of registers
SKIP: DCR D
JNZ INNERLOOP Jump to LOOP if not Zero
DCR C Decrement Count
JNZ OUTERLOOP Jump to REPEAT if not Zero
HLT Terminate Program
Program-17:Write a program in assembly language to generate first 10 odd numbers.

Code:
MVI A,01
MVI B,02
MVI C,0A
LXI H,4200H
LOOP:ADD B
MOV M,A
INX H
DCR C

55
JNZ LOOP
HLT

Program-18:Write a program in assembly language to generate first 10 even numbers.

Code:
MVI A,00H
MVI B,02H
MVI C,0A
LXI H,4200H
LOOP:ADD B
MOV M,A
INX H
DCR C
JNZ LOOP
HLT

Program -19: Write a program in assembly language to calculates the sum of the first 6
elements of an array located at memory address 2050H and stores the sum in register B.

Code:
LXI H, 2050H
MVI C, 06H
MVI B, 00H
MVI D, 00H
L2: MOV A, M
ADD B
MOV B, A
JNC L1
56
INR D
L1: INX H
DCR C
JNZ L2
HLT

LXI H, 2050H Load immediate data 2050H into register pair H-L
MVI C, 06H Move immediate data 06H into register C
MVI B, 00H Move immediate data 00H into register B
MVI D, 00H Move immediate data 00H into register D
L2: MOV A, M Move data from memory location pointed to by H-L
into register A
ADD B Add data in register B to A
MOV B, A Move data from A to B
JNC L1 Jump to label L1 if no carry (no overflow) after addition
INR D Increment the value in register D
L1: INX H Increment the value of H-L register pair
DCR C Decrement the value in register C
JNZ L2 Jump to label L2 if Z flag is not set (C is not zero)
HLT Halt the program

Program-19: Six bytes are stored in memory location starting at 2050H. Add all the data
bytes, save any carry generated while adding the data bytes. Display the entire sum at two
output ports and store total carry in 2070H and sum in 2071H.

Code:

LXI H, 2050H
MVI C, 06H
MVI B, 00H
MVI D, 00H
L2: MOV A, M

57
ADD B
MOV B, A
JNC L1
INR D
L1: INX H
DCR C
JNZ L2
HLT

Explanation:

LXI H, 2050H Load immediate data 2050H into register pair H-L
MVI C, 06H Move immediate data 06H into register C
MVI B, 00H Move immediate data 00H into register B
MVI D, 00H Move immediate data 00H into register D
L2: MOV A, M Move data from memory location pointed to by H-L
into register A
ADD B Add data in register B to A
MOV B, A Move data from A to B
JNC L1 Jump to label L1 if no carry (no overflow) after addition
INR D Increment the value in register D
L1: INX H Increment the value of H-L register pair
DCR C Decrement the value in register C
JNZ L2 Jump to label L2 if Z flag is not set (C is not zero)
HLT Halt the program

Binary to BCD conversion

Steps:
There are the following steps to convert the binary number to BCD:
⦁ First ,we will convert the binary number into decimal
⦁ then we will convert the decimal number into BCD.

Let, 8 bit number will be

1111 1111=> (FF)H => (255)10

⦁ Now ,(FF)H is stored in 8200H

⦁ Unit digit in 8201
⦁ 10is digit into 8203

58
 ⦁ And 100’s digit into 8203H
⦁ B register for is used for 100’s and C register is used for 10’s

Code:
LDA 8200
MVI B,00H
MOV C,B
X: CPI 64H
JC LOOP1
SUI 64H
INR B
JMP X
LOOP1: CPI 0A
JC LOOP2
SUI 0A
INR C
JMP LOOP1
LOOP2: STA 8201H
MOV A,C
STA 8202H
MOV A,B
STA 8203H
HLT

Explanation:

Instruction Comment Operation

LDA 8200 Load Ace with (FF)H
MVI B,00H B register initialized with 00
MOV C,B C register initialized with 00
X: CPI 64H compare number with
100(64H)
JC LOOP1 jump if no. <100
SUI 64H Subtract 64H from Acc
INR B increment B
JMP X jump unconditionally to X
LOOP1: CPI 0A Compare data in A with
10(0AH)
JC LOOP2 Jump if number <10
SUI 0A Subtract 10 from the no.
INR C increment C
JMP LOOP1 Jump unconditionally to
Loopl
59
 LOOP2: STA 8201H Store in 8201H
MOV A,C copy data in C to Acc
STA 8202H store content in Acc in 8202H
MOV A,B copy data in B to Acc
STA 8203H store data in 8203H
HLT end program

Bcd to binary conversion

Lets consider the BCD number is (72)BCD stored in 8200H

Code:
LDA 8200H
MOV B,A
ANI 0FH
MOV D,A
MOV A,B
ANI F0
RLC
RLC
RLC
RLC
MOV C,A
MVI E,OAH
MVI A,00H
L1: ADD C
DCR E
INZ L1
ADD D
STA 820111
HLT

Explanation:

LDA 8200H Acc loaded with 8200H

MOV B,A No. moved to B
ANI 0FH AND immediately with OFH
to get 02
MOV D,A D copied with 02 ; D=02
MOV A,B A copied with B ; A=72
ANI F0 AND immediately with FOH
to get 70

60
 RLC We need 07 therefore RLC
instructions are used to get 07
RLC
RLC
RLC
MOV C,A C copied with data in Acc
MVI E,OAH E copied with OAH(10)
MVI A,00H A copied with 00
L1: ADD C ADD c with content in Acc
DCR E decrement E
INZ L1 Jump to L1 if non zero
ADD D ADD d with content in Acc
STA 820111 Store data in Acc in 8201H
HLT ends programm

Note:-Updating…….

----------------------------------------------End Of Unit-4-------------------------------------------

Unit 4: Assembly Language Programming (10 Hrs.)

 Programming with Intel 8085 Microprocessor
 Instruction and Data Format
 Mnemonics and Operands
 Instruction Sets
- Data Transfer:- MOV, IN, OUT, STA,LDA, LXI, LDAX, STAX,
XCHG
- Arithmetic and Logic:- ADD, SUB, INR, DCR, AND, OR, XOR, CMP,
RLC, RRC, RAL, RAR
- Branching:- JMP, JNZ, JZ, JNC, JC, CALL
- Stack:- PUSH, POP
 Multiplication and Division

61
 Simple Sequence Programs, Branching, Looping
 Array(Sorting) and Table Processing
 Decimal to BCD Conversion

 Programming with Intel 8086 microprocessor

 Macro Assembler
 Assembling and Linking
 Assembler Directives, Comments
 Instructions: LEA, MUL, DIV, LOOP, AAA, DAA
 INT 21H Functions
- 01H, 02H, 09H, 0AH, 4CH
 INT 10H Functions (Introduction Only)
- 00H, 01H, 02H, 06H, 07H, 08H, 09H, 0AH

Simple String and Character Manipulation Programs

 Debugging

Assignment:

62