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Binary Adder

A binary adder-subtractor circuit uses full adders connected in cascade to add or subtract two binary numbers. It includes an exclusive-OR gate with each full adder to allow the circuit to operate as either an adder when the mode input M=0, or as a subtractor when M=1. An overflow occurs when the sum of two numbers is too large to be represented in the number of bits, and can be detected by comparing the carry into and out of the sign bit position.

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145 views

Binary Adder

A binary adder-subtractor circuit uses full adders connected in cascade to add or subtract two binary numbers. It includes an exclusive-OR gate with each full adder to allow the circuit to operate as either an adder when the mode input M=0, or as a subtractor when M=1. An overflow occurs when the sum of two numbers is too large to be represented in the number of bits, and can be detected by comparing the carry into and out of the sign bit position.

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Binary Adder-Subtractor

4.3Binary Adder
• A binary adder is a digital circuit that produces the arithmetic sum of two binary
numbers.

• It can be constructed with full adders connected in cascade with the output carry from
each full adder connected to the input carry of the next full adder in the chain.

• Figure 4.9 shows the interconnection of four full-adder (FA) circuits to provide a four-bit
binary ripple carry adder.

• An n-bit adder requires n full adders with each output carry connected to the input carry
of the next higher-order full adder

• To demonstrate with a specific example, consider the two binary numbers A = 1011
andB = 0011. Their sum S = 1110 is formed with the four-bit adder as follows:
• The bits are added with full adders, starting from the least significant position (subscript
0), to form the sum bit and carry bit.

• The input carry C0 in the least significant position must be 0.

• The value of Ci+1 in a given significant position is the output carry of the full adder.

• This value is transferred into the input carry of the full adder that adds the bits one higher
significant position to the left.

• The sum bits are thus generated starting from the rightmost position and are available as
soon as the corresponding previous carry bit is generated.

• The four-bit adder is a typical example of a standard component.

4.4 Binary Subtractor


• The subtraction A - B can be done by taking the 2’s complement of B and adding it to A .

• The 2’s complement can be obtained by taking the 1’s complement and adding 1 to the
least significant pair of bits.

• The 1’s complement can be implemented with inverters, and a 1 can be added to the sum
through the input carry.

• The addition and subtraction operations can be combined into one circuit with one
common binary adder by including an exclusive-OR gate with each full adder.

• A four-bit adder–subtractor circuit is shown in Fig. 4.13 .


• The mode input M controls the operation.

• When M = 0, the circuit is an adder, and when M = 1, the circuit becomes a subtractor.

• Each exclusive-OR gate receives input M and one of the inputs of B .

• M=0, the circuit is an adder (B⊕0 = B)

• M=1, the circuit is a subtractor (B⊕1 = B’, C0=1)

– This is equal to A plus the 2’s complement of B , Since C0=1 (ie. 2’s complement
of B =B’+1-this 1 is C0)

Overflow
• When two numbers of n digits each are added and the sum occupies n+1 digits, an
overflow occurs.

• The detection of an overflow after the addition of two binary numbers depends on
whether the numbers are considered to be signed or unsigned.

• When two unsigned numbers are added, an overflow is detected from the end carry out of
the most significant position.

• In the case of signed numbers, two details are important:


– the leftmost bit always represents the sign, and negative numbers are in 2’s-
complement form.

– When two signed numbers are added, the sign bit is treated as part of the number
and the end carry does not indicate an overflow.

• An overflow cannot occur after an addition if one number is positive and the other is
negative, since adding a positive number to a negative number produces a result whose
magnitude is smaller than the larger of the two original numbers.

• An overflow may occur if the two numbers added are both positive or both negative. To
see how this can happen, consider the following example:

• Examples: two signed binary numbers, +70 and +80, stored in two 8-bit register (+127 to
-128)

An overflow condition can be detected by observing

– the carry into the sign bit position


– the carry out of the sign bit position

• An overflow has occurred if two carries are not equal (V bit)

• An overflow condition can be detected by observing the carry into the sign bit position
and the carry out of the sign bit position. If these two carries are not equal, an overflow
has occurred.

• If the two carries are applied to an exclusive-OR gate, an overflow is detected when the
output of the gate is equal to 1.

• If V = 0 after an addition or subtraction, then no overflow occurred and the n -bit result is
correct.

• If V = 1, then the result of the operation contains n + 1 bits, but only the rightmost n bits
of the number fit in the space available, so an overflow has occurred. The (n + 1) th bit is
the actual sign and has been shifted out of position.

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