TRIBHUVAN UNIVERSITY

INSTITUTE OF ENGINEERING
THAPATHALI CAMPUS

Logic Circuit-EX-502
Unit 5: Arithmetic Circuits
Presented By
Er. Ganesh Kumal
Department of Electronics & Computer Engineering
IOE ,Thapathali Campus

5 May, 2023
Contents
5.1 Binary Addition
5.2. Binary Subtraction
5.3. Unsigned Binary Numbers
5.4. Sign‐Magnitude Numbers
5.5. 2’s Complement Representation
5.6. 2’s Complement Arithmetic
5.7. Arithmetic Building Blocks
5.8. The Adder‐Subtracter
5.9. Fast Adder
5.10. Arithmetic Logic Unit
5.11. Binary Multiplication and Division
5.12. Arithmetic Circuits Using HDL
Binary Arithmetic
• Binary arithmetic is essential part of all the digital computers and
many other digital systems.
Binary Addition
• It is a key for binary subtraction, multiplication and division. There
are four rules of binary addition:
Table 2.2 : Truth Table of Binary Addition Example:

• In fourth case, a binary addition is creating a sum of (1 + 1= 10),

i.e. 0 is written in the given column and a carry of 1 over to the
next column.

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Binary Subtraction
• Difference and borrow, these two terms will Example:
be used very frequently in the binary
subtraction. There are four rules of binary
subtraction:
Table 6.5: truth Table of Binary Subtraction

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 Binary Multiplication
• Binary multiplication is similar to
decimal multiplication. It is simpler
than decimal multiplication because
only 0s and 1s are involved. There are
four rules for binary multiplication.
Table 6.6: Truth Table of Binary
Multiplication

Binary Division: Binary division is similar to

decimal division.

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Signed and Unsigned Number
Unsigned Number
• There is only one way of representing positive numbers with sign-bit 0
• Positive integers including zero can be represented as unsigned number.

Signed Number:
• To represent negative integers, we need a notation for negative values.
• If the binary number is signed, then the leftmost bit represent the sign and rest of the bits
represent the magnitude.
• The convention is to make the sign bit 0 for positive number and 1 for negative number.
• For example:
+ 9 = 01001
− 9 = 11001

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Signed Number Representation
• Consider number 9 is represented in binary with 8-bits:
00001001
• + 9 is represented with sign bit 0 in the leftmost position
followed by binary equivalent of 9.
• Although there is only one way to represent + 9, there
are three different ways to represent − 9.
• In signed -magnitude representation: 10001001
• In signed-1’s complement representation: 11110110
• In signed- 2’s complement representation: 11110111

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Representing Negative Numbers
Signed Magnitude Notation Signed 1’s complement Signed 2’s complement
• Complement only the notation notation
sign bit Complements all the bits • Take the 2’s complement of
the number including sign
• Example: +9 0 0001001 including sign bit
bit
-9 1 0001001 Example: • Example:
+9 0 0001001 +9 0 0001001
-9 1 1110110 -9 1 1110111
Arithmetic Addition
In each of the 4 cases, the operation
performed is always addition, including the
sign-bits. Any carry out of the sign bit is
discarded and negative results are
automatically in 2's complement form.
Complements
• Complements are used in the digital computers in order to simplify
the subtraction operation and for the logical manipulation.
• There are two types of complements:
• Radix complement (r’s complement)
• Diminished complement ( r-1)’s complement

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Binary Complement
1’s Complement 2’s Complement
• 1’s complement of a number • The 2’s complement of binary number
is obtained by adding 1 to the least
is found by changing all 1’s to significant bit (LSB) of the 1’s
0’s and 0’s to 1’s. complement.
• 2’s complement = 1’s complement + 1

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1’s complement subtraction

• Subtracting smaller number

from larger one, the method is
as follows:
• Determine 1’s complement of the
smaller one.
• Add 1’s complement of the smaller
one to the larger one.
• Remove the carry and add it to the
When subtracting larger number from
result. The carry is called end smaller one, there is no carry and the
around carry. result is in 1’s complement form and
opposite sign (negative).

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 2’s Complement Subtraction
• Example:
• Subtract (1001)2 from
• For subtracting a smaller number (1100)2, by 2’s complement
from larger one, the method is as method.
follows:
• Find the 2’s complement of the 1100
2’s comp. of 1001
smaller number. + 0111
• Add 2’s complement to the larger
one. End around carry 10011
• Discard carry. Result= 11
discard carry
When subtracting larger number
from smaller one, there is no carry Class work: Subtract by 2’s complement
method.
and the result is in 2’s i. (111)2 from (1000)2
complement form and opposite
sign (negative). ii. (1110)2 from (1000)2

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Half-Adder
• A combinational circuit that performs addition of two single bit numbers.
• The circuit has two input variables A and B and two outputs: sum(S) and carry(C).
From truth table,
S = A’B + AB’
C = AB

Figure : Block diagram, truth table and circuit diagram of half adder.
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 Full-Adder
• A combinational circuit that performs the addition of three bits (two
significant bits and a previous carry) is called a full adder.
• Two of the inputs, denoted by A and B, represent the two bits to be added
and third input Cin represent the carry from the previous lower significant
position.

Sum(S) = A’B’C + A’BC’ + AB’C’ + ABC

= A’(B’C + BC’) + A(B’C’ + BC)
= A’( B  C) + A( B  C)’
=ABC

Carry Out(Co)= A’BC + AB’C + ABC’ + ABC

= C( A’B + AB’) + AB ( C + C’)
= ( A  B)C + AB

Figure 6.10: (a) Block diagram (b) Truth table

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 CONT…
ABC

( A  B)C + AB

Figure: Circuit diagram of full adder

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 Implementation of Full-adder with Two
Half-adder

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Half-Subtractor
• Combinational circuit that subtracts two bits and produces their difference.
• It has two outputs; difference and borrow.

Difference (D) = A’B + AB’

Borrow (Bo) = A’B

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Full-Subtractor
• A full subtractor is a combinational circuit that performs a subtraction between
two bits, taking into account that a 1 may have been borrowed by a lower
significant stage.
• This circuit has three inputs and two outputs. The three inputs A, B and Bin
denote the minuend, subtrahend and previous borrow. The two outputs, D and
Bo, represent difference and borrow out.

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 CONT…
From truth table, we can
simplify the Difference ( D) and
Borrow out (Bout).

Table: Truth table of full subtractor

Bin = Previous Borrow

D = ( A – B - Bin)
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 Figure: Circuit diagram of full subtractor

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 Binary Adder
• This circuit sums up two binary numbers A and B of
n-bits using full-adders to add each bit-pair & carry
from previous bit position.
• The sum of A and B can be generated in two ways:
either in a serial fashion or in parallel.
o The serial addition method uses only one full-adder circuit and a
storage device to hold the generated output carry. The pair of bits in A
and B are transferred serially, one at a time, through the single full-
adder to produce a string of output bits for the sum. The stored output
carry from one pair of bits is used as an input carry for the next pair of
bits.
o The parallel method uses n full-adder circuits, and all bits of A and B
are applied simultaneously. The outputs carry from one full-adder is
connected to the input carry of the full-adder one position to its left.
As soon as the carries are generated, the correct sum bits emerge from
the sum outputs of all full-adders.

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Parallel (Fast) Adder
• A single full adder performs the addition of two single bit numbers
and an input carry.
• Parallel adder is capable for arithmetic sum of two binary numbers
that is greater than one bit.
• It consists of full adders connected in cascaded form, where carry out
from each full adder is connected to the carry input of the next higher
order full adder.

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4-Bit Binary Adder
• The 4-bit parallel adder performs the addition of two 4-bit numbers.
Let the 4-bit binary numbers:
A = A 3 A2 A1 A 0
B = B 3 B2 B1 B 0
• Two types for implementing parallel adder:
i. Use half-adder for LSB addition and full adders for remaining bits or
ii. Use full adder for all bits. Since, initial carry Cin = 0
for full adder which is used for LSB bits.

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 Figure: Circuit diagram of 4-bit parallel adder

In this way, we can implement any higher order binary

adder just by cascading the required number of full adder.

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 4-Bit Binary Subtractor
• Let the two 4-bit numbers are:
A = A 3 A2 A1 A0
B = B 3 B2 B1 B0
• If the normal bits of binary number A, complemented bits of
number B and initial carry C0 = 1 are applied to 4-bit binary
adder, then it becomes 4-bit binary subtractor.

A – B = A + B’ + 1

Figure: 4-Bit binary subtractor

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 4-Bit Binary Adder/Subtractor

Figure: 4-bit binary adder/ subtractor

✓If K = 0, then each full adder gets the normal bits of number B. So, the four bits
binary adder/subtractor produces an output which is addition of two binary
number A and B.

✓If K = 1, then each full adder gets the complement bits of number B. So, the four
bits binary adder/subtractor produces an output which is subtraction of two binary
number A and B.
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Decimal Adder- BCD Adder
• A BCD adder is a circuit that adds two BCD digits in
parallel and produces sum digit also in BCD.
• Following points should be noted for BCD addition:
i. When binary sum is less than or equal to 1001 (9)10
, corresponding BCD number is identical.
ii. When binary sum is greater than 1001, we obtain invalid
BCD sum.
iii. The addition of 6(0110)2 to the binary sum converts it to
the correct BCD and produces an output carry as
required.

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CONT…
• Adding two decimal digits in BCD, together with a possible carry, the
output sum cannot be greater than 9 + 9 + 1 = 19.
• Applying two BCD digits to a 4-bit binary adder, the adder will form
the sum in binary ranging from 0 to 19. These binary numbers are
listed in Table 5.1 and are labeled by symbols K, Z8, Z4, Z2, Z1. K is the
carry, and the subscripts under the letter Z represent the weights 8, 4,
2, and 1 that can be assigned to the four bits in the BCD code.

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 Sum  9
No carry
Valid BCD

Sum > 9
No carry
Invalid BCD

Sum > 9
carry
generated
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Invalid BCD Prepared By: Er. Ganesh Kumal 29
 CONT…
• The logic circuit that detects the necessary correction can be
derived from above table. Correction is needed when
➢The binary sum has output carry K = 1
➢The other six combinations from 1010 to 1111 that have Z8
= 1. To distinguish them from binary 1000 and 1001, which
also have a 1 in position Z8, we specify further that either
Z4 or Z2 must have a 1. The condition for a correction and
an output carry can be expressed by the Boolean function
C = K + Z8Z4 + Z8Z2

• When C = 1, it is necessary to add 0110 to the binary sum and

provide an output carry for the next stage.

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 BCD adder consists of the
following blocks:
i. A 4-bit adder to add
the given number A
and B
ii. A combinational circuit
to check if sum is
greater than 9 or carry
=1
iii. One more 4-bit adder
to add 6 (0110) to the
incorrect sum if sum >
9 or carry (K) = 1.

Figure: Block diagram of BCD adder

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Fast adder (Carry Look Ahead Adder)
• The adder produce carry propagation delay while performing other
arithmetic operations like multiplication and divisions as it uses several
additions or subtraction steps.
• This is a major problem for the adder and hence improving the speed of
addition will improve the speed of all other arithmetic operations.
• Hence reducing the carry propagation delay of adders is of great
importance.
• There are different logic design approaches that have been employed to
overcome the carry propagation problem.
• One widely used approach is to employ a carry look-ahead which solves
this problem by calculating the carry signals in advance, based on the input
signals.
• This type of adder circuit is called a carry look-ahead adder.
Fast Adder Cont…
• Carry signal will be generated in two cases:
✓Input bits A and B are 1, OR
✓When one of the two bits is 1 and the carry-in is 1.
• From full adder equation, carry for ith term is
Ci = AiBi + Ai Ci-1 + BiCi-1
Ci = AiBi + Ci-1 ( Ai + Bi)
• This can be written as;
Ci = Gi + PiCi-1 where Gi = AiBi and Pi = Ai + Bi
Fast Adder
• Starting from LSB,
C0 = G0 + P0C-1 [ C-1 will be 0 normally since initial input carry is 0]
C1 = G1 + P1C0
= G1 + P1 ( G0 + P0C-1 )
= G1 + P1 G0 + P1P0C-1
C2 = G2 + P2C1
= G2 + P2 (G1 + P1 G0 + P1P0C-1 )
= G2 + P2 G1 + P2P1 G0 + P2 P1P0C-1
C3 = G3 + P3 G2 +P3P2 G1 + P3P2 P1G0 + P3P2 P1 P0C-1
1Stage ALU

Inputs Outputs
M1 M0 Operations
0 0 SUM
0 1 AND
1 0 NOR
1 1 XOR

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1 Stage ALU

Inputs Outputs
f1 f0 Operations
0 0 NOT
0 1 OR
1 0 AND
1 1 SUM

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7/19/2023
4 bit ALU

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What About Subtraction ?
(A - B) is the same as: A + (-B)

2’s Complement: Take the inverse of every bit and add 1

ഥ
Bit-wise inverse of B is B
So,
A+B ഥ+ 1 = A + (B ഥ + 1) = A + (-B) = A - B

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Function Table
Function Selection Inputs Output
Di = Xi + Yi + Cin Function/Microoperation
S1 S0 Cin Xi Yi
0 0 0 A B F = A+B Add
0 0 1 A B F = A+B+1 Add with carry
0 1 0 A ഥ
𝐁 ഥ
F = A+𝐁 Subtract with borrow
0 1 1 A ഥ
𝐁 ഥ +1
F = A+𝐁 Subtract
1 0 0 A 0 F=A Transfer A
1 0 1 A 0 F = A+1 Increment A
1 1 0 A 1 F = A-1 Decrement A
1 1 1 A 1 F=A Transfer A

From the table we got seven different micro-operation

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From the figure we have
got output of multiplexer
[logical circuit] Yi as
S1 S0 Yi
0 0 B
0 1 ഥ
𝐁
1 0 0
1 1 1

From the figure we have got

output of Full Adder
[Arithmetic circuit] as

Di = Xi + Yi + Cin
= Ai + Yi + Cin

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Design a combinational circuit that multiplies two 2-bit numbers, a1ao and b1,bo, to produce a 4-
bit product, C3,C2,C1 C0. Use AND gates and half-adders.
Thank You!!
Any Queries??
2’s Complement Representation
2’s Complement Arithmetic
Arithmetic Building Block
Adder/Subtractor
Fast Adder
Arithmetic Logic Unit
Binary Multiplication and Division