Low-Power Digital Filtering Using Approximate Processing
Low-Power Digital Filtering Using Approximate Processing
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Abstract—We present an algorithmic approach to the design of computation rate. For such applications, an architecture-driven
low-power frequency-selective digital filters based on the concepts voltage scaling approach has previously been developed in
of adaptive filtering and approximate processing. The proposed
which parallel and pipelined architectures can be used to
approach uses a feedback mechanism in conjunction with well-
known implementation structures for finite impulse response compensate for increased delays at reduced voltages [1]. This
(FIR) and infinite impulse response (IIR) digital filters. Our strategy can result in supply voltages in the 1 to 1.5 V range by
algorithm is designed to reduce the total switched capacitance using conventional CMOS technology. Power supply voltages
by dynamically varying the filter order based on signal statistics. can be further scaled using reduced threshold devices. Circuits
A factor of 10 reduction in power consumption over fixed-order
filters is demonstrated for the filtering of speech signals. operating at power supply voltages as low as 70 mV (at 300 K)
and 27 mV (at 77 K) have been demonstrated [2] [3].
Once the power supply voltage is scaled to the lowest
I. INTRODUCTION
possible level, the goal is to minimize the switched capacitance
(2) Fig. 2. Tapped delay line of an FIR filter structure, and the powering down
concept To preserve phase linearity, powering down must be applied at both
ends of the structure.
where is a symmetric -point window. This filter has
cutoff frequency and may be implemented using a tapped
delay line with taps. For the purposes of this paper, we
refer to such a filter as having order . In Fig. 1, we display
the frequency response magnitudes for three different values
of when is a rectangular window and .
It should be observed that the mean attenuation beyond the
cutoff frequency increases with filter order. Furthermore,
with respect to a tapped delay-line implementation (see Fig. 2),
the taps of the shorter Type I filters are subsets of the taps of
the longer Type I filters. This ensures that if the filter order
is to be decreased without changing the cutoff frequency, we
can simply power down portions of the tapped delay line for
the higher order filter. The price paid for such powering down
is that the stopband attenuation of the filter decreases. Fig. 3. Cascade implementation of an IIR filter structure. The detail of one
Butterworth IIR filters are commonly used for performing of the second-order sections is shown.
frequency-selective filtering in applications where frequency
dispersion is tolerable. The frequency response magnitudes of sections in its cascade implementation. An interesting property
such filters do not suffer from the ripples which can be seen in of IIR Butterworth filters is that if the second-order sections
the frequency response magnitudes for FIR filters. These IIR are appropriately ordered, one may sequentially power down
filters are commonly implemented as cascade interconnections the later second-order sections and effectively decrease the net
of second-order sections, each of which consists of five stopban attenuation of the filter.
multiplies and four delays, as shown in Fig. 3. Also in Fig. 3
is an illustration of a cascade structure for an eighth-order
IIR filter as the cascade of four second-order sections. For the III. ADAPTIVE APPROXIMATE FILTERING
purposes of this paper, we consider the order of a Butterworth In this section we present the details of our approximate
IIR filter to be equal to twice the number of second-order processing approach to low-power frequency-selective filter-
LUDWIG et al.: LOW-POWER DIGITAL FILTERING USING APPROXIMATE PROCESSING 397
TABLE I
FILTERING PERFORMANCE FOR DEMODULATING FDM SPEECH
Fig. 5. FIR filter stopband energy, ESB [k ] versus filter order, k, for the
rectangular window family of FIR filters.
V. CONCLUSIONS
An algorithm-based approach has been presented for ob-
taining low-power implementations of important classes of
IIR and FIR digital filters. In this approach, adaptive filtering
and approximate processing concepts are combined to design
digital filters which have the important property that the
filter order can be dynamically varied in accordance with
the stopband energy of the input signal. Simulations of the
proposed technique using a variety of speech signals have
shown that our approach offers significant power savings over
standard fixed-order implementations. Finally, we note that
while we illustrated our proposed technique in the context of
lowpass filtering applications, it is equally applicable to other
types of frequency-selective filtering.
REFERENCES
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architecture,” in Proc. Int. Conf. on Acoustics, Speech, and Signal
Processing, Apr. 1994, pp. II-409–412.
[8] S. Haykin, Adaptive Filter Theory. Englewood Cliffs, NJ: Prentice-
Hall, 1991.
[9] V. R. Lesser, J. Pavlin, and E. Durfee, “Approximate processing in
real-time problem solving,” AI Mag., pp. 49–61, Spring, 1988.
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incremental refinement and deadline-based algorithms,” in Proc. IEEE
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Fig. 8. Filter order evolution for the approximate filtering subband decom- [12] J. T. Ludwig, S. H. Nawab, and A. Chandrakasan, “Low power filtering
position example. The top plot shows the filter order as a function of time, using approximate processing for DSP applications,” in Proc. Custom
which tracks the input’s stopband component xs [n], which is shown in the Integrated Circuits Conf. (CICC), Santa Clara, CA. May, 1995, pp.
bottom plot. 185–188.
[13] A. Oppenheim and R. Schafer, Discrete-Time Signal Processing. En-
glewood Cliffs, NJ: Prentice-Hall, 1989.
6) Subband Coding: Data compression techniques for
voice signals often use a binary tree-structured filterbank of
highpass and lowpass filters, as depicted at the top of Fig. 8.
Each of these filters may be implemented using the proposed
approximate filtering technique. To illustrate the potential for
Jeffrey T. Ludwig received the S.B. degree in aero-
power savings in the first stage of the subband decomposition, nautics and astronautics in 1991 and the S.M. degree
an approximate FIR lowpass filter was applied to a speech in electrical engineering in 1993, both from the
signal, , corresponding to the sentence, “That shirt seems Massachusetts Institute of Technology, Cambridge,
MA.
much too long.” The time-varying FIR filter order used by He is currently a graduate student in the Digital
our technique is shown in the top plot of Fig. 8. The bottom Signal Processing Group of the Research Laboratory
plot in Fig. 8 shows the input’s stopband component, , to of Electronics at MIT, pursuing a Ph.D. in electrical
engineering. His research interests are in digital
demonstrate that the filter order roughly tracks the stopband signal processing and its applications.
energy of the input signal.
400 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 31, NO. 3, MARCH 1996
S. Hamid Nawab received the S.B., S.M., and Anantha P. Chandrakasan received the B.S, M.S.,
Ph.D. degrees in electrical engineering from the and Ph.D. degrees in electrical engineering and
Massachusetts Institute of Technology in 1977, computer sciences from the University of California,
1979, and 1982, respectively. Berkeley, in 1989, 1990, and 1994, respectively.
He is currently an Associate Professor in the Since September 1994, he has been the analog
Department of Electrical, Computer, and Systems devices career development Assistant Professor of
Engineering at Boston University. He has held Electrical Engineering at the Massachusetts Institute
visiting professorships in electrical engineering of Technology, Cambridge. His research interests
at MIT (1994–95) and in computer science at include the ultra low power implementation of cus-
University of Massachusetts at Amherst (1988–89). tom and programmable digital signal processors,
His research primarily involves the exploration of wireless sensors and multimedia devices, emerging
new algorithms and architectures for digital and knowledge-based signal technologies, and CAD tools for VLSI. He is a co-author of the book titled
processing. He is co-editor of the book, Symbolic and Knowledge-based Low Power Digital CMOS Design (Kluwer).
Signal Processing (Prentice-Hall, 1992). He also joins A. V. Oppenheim and Dr. Chandrakasan has received the NSF Career Development Award and
A. S. Willsky on the forthcoming second edition of their Prentice-Hall text the IBM Faculty Development Award. He received the IEEE Communications
on Signals and Systems. Society 1993 Best Tutorial Paper Award for the IEEE Communications
Dr. Nawab is the winner of the 1988 Paper Award from the IEEE Magazine paper titled, “A Portable Multimedia Terminal.”
Signal Processing Society for his paper entitled “Direction Determination
of Wideband Signals.” He is also the recipient of the 1993 Metcalf Award
for Excellence in Teaching at Boston University.