Microprocessor - Chapter 1 – Exercises – Solution
1. Consider three different processors P1, P2, and P3 executing the same instruction set. P1 has a
3 GHz clock rate and a CPI of 1.5. P2 has a 2.5 GHz clock rate and a CPI of 1.0. P3 has a 4.0
GHz clock rate and has a CPI of 2.2.
a. Which processor has the highest performance expressed in instructions per second?
b. If the processors each execute a program in 10 seconds, find the number of cycles and
the number of instructions.
c. We are trying to reduce the execution time by 30% but this leads to an increase of 20%
in the CPI. What clock rate should we have to get this time reduction?
a. P=f/CPI
b. n= F x time and IC= n / CPI ou bien IC= P(of part a) x time
c.
2. Consider two different implementations of the same instruction set architecture. The
instructions can be divided into four classes according to their CPI (class A, B, C, and D). P1
with a clock rate of 2.5 GHz and CPIs of 1, 2, 3, and 3, and P2 with a clock rate of 3 GHz and
CPIs of 2, 2, 2, and 2. Given a program with a dynamic instruction count of 106 instructions
divided into classes as follows: 10% class A, 20% class B, 50% class C, and 20% class D.
a. Which is faster P1 or P2?
b. What is the global CPI for each implementation?
c. Find the clock cycles required in both cases.
3. Compilers can have a profound impact on the performance of an application. Assume that for
a program, compiler A results in a dynamic instruction count of 109 and has an execution time
of 1.1 s, while compiler B results in a dynamic instruction count of 1.2x109 and an execution
time of 1.5 s.
a. Find the average CPI for each program given that the processor has a clock cycle time of
1 ns.
b. Assume the compiled programs run on two different processors. If the execution times
on the two processors are the same, how much faster is the clock of the processor running
compiler A’s code versus the clock of the processor running compiler B’s code?
c. A new compiler is developed that uses only 6.0E8 instructions and has an average CPI
of 1.1. What is the speedup of using this new compiler versus using compiler A or B on
the original processor?
4. Assume for arithmetic, load/store, and branch instructions, a processor has CPIs of 1, 12, and
5, respectively. Also assume that on a single processor a program requires the execution of
2.56x109 arithmetic instructions, 1.28x109 load/store instructions, and 256 million branch
instructions. Assume that each processor has a 2 GHz clock frequency.
Assume that, as the program is parallelized to run over multiple cores, the number of arithmetic
and load/store instructions per processor is divided by 0.7 x p (where p is the number of
processors) but the number of branch instructions per processor remains the same.
a. Find the total execution time for this program on 1, 2, 4, and 8 processors, and show the
relative speedup of the 2, 4, and 8 processor result relative to the single processor result.
b. If the CPI of the arithmetic instructions was doubled, what would the impact be on the
execution time of the program on 1, 2, 4, or 8 processors?
c. To what should the CPI of load/store instructions be reduced in order for a single
processor to match the performance of four processors using the original CPI values?
a. solution
SPEEDUP = TNEW/TOLD
b. solution
c. solution
