0% found this document useful (0 votes)
231 views32 pages

8255 Programmable Peripheral Interface

The 8255 PPI chip is a programmable parallel I/O device designed to interface peripheral devices to Intel microprocessors. It has three 8-bit I/O ports (PORT A, PORT B, PORT C) that can be programmed to transfer data under different conditions. PORT C can be split into two 4-bit ports. The ports can operate in three modes - Mode 0 provides basic I/O, Mode 1 adds handshaking, and Mode 2 enables bidirectional I/O on PORT A. The chip uses address lines, control lines and data lines to communicate with the microprocessor.

Uploaded by

shubham kumar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
231 views32 pages

8255 Programmable Peripheral Interface

The 8255 PPI chip is a programmable parallel I/O device designed to interface peripheral devices to Intel microprocessors. It has three 8-bit I/O ports (PORT A, PORT B, PORT C) that can be programmed to transfer data under different conditions. PORT C can be split into two 4-bit ports. The ports can operate in three modes - Mode 0 provides basic I/O, Mode 1 adds handshaking, and Mode 2 enables bidirectional I/O on PORT A. The chip uses address lines, control lines and data lines to communicate with the microprocessor.

Uploaded by

shubham kumar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 32

Programmable Peripheral Interface

INTEL-8255
The 8255 is a general purpose programmable, Parallel I/O device designed for use with Intel
microprocessors. It consists of three 8-bit bidirectional I/O ports (24 I/O lines) that can be
programmed to transfer data under various conditions from simple I/O to interrupt I/O.
The three ports are PORT A, PORT B & PORT C.
Port A contains one 8-bit output latch/buffer and one 8-bit input buffer. Port B is same as PORT
A. However, PORT C can be split into two parts PORT C lower (PC0-PC3) and PORT C upper
(PC7-PC4) by the control word. The three ports are divided in two groups Group A (PORT A
and upper PORT C) Group B (PORT B and lower PORT C).
Block Diagram:

Pin Diagram:
Read write control logic:
The function of this block is to manage all the internal and external transfers of both data and
control or status word. The details of each pin connected with this block are described below.
𝑪𝑺 (Chip Select)- A “Low” on this input pin enables the communication between the 8085 and
MPU.
A0 and A1- These are the address lines of 8255 which are directly connected to the MPU lower
address lines (A0, A1). The bit combination of these signals are shown below.

PPI 8255 can operate in three modes:


(a) Mode 0 (b) Mode 1 and (c) Mode 2.
Apart from these there is another mode called BSR mode (Bit Set/Reset mode)
The three modes are Mode 0, Mode 1 and Mode 2. These are I/O operations and selected only if
D7 bit of the control word register is put as 1. The three operating modes of 8255 are distinguished
in the following manner:
Mode 0: This is a basic or simple input/output mode, whose features are:
 Outputs are latched.
 Inputs are not latched.
 All ports (A, B, CU, CL) can be programmed in either input or output mode.
 Ports don’t have handshake or interrupt capability.
 Sixteen possible input/output configurations are possible.

Mode 1: In this mode, input or outputting of data is carried out by taking the help of handshaking
signals, also known as strobe signals. The basic features of this mode are:
 Ports A and B can function as 8-bit I/O ports, taking the help of pins of Port C.
 I/Ps and O/Ps are latched.
 Interrupt logic is supported.
 Handshake signals are exchanged between CPU and peripheral prior to data transfer.
 In this mode, Port C is called status port.
 There are two groups in this mode—group A and group B. They can be configured
separately. Each group consists of an 8-bit port and a 4-bit port. This 4-bit port is used for
handshaking in each group.

Mode 2: In this mode, Port A can be set up for bidirectional data transfer using handshake signals
from Port C. Port B can be set up either in mode 0 or mode 1.
The basic operations of the three modes are shown below:

The control word format, when 8255 is operated in I/O mode, is shown below. For 8255 PPI to
be operated in I/O mode, D7 bit must be 1.
The three ports are divided into two groups—Groups
A and B. Group A consists of Port A and CU ( PC4–PC7 ) . Port A can be operated in any of the
modes—0, 1 or 2. Group B consists of Port B and CL( PC0–PC3 ). Here Port B can be operated in
either mode 0 or 1.

Fig: The CWR in the I/O mode

BSR (Bit Set Reset mode):


BSR mode stands for Bit Set Reset mode. The characteristics of BSR mode are:
 BSR mode is selected only when D7 = 0 of the Control Word Register (CWR).
 It is concerned with bits of port C.
 Individual bits of Port C can either be Set or Reset.
 At a time, only a single bit of port C can be Set or Reset.
 Is used for control or on/off switch.
 BSR control word doesn’t affect ports A and B functioning.
The content of the control word register will be as follows, when used in the BSR mode and
selects (either Sets or Resets) a particular bit of Port C at a time

Fig: The CWR in the BSR mode


PROGRAMMABLE PERIPHERAL
INTERFACE-8255
8255-PPI
• It is an I/O port chip used for interfacing I/O
devices with microprocessor system.
• It is device used to implement parallel data
transfer between processor and slow peripheral
devices like ADC, DAC, keyboard, 7-segment
display, LCD etc.
Features

• It is a programmable device.

• It has 24 I/O programmable pins like PA,PB,PC (3-8


pins).

 T T L compatible.
• 8255A has three ports
• PORT A
• PORT B
• PORT C

• Port A and Port B are 8 bit parallel ports.


• Port C can be split into two parts, i.e. PORT C
lower (PC0-PC3) and PORT C upper (PC7-PC4)
by the control word
• These three ports are further divided into two
groups,
– i.e. Group A includes PORT A and upper PORT C.

– Group B includes PORT B and lower PORT C

• These two groups can be programmed in three


different modes.
• Three operating modes :
– Mode-0(simple I/O port)

– Mode-1(Handshake I/O port)

– Mode-2(Bidirectional I/O port)


Mode 0
• In this mode, Port A and B is used as two 8-bit ports and Port
C as two 4-bit ports.

• Each port can be programmed in either input mode or output


mode where outputs are latched and inputs are not latched.

• Ports do not have interrupt capability.

• Ports in mode 0 is used to interfaces LEDs, Hexa keypad and 7


segment LEDS to the processor.
Mode 1
• In this mode, Port A and B is used as 8-bit I/O ports.

• They can be configured as either input or output


ports.

• Each port uses three lines from port C as handshake


signals.

• Inputs and outputs are latched


• MODE 1 :(Input/output with Hand shake)

• In this mode, input or output is transferred by hand


shaking Signals.
Data Bus
Computer Printer
STB’

ACK’

Busy

• Handshaking signals is used to transfer data between


whose data transfer is not same.
• Example:
• The computer send the data to the printer large speed
compared to the printer.
• When computer send the data according to the printer
speed at the time only, printer can accept.
• If printer is not ready to accept the data then after sending
the data bus , computer uses another handshaking signal
to tell printer that valid data is available on the data bus.
• Each port uses three lines from port C as handshake
signals
Mode 2
• In this mode, Port A can be configured as the
bidirectional port and Port B either in Mode 0 or Mode
1.
• Port A uses five signals from Port C as handshake
signals for data transfer.
• The remaining three signals from Port C can be used
either as simple I/O or as handshake for port B.
MODE 2:bi-directional I/O data transfer:
• This mode allows bidirectional data transfer over a single 8-bit data bus using
handshake signals.

• This feature is possible only Group A

• Port A is working as 8-bit bidirectional.

• PC3-PC7 is used for handshaking purpose.

• The data is sent by CPU through this port , when the peripheral request it.

CONTROL WORD FORMATS:

• In the INPUT mode , When RESET is High all 24 pins (3-ports) be a input mode.

• i.e all flip flops are cleared and the interrupts are rest.

• This condition is maintained even after RESET goes low.

• This can be avoid by writing single control word to the control registers , when
required.
Pin Diagram
Function of Pins
• Data bus(D0-D7):These are 8-bit bi-directional buses, connected to 8085
data bus for transferring data.

• CS: This is Active Low signal. It stands for Chip Select. A LOW on this
input selects the chip and enables the communication between the 8255 and
the CPU.

• Read: This is Active Low signal, when it is Low the microprocessor reads
data from a selected I/O port of 8255A.

• Write: This is Active Low signal, when it is Low the microprocessor


writes data into a selected I/O port .
• Address (A0-A1):This is used to select the
ports.

A1 A0 Select

0 0 PA

0 1 PB

1 0 PC

Control
1 1
reg.
• RESET: This is used to reset the device. That means clear control
registers.

• PA0-PA7: It is the 8-bit bi-directional I/O pins used to send the data to
peripheral or to receive the data from peripheral.

• PB0-PB7: Similar to PA

• PC0-PC7:This is also 8-bit bidirectional I/O pins. These lines are divided
into two groups.
1. PC0 to PC3(Lower Groups)
2. PC4 to PC7 (Higher groups)

These two groups working in separately using 4 data’s.


Block Diagram-8255
Data Bus buffer:
• It is a 8-bit bidirectional Data bus.

• Used to interface between 8255 data bus with system bus.

• The internal data bus and Outer pins D0-D7 pins are
connected in internally.

• The direction of data buffer is decided by Read/Control


Logic.
Read/Write Control Logic:

• This is getting the input signals from control bus and


Address bus

• Control signal are RD and WR.

• Address signals are A0,A1,and CS.

• 8255 operation is enabled or disabled by CS.


Group A and Group B control:
• Group A and B get the Control Signal from CPU and send the
command to the individual control blocks.
• Group A send the control signal to port A and Port C (Upper) PC7-
PC4.
• Group B send the control signal to port B and Port C (Lower)
PC3-PC0.

PORT A:
• This is a 8-bit buffered I/O latch.
• It can be programmed by mode 0 , mode 1, mode 2 .
PORT B:
• This is a 8-bit buffer I/O latch.
• It can be programmed by mode 0 and mode 1.

PORT C:
• This is a 8-bit Unlatched buffer Input and an Output
latch.
• It is splitted into two parts.
• It can be programmed by bit set/reset operation.
Operation modes in 8255
Two operating modes:
– I/O mode( mode 0, mode 1, mode2)
– Bit set/Reset mode

BIT SET/RESET MODE (BSR Mode):


• The PORT C can be Set or Reset by sending OUT instruction to the CONTROL
registers.

I/O MODES:
• MODE 0 (Simple input / Output)
• In this mode , port A, port B and port C is used as individually (Simply).

• Features:
• Outputs are latched , Inputs are buffered not latched.
• Ports do not have Handshake or interrupt capability.
Control words
• Two control words:
– I/O mode set control word(MSW)
– Bit set/reset control word(BSR)

• MSW is used to specify I/O functions.


• BSR is used to set/reset individual pins of Port C.
• Both the control words are written in the same control
register.
• 8255 ports are programmed by writing control word in the
control word in the control register.

• For setting I/O functions and mode of operation the I/O mode
set control word is send to control register.

• For setting/ resetting pins of port C, the bit set/reset control


word is send to control register.
FOR BIT SET/RESET MODE:
• This is bit set/reset control word format.
D7 D6 D5 D4 D3 D2 D1 D0

X X X BIT SET/RESET
1=SET
Don’t care 0=RESET

Bit select
0 1 2 3 4 5 6 7
0 B
10 0 1 0 1 0 1
0 B
01 1 1 0 0 1 1
0 B
02 0 0 1 1 1 1

BIT SET/RESET FLAG


=0 Active
• PC0-PC7 is set or reset as per the status of D0.

• A BSR word is written for each bit

• Example:
– PC3 is Set then control register will be 0XXX0111.

– PC4 is Reset then control register will be 0XXX01000.

• X is a don’t care.
FORMAT OF I/O MODE:
The mode format for I/O as shown in figure

D7 D6 D5 D4 D3 D2 D1 D0

Group A Group B
Port C Upper
1=Input Port C Lower
Mode set
0=Output 1=Input
1-I/O mode
0-BSR mode Port B 0=Output
1=Input Port B
0=Output 1=Input
Mode selection 0=Output
00=mode 0 Mode selection
01=mode 1 0=mode 0
1x=mode 2 1=mode 1
• The control word for both mode is same.
• Bit D7 is used for specifying whether word
loaded in to Bit set/reset mode or Mode
definition word.
• D7=1=Mode definition mode.
• D7=0=Bit set/Reset mode.

You might also like