Unit 2 Demo
Unit 2 Demo
History red
Computers such as the ENIAC had to be physically rewired in order to perform different tasks,
which caused these machines to be called "fixed-program computers." Since the term "CPU" is
generally defined as a software (computer program) execution device, the earliest devices that
could rightly be called CPUs came with the advent of the stored-program computer.
The idea of a stored-program computer was already present in the design of J. Presper Eckert and
John William Mauchly's ENIAC, but was initially omitted so that it could be finished sooner. On
June 30, 1945, before ENIAC was made, mathematician John von Neumann distributed the
paper entitled First Draft of a Report on the EDVAC. It was the outline of a stored-program
computer that would eventually be completed in August 1949.[2] EDVAC was designed to
perform a certain number of instructions (or operations) of various types. These instructions
could be combined to create useful programs for the EDVAC to run. Significantly, the programs
written for EDVAC were stored in high-speed computer memory rather than specified by the
physical wiring of the computer. This overcame a severe limitation of ENIAC, which was the
considerable time and effort required to reconfigure the computer to perform a new task. With
von Neumann's design, the program, or software, that EDVAC ran could be changed simply by
changing the contents of the memory.
Early CPUs were custom-designed as a part of a larger, sometimes one-of-a-kind, computer.
However, this method of designing custom CPUs for a particular application has largely given
way to the development of mass-produced processors that are made for many purposes. This
standardization began in the era of discrete transistor mainframes and minicomputers and has
rapidly accelerated with the popularization of the integrated circuit (IC). The IC has allowed
increasingly complex CPUs to be designed and manufactured to tolerances on the order of
nanometers. Both the miniaturization and standardization of CPUs have increased the presence
of digital devices in modern life far beyond the limited application of dedicated computing
machines. Modern microprocessors appear in everything from automobiles to cell phones and
children's toys.
While von Neumann is most often credited with the design of the stored-program computer
because of his design of EDVAC, others before him, such as Konrad Zuse, had suggested and
implemented similar ideas. The so-called Harvard architecture of the Harvard Mark I, which was
completed before EDVAC, also utilized a stored-program design using punched paper tape
rather than electronic memory. The key difference between the von Neumann and Harvard
architectures is that the latter separates the storage and treatment of CPU instructions and data,
while the former uses the same memory space for both. Most modern CPUs are primarily von
Neumann in design, but elements of the Harvard architecture are commonly seen as well.
Relays and vacuum tubes (thermionic valves) were commonly used as switching elements; a
useful computer requires thousands or tens of thousands of switching devices. The overall speed
of a system is dependent on the speed of the switches. Tube computers like EDVAC tended to
average eight hours between failures, whereas relay computers like the (slower, but earlier)
Harvard Mark I failed very rarely.[1] In the end, tube based CPUs became dominant because the
significant speed advantages afforded generally outweighed the reliability problems. Most of
these early synchronous CPUs ran at low clock rates compared to modern microelectronic
designs (see below for a discussion of clock rate). Clock signal frequencies ranging from 100
kHz to 4 MHz were very common at this time, limited largely by the speed of the switching
devices they were built with.
Operation
The fundamental operation of most CPUs, regardless of the physical form they take, is to execute
a sequence of stored instructions called a program. The program is represented by a series of
numbers that are kept in some kind of computer memory. There are four steps that nearly all
CPUs use in their operation: fetch, decode, execute, and writeback.
The first step, fetch, involves retrieving an instruction (which is represented by a number or
sequence of numbers) from program memory. The location in program memory is determined by
a program counter (PC), which stores a number that identifies the current position in the
program. After an instruction is fetched, the PC is incremented by the length of the instruction
word in terms of memory units.[5] Often, the instruction to be fetched must be retrieved from
relatively slow memory, causing the CPU to stall while waiting for the instruction to be returned.
This issue is largely addressed in modern processors by caches and pipeline architectures (see
below).
The instruction that the CPU fetches from memory is used to determine what the CPU is to do.
In the decode step, the instruction is broken up into parts that have significance to other portions
of the CPU. The way in which the numerical instruction value is interpreted is defined by the
CPU's instruction set architecture (ISA).[6] Often, one group of numbers in the instruction, called
the opcode, indicates which operation to perform. The remaining parts of the number usually
provide information required for that instruction, such as operands for an addition operation.
Such operands may be given as a constant value (called an immediate value), or as a place to
locate a value: a register or a memory address, as determined by some addressing mode. In older
designs the portions of the CPU responsible for instruction decoding were unchangeable
hardware devices. However, in more abstract and complicated CPUs and ISAs, a microprogram
is often used to assist in translating instructions into various configuration signals for the CPU.
This microprogram is sometimes rewritable so that it can be modified to change the way the
CPU decodes instructions even after it has been manufactured.
After the fetch and decode steps, the execute step is performed. During this step, various portions
of the CPU are connected so they can perform the desired operation. If, for instance, an addition
operation was requested, the arithmetic logic unit (ALU) will be connected to a set of inputs and
a set of outputs. The inputs provide the numbers to be added, and the outputs will contain the
final sum. The ALU contains the circuitry to perform simple arithmetic and logical operations on
the inputs (like addition and bitwise operations). If the addition operation produces a result too
large for the CPU to handle, an arithmetic overflow flag in a flags register may also be set.
The final step, writeback, simply "writes back" the results of the execute step to some form of
memory. Very often the results are written to some internal CPU register for quick access by
subsequent instructions. In other cases results may be written to slower, but cheaper and larger,
main memory. Some types of instructions manipulate the program counter rather than directly
produce result data. These are generally called "jumps" and facilitate behavior like loops,
conditional program execution (through the use of a conditional jump), and functions in
programs.[7] Many instructions will also change the state of digits in a "flags" register. These
flags can be used to influence how a program behaves, since they often indicate the outcome of
various operations. For example, one type of "compare" instruction considers two values and sets
a number in the flags register according to which one is greater. This flag could then be used by a
later jump instruction to determine program flow.
After the execution of the instruction and writeback of the resulting data, the entire process
repeats, with the next instruction cycle normally fetching the next-in-sequence instruction
because of the incremented value in the program counter. If the completed instruction was a
jump, the program counter will be modified to contain the address of the instruction that was
jumped to, and program execution continues normally. In more complex CPUs than the one
described here, multiple instructions can be fetched, decoded, and executed simultaneously. This
section describes what is generally referred to as the "classic RISC pipeline", which in fact is
quite common among the simple CPUs used in many electronic devices (often called
microcontroller). It largely ignores the important role of CPU cache, and therefore the access
stage of the pipeline (Hennessy, Computer Architecture: A Quantitative Approach., 1996).
Bibliography
Hennessy, J. A. (1996). Computer Architecture: A Quantitative Approach. Morgan Kaufmann
Publishers.