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w7 SysTick

This document discusses timers in embedded systems and the system timer SysTick. It begins with an overview of timers and why they are used for periodic interrupts, time delays, and pulse generation. It then describes the different timer peripherals in STM32 microcontrollers and the counting modes. The majority of the document focuses on the SysTick timer, including its configuration, clock source, reload value, and interrupt generation. It provides details on the SysTick control and status registers and examples of setting up SysTick in polling mode.

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Hayriye KAYMAZ
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0% found this document useful (0 votes)
21 views25 pages

w7 SysTick

This document discusses timers in embedded systems and the system timer SysTick. It begins with an overview of timers and why they are used for periodic interrupts, time delays, and pulse generation. It then describes the different timer peripherals in STM32 microcontrollers and the counting modes. The majority of the document focuses on the SysTick timer, including its configuration, clock source, reload value, and interrupt generation. It provides details on the SysTick control and status registers and examples of setting up SysTick in polling mode.

Uploaded by

Hayriye KAYMAZ
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 25

EE 304

Embedded Systems
Mehmet Bozdal
Agenda
• System Timer - SysTick

21 November 2023 Mehmet Bozdal | Embedded Systems 2


What is timer in MCU?
• Timers are hardware components that count based on clock inputs,
allowing them to measure time and control timing functions without
requiring continuous processor involvement, which is crucial for
efficient and precise timing operations in various applications.

21 November 2023 Mehmet Bozdal | Embedded Systems 3


Why do we use timers?
• Periodic interrupt to perform tasks
• Execute periodic tasks (sensor readings at every second)
• Generate music samples
• Provide accurate time delays
• Instead of software loops
• Generate pulses or periodic waveforms
• PWM signal for motor control
• Measure duration of an external event
• Tachometer signal period to measure motor speed
• Measure execution time

21 November 2023 Mehmet Bozdal | Embedded Systems 4


STM32 Timers
• Basic timers (TIM6 and TIM7)
• General-purpose timers (TIM2 to TIM5)
• General-purpose timers (TIM9 to TIM14)
• Advanced-control timers (TIM1)

• Real-time clock (RTC)


• Independent watchdog (IWDG)
• Window watchdog (WWDG)

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Counting Modes
• Up
• Up/Down
• Center-aligned

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System Timer
• The processor has a 24-bit system timer, SysTick, that counts down
from the reload value to zero, reloads (wraps to) the value in the
LOAD register on the next clock edge, then counts down on
subsequent clocks.
• The SysTick counter runs on the processor clock. If this clock signal is
stopped for low power mode, the SysTick counter stops.
• SysTick can be configured to generate interrupts at regular intervals.
• When the processor is halted for debugging the counter does not
decrement.

21 November 2023 Mehmet Bozdal | Embedded Systems 7


SysTick timer (STK)

Figure from: Embedded Systems with Arm Cortex-M Microcontrollers in Assembly Language and C - Yifeng Zhu

21 November 2023 Mehmet Bozdal | Embedded Systems 8


System Timer - Usage
• The SysTick timer is often used in embedded systems for tasks such as
creating accurate time delays, measuring time intervals, and
implementing real-time operating system (RTOS) tick counters.

21 November 2023 Mehmet Bozdal | Embedded Systems 9


SysTick Register Map
• The SysTick timer is part of the Cortex-M core and is not specific to
STM32. The base address of the SysTick register block is 0xE000 E010.

21 November 2023 Mehmet Bozdal | Embedded Systems 10


Check Registers

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SysTick - Configuration
• The SysTick timer can be configured through its control and status
registers. Key parameters include the clock source selection, enabling or
disabling the timer, interrupt option.

21 November 2023 Mehmet Bozdal | Embedded Systems 12


SysTick control and status register (STK_CTRL)
ENABLE: Enables the counter. When ENABLE is set to 1, the counter
loads the RELOAD value from the LOAD register and then counts down.
On reaching 0, it sets the COUNTFLAG to 1 and optionally asserts the
SysTick depending on the value of TICKINT. It then loads the RELOAD
value again, and begins counting.

21 November 2023 Mehmet Bozdal | Embedded Systems 13


SysTick control and status register (STK_CTRL)
• COUNTFLAG: Returns 1 if timer counted to 0 since last time this was
read.

21 November 2023 Mehmet Bozdal | Embedded Systems 14


SysTick - Clock Source
• The SysTick timer can use either the processor clock (AHB) or AHB/8 as
its clock source. 0: AHB/8 1: Processor clock (AHB)

21 November 2023 Mehmet Bozdal | Embedded Systems 15


SysTick control and status register (STK_CTRL)
• TICKINT: SysTick exception request enable
0: Counting down to zero does not assert the SysTick exception request
1: Counting down to zero to asserts the SysTick exception request.
• Note: Software can use COUNTFLAG to determine if SysTick has ever
counted to zero.

21 November 2023 Mehmet Bozdal | Embedded Systems 16


SysTick - Reload
• The SysTick timer operates as a down counter from a reload value.
When the counter reaches zero, it can either generate an interrupt or
automatically reload the original value and continue counting.

21 November 2023 Mehmet Bozdal | Embedded Systems 17


SysTick - Reload
• The RELOAD value can be any value in the range 0x00000001-
0x00FFFFFF (16,777,215). A start value of 0 is possible, but has no
effect because the SysTick exception request and COUNTFLAG are
activated when counting from 1 to 0.

21 November 2023 Mehmet Bozdal | Embedded Systems 18


SysTick - Reload
The RELOAD value is calculated according to its use:
• To generate a multi-shot timer with a period of N processor clock
cycles, use a RELOAD value of N-1. For example, if the SysTick
interrupt is required every 100 clock pulses, set RELOAD to 99.

• To deliver a single SysTick interrupt after a delay of N processor clock


cycles, use a RELOAD of value N. For example, if a SysTick interrupt is
required after 400 clock pulses, set RELOAD to 400.

21 November 2023 Mehmet Bozdal | Embedded Systems 19


SysTick current value register (STK_VAL)
• The VAL register contains the current value of the SysTick counter.
• Reads return the current value of the SysTick counter.
• A write of any value clears the field to 0, and also clears the
COUNTFLAG bit in the STK_CTRL register to 0.

21 November 2023 Mehmet Bozdal | Embedded Systems 20


SysTick - Interrupt
• When the SysTick timer reaches zero, it can generate an interrupt. This
feature is commonly used periodic tasks.

21 November 2023 Mehmet Bozdal | Embedded Systems 21


SysTick design hints and tips
• The SysTick counter runs on the processor clock. If this clock signal is
stopped for low power mode, the SysTick counter stops.

• Ensure software uses aligned word accesses to access the SysTick


registers.

21 November 2023 Mehmet Bozdal | Embedded Systems 22


SysTick Setup - Polling
// disable systick
// configure clock source
// set reload value
// clear current value
// enable systick

21 November 2023 Mehmet Bozdal | Embedded Systems 23


More on this…
• Lecture 12: System Timer (SysTick)

21 November 2023 Mehmet Bozdal | Embedded Systems 24


Q&A

Any questions?

21 November 2023 Mehmet Bozdal | Embedded Systems 25

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