NVIDIA P407-A00 NVIDIA G84M MXM Schematic
NVIDIA P407-A00 NVIDIA G84M MXM Schematic
N
P407-A00: G84M/86M MXM V1.3
256/512MB 128-BIT GDDR2
C
1 1
.
SLI, HDCP SUPPORT
CO M 2
.
Table of Contents
X
Page 1: Cover Page
I
Page 2: PCI EXPRESS Interface
Page 3: Frame Buffer GPU Interface
F
Page 4: Frame Buffer Partition A Memories
Page 5: Frame Buffer Partition C Memories
A
Page 6: Memory Decoupling Caps
3 3
Page 7: DACs, Clock-Generation
N
Page 8: LVDS, TMDS GPU Interface
Page 9: MXM Connector, IO-Section
I
Page 10: GPIOs. JTAG, Thermal Senser
Page 11: Spread Spectrum, VBIOS and HDCP ROM
Page 12: MIOA(SLI), MIOB
H
Page 13: NVVDD Power Supply
Page 14: FBVDDQ, PEX1V2 and DAC_Vref Power Supply
C
Page 15: STRAPS, TTP, MOUNTING HOLE
.
4 4
5
SKU
B
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
VARIANT
BASE
SKU0001
SKU0002
SKU0003
SKU0003
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
W
NVPN
W
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
W
600-10407-9998-300
600-10407-0001-300
600-10407-0002-300
600-10407-0003-300
600-10407-0004-300
<UNDEFINED>
<UNDEFINED>
ASSEMBLY
BASE LEVEL GENERIC SCHEMATIC ONLY, COMMON & NO_STUFF ASSEMBLY NOTES AND BOM NOT FINAL.
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM V1.3, HDCP.
G84M-600 450/400 512MB 128bit GDDR2 32Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM V1.3, HDCP.
G84M-700 500/400 512MB 128bit GDDR2 32Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM V1.3, HDCP.
G86M-770 500/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM V1.3, HDCP.
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
<UNDEFINED>
ASSEMBLY
P407_A03 change list:
1) P407_A03 is modified from P555_A00 to insure they are exactly same,
except 2 mounting holes and 4 thermal hole
2) Change mounting holes and thermal holes from MXM V2.0 to MXM V1.3
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM V1.3, HDCP.
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
5
http://www.elecfans.com
PAGE 2) MXM-II GOLDEN EDGE, PCI EXPRESS INTERFACE 电子发烧友 http://bbs.elecfans.com 电子技术论坛
PEX1V2
N
1/14 PCI_EXPRESS
G1 AD23
G84-600-A1 PEX_IOVDD AF23
BGA820 PEX_IOVDD AF24 C585 C572 C597 C562 C581 C586 C541
CHANGED PEX_IOVDD AF25 .01UF .01UF .01UF .1UF .1UF .1UF 1UF
PEX_IOVDD AG24
16V 16V 16V 6.3V 6.3V 6.3V 6.3V
CN1 PEX_IOVDD AG25
10% 10% 10% 10% 10% 10% 10%
C
3V3RUN X7R X7R X7R X7R X7R X7R X5R
CON_MXM_X16_EDGE PEX_IOVDD
0402 0402 0402 0402 0402 0402 0402
(NPHY,NONPHY)-X16(_SLI) COMMON COMMON COMMON COMMON COMMON COMMON COMMON
NPHY-X16_SLI
1 NO STUFF PEX_IOVDDQ AC16 1
C1 AC17
.1UF PEX_IOVDDQ AC21
1/2 PCI-Express, Power PEX_IOVDDQ
6.3V C616 C600 C604 C612 C644 C594 C564
AC22 GND
PEX_IOVDDQ
.
10% .01UF .01UF .01UF .1UF .1UF .1UF 1UF
X7R 238 AE18
3V3RUN PEX_IOVDDQ AE21
16V 16V 16V 6.3V 6.3V 6.3V 6.3V
0402
COMMON (1.5A) PEX_IOVDDQ AE22
10% 10% 10% 10% 10% 10% 10%
PEX_IOVDDQ X7R X7R X7R X7R X7R X7R X5R
AF12 0402 0402 0402 0402 0402 0402 0402
PEX_IOVDDQ AF18 COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND PEX_IOVDDQ
PEX_RST AH15 AF21
PEX_RST PEX_IOVDDQ
M
1V8RUN AF22
PEX_IOVDDQ
NVVDD
2 GND
1V8RUN SNN_GPU_AG12 AG12 K16
C534 (3.5A) 137 SNN_GPU_AH13 AH13
RFU VDD K17
.1UF CLK_REQ RFU VDD N13 C599 C623 C636 C610 C635 C624
6.3V VDD N14 .1UF .1UF .1UF .1UF .1UF 1UF
VDD <<place on bottom
O
10% 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
X7R N16 north of GPU
NV_CRITICAL_NET VDD N17
10% 10% 10% 10% 10% 10%
0402 GND X7R X7R X7R X7R X7R X5R
COMMON 139 NV_IMPEDANCE DIFF_PAIR NET_NAME VDD N19 0402 0402 0402 0402 0402 0402
PEX_RST STAFF FOR PEX TEST PEX_TSTCLK PEX_TSTCLK AM12
VDD P13 COMMON COMMON COMMON COMMON COMMON COMMON
R35 200 100DIFF 1
0402 1% COMMON PEX_TSTCLK PEX_TSTCLK* AM11
PEX_TSTCLK_OUT VDD P14
GND NV_CRITICAL_NET 100DIFF 1 PEX_TSTCLK_OUT VDD
PWR_SRC NET_NAME DIFF_PAIR NV_IMPEDANCE P16
VDD
C
135 100DIFF 1 PEX_RCLK PEX_RCLK AH14 P17
1
PEX_REFCLK 133 PEX_RCLK PEX_RCLK* AJ14
PEX_REFCLK VDD P19 C588 C609 C637 C631 C622 C570
PWR_SRC 100DIFF 1 PEX_REFCLK VDD GND
PEX_REFCLK R16 .1UF .1UF .1UF .1UF .1UF 1UF
C47 (4A) 129 PEX_TX0_C PEX_TX0_C C640 .1UF PEX_TX0_C PEX_TX0 AJ15
VDD R17
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
PEX_RX0 1 100DIFF 100DIFF 1 PEX_TX0 VDD 10% 10% 10% 10% 10% 10% <<place on bottom
.1UF 127 PEX_TX0_C* PEX_TX0_C 0402 6.3V C632 .1UF PEX_TX0_C PEX_TX0* AK15 T13
50V PEX_RX0 1 100DIFF 100DIFF 1 PEX_TX0 VDD X7R X7R X7R X7R X7R X5R east of GPU
10% 0402 6.3V T14 0402 0402 0402 0402 0402 0402
10% X7R 10% VDD COMMON COMMON COMMON COMMON COMMON COMMON
2 132 100DIFF 1 PEX_RX0 PEX_RX0 AK13 T15 2
.
X7R PEX_TX0 COMMON X7R PEX_RX0 VDD
0603 130 100DIFF 1 PEX_RX0 PEX_RX0* AK14 T18
COMMON PEX_TX0 COMMON PEX_RX0 VDD T19
123 PEX_TX1_C PEX_TX1_C C629 .1UF PEX_TX1_C PEX_TX1 AH16
VDD U13
PEX_RX1 1 100DIFF 100DIFF 1 PEX_TX1 VDD
GND 121 PEX_TX1_C* PEX_TX1_C 1 100DIFF 0402 6.3V C626 .1UF 100DIFF 1 PEX_TX1_C PEX_TX1* AG16 C601 C638 C615 C591 C589 C619 GND
PEX_RX1 10% 0402 6.3V
PEX_TX1 U14 .1UF .1UF .1UF .1UF .1UF 1UF
126
X7R 10% PEX_RX1 PEX_RX1 AM14
VDD U15
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
PEX_TX1 100DIFF COMMON X7R
1 PEX_RX1 VDD 10% 10% 10% 10% 10% 10% <<place on bottom
X
124 100DIFF 1 PEX_RX1 PEX_RX1* AM15 U18 X7R X7R X7R X7R X7R X5R south of GPU
PEX_TX1 COMMON PEX_RX1 VDD U19 0402 0402 0402 0402 0402 0402
117 PEX_TX2_C PEX_TX2_C C621 .1UF PEX_TX2_C PEX_TX2 AG17
VDD V16 COMMON COMMON COMMON COMMON COMMON COMMON
2V5RUN 1 100DIFF 100DIFF 1
PEX_RX2 115 PEX_TX2_C* PEX_TX2_C 0402 6.3V C617 .1UF PEX_TX2_C PEX_TX2* AH17
PEX_TX2 VDD V17
1 100DIFF 100DIFF 1 PEX_TX2 VDD
234
PEX_RX2 10% 0402 6.3V W13
2V5RUN 120
X7R 10% PEX_RX2 PEX_RX2 AL15
VDD W14
PEX_TX2 100DIFF COMMON 1 PEX_RX2 VDD
5VRUN
(0.5A) 118
X7R
PEX_RX2 PEX_RX2* AL16 W16 C605 C648 C578 C650 C652 C641
I
100DIFF COMMON 1 PEX_RX2 VDD GND
PEX_TX2 W17 .1UF .1UF .1UF .1UF .1UF 1UF
18 111 PEX_TX3_C PEX_TX3_C C613 .1UF PEX_TX3_C PEX_TX3 AG18
VDD W19
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V <<place on bottom
5VRUN PEX_RX3 1 100DIFF 100DIFF 1 PEX_TX3 VDD 10% 10% 10% 10% 10% 10%
109 PEX_TX3_C* PEX_TX3_C 1 100DIFF 0402 6.3V C608 .1UF 100DIFF 1 PEX_TX3_C PEX_TX3* AH18 Y13 west of GPU
(0.5A) PEX_RX3 PEX_TX3 VDD X7R X7R X7R X7R X7R X5R
C34 C3 10% 0402 6.3V Y14 0402 0402 0402 0402 0402 0402
.1UF .1UF 114
X7R 10% PEX_RX3 PEX_RX3 AK16
VDD Y16 COMMON COMMON COMMON COMMON COMMON COMMON
PEX_TX3 100DIFF COMMON 1 PEX_RX3 VDD
6.3V 6.3V X7R
112 100DIFF 1 PEX_RX3 PEX_RX3* AK17 Y17
10% 10% PEX_TX3 COMMON PEX_RX3 VDD
F
X7R X7R Y19
105 PEX_TX4_C PEX_TX4_C C603 .1UF PEX_TX4_C PEX_TX4 AK18
VDD Y20
0402 0402 1 100DIFF 100DIFF 1
COMMON COMMON
PEX_RX4 103 PEX_TX4_C* PEX_TX4_C 0402 6.3V C596 .1UF PEX_TX4_C PEX_TX4* AJ18
PEX_TX4 VDD
1 100DIFF 100DIFF 1 PEX_TX4 GND
PEX_RX4 10% 0402 6.3V
X7R 10%
GND GND 108 100DIFF 1 PEX_RX4 PEX_RX4 AL17 P20
PEX_TX4 106
COMMON X7R
PEX_RX4 PEX_RX4* AL18
PEX_RX4 VDD_LP T20
100DIFF COMMON 1 PEX_RX4 VDD_LP
PEX_TX4 T23
A
99 PEX_TX5_C PEX_TX5_C C590 .1UF PEX_TX5_C PEX_TX5 AJ19
VDD_LP U20
PEX_RX5 1 100DIFF 100DIFF 1 PEX_TX5 VDD_LP
97 PEX_TX5_C* PEX_TX5_C 1 100DIFF 0402 6.3V C584 .1UF 100DIFF 1 PEX_TX5_C PEX_TX5* AH19 U23
PEX_RX5 10% 0402 6.3V
PEX_TX5 VDD_LP W20
X7R 10% VDD_LP
3 PEX_TX5 102 100DIFF COMMON X7R
1 PEX_RX5 PEX_RX5 AM18
PEX_RX5 3
100 100DIFF 1 PEX_RX5 PEX_RX5* AM19 N20 NVVDD_SENSE 13.3G<
PEX_TX5 COMMON PEX_RX5 VDD_SENSE M21 SNN_GND_SENSE
OUT
GND_SENSE
N
93 PEX_TX6_C PEX_TX6_C 1 100DIFF C582 .1UF 100DIFF 1 PEX_TX6_C PEX_TX6 AG20
PEX_RX6 91 PEX_TX6_C* PEX_TX6_C 0402 6.3V C571 .1UF PEX_TX6_C PEX_TX6* AH20
PEX_TX6
1 100DIFF 100DIFF 1 PEX_TX6
17
PEX_RX6 10% 0402 6.3V 3V3RUN
20
GND 96
X7R 10% PEX_RX6 PEX_RX6 AK19
GND PEX_TX6 100DIFF COMMON 1 PEX_RX6
X7R
41 94 100DIFF 1 PEX_RX6 PEX_RX6* AK20 AC11
44
GND PEX_TX6 COMMON PEX_RX6 VDD33 AC12
GND VDD33
I
47 87 PEX_TX7_C PEX_TX7_C 1 100DIFF C566 .1UF 100DIFF 1 PEX_TX7_C PEX_TX7 AG21 AC24 C665 C639 C658 C674
50
GND PEX_RX7 85 PEX_TX7_C* PEX_TX7_C 0402 6.3V C565 .1UF PEX_TX7_C PEX_TX7* AH21
PEX_TX7 VDD33 AD24 .01UF .01UF .01UF .01UF
GND 1 100DIFF 100DIFF 1 PEX_TX7 VDD33
53
PEX_RX7 10% 0402 6.3V AE11
16V 16V 16V 16V
56
GND 90
X7R 10% PEX_RX7 PEX_RX7 AL20
VDD33 AE12
10% 10% 10% 10%
GND PEX_TX7 100DIFF COMMON 1 PEX_RX7 VDD33 X7R X7R X7R X7R
X7R
59 88 100DIFF 1 PEX_RX7 PEX_RX7* AL21 H7 0402 0402 0402 0402
62
GND PEX_TX7 COMMON PEX_RX7 VDD33 J7 COMMON COMMON COMMON COMMON
65
GND 81 PEX_TX8_C PEX_TX8_C C563 .1UF PEX_TX8_C PEX_TX8 AK21
VDD33 K7
GND 1 100DIFF 100DIFF 1 PEX_TX8 VDD33
H
68
PEX_RX8 79 PEX_TX8_C* PEX_TX8_C 0402 6.3V C560 .1UF PEX_TX8_C PEX_TX8* AJ21 L10
GND 1 100DIFF 100DIFF 1 PEX_TX8 VDD33
71
PEX_RX8 10% 0402 6.3V L7
74
GND 84
X7R 10% PEX_RX8 PEX_RX8 AM21
VDD33 L8 C655 C647 C673 C569
GND PEX_TX8 100DIFF COMMON 1 PEX_RX8 VDD33 GND
X7R .1UF .1UF .1UF .1UF
77 82 100DIFF 1 PEX_RX8 PEX_RX8* AM22 M10
80
GND PEX_TX8 COMMON PEX_RX8 VDD33 6.3V 6.3V 6.3V 6.3V
83
GND 75 PEX_TX9_C PEX_TX9_C C559 .1UF PEX_TX9_C PEX_TX9 AJ22
10% 10% 10% 10%
GND PEX_RX9 1 100DIFF 100DIFF 1 PEX_TX9 X7R X7R X7R X7R
C
86 73 PEX_TX9_C* PEX_TX9_C 1 100DIFF 0402 6.3V C558 .1UF 100DIFF 1 PEX_TX9_C PEX_TX9* AH22 AF15 0402 0402 0402 0402
89
GND PEX_RX9 10% 0402 6.3V
PEX_TX9 PEX_PLLAVDD AE15 COMMON COMMON COMMON COMMON
92
GND 78
X7R 10% PEX_RX9 PEX_RX9 AK22
PEX_PLLDVDD AE16
GND PEX_TX9 100DIFF COMMON 1 PEX_RX9 PEX_PLLGND
X7R
95 76 100DIFF 1 PEX_RX9 PEX_RX9* AK23
98
GND PEX_TX9 COMMON PEX_RX9
101
GND 69 PEX_TX10_C PEX_TX10_C C557 .1UF PEX_TX10_C PEX_TX10 AG23
1 100DIFF 100DIFF 1 GND PEX1V2
104
GND PEX_RX10 67 PEX_TX10_C* PEX_TX10_C 0402 6.3V C554 .1UF PEX_TX10_C PEX_TX10* AH23
PEX_TX10
1 100DIFF 100DIFF 1 LB502
.
107
GND PEX_RX10 10% 0402 6.3V
PEX_TX10
220R@100MHz
GND X7R 10% GND 12MIL 1.2V
4 110
GND PEX_TX10 72 100DIFF COMMON X7R
1 PEX_RX10 PEX_RX10 AL23
PEX_RX10 PEX_PLLDVDD 4
113 70 100DIFF 1 PEX_RX10 PEX_RX10* AL24 BEAD_0603 COMMON
116
GND PEX_TX10 COMMON PEX_RX10 C627 C620 C642 C633 C614
119
GND 63 PEX_TX11_C PEX_TX11_C C553 .1UF PEX_TX11_C PEX_TX11 AK24 .01UF .01UF .1UF .1UF 4.7UF
GND PEX_RX11 1 100DIFF 100DIFF 1 PEX_TX11 16V 16V 6.3V 6.3V 6.3V
122 61 PEX_TX11_C* PEX_TX11_C 1 100DIFF 0402 6.3V C552 .1UF 100DIFF 1 PEX_TX11_C PEX_TX11* AJ24
GND PEX_RX11 PEX_TX11 10% 10% 10% 10% 10%
W
125 10% 0402 6.3V
GND X7R X7R X7R X7R X7R X5R
128 66 10% PEX_RX11 PEX_RX11 AM24 0402 0402 0402 0402 0603
GND PEX_TX11 100DIFF COMMON 1 PEX_RX11
X7R COMMON COMMON COMMON COMMON COMMON
131 64 100DIFF 1 PEX_RX11 PEX_RX11* AM25
138
GND PEX_TX11 COMMON PEX_RX11
142
GND 57 PEX_TX12_C PEX_TX12_C C551 .1UF PEX_TX12_C PEX_TX12 AJ25
GND PEX_RX12 1 100DIFF 100DIFF 1 PEX_TX12
146 55 PEX_TX12_C* PEX_TX12_C 1 100DIFF 0402 6.3V C550 .1UF 100DIFF 1 PEX_TX12_C PEX_TX12* AH25
150
GND PEX_RX12 10% 0402 6.3V
PEX_TX12
W
GND GND
X7R 10%
154 60 100DIFF 1 PEX_RX12 PEX_RX12 AK25
158
GND PEX_TX12 58
COMMON X7R
PEX_RX12 PEX_RX12* AK26
PEX_RX12
GND 100DIFF COMMON 1 PEX_RX12
164
PEX_TX12
176
GND 51 PEX_TX13_C PEX_TX13_C C546 .1UF PEX_TX13_C PEX_TX13 AH26
GND PEX_RX13 1 100DIFF 100DIFF 1 PEX_TX13
182 49 PEX_TX13_C* PEX_TX13_C 1 100DIFF 0402 6.3V C543 .1UF 100DIFF 1 PEX_TX13_C PEX_TX13* AG26
188
GND PEX_RX13 10% 0402 6.3V
PEX_TX13
GND
W
X7R 10%
194 54 100DIFF 1 PEX_RX13 PEX_RX13 AL26 J6 SPDIF_IN 9.1G> 9.4B>
199
GND PEX_TX13 52
COMMON X7R
PEX_RX13 PEX_RX13* AL27
PEX_RX13 SPDIF IN
GND 100DIFF COMMON 1 PEX_RX13
200
PEX_TX13
205
GND 45 PEX_TX14_C PEX_TX14_C C540 .1UF PEX_TX14_C PEX_TX14 AK27
GND PEX_RX14 1 100DIFF 100DIFF 1 PEX_TX14
206 43 PEX_TX14_C* PEX_TX14_C 1 100DIFF 0402 6.3V C538 .1UF 100DIFF 1 PEX_TX14_C PEX_TX14* AJ27
211
GND PEX_RX14 10% 0402 6.3V
PEX_TX14
212
GND 48
X7R 10% PEX_RX14 PEX_RX14 AM27
GND PEX_TX14 100DIFF COMMON 1 PEX_RX14
X7R
218 46 100DIFF 1 PEX_RX14 PEX_RX14* AM28
223
GND PEX_TX14 COMMON PEX_RX14
229
GND 39 PEX_TX15_C PEX_TX15_C C537 .1UF PEX_TX15_C PEX_TX15 AJ28
GND PEX_RX15 1 100DIFF 100DIFF 1 PEX_TX15
235 37 PEX_TX15_C* PEX_TX15_C 1 100DIFF 0402 6.3V C536 .1UF 100DIFF 1 PEX_TX15_C PEX_TX15* AH27
236
GND PEX_RX15 10% 0402 6.3V
PEX_TX15
GND X7R 10%
5 241
GND PEX_TX15 42 100DIFF COMMON X7R
1 PEX_RX15 PEX_RX15 AL28
PEX_RX15 5
40 100DIFF 1 PEX_RX15 PEX_RX15* AL29
PEX_TX15 COMMON PEX_RX15
PRSNT1
PRSNT2
134
38
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
GND GND SANTA CLARA, CA 95050, USA
ASSEMBLY G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM V1.3, HDCP.
PAGE DETAIL PCI EXPRESS Interface
NV_PN 600-10407-0001-300 A
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p407_a03 PAGE 2 OF 18
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME myan DATE 21-DEC-2006
A B C D E F G H
A B C D E F G H
FBA_RESET 50OHM 2
OUT
FBA_ODT_GPU 50OHM 2
OUT
N
FBC_RESET 50OHM 2
G1 G1 OUT
G84-600-A1 G84-600-A1
BGA820 BGA820 FBC_ODT_GPU 50OHM 2
CHANGED CHANGED OUT
FBVDDQ
5.5F<> 5.4A<> FBCD<63..0>
4.5F<> 4.4A<> FBAD<63..0> 2/14 FBA BI 3/14 FBC
BI
0 FBAD<0> N27 A12 0 FBCD<0> B7 AA23 SNN_FBVTT_AA23
C
FBAD<1> M27
FBAD0 FBVDD A18 FBCD<1> A7
FBCD0 FBVTT AB23 SNN_FBVTT_AB23
1 1
FBAD<2> N28
FBAD1 FBVDD A21 C643 C634 C548 C607 C606 FBCD<2> C7
FBCD1 FBVTT H16 SNN_FBVTT_H16
2 2
FBAD2 FBVDD .1UF .1UF .1UF .1UF .1UF FBCD2 FBVTT
1 3 FBAD<3> L29
FBAD3 FBVDD A24
6.3V 6.3V 6.3V 6.3V 6.3V
3 FBCD<3> A2
FBCD3 FBVTT H17 SNN_FBVTT_H17 1
4 FBAD<4> K27 A27 4 FBCD<4> B2 J10 SNN_FBVTT_J10
FBAD<5> K28
FBAD4 FBVDD A3
10% 10% 10% 10% 10%
FBCD<5> C4
FBCD4 FBVTT J23 SNN_FBVTT_J23
5 X7R X7R X7R X7R X7R 5
FBAD<6> J29
FBAD5 FBVDD A30 FBCD<6> A5
FBCD5 FBVTT J24 SNN_FBVTT_J24
6 0402 0402 0402 0402 0402 6
FBAD6 FBVDD FBCD6 FBVTT
.
7 FBAD<7> J28 A6 COMMON COMMON COMMON COMMON COMMON 7 FBCD<7> B5 J9 SNN_FBVTT_J9
FBAD<8> P30
FBAD7 FBVDD A9 FBCD<8> F9
FBCD7 FBVTT K11 SNN_FBVTT_K11
8 8
FBAD<9> N31
FBAD8 FBVDD AA32 FBCD<9> F10
FBCD8 FBVTT K12 SNN_FBVTT_K12
9 9
FBAD<10> N30
FBAD9 FBVDD AD32 C576 C575 C593 C547 C587 FBCD<10> D12
FBCD9 FBVTT K21 SNN_FBVTT_K21
10 10
FBAD<11> N32
FBAD10 FBVDD AG32 .1UF .1UF .1UF .1UF .1UF FBCD<11> D9
FBCD10 FBVTT K22 SNN_FBVTT_K22
11 GND 11
FBAD<12> L31
FBAD11 FBVDD AK32
6.3V 6.3V 6.3V 6.3V 6.3V
FBCD<12> E12
FBCD11 FBVTT K24 SNN_FBVTT_K24
12 12
FBAD12 FBVDD 10% 10% 10% 10% 10% FBCD12 FBVTT
M
13 FBAD<13> L30 C32 X7R X7R X7R X7R X7R 13 FBCD<13> D11 K9 SNN_FBVTT_K9
FBAD<14> J30
FBAD13 FBVDD F32 FBCD<14> E8
FBCD13 FBVTT L23 SNN_FBVTT_L23
14 0402 0402 0402 0402 0402 14
FBAD<15> L32
FBAD14 FBVDD J32 COMMON COMMON COMMON COMMON COMMON FBCD<15> D8
FBCD14 FBVTT M23 SNN_FBVTT_M23
15 15
FBAD<16> H30
FBAD15 FBVDD M32 FBCD<16> E7
FBCD15 FBVTT T25 SNN_FBVTT_T25
16 16
FBAD<17> K30
FBAD16 FBVDD R32 FBCD<17> F7
FBCD16 FBVTT U25 SNN_FBVTT_U25
17 17
FBAD<18> H31
FBAD17 FBVDD C645 C611 C545 C670 C602 FBCD<18> D6
FBCD17 FBVTT
18 18
FBAD<19> F30
FBAD18 .1UF .1UF .1UF .1UF .1UF FBCD<19> D5
FBCD18
19 GND 19
FBAD19 FBCD19
O
6.3V 6.3V 6.3V 6.3V 6.3V
20 FBAD<20> H32 20 FBCD<20> D3
FBAD<21> E31
FBAD20 10% 10% 10% 10% 10%
FBCD<21> E4
FBCD20
21 X7R X7R X7R X7R X7R 21
FBAD<22> D30
FBAD21 AA25 FBCD<22> C3
FBCD21
22 0402 0402 0402 0402 0402 22
FBAD<23> E30
FBAD22 FBVDDQ AA26 COMMON COMMON COMMON COMMON COMMON FBCD<23> B4
FBCD22
23 23
FBAD<24> H28
FBAD23 FBVDDQ AB25 FBCD<24> C10
FBCD23
24 24
FBAD<25> H29
FBAD24 FBVDDQ AB26 FBCD<25> B10
FBCD24
25 25
FBAD25 FBVDDQ FBCD25
C
26 FBAD<26> E29 G11 C654 C579 C618 C681 C583 26 FBCD<26> C8
FBAD<27> J27
FBAD26 FBVDDQ G12 .1UF .1UF .1UF .1UF .1UF FBCD<27> A10
FBCD26
27 GND 27
FBAD<28> F27
FBAD27 FBVDDQ G15
6.3V 6.3V 6.3V 6.3V 6.3V
FBCD<28> C11
FBCD27
28 28
FBAD<29> E27
FBAD28 FBVDDQ G18
10% 10% 10% 10% 10%
FBCD<29> C12
FBCD28
29 X7R X7R X7R X7R X7R 29
FBAD<30> E28
FBAD29 FBVDDQ G21 FBCD<30> A11
FBCD29
30 0402 0402 0402 0402 0402 30
FBAD<31> F28
FBAD30 FBVDDQ G22 COMMON COMMON COMMON COMMON COMMON FBCD<31> B11
FBCD30
31 31
FBAD31 FBVDDQ FBCD31
2 32 FBAD<32> AD29 H11 32 FBCD<32> B28 2
.
FBAD<33> AE29
FBAD32 FBVDDQ H12 FBCD<33> C27
FBCD32
33 33
FBAD<34> AD28
FBAD33 FBVDDQ H15 FBCD<34> C26
FBCD33
34 34
FBAD<35> AC28
FBAD34 FBVDDQ H18 C598 C661 C574 C625 C573 FBCD<35> B26
FBCD34
35 GND 35
FBAD<36> AB29
FBAD35 FBVDDQ H21 1UF 1UF 1UF 1UF 1UF FBCD<36> C30
FBCD35
36 36
FBAD<37> AA30
FBAD36 FBVDDQ H22
6.3V 6.3V 6.3V 6.3V 6.3V
FBCD<37> B31
FBCD36
37 37
FBAD<38> Y28
FBAD37 FBVDDQ L25
10% 10% 10% 10% 10%
FBCD<38> C29
FBCD37
38 X5R X5R X5R X5R X5R 38
FBAD38 FBVDDQ FBCD38
X
39 FBAD<39> AB30 L26 0402 0402 0402 0402 0402 39 FBCD<39> A31
FBAD<40> AM30
FBAD39 FBVDDQ M25 COMMON COMMON COMMON COMMON COMMON FBCD<40> D28
FBCD39
40 40
FBAD<41> AF30
FBAD40 FBVDDQ M26 FBCD<41> D27
FBCD40
41 41
FBAD<42> AJ31
FBAD41 FBVDDQ R25 FBCD<42> F26
FBCD41
42 42
FBAD<43> AJ30
FBAD42 FBVDDQ R26 FBCD<43> D24
FBCD42
43 43
FBAD<44> AJ32
FBAD43 FBVDDQ V25 FBCD<44> E23
FBCD43
44 GND 44
FBAD<45> AK29
FBAD44 FBVDDQ V26 FBCD<45> E26
FBCD44
45 45
I
FBAD<46> AM31
FBAD45 FBVDDQ FBCD<46> E24
FBCD45
46 46
FBAD<47> AL30
FBAD46 FBCD<47> F23
FBCD46
47 47
FBAD<48> AE32
FBAD47 FBCD<48> B23
FBCD47 FBD_A<5..2>
48 48 5.1A< 5.4F<
FBAD<49> AE30
FBAD48 FBB_A<5..2> FBCD<49> A23
FBCD48 OUT
49 4.1A< 4.4F< 49
FBAD<50> AE31
FBAD49 OUT
FBCD<50> C25
FBCD49 FBC_A<12..0>
50 50 5.1A< 5.4F<
FBAD<51> AD30
FBAD50 FBA_A<12..0> FBCD<51> C23
FBCD50 OUT
51 4.1A< 4.4F< 51
FBAD51 OUT FBCD51
F
52 FBAD<52> AC31 P32 FBA_A<3> 3 52 FBCD<52> A22 C13 FBC_A<3> 3
FBAD<53> AC32
FBAD52 FBA_CMD0 U27 FBA_A<0> FBCD<53> C22
FBCD52 FBC_CMD0 A16 FBC_A<0>
53 0 53 0
FBAD<54> AB32
FBAD53 FBA_CMD1 P31 FBA_A<2> FBCD<54> C21
FBCD53 FBC_CMD1 A13 FBC_A<2>
54 2 54 2
FBAD<55> AB31
FBAD54 FBA_CMD2 U30 FBA_A<1> FBCD<55> B22
FBCD54 FBC_CMD2 B17 FBC_A<1>
55 1 55 1
FBAD<56> AG27
FBAD55 FBA_CMD3 Y31 FBB_A<3> FBCD<56> E22
FBCD55 FBC_CMD3 B20 FBD_A<3>
56 3 56 3
FBAD<57> AF28
FBAD56 FBA_CMD4 W32 FBB_A<4> FBCD<57> D22
FBCD56 FBC_CMD4 A19 FBD_A<4>
57 4 57 4
FBAD<58> AH28
FBAD57 FBA_CMD5 W31 FBB_A<5> FBCD<58> D21
FBCD57 FBC_CMD5 B19 FBD_A<5>
A
58 5 58 5
FBAD<59> AG28
FBAD58 FBA_CMD6 T32 FBA_BA2 FBCD<59> E21
FBCD58 FBC_CMD6 B14 FBC_BA2
59 4.2A< 4.4F< 59 5.2A< 5.4F<
FBAD<60> AG29
FBAD59 FBA_CMD7 V27 FBA_CS0*
OUT
FBCD<60> E18
FBCD59 FBC_CMD7 E16 FBC_CS0*
OUT
60 4.1A< 4.5F< 60 5.1A< 5.5F<
FBAD<61> AD27
FBAD60 FBA_CMD8 T28 FBA_WE*
OUT
FBCD<61> D19
FBCD60 FBC_CMD8 A14 FBC_WE*
OUT
61 4.1A< 4.5F< 61 5.1A< 5.5F<
FBAD61 FBA_CMD9 OUT FBCD61 FBC_CMD9 OUT
3 62 FBAD<62> AF27
FBAD62 FBA_CMD10 T31 FBA_BA0
OUT 4.2A< 4.4F< 62 FBCD<62> D18
FBCD62 FBC_CMD10 C15 FBC_BA0
OUT 5.2A< 5.4F< 3
63 FBAD<63> AE28 U32 FBA_CKE 4.2A< 4.4F< 63 FBCD<63> E19 B16 FBC_CKE 5.2A< 5.4F<
FBAD63 FBA_CMD11 W29 FBA_RESET
OUT FBCD63 FBC_CMD11 F17 FBC_RESET
OUT
FBA_CMD12 FBC_CMD12
N
4.5F< 4.4A< FBADQM<7..0> W30 FBB_A<2> 2 5.5F< 5.4A< FBCDQM<7..0> C19 FBD_A<2> 2
OUT
FBADQM<0> M29
FBA_CMD13 T27 FBA_A<12>
OUT
FBCDQM<0> A4
FBC_CMD13 D15 FBC_A<12>
0 12 0 12
FBADQM<1> M30
FBADQM0 FBA_CMD14 V28 FBA_RAS* FBCDQM<1> E11
FBCDQM0 FBC_CMD14 C17 FBC_RAS*
1 4.1A< 4.4F< 1 5.1A< 5.5F<
FBADQM<2> G30
FBADQM1 FBA_CMD15 V30 FBA_A<11>
OUT
FBCDQM<2> F5
FBCDQM1 FBC_CMD15 A17 FBC_A<11>
OUT
2 11 2 11
FBADQM<3> F29
FBADQM2 FBA_CMD16 U31 FBA_A<10> FBCDQM<3> C9
FBCDQM2 FBC_CMD16 C16 FBC_A<10>
3 10 3 10
FBADQM<4> AA29
FBADQM3 FBA_CMD17 R27 FBA_BA1 FBCDQM<4> C28
FBCDQM3 FBC_CMD17 D14 FBC_BA1
4 4.2A< 4.4F< 4 5.2A< 5.4F<
FBADQM4 FBA_CMD18 OUT FBCDQM4 FBC_CMD18 OUT
I
5 FBADQM<5> AK30 V29 FBA_A<8> 8 5 FBCDQM<5> F24 F16 FBC_A<8> 8
FBADQM<6> AC30
FBADQM5 FBA_CMD19 T30 FBA_A<9> FBCDQM<6> C24
FBCDQM5 FBC_CMD19 C14 FBC_A<9>
6 9 6 9
FBADQM<7> AG30
FBADQM6 FBA_CMD20 W28 FBA_A<6> FBCDQM<7> E20
FBCDQM6 FBC_CMD20 C18 FBC_A<6>
7 6 7 6
FBADQM7 FBA_CMD21 R29 FBA_A<5>
FBCDQM7 FBC_CMD21 E14 FBC_A<5>
5 5
FBA_CMD22 R30 FBA_A<7>
FBC_CMD22 B13 FBC_A<7>
7 7
FBADQS0 L28
FBA_CMD23 P29 FBA_A<4> FBCDQS0 C5
FBC_CMD23 E15 FBC_A<4>
4.4F<> 4 5.4F<> 4
BI
FBADQS1 K31
FBADQS_WP0 FBA_CMD24 U28 FBA_CAS*
BI
FBCDQS1 E10
FBCDQS_WP0 FBC_CMD24 F15 FBC_CAS*
4.4F<> FBADQS_WP1 FBA_CMD25 4.1A< 4.5F< 5.4F<> FBCDQS_WP1 FBC_CMD25 5.1A< 5.5F<
H
BI OUT BI OUT
4.4F<> FBADQS2 G32 Y32 SNN_FBA_CMD26 5.4F<> FBCDQS2 E5 A20 SNN_FBC_CMD26
BI
FBADQS3 G28
FBADQS_WP2 FBA_CMD26 Y30 SNN_FBA_CMD27
BI
FBCDQS3 B8
FBCDQS_WP2 FBC_CMD26 C20 SNN_FBC_CMD27
4.4F<> BI FBADQS_WP3 FBA_CMD27 5.4F<> BI FBCDQS_WP3 FBC_CMD27
4.4F<> FBADQS4 AB28 V32 SNN_FBA_CMD28 5.4F<> FBCDQS4 A29 A15 SNN_FBC_CMD28
BI
FBADQS5 AL32
FBADQS_WP4 FBA_CMD28 BI
FBCDQS5 D25
FBCDQS_WP4 FBC_CMD28
4.4F<> BI FBADQS_WP5 5.4F<> BI FBCDQS_WP5
4.4F<> FBADQS6 AF32 P28 FBA_CLK0 4.3A< 4.4F< 5.4F<> FBCDQS6 B25 E13 FBC_CLK0 5.3A< 5.3F<
BI
FBADQS7 AH30
FBADQS_WP6 FBA_CLK0 R28 FBA_CLK0*
OUT BI
FBCDQS7 F20
FBCDQS_WP6 FBC_CLK0 F13 FBC_CLK0*
OUT
4.4F<> BI FBADQS_WP7 FBA_CLK0 OUT 4.3C< 4.4F< 5.4F<> BI FBCDQS_WP7 FBC_CLK0 OUT 5.3B< 5.4F<
C
Y27 FBA_CLK1 4.3C< 4.4F< F18 FBC_CLK1 5.3C< 5.4F<
FBA_CLK1 AA27 FBA_CLK1*
OUT FBC_CLK1 E17 FBC_CLK1*
OUT
FBA_CLK1 OUT 4.3E< 4.4F< FBC_CLK1 OUT 5.3E< 5.4F<
4.4F<> FBADQS0* M28 5.4F<> FBCDQS0* C6
BI
FBADQS1* K32
FBADQS_RN0 AC27 FBA_ODT_GPU
BI
FBCDQS1* E9
FBCDQS_RN0 F12 FBC_ODT_GPU
4.4F<> BI FBADQS_RN1 FBA_DEBUG 5.4F<> BI FBCDQS_RN1 FBC_DEBUG
4.4F<> FBADQS2* G31 5.4F<> FBCDQS2* E6
BI
FBADQS3* G27
FBADQS_RN2 BI
FBCDQS3* A8
FBCDQS_RN2
4.4F<> BI FBADQS_RN3 5.4F<> BI FBCDQS_RN3
FBADQS4* AA28 FBCDQS4* B29
.
4.4F<> BI FBADQS_RN4 5.4F<> BI FBCDQS_RN4
4.4F<> FBADQS5* AL31 5.4F<> FBCDQS5* E25
BI FBADQS_RN5 BI FBCDQS_RN5
4 4.4F<> BI
FBADQS6* AF31
FBADQS_RN6 5.4F<> BI
FBCDQS6* A25
FBCDQS_RN6 4
4.4F<> FBADQS7* AH29 5.4F<> FBCDQS7* F21 PEX1V2
BI FBADQS_RN7 BI FBCDQS_RN7
G23 PLACE CLOSE TO BALLS PEX1V2 G8 SNN_FBC_PLLVDD PLACE CLOSE TO BALLS LB503 220R@100MHz
H_PLLAVDD FBC_PLLVDD COMMON BEAD_0603
220R@100MHz
W
G25 FBA_PLLAVDD_GPU 12MIL 1.2V G10 FBC_PLLAVDD 12MIL 1.2V
LB501
FBA_PLLAVDD BEAD_0603 COMMON
FBC_PLLAVDD
G24 C568 C577 C539 G9 C660 C659 C646
FBA_PLLGND 470PF .01UF 4.7UF FBC_PLLGND 470PF .01UF 4.7UF
16V 16V 6.3V 16V 16V 6.3V
10% 10% 10% 10% 10% 10%
X7R X7R X5R FBVDDQ X7R X7R X5R
W
GND 0402 0402 0603 GND 0402 0402 0603
COMMON COMMON COMMON K26 FBCAL_PD R539 40.2 COMMON COMMON COMMON
FBCAL_PD_VDDQ 0402 1% COMMON
FBVDDQ FBVDDQ H26 FBCAL_PU R541 40.2
D31 SNN_FBA_NC1_D31
FBCAL_PU_GND 0402 1% COMMON
NC1 D32 SNN_FBA_NC1_D32 J26 FBCAL_TERM
GND R534 40.2 GND
R527
NC2 R533
FBCAL_TERM_GND 0402 1% NO STUFF
W
1K 1K
1% 1%
0402 0402
NO STUFF NO STUFF GND
N
4.4F< 3.3D> FBB_A<5..2>
IN
FBA_A<12..0>
C
4.4F< 3.3D> IN
M501 BGA84 FBVDDQ M3 BGA84 FBVDDQ M4 BGA84 FBVDDQ M502 BGA84 FBVDDQ
16MX16DDR2-2.5 CHANGED 16MX16DDR2-2.5 CHANGED 16MX16DDR2-2.5 CHANGED 16MX16DDR2-2.5 CHANGED
1 1
4.4F< 3.3D> FBA_RAS* K7 A1 FBA_RAS* K7 A1 FBA_RAS* K7 A1 FBA_RAS* K7 A1
IN
FBA_CAS* L7
RAS 1/2
VDD E1 FBA_CAS* L7
RAS 1/2
VDD E1 FBA_CAS* L7
RAS 1/2
VDD E1 FBA_CAS* L7
RAS 1/2
VDD E1
4.5F< 3.4D> IN CAS VDD CAS VDD CAS VDD CAS VDD
4.5F< 3.3D> FBA_WE* K3 J9 FBA_WE* K3 J9 FBA_WE* K3 J9 FBA_WE* K3 J9
IN WE VDD WE VDD WE VDD WE VDD
.
4.5F< 3.3D> FBA_CS0* L8 M9 FBA_CS0* L8 M9 FBA_CS0* L8 M9 FBA_CS0* L8 M9
IN CS VDD R1
CS VDD R1
CS VDD R1
CS VDD R1
FBA_A<0> M8
VDD FBA_A<0> M8
VDD FBA_A<0> M8
VDD FBA_A<0> M8
VDD
0 0 0 0
FBA_A<1> M3
A<0> A9 FBA_A<1> M3
A<0> A9 FBA_A<1> M3
A<0> A9 FBA_A<1> M3
A<0> A9
1 1 1 1
FBA_A<2> M7
A<1> VDDQ C1 FBA_A<2> M7
A<1> VDDQ C1 FBB_A<2> M7
A<1> VDDQ C1 FBB_A<2> M7
A<1> VDDQ C1
2 2 2 2
FBA_A<3> N2
A<2> VDDQ C3 FBA_A<3> N2
A<2> VDDQ C3 FBB_A<3> N2
A<2> VDDQ C3 FBB_A<3> N2
A<2> VDDQ C3
3 3 3 3
A<3> VDDQ A<3> VDDQ A<3> VDDQ A<3> VDDQ
M
4 FBA_A<4> N8 C7 4 FBA_A<4> N8 C7 4 FBB_A<4> N8 C7 4 FBB_A<4> N8 C7
FBA_A<5> N3
A<4> VDDQ C9 FBA_A<5> N3
A<4> VDDQ C9 FBB_A<5> N3
A<4> VDDQ C9 FBB_A<5> N3
A<4> VDDQ C9
5 5 5 5
FBA_A<6> N7
A<5> VDDQ E9 FBA_A<6> N7
A<5> VDDQ E9 FBA_A<6> N7
A<5> VDDQ E9 FBA_A<6> N7
A<5> VDDQ E9
6 6 6 6
FBA_A<7> P2
A<6> VDDQ G1 FBA_A<7> P2
A<6> VDDQ G1 FBA_A<7> P2
A<6> VDDQ G1 FBA_A<7> P2
A<6> VDDQ G1
7 7 7 7
FBA_A<8> P8
A<7> VDDQ G3 FBA_A<8> P8
A<7> VDDQ G3 FBA_A<8> P8
A<7> VDDQ G3 FBA_A<8> P8
A<7> VDDQ G3
8 8 8 8
FBA_A<9> P3
A<8> VDDQ G7 FBA_A<9> P3
A<8> VDDQ G7 FBA_A<9> P3
A<8> VDDQ G7 FBA_A<9> P3
A<8> VDDQ G7
9 9 9 9
FBA_A<10> M2
A<9> VDDQ G9 FBA_A<10> M2
A<9> VDDQ G9 FBA_A<10> M2
A<9> VDDQ G9 FBA_A<10> M2
A<9> VDDQ G9
10 10 10 10
A<10> VDDQ A<10> VDDQ A<10> VDDQ A<10> VDDQ
O
11 FBA_A<11> P7 11 FBA_A<11> P7 11 FBA_A<11> P7 11 FBA_A<11> P7
FBA_A<12> R2
A<11> J1 FBA_A<12> R2
A<11> J1 FBA_A<12> R2
A<11> J1 FBA_A<12> R2
A<11> J1
12 12 12 12
SNN_R8_M1 R8
A<12> VDDL SNN_R8_M2 R8
A<12> VDDL SNN_R8_M3 R8
A<12> VDDL SNN_R8_M4 R8
A<12> VDDL
SNN_R3_M1 R3
NC/A<13> SNN_R3_M2 R3
NC/A<13> SNN_R3_M3 R3
NC/A<13> SNN_R3_M4 R3
NC/A<13>
SNN_R7_M1 R7
NC/A<14> A3 SNN_R7_M2 R7
NC/A<14> A3 SNN_R7_M3 R7
NC/A<14> A3 SNN_R7_M4 R7
NC/A<14> A3
NC/A<15> VSS E3
NC/A<15> VSS E3
NC/A<15> VSS E3
NC/A<15> VSS E3
VSS VSS VSS VSS
C
4.4F< 3.3D> FBA_BA0 L2 J3 FBA_BA0 L2 J3 FBA_BA0 L2 J3 FBA_BA0 L2 J3
IN
FBA_BA1 L3
BA<0> VSS N1 FBA_BA1 L3
BA<0> VSS N1 FBA_BA1 L3
BA<0> VSS N1 FBA_BA1 L3
BA<0> VSS N1
4.4F< 3.3D> IN BA<1> VSS BA<1> VSS BA<1> VSS BA<1> VSS
4.4F< 3.3D> FBA_BA2 L1 P9 GND FBA_BA2 L1 P9 GND FBA_BA2 L1 P9 GND FBA_BA2 L1 P9 GND
IN NC/BA<2> VSS NC/BA<2> VSS NC/BA<2> VSS NC/BA<2> VSS
A7 A7 A7 A7
FBA_CKE K2
VSSQ B2 FBA_CKE K2
VSSQ B2 FBA_CKE K2
VSSQ B2 FBA_CKE K2
VSSQ B2
4.4F< 3.3D> IN CKE VSSQ CKE VSSQ CKE VSSQ CKE VSSQ
2 FBA_CLK0 J8 B8 FBA_CLK0 J8 B8 FBA_CLK1 J8 B8 FBA_CLK1 J8 B8 2
.
FBA_CLK0* K8
CLK VSSQ D2 FBA_CLK0* K8
CLK VSSQ D2 FBA_CLK1* K8
CLK VSSQ D2 FBA_CLK1* K8
CLK VSSQ D2
CLK VSSQ D8
CLK VSSQ D8
CLK VSSQ D8
CLK VSSQ D8
VSSQ E7
VSSQ E7
VSSQ E7
VSSQ E7
VSSQ F2
VSSQ F2
VSSQ F2
VSSQ F2
FBVDDQ FBVDDQ FBVDDQ FBVDDQ
VSSQ F8
VSSQ F8
VSSQ F8
VSSQ F8
FBA_ODT K9
VSSQ H2 FBA_ODT K9
VSSQ H2 FBA_ODT K9
VSSQ H2 FBA_ODT K9
VSSQ H2
4.5F< 3.5D> IN ODT VSSQ ODT VSSQ ODT VSSQ ODT VSSQ
X
H8 R504 H8 R40 H8 R47 H8 R520
R530 R528
VSSQ 1K VSSQ 1K VSSQ 1K VSSQ 1K
10K 10K 1% 1% 1% 1%
J7 J7 J7 J7
5% 5% VSSL 0402 VSSL 0402 VSSL 0402 VSSL 0402
0402 0402 COMMON COMMON COMMON COMMON
COMMON COMMON SNN_A2_M1 A2 SNN_A2_M2 A2 SNN_A2_M3 A2 SNN_A2_M4 A2
SNN_E2_M1 E2
NC J2 FBA_VREF1 SNN_E2_M2 E2
NC J2 FBA_VREF3 SNN_E2_M3 E2
NC J2 FBA_VREF2 SNN_E2_M4 E2
NC J2 FBA_VREF4
NC Vref C506
NC Vref C37
NC Vref C61
NC Vref
I
C528
R505 .1UF R41 .1UF R49 .1UF R524
6.3V 6.3V 6.3V .1UF
1K 1K 1K 1K 6.3V
GND GND 10% 10% 10%
1% 1% 1% 1%
X7R X7R X7R 10%
0402 0402 0402 0402
0402 0402 0402 X7R
COMMON COMMON COMMON COMMON
COMMON COMMON COMMON 0402
COMMON
F
GND GND GND GND
A
3 FBVDDQ
CLOCK TERMINATIONS FBVDDQ 3
N
R48 R503
0 0
5% 5%
0402 0402
NO STUFF NO STUFF
MIN_LINE_WIDTH VOLTAGE
FBA_CLK0 FBA_CLK0_TERM FBA_CLK0* FBA_CLK1 FBA_CLK1_TERM FBA_CLK1* NET
4.4F< 3.4D> IN R50 60.4 R51 60.4 IN 3.4D> 4.4F< 4.4F< 3.4D> IN R502 60.4 R501 60.4 IN 3.4D> 4.4F<
I
0402 1% COMMON 0402 1% COMMON 0402 1% COMMON 0402 1% COMMON FBA_VREF1 16MIL 0.9V
IN
FBA_VREF2 16MIL 0.9V
IN
C68 C502 FBA_VREF3 16MIL 0.9V
.01UF .01UF IN
FBA_VREF4 16MIL 0.9V
16V 16V IN
10% 10% NET DIFFPAIR CRITICAL IMPEDANCE
X7R X7R
0402 0402 4.3A< 3.4D> FBA_CLK0 FBA_CLK0 1 100DIFF
H
IN
COMMON COMMON 4.3C< 3.4D> FBA_CLK0* FBA_CLK0 1 100DIFF
IN
4.3C< 3.4D> FBA_CLK1 FBA_CLK1 1 100DIFF
IN
GND GND 4.3E< 3.4D> FBA_CLK1* FBA_CLK1 1 100DIFF
IN
3.3A<> FBADQS0 FBADQS0 1 100DIFF
BI
3.4A<> FBADQS0* FBADQS0 1 100DIFF
BI
3.4A<> FBADQS1 FBADQS1 1 100DIFF
BI
C
3.4A<> FBADQS1* FBADQS1 1 100DIFF
BI
3.4A<> FBADQS2 FBADQS2 1 100DIFF
4.5F<> 3.1A<> FBAD<63..0> BI
BI 3.4A<> FBADQS2* FBADQS2 1 100DIFF
BI
3.4A<> FBADQS3 FBADQS3 1 100DIFF
BI
3.4A<> FBADQS3* FBADQS3 1 100DIFF
4.5F< 3.3A> FBADQM<7..0> BI
IN 3.4A<> FBADQS4 FBADQS4 1 100DIFF
BI
FBADQS4* FBADQS4 1 100DIFF
.
3.4A<> BI
M3 M501 M3 M501 3.4A<> FBADQS5 FBADQS5 1 100DIFF
16MX16DDR2-2.5 16MX16DDR2-2.5 16MX16DDR2-2.5 16MX16DDR2-2.5 BI
4 BGA84 BGA84 BGA84 BGA84 3.4A<> BI
FBADQS5* FBADQS5 1 100DIFF 4
CHANGED CHANGED CHANGED CHANGED 3.4A<> FBADQS6 FBADQS6 1 100DIFF
2/2 2/2 2/2 2/2 BI
0 FBAD<0> H9 8 FBAD<8> H1 16 FBAD<16> D3 24 FBAD<24> C8 3.4A<> FBADQS6* FBADQS6 1 100DIFF
FBAD<1> H7
DQ<0> FBAD<9> H7
DQ<0> FBAD<17> D1
DQ<0> FBAD<25> B9
DQ<0> BI
FBADQS7
1 9 17 25 3.4A<> FBADQS7 1 100DIFF
FBAD<2> H3
DQ<1> FBAD<10> G8
DQ<1> FBAD<18> C2
DQ<1> FBAD<26> D3
DQ<1> BI
FBADQS7*
2 10 18 26 3.4A<> FBADQS7 1 100DIFF
DQ<2> DQ<2> DQ<2> DQ<2> BI
W
3 FBAD<3> G8 11 FBAD<11> H9 19 FBAD<19> B9 27 FBAD<27> D9
FBAD<4> H1
DQ<3> FBAD<12> F1
DQ<3> FBAD<20> B1
DQ<3> FBAD<28> D7
DQ<3> FBA_A<12..0> 2 56OHM
4 12 20 28 4.1A< 3.3D>
FBAD<5> G2
DQ<4> FBAD<13> H3
DQ<4> FBAD<21> D7
DQ<4> FBAD<29> B1
DQ<4> IN
FBB_A<5..2> 2 56OHM
5 13 21 29 4.1A< 3.3D>
FBAD<6> F1
DQ<5> FBAD<14> G2
DQ<5> FBAD<22> D9
DQ<5> FBAD<30> D1
DQ<5> IN
6 14 22 30
FBAD<7> F9
DQ<6> FBAD<15> F9
DQ<6> FBAD<23> C8
DQ<6> FBAD<31> C2
DQ<6> FBA_BA0 2 56OHM
7 15 23 31 4.2A< 3.3D>
DQ<7> DQ<7> DQ<7> DQ<7> IN
FBA_BA1 2 56OHM
4.2A< 3.3D> IN
FBADQM<0> F3 FBADQM<1> F3 FBADQM<2> B3 FBADQM<3> B3 FBA_CKE 2 56OHM
W
DQM DQM DQM DQM 4.2A< 3.3D> IN
FBADQS0 F7 FBADQS1 F7 FBADQS2 B7 FBADQS3 B7 4.2A< 3.3D> FBA_BA2 2 56OHM
FBADQS0* E8
DQS FBADQS1* E8
DQS FBADQS2* A8
DQS FBADQS3* A8
DQS IN
DQS DQS DQS DQS FBA_RAS* 2 56OHM
4.1A< 3.3D> IN
4.1A< 3.4D> FBA_CAS* 2 56OHM
IN
4.1A< 3.3D> FBA_WE* 2 56OHM
IN
M4 M502 M502 M4 4.1A< 3.3D> FBA_CS0* 2 56OHM
IN
W
16MX16DDR2-2.5 16MX16DDR2-2.5 16MX16DDR2-2.5 16MX16DDR2-2.5
BGA84 BGA84 BGA84 BGA84 FBA_CS1* 2 56OHM
IN
CHANGED CHANGED CHANGED CHANGED
2/2 2/2 2/2 2/2
32 FBAD<32> F9 40 FBAD<40> D9 48 FBAD<48> F9 56 FBAD<56> D1 4.4A<> 3.1A<> FBAD<63..0> 2 50OHM
FBAD<33> G2
DQ<0> FBAD<41> D1
DQ<0> FBAD<49> F1
DQ<0> FBAD<57> C8
DQ<0> BI
FBADQM<7..0> 2 50OHM
33 41 49 57 4.4A< 3.3A>
FBAD<34> F1
DQ<1> FBAD<42> C2
DQ<1> FBAD<50> G2
DQ<1> FBAD<58> C2
DQ<1> IN
34 42 50 58
FBAD<35> G8
DQ<2> FBAD<43> D3
DQ<2> FBAD<51> H1
DQ<2> FBAD<59> D3
DQ<2> FBA_ODT
35 43 51 59 4.2A< 3.5D> 2 56OHM
FBAD<36> H9
DQ<3> FBAD<44> B1
DQ<3> FBAD<52> H3
DQ<3> FBAD<60> D9
DQ<3> IN
36 44 52 60
FBAD<37> H3
DQ<4> FBAD<45> B9
DQ<4> FBAD<53> G8
DQ<4> FBAD<61> B1
DQ<4>
37 45 53 61
FBAD<38> H1
DQ<5> FBAD<46> D7
DQ<5> FBAD<54> H7
DQ<5> FBAD<62> D7
DQ<5>
38 46 54 62
FBAD<39> H7
DQ<6> FBAD<47> C8
DQ<6> FBAD<55> H9
DQ<6> FBAD<63> B9
DQ<6>
39 47 55 63
DQ<7> DQ<7> DQ<7> DQ<7>
FBADQM<4> F3 FBADQM<5> B3 FBADQM<6> F3 FBADQM<7> B3
DQM DQM DQM DQM
5 FBADQS4 F7
DQS FBADQS5 B7
DQS FBADQS6 F7
DQS FBADQS7 B7
DQS 5
FBADQS4* E8 FBADQS5* A8 FBADQS6* E8 FBADQS7* A8
DQS DQS DQS DQS
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM V1.3, HDCP. SANTA CLARA, CA 95050, USA
PAGE DETAIL Frame Buffer Partition A Memories
NV_PN 600-10407-0001-300 A
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p407_a03 PAGE 4 OF 18
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME myan DATE 21-DEC-2006
A B C D E F G H
A B C D E F G H
N
5.4F< 3.3H> FBD_A<5..2>
IN
5.4F< 3.3H> FBC_A<12..0>
IN
M504 BGA84 FBVDDQ M1 BGA84 FBVDDQ M2 BGA84 FBVDDQ M503 BGA84 FBVDDQ
16MX16DDR2-2.5 CHANGED 16MX16DDR2-2.5 CHANGED 16MX16DDR2-2.5 CHANGED 16MX16DDR2-2.5 CHANGED
C
5.5F< 3.3H> FBC_RAS* K7 A1 FBC_RAS* K7 A1 FBC_RAS* K7 A1 FBC_RAS* K7 A1
IN
FBC_CAS* L7
RAS 1/2
VDD E1 FBC_CAS* L7
RAS 1/2
VDD E1 FBC_CAS* L7
RAS 1/2
VDD E1 FBC_CAS* L7
RAS 1/2
VDD E1
5.5F< 3.4H> IN CAS VDD CAS VDD CAS VDD CAS VDD
1 5.5F< 3.3H> IN
FBC_WE* K3
WE VDD J9 FBC_WE* K3
WE VDD J9 FBC_WE* K3
WE VDD J9 FBC_WE* K3
WE VDD J9 1
5.5F< 3.3H> FBC_CS0* L8 M9 FBC_CS0* L8 M9 FBC_CS0* L8 M9 FBC_CS0* L8 M9
IN CS VDD R1
CS VDD R1
CS VDD R1
CS VDD R1
FBC_A<0> M8
VDD FBC_A<0> M8
VDD FBC_A<0> M8
VDD FBC_A<0> M8
VDD
0 0 0 0
A<0> A<0> A<0> A<0>
.
1 FBC_A<1> M3 A9 1 FBC_A<1> M3 A9 1 FBC_A<1> M3 A9 1 FBC_A<1> M3 A9
FBC_A<2> M7
A<1> VDDQ C1 FBC_A<2> M7
A<1> VDDQ C1 FBD_A<2> M7
A<1> VDDQ C1 FBD_A<2> M7
A<1> VDDQ C1
2 2 2 2
FBC_A<3> N2
A<2> VDDQ C3 FBC_A<3> N2
A<2> VDDQ C3 FBD_A<3> N2
A<2> VDDQ C3 FBD_A<3> N2
A<2> VDDQ C3
3 3 3 3
FBC_A<4> N8
A<3> VDDQ C7 FBC_A<4> N8
A<3> VDDQ C7 FBD_A<4> N8
A<3> VDDQ C7 FBD_A<4> N8
A<3> VDDQ C7
4 4 4 4
FBC_A<5> N3
A<4> VDDQ C9 FBC_A<5> N3
A<4> VDDQ C9 FBD_A<5> N3
A<4> VDDQ C9 FBD_A<5> N3
A<4> VDDQ C9
5 5 5 5
FBC_A<6> N7
A<5> VDDQ E9 FBC_A<6> N7
A<5> VDDQ E9 FBC_A<6> N7
A<5> VDDQ E9 FBC_A<6> N7
A<5> VDDQ E9
6 6 6 6
A<6> VDDQ A<6> VDDQ A<6> VDDQ A<6> VDDQ
M
7 FBC_A<7> P2 G1 7 FBC_A<7> P2 G1 7 FBC_A<7> P2 G1 7 FBC_A<7> P2 G1
FBC_A<8> P8
A<7> VDDQ G3 FBC_A<8> P8
A<7> VDDQ G3 FBC_A<8> P8
A<7> VDDQ G3 FBC_A<8> P8
A<7> VDDQ G3
8 8 8 8
FBC_A<9> P3
A<8> VDDQ G7 FBC_A<9> P3
A<8> VDDQ G7 FBC_A<9> P3
A<8> VDDQ G7 FBC_A<9> P3
A<8> VDDQ G7
9 9 9 9
FBC_A<10> M2
A<9> VDDQ G9 FBC_A<10> M2
A<9> VDDQ G9 FBC_A<10> M2
A<9> VDDQ G9 FBC_A<10> M2
A<9> VDDQ G9
10 10 10 10
FBC_A<11> P7
A<10> VDDQ FBC_A<11> P7
A<10> VDDQ FBC_A<11> P7
A<10> VDDQ FBC_A<11> P7
A<10> VDDQ
11 11 11 11
FBC_A<12> R2
A<11> J1 FBC_A<12> R2
A<11> J1 FBC_A<12> R2
A<11> J1 FBC_A<12> R2
A<11> J1
12 12 12 12
SNN_R8_M5 R8
A<12> VDDL SNN_R8_M6 R8
A<12> VDDL SNN_R8_M7 R8
A<12> VDDL SNN_R8_M8 R8
A<12> VDDL
NC/A<13> NC/A<13> NC/A<13> NC/A<13>
O
SNN_R3_M5 R3 SNN_R3_M6 R3 SNN_R3_M7 R3 SNN_R3_M8 R3
SNN_R7_M5 R7
NC/A<14> A3 SNN_R7_M6 R7
NC/A<14> A3 SNN_R7_M7 R7
NC/A<14> A3 SNN_R7_M8 R7
NC/A<14> A3
NC/A<15> VSS E3
NC/A<15> VSS E3
NC/A<15> VSS E3
NC/A<15> VSS E3
FBC_BA0 L2
VSS J3 FBC_BA0 L2
VSS J3 FBC_BA0 L2
VSS J3 FBC_BA0 L2
VSS J3
5.4F< 3.3H> IN BA<0> VSS BA<0> VSS BA<0> VSS BA<0> VSS
5.4F< 3.3H> FBC_BA1 L3 N1 FBC_BA1 L3 N1 FBC_BA1 L3 N1 FBC_BA1 L3 N1
IN
FBC_BA2 L1
BA<1> VSS P9 FBC_BA2 L1
BA<1> VSS P9 FBC_BA2 L1
BA<1> VSS P9 FBC_BA2 L1
BA<1> VSS P9
5.4F< 3.3H> IN NC/BA<2> VSS GND NC/BA<2> VSS GND NC/BA<2> VSS NC/BA<2> VSS GND
C
A7 A7 A7 GND A7
FBC_CKE K2
VSSQ B2 FBC_CKE K2
VSSQ B2 FBC_CKE K2
VSSQ B2 FBC_CKE K2
VSSQ B2
5.4F< 3.3H> IN CKE VSSQ CKE VSSQ CKE VSSQ CKE VSSQ
FBC_CLK0 J8 B8 FBC_CLK0 J8 B8 FBC_CLK1 J8 B8 FBC_CLK1 J8 B8
FBC_CLK0* K8
CLK VSSQ D2 FBC_CLK0* K8
CLK VSSQ D2 FBC_CLK1* K8
CLK VSSQ D2 FBC_CLK1* K8
CLK VSSQ D2
CLK VSSQ D8
CLK VSSQ D8
CLK VSSQ D8
CLK VSSQ D8
VSSQ VSSQ VSSQ VSSQ
2 E7 E7 E7 E7 2
.
VSSQ F2
VSSQ F2
VSSQ F2
VSSQ F2
FBVDDQ FBVDDQ FBVDDQ FBVDDQ
VSSQ F8
VSSQ F8
VSSQ F8
VSSQ F8
FBC_ODT K9
VSSQ H2 FBC_ODT K9
VSSQ H2 FBC_ODT K9
VSSQ H2 FBC_ODT K9
VSSQ H2
5.5F< 3.5D> IN ODT VSSQ ODT VSSQ ODT VSSQ ODT VSSQ
H8 R558 H8 R31 H8 R36 H8 R542
R546 R544
VSSQ 1K VSSQ 1K VSSQ 1K VSSQ 1K
10K 10K 1% 1% 1% 1%
J7 J7 J7 J7
5% 5% VSSL 0402 VSSL 0402 VSSL 0402 VSSL 0402
X
0402 0402 COMMON COMMON COMMON COMMON
COMMON COMMON SNN_A2_M5 A2 SNN_A2_M6 A2 SNN_A2_M7 A2 SNN_A2_M8 A2
SNN_E2_M5 E2
NC J2 FBC_VREF1 SNN_E2_M6 E2
NC J2 FBC_VREF3 SNN_E2_M7 E2
NC J2 FBC_VREF2 SNN_E2_M8 E2
NC J2 FBC_VREF4
NC Vref C678
NC Vref C16
NC Vref C25
NC Vref C567
R559 .1UF R28 .1UF R37 .1UF R532 .1UF
1K 6.3V 1K 6.3V 1K 6.3V 1K 6.3V
GND GND 10% 10% 10% 10%
1% 1% 1% 1%
I
0402 X7R 0402 X7R 0402 X7R 0402 X7R
COMMON 0402 COMMON 0402 COMMON 0402 COMMON 0402
COMMON COMMON COMMON COMMON
A F
FBVDDQ
CLOCK TERMINATIONS FBVDDQ
3 R29 R531 3
0 0
5% 5%
0402 0402
N
NO STUFF NO STUFF
5.3F< 3.4H> FBC_CLK0 R30 60.4 FBC_CLK0_TERM R33 60.4 FBC_CLK0* 3.4H> 5.4F< 5.4F< 3.4H> FBC_CLK1 R536 60.4 FBC_CLK1_TERM R540 60.4 FBC_CLK1* 3.4H> 5.4F<
IN IN IN IN NET MIN_LINE_WIDTH VOLTAGE
0402 1% COMMON 0402 1% COMMON 0402 1% COMMON 0402 1% COMMON
C18 C580
.01UF .01UF FBC_VREF1
IN 16MIL 0.9V
16V 16V
I
FBC_VREF2 16MIL 0.9V
10% 10% IN
X7R X7R FBC_VREF3 16MIL 0.9V
IN
0402 0402 FBC_VREF4 16MIL 0.9V
IN
COMMON COMMON
NET DIFFPAIR CRITICAL IMPEDANCE
GND GND 5.3A< 3.4H> FBC_CLK0 FBC_CLK0 1 100DIFF
IN
5.3B< 3.4H> FBC_CLK0* FBC_CLK0 1 100DIFF
H
IN
5.3C< 3.4H> FBC_CLK1 FBC_CLK1 1 100DIFF
IN
5.3E< 3.4H> FBC_CLK1* FBC_CLK1 1 100DIFF
IN
3.3E<> FBCDQS0 FBCDQS0 1 100DIFF
BI
3.4E<> FBCDQS0* FBCDQS0 1 100DIFF
BI
3.4E<> FBCDQS1 FBCDQS1 1 100DIFF
BI
3.4E<> FBCDQS1* FBCDQS1 1 100DIFF
BI
C
3.4E<> FBCDQS2 FBCDQS2 1 100DIFF
5.5F<> 3.1E<> FBCD<63..0> BI
BI 3.4E<> FBCDQS2* FBCDQS2 1 100DIFF
BI
3.4E<> FBCDQS3 FBCDQS3 1 100DIFF
BI
5.5F< 3.3E> FBCDQM<7..0> 3.4E<> FBCDQS3* FBCDQS3 1 100DIFF
IN BI
3.4E<> FBCDQS4 FBCDQS4 1 100DIFF
BI
3.4E<> FBCDQS4* FBCDQS4 1 100DIFF
BI
M504 M1 M1 M504 FBCDQS5 FBCDQS5 1 100DIFF
.
3.4E<> BI
16MX16DDR2-2.5 16MX16DDR2-2.5 16MX16DDR2-2.5 16MX16DDR2-2.5
BGA84 BGA84 BGA84 BGA84 3.4E<> FBCDQS5* FBCDQS5 1 100DIFF
BI
4 CHANGED
2/2
CHANGED
2/2
CHANGED
2/2
CHANGED
2/2
3.4E<> BI
FBCDQS6 FBCDQS6 1 100DIFF 4
0 FBCD<0> B9 8 FBCD<8> H1 16 FBCD<16> D1 24 FBCD<24> F9 3.4E<> FBCDQS6* FBCDQS6 1 100DIFF
FBCD<1> D7
DQ<0> FBCD<9> G8
DQ<0> FBCD<17> C2
DQ<0> FBCD<25> G2
DQ<0> BI
FBCDQS7
1 9 17 25 3.4E<> FBCDQS7 1 100DIFF
FBCD<2> D9
DQ<1> FBCD<10> H7
DQ<1> FBCD<18> B1
DQ<1> FBCD<26> F1
DQ<1> BI
FBCDQS7*
2 10 18 26 3.4E<> FBCDQS7 1 100DIFF
FBCD<3> D1
DQ<2> FBCD<11> G2
DQ<2> FBCD<19> D3
DQ<2> FBCD<27> G8
DQ<2> BI
3 11 19 27
DQ<3> DQ<3> DQ<3> DQ<3>
W
4 FBCD<4> B1 12 FBCD<12> H9 20 FBCD<20> D9 28 FBCD<28> H9
FBCD<5> C2
DQ<4> FBCD<13> H3
DQ<4> FBCD<21> B9
DQ<4> FBCD<29> H1
DQ<4> FBC_A<12..0> 2 56OHM
5 13 21 29 5.1A< 3.3H>
FBCD<6> D3
DQ<5> FBCD<14> F9
DQ<5> FBCD<22> C8
DQ<5> FBCD<30> H7
DQ<5> IN
6 14 22 30
FBCD<7> C8
DQ<6> FBCD<15> F1
DQ<6> FBCD<23> D7
DQ<6> FBCD<31> H3
DQ<6> FBD_A<5..2> 2 56OHM
7 15 23 31 5.1A< 3.3H>
DQ<7> DQ<7> DQ<7> DQ<7> IN
FBCDQM<0> B3 FBCDQM<1> F3 FBCDQM<2> B3 FBCDQM<3> F3 5.2A< 3.3H> FBC_BA0 2 56OHM
FBCDQS0 B7
DQM FBCDQS1 F7
DQM FBCDQS2 B7
DQM FBCDQS3 F7
DQM IN
FBC_BA1 2 56OHM
W
DQS DQS DQS DQS 5.2A< 3.3H> IN
FBCDQS0* A8 FBCDQS1* E8 FBCDQS2* A8 FBCDQS3* E8 5.2A< 3.3H> FBC_CKE 2 56OHM
DQS DQS DQS DQS IN
FBC_BA2
5.2A< 3.3H> IN 2 56OHM
W
CHANGED CHANGED CHANGED CHANGED 5.1A< 3.3H> FBC_CS0* 2 56OHM
2/2 2/2 2/2 2/2 IN
32 FBCD<32> C8 40 FBCD<40> C8 48 FBCD<48> G2 56 FBCD<56> F9 FBC_CS1* 2 56OHM
FBCD<33> B9
DQ<0> FBCD<41> D7
DQ<0> FBCD<49> F9
DQ<0> FBCD<57> G2
DQ<0> IN
33 41 49 57
FBCD<34> D9
DQ<1> FBCD<42> B9
DQ<1> FBCD<50> F1
DQ<1> FBCD<58> G8
DQ<1>
34 42 50 58
FBCD<35> D7
DQ<2> FBCD<43> C2
DQ<2> FBCD<51> H3
DQ<2> FBCD<59> F1
DQ<2> FBCD<63..0> 2 50OHM
35 43 51 59 5.4A<> 3.1E<>
FBCD<36> D1
DQ<3> FBCD<44> B1
DQ<3> FBCD<52> H9
DQ<3> FBCD<60> H1
DQ<3> BI
FBCDQM<7..0> 2 50OHM
36 44 52 60 5.4A< 3.3E>
FBCD<37> B1
DQ<4> FBCD<45> D3
DQ<4> FBCD<53> G8
DQ<4> FBCD<61> H9
DQ<4> IN
37 45 53 61
FBCD<38> D3
DQ<5> FBCD<46> D9
DQ<5> FBCD<54> H1
DQ<5> FBCD<62> H7
DQ<5>
38 46 54 62
FBCD<39> C2
DQ<6> FBCD<47> D1
DQ<6> FBCD<55> H7
DQ<6> FBCD<63> H3
DQ<6>
39 47 55 63
DQ<7> DQ<7> DQ<7> DQ<7> FBC_ODT
5.2A< 3.5D> IN 2 56OHM
FBCDQM<4> B3 FBCDQM<5> B3 FBCDQM<6> F3 FBCDQM<7> F3
FBCDQS4 B7
DQM FBCDQS5 B7
DQM FBCDQS6 F7
DQM FBCDQS7 F7
DQM
DQS DQS DQS DQS
5 FBCDQS4* A8
DQS FBCDQS5* A8
DQS FBCDQS6* E8
DQS FBCDQS7* E8
DQS 5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM V1.3, HDCP. SANTA CLARA, CA 95050, USA
PAGE DETAIL Frame Buffer Partition C Memories
NV_PN 600-10407-0001-300 A
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p407_a03 PAGE 5 OF 18
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME myan DATE 21-DEC-2006
A B C D E F G H
A B C D E F G H
http://www.elecfans.com
PAGE 6) MEMORY DECOUPLING CAPS 电子发烧友 http://bbs.elecfans.com 电子技术论坛
. C N 1
2
FBVDDQ
C595
.1UF
6.3V
10%
X7R
0402
COMMON
C592
.1UF
6.3V
10%
X7R
0402
COMMON
C555
.1UF
6.3V
10%
X7R
0402
COMMON
C544
.1UF
6.3V
10%
X7R
0402
COMMON
C556
.1UF
6.3V
10%
X7R
0402
COMMON
C549
4.7UF
6.3V
10%
X5R
0603
COMMON
FBVDDQ
C36
.1UF
6.3V
10%
X7R
0402
COMMON
C58
.1UF
6.3V
10%
X7R
0402
COMMON
C54
.1UF
6.3V
10%
X7R
0402
COMMON
C38
.1UF
6.3V
10%
X7R
0402
COMMON
C59
.1UF
6.3V
10%
X7R
0402
COMMON
C64
4.7UF
6.3V
10%
X5R
0603
COMMON
CO M 2
.
GND GND
FBVDDQ FBVDDQ
X
NVVDD NVVDD
C508 C527 C510 C509 C530 C501 C23 C24 C28 C26 C29 C22
.1UF .1UF .1UF .1UF .1UF 4.7UF .1UF .1UF .1UF .1UF .1UF 4.7UF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
C13 C30 C628 C630 C9 C31 C55 C46 C65 C512 C519 C529
I
X7R X7R X7R X7R X7R X5R X7R X7R X7R X7R X7R X5R
.1UF .1UF .1UF .1UF .1UF .1UF 0402 0402 0402 0402 0402 0603 0402 0402 0402 0402 0402 0603 .1UF .1UF .1UF .1UF .1UF .1UF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R X7R
0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND GND
F
FBVDDQ FBVDDQ
GND GND
C691 C690 C692 C653 C657 C694 C60 C39 C63 C62 C40 C69
.1UF .1UF .1UF .1UF .1UF 4.7UF .1UF .1UF .1UF .1UF .1UF 4.7UF
A
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R X5R X7R X7R X7R X7R X7R X5R
0402 0402 0402 0402 0402 0603 0402 0402 0402 0402 0402 0603
3 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON 3
NVVDD TRANSITION CAP NEAR BY PARTION A NVVDD TRANSITION CAP NEAR BY PARTION C
N
GND GND
FBVDDQ FBVDDQ
I
C525 C505 C513 C526 C507 C504 C15 C14 C21 C19 C8 C11
.1UF .1UF .1UF .1UF .1UF 4.7UF .1UF .1UF .1UF .1UF .1UF 4.7UF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
X7R X7R X7R X7R X7R X5R X7R X7R X7R X7R X7R X5R
0402 0402 0402 0402 0402 0603 0402 0402 0402 0402 0402 0603
H
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND GND
. C
4 4
W W W ASSEMBLY G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM V1.3, HDCP.
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
5
N
3V3RUN 3V3RUN
C
G1
G84-600-A1
DAC A R598 R599
3V3RUN BGA820 2.2K 2.2K
CHANGED 5% 5%
1 0402 0402 1
3.3V 12MIL
4/14 DACA COMMON COMMON
LB506 220R@100MHz DACA_VDD AD10 K2 I2CA_SCL R588 33 I2CA_SCL_R 9.3B<
BEAD_0603 COMMON
DACA_VDD I2CA_SCL J3 I2CA_SDA 0402 5% COMMON I2CA_SDA_R
OUT
R587 33 9.3B<>
I2CA_SDA BI
.
12MIL DACA_VREF AH10 0402 5% COMMON
DACA_VREF
12MIL DACA_RSET AH9 AF10 DACA_HSYNC
DACA_RSET DACA_HSYNC OUT 9.3B<
AK10 DACA_VSYNC 9.3B<
C701 C656 C669 C676 R564
DACA_VSYNC OUT
4.7UF .1UF .01UF 470PF 124 NV_IMPEDANCE NV_CRITICAL
6.3V 10% 6.3V 10% 16V 10% 16V 10% 1%
M
X7R AH11 DACA_RED 50OHM 1 9.3B<
X5R X7R X7R 0402 DACA_RED OUT
0603 0402 0402 0402 COMMON
COMMON COMMON COMMON COMMON AJ12 DACA_GREEN 50OHM 1 9.3B<
DACA_GREEN OUT
AH12 DACA_BLUE 50OHM 1 9.3B<
DACA_BLUE OUT
GND
O
AG9
DACA_IDUMP
C
COMMON COMMON COMMON
G1
G84-600-A1
DAC B GND GND GND
2 BGA820 2
.
3V3RUN CHANGED
3.3V 12MIL
5/14 DACB(TV)
LB511 220R@100MHz DACB_VDD V8
BEAD_0603 COMMON
DACB_VDD
12MIL DACB_VREF R5
DACB_VREF
X
12MIL DACB_RSET R7
DACB_RSET U5 SNN_DACB_CSYNC
C699 C667 C668 C689 R561
DACB_CSYNC
4.7UF .1UF .01UF 470PF 124
NV_IMPEDANCE NV_CRITICAL
6.3V 10% 6.3V 10% 16V 10% 16V 10% 1%
X7R R6 DACB_RED 50OHM 1 9.2B<
X5R X7R X7R 0402 DACB_RED OUT
0603 0402 0402 0402 COMMON
COMMON COMMON COMMON COMMON T5 DACB_GREEN
I
DACB_GREEN 50OHM 1 OUT 9.2B<
T6 DACB_BLUE 50OHM
DACB_BLUE 1 OUT 9.3B<
GND
V7
DACB_IDUMP R563 R567 R556
F
150 150 150
Place close to GPU
1% 1% 1%
GND 0402 0402 0402
COMMON COMMON COMMON
3V3RUN 3V3RUN
A
G1
G84-600-A1
DAC C GND GND GND
R594 R597
BGA820 2.2K 2.2K
CHANGED 5% 5%
0402 0402
3 12MIL
6/14 DACC COMMON COMMON 3
R566 1K DACC_VDD AD7 H4 I2CB_SCL R578 33 I2CB_SCL_R 9.2B<
0402 1% COMMON
DACC_VDD I2CB_SCL J4 I2CB_SDA 0402 5% COMMON I2CB_SDA_R
OUT
R579 33 9.2B<>
I2CB_SDA
N
BI
SNN_DACC_VREF AH4 0402 5% COMMON
DACC_VREF
SNN_DACC_RSET AF5 AG7 SNN_DACC_HSYNC
DACC_RSET DACC_HSYNC AG5 SNN_DACC_VSYNC
GND DACC_VSYNC
I
AF6 SNN_DACC_RED
DACC_RED
AG6 SNN_DACC_GREEN
DACC_GREEN
AE5 SNN_DACC_BLUE
DACC_BLUE
H
AG4
DACC_IDUMP
GND
C
DAC V_REFERENCE OPTION
G1
G84-600-A1 CRYSTAL AND PLL
BGA820
CHANGED DAC_VREF DACA_VREF
PEX1V2 R552 0
.
14.4H> IN
13/14 XTAL_PLL 0402 5% NO STUFF
4 1.2V 12MIL
4
LB504 220R@100MHz PLLVDD T9 R26 0 DACB_VREF
BEAD_0603 COMMON T10
PLLAVDD 0402 5% NO STUFF
C651 C662 C649
VID_PLLVDD
4.7UF .01UF 470PF U10
6.3V 10% 16V 16V 10% PLLGND THESE 2 RESISTOR SHOULD BE PLACED NEAR TO GPU
W
X5R 10% X7R
0603 X7R 0402
COMMON 0402 COMMON
COMMON GND
W
GND XTALIN U1 U2 XTALOUT R17
XTALIN XTALOUT 10K
5%
0402
COMMON
3 1 INTERNAL SS : STUFF
W
Y1 27 MHZ NV_NET_NAME NV_IMPEDANCE NV_CRITICAL_NET
EXTERNAL SS : NO STUFF
C6 H10SSMD 10 PPM C2 XTALOUT 50OHM 1
22PF COMMON 22PF OUT
XTAL_4PIN XTALIN 50OHM 1
50V 50V IN
5% 5% GND
C0G C0G 11.2B< 7.4F> XTALOUTBUFF 50OHM 1
OUT
0402 0402 11.2E> 7.4C< SSFOUT 50OHM 1
IN
COMMON COMMON
GND GND
5 5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM V1.3, HDCP. SANTA CLARA, CA 95050, USA
PAGE DETAIL DACs, Clock-Generation
NV_PN 600-10407-0001-300 A
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p407_a03 PAGE 7 OF 18
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME myan DATE 21-DEC-2006
A B C D E F G H
A B C D E F G H
http://www.elecfans.com
PAGE 8) LVDS(LINK A/B), TMDS(LINK C/D) 电子发烧友 http://bbs.elecfans.com 电子技术论坛
C N
G1
LVDS
G84-600-A1
1 BGA820
CHANGED
1
NET NAME DIFFPAIR NV_CRITICAL_NET NV_IMPEDANCE
7/14 IFPAB
SNN_IFPABVPROBE AM4 AJ9 IFPATXC* IFPATXC 1 100DIFF 9.4G<
IFPAB_VPROBE IFPA_TXC OUT
.
AK9 IFPATXC IFPATXC 1 100DIFF 9.4G<
IFPA_TXC OUT
12MIL IFPABRSET AL5
R570 1K
0402 1% COMMON
IFPAB_RSET AJ6 IFPATXD0* IFPATXD0 1 100DIFF
IFPA_TXD0 OUT 9.4G<
1V8RUN AH6 IFPATXD0 IFPATXD0 1 100DIFF 9.4G<
IFPA_TXD0 OUT
M
GND
1.8V 12MIL IFPABPLLVDD AC9 AH7 IFPATXD1* IFPATXD1 1 100DIFF
LB508 220R@100MHz 9.4G<
BEAD_0603 COMMON
IFPAB_PLLVDD IFPA_TXD1 AH8 IFPATXD1 IFPATXD1 1 100DIFF
OUT
IFPA_TXD1 OUT 9.4G<
C702 C698 C663 C664
4.7UF 4.7UF .01UF 470PF
6.3V 6.3V 16V 16V
AK8 IFPATXD2* IFPATXD2 1 100DIFF 9.4G<
10% 10% 10% 10% IFPA_TXD2 AJ8 IFPATXD2 IFPATXD2 1 100DIFF
OUT
X5R X5R X7R X7R IFPA_TXD2 9.4G<
O
OUT
0603 0603 0402 0402
COMMON COMMON COMMON COMMON AD9
IFPAB_PLLGND AH5 IFPATXD3* IFPATXD3 1 100DIFF
IFPA_TXD3 OUT 9.4G<
1V8RUN
AJ5 IFPATXD3 IFPATXD3 1 100DIFF 9.4G<
IFPA_TXD3 OUT
C
1G1D1S 3 AL4 IFPBTXC* IFPBTXC 1 100DIFF 9.4G<
D IFPB_TXC AK4 IFPBTXC IFPBTXC 1 100DIFF
OUT
Q512 IFPB_TXC OUT 9.4G<
RTR040N03
SOT23_1G1D1S
14.2A> IN
FB_PWRGOOD 1 G COMMON
2 LVDS_IOVDD 16MIL 1.8V 12MIL IFPABIOVDD AF9 AM5 IFPBTXD4* IFPBTXD4 1 100DIFF
S 1.8V LB505 220R@100MHz
IFPA_IOVDD IFPB_TXD4 OUT 9.3G<
BEAD_0603 COMMON AM6 IFPBTXD4 IFPBTXD4 1 100DIFF 9.3G<
C706
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=4A@25C C686 C687 C677 C671
IFPB_TXD4 OUT
2 AF8 2
.
.1UF
[email protected]
MAX_CURRENT=16A C712 4.7UF .1UF .01UF .01UF IFPB_IOVDD
MAX_WATTAGE=1W@25C
6.3V V_BE_GS=12V 4.7UF 6.3V 6.3V 16V 16V
AL7 IFPBTXD5* IFPBTXD5 1 100DIFF 9.3G<
10% 6.3V 10% 10% 10% 10% IFPB_TXD5 AM7 IFPBTXD5 IFPBTXD5 1 100DIFF
OUT
X7R 10% X5R X7R X7R X7R IFPB_TXD5 OUT 9.3G<
0402 X5R 0603 0402 0402 0402
COMMON 0603 COMMON COMMON COMMON COMMON
COMMON AK5 IFPBTXD6* IFPBTXD6 1 100DIFF 9.4G<
IFPB_TXD6 OUT
X
GND AK6 IFPBTXD6 IFPBTXD6 1 100DIFF 9.4G<
IFPB_TXD6 OUT
GND GND
AL8 IFPBTXD7* IFPBTXD7 1 100DIFF 9.4G<
IFPB_TXD7 AK7 IFPBTXD7 IFPBTXD7 1 100DIFF
OUT
IFPB_TXD7 OUT 9.4G<
A F G1
G84-600-A1
BGA820
CHANGED
I
TMDS
NET NAME DIFFPAIR NV_CRITICAL_NET NV_IMPEDANCE
3
N
8/14 IFPCD
SNN_IFPCDVPROBE AK3 AM3 IFPCTXC* IFPCTXC 1 100DIFF 9.2G<
IFPCD_VPROBE IFPC_TXC AM2 IFPCTXC IFPCTXC 1 100DIFF
OUT
IFPC_TXC OUT 9.2G<
I
1V8RUN AE2 IFPCTXD0 IFPCTXD0 1 100DIFF 9.2G<
IFPC_TXD0 OUT
GND
1.8V 12MIL IFPCDPLLVDD AA10 AF2 IFPCTXD1* IFPCTXD1 1 100DIFF
LB512 220R@100MHz 9.2G<
BEAD_0603 COMMON
IFPCD_PLLVDD IFPC_TXD1 AF1 IFPCTXD1 IFPCTXD1 1 100DIFF
OUT
IFPC_TXD1 OUT 9.2G<
C711 C683 C666
4.7UF .01UF 470PF
H
6.3V 16V 16V
AH1 IFPCTXD2* IFPCTXD2 1 100DIFF 9.2G<
10% 10% 10% IFPC_TXD2 AG1 IFPCTXD2 IFPCTXD2 1 100DIFF
OUT
3V3RUN X5R X7R X7R 9.2G<
IFPC_TXD2 OUT
TMDS BACKDRIVE PREVENTION 0603 0402 0402
COMMON COMMON COMMON AB10
3
IFPCD_PLLGND
1G1D1S Q2
D SI2305DS
C
SOT23_1G1D1S
COMMON
1G1D1S 3 RUNPWROK* 1 G MAX_VOLTAGE=-8V GND
D S 2 CONTINUOUS_CURRENT=-2.8A@70C AH2 IFPDTXC* IFPDTXC 1 100DIFF 9.3G<
Q1
R_DS_ON=52mR
MAX_CURRENT=-6A IFPD_TXC AG3 IFPDTXC IFPDTXC 1 100DIFF
OUT
RHU002N06 MAX_WATTAGE=0.8W@70C IFPD_TXC OUT 9.3G<
V_BE_GS=+/-8V
14.4C< 13.2B< 11.2B< 9.4A> IN
RUNPWROK 1 G SOT323_1G1D1S
S 2 COMMON
TMDS_IOVDD 3.3V 16MIL 3.3V 12MIL IFPC_IOVDD AD6 AJ1 IFPDTXD3* IFPDTXD3 1 100DIFF
R4 10K LB507 220R@100MHz
.
MAX_VOLTAGE=60V
IFPC_IOVDD IFPD_TXD4 OUT 9.2G<
CONTINUOUS_CURRENT=200mA
0402 5% COMMON BEAD_0603 COMMON AK1 IFPDTXD3 IFPDTXD3 1 100DIFF 9.2G<
R_DS_ON=4R
MAX_CURRENT=800mA C695 C688 C685
IFPD_TXD4 OUT
4 MAX_WATTAGE=200mW C710
AE7
IFPD_IOVDD 4
V_BE_GS=+/-20V 4.7UF .1UF .01UF
.1UF 6.3V 6.3V 16V
6.3V AL1 IFPDTXD4* IFPDTXD4 1 100DIFF 9.2G<
X7R R606
10% 10% 10% IFPD_TXD5 AL2 IFPDTXD4 IFPDTXD4 1 100DIFF
OUT
10% REDUCE INRUSH CURRENT X5R X7R X7R IFPD_TXD5 OUT 9.2G<
0402 R618 10K 0 0603 0402 0402
GND
5%
W
COMMON 0402 5% COMMON COMMON COMMON COMMON
0603
NO STUFF AJ3 IFPDTXD5* IFPDTXD5 1 100DIFF 9.2G<
IFPD_TXD6 AJ2 IFPDTXD5 IFPDTXD5 1 100DIFF
OUT
IFPD_TXD6 OUT 9.2G<
S 2
1G1D1S 3 DVI_B_EN* R617 1K DVIB_EN* 1 GND
D
G
0402 1% COMMON
Q3 1G1D1S
W
RHU002N06 LB510 220R@100MHz
3.3V 12MIL
G
GPIO1_DVI_B_HPD 1
D 3 TMDSD_IOVDD BEAD_0603 COMMON IFPD_IOVDD
10.3F> IN SOT323_1G1D1S
2 COMMON
S Q508 12MIL 3.3V
C708 C697 C682 C675
MAX_VOLTAGE=60V SI2305DS
CONTINUOUS_CURRENT=200mA
SOT23_1G1D1S .1UF 4.7UF .1UF .01UF
R_DS_ON=4R
MAX_CURRENT=800mA COMMON 6.3V 6.3V 6.3V 16V
MAX_WATTAGE=200mW 10% 10% 10% 10%
V_BE_GS=+/-20V V_BE_GS=+/-8V
MAX_WATTAGE=0.8W@70C X7R X5R X7R X7R
W
MAX_CURRENT=-6A
R_DS_ON=52mR 0402 0603 0402 0402
CONTINUOUS_CURRENT=-2.8A@70C COMMON COMMON COMMON COMMON
MAX_VOLTAGE=-8V
GND
GND GND
5 5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM V1.3, HDCP. SANTA CLARA, CA 95050, USA
PAGE DETAIL LVDS, TMDS GPU Interface
NV_PN 600-10407-0001-300 A
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p407_a03 PAGE 8 OF 18
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME myan DATE 21-DEC-2006
A B C D E F G H
A B C D E F G H
3V3RUN
VOLTAGE
3.3V
MIN_WIDTH_LINE
12MIL
NV_NET_MAX_CURRENT
1.5A
3V3RUN
N
1V8RUN 1.8V 12MIL 3.5A
1V8RUN 1V8RUN
2V5RUN 2.5V 12MIL 0.5A
2V5RUN 2V5RUN
5VRUN 5V 16MIL 0.5A
5VRUN 5VRUN
PWR_SRC 22V 16MIL 4A
C
PWR_SRC PWR_SRC
GND 0V 12MIL 50A
1 1
GND GND
.
SPDIF 50OHM 1
OUT
MXM CONNECTOR 2.5G< SPDIF_IN 50OHM 1
9.4B>
OUT
M
CN1
CON_MXM_X16_EDGE
(N,NON)PHY(-X16,-HE)_SLI
NPHY-X16_SLI
NO STUFF
2/2 IO - LVDS,DVI,VGA,TV
O
219 IFPCTXC* 8.3H>
DVI_A_HPD 217
DVI_A_CLK 221 IFPCTXC
IN
10.3H< OUT DVI_A_HPD DVI_A_CLK IN 8.3H>
DVI-A
C
231 IFPCTXD1* 8.3H>
DVI_A_TX1 233 IFPCTXD1
IN
DVI_A_TX1 IN 8.3H>
2 2
.
10.3H< DVI_B_HPD 193
OUT DVI_B_HPD
DVI-B SLI
IFPDTXD5*
201 8.4H>
DVI_B_TX2 DVI_B_TX2 IN
X
203 IFPDTXD5 8.4H>
DVI_B_TX2 DVI_B_TX2 IN
207 IFPDTXD4* 8.4H>
SDTV HDTV DVI_B_TX1 DVI_B_TX1 209 IFPDTXD4
IN
DVI_B_TX1 DVI_B_TX1 IN 8.4H>
7.2F> DACB_GREEN 140
IN TV_Y HDTV_Y 213 IFPDTXD3*
DVI_B_TX0 DVI_B_TX0 IN 8.4H>
DACB_RED 136 215 IFPDTXD3
I
7.2F> IN TV_C HDTV_Pr DVI_B_TX0 DVI_B_TX0 IN 8.4H>
2V5RUN 2V5RUN
7.3F> DACB_BLUE 144 189 IFPDTXC* 8.4H>
IN TV_CVBS HDTV_Pb DVI_B_CLK DR_RASTER_SYNC 191 IFPDTXC
IN
DVI_B_CLK DR_SWAP_RDY IN 8.4H>
R25 R19
10K 10K
5% 5%
185 SLI_D<0> 0 SLI_D<14..0> 12.1F<>
DR_D0 BI 0402 0402
F
DACA_VSYNC 153 183 SLI_D<1> 1 15.4B>
7.1F> IN VSYNC DR_D1 COMMON COMMON
7.1F> DACA_HSYNC 151 181 SLI_D<2> 2 R16 1K GPIO_SLI_SYNC 10.3F<>
IN HSYNC DR_D2 179 SLI_D<3> 0402 1% COMMON
BI
3
DACA_RED 148
DR_D3 177 SLI_D<4> SLI_SWAP_OUT
7.1F> 4 R15 1K 11.4C<>
IN VGA_RED DR_D4 175 SLI_D<5> 0402 1% COMMON
BI
5
DACA_GREEN 152
DR_D5 173 SLI_D<6>
7.1F> 6
IN VGA_GRN DR_D6 167 SLI_D<7> PLACE THESE COMPONENTS TO ISOLATE
A
7
DACA_BLUE 156
DR_D7 165 SLI_D<8>
7.2F> 8 2 TYPE SIGNALS AND BALANCE THE LOAD
IN VGA_BLU DR_D8 163 SLI_D<9> 9
I2CA_SCL_R 155
DR_D9 161 SLI_D<10> OF THE DIFF PAIR
7.1F> 10
IN DDCA_SCLK DR_D10
3 7.1F<> BI
I2CA_SDA_R 157
DDCA_SDATA DR_D11 159 SLI_D<11> 11 3
187 SLI_D<12> 12
GND DR_D12 195 SLI_D<13> 13
DR_D13
N
197 SLI_D<14> 14
DR_D14 143 SLI_DE
DR_CMD BI 12.2F<>
141 SLI_REFCLK 12.4F<>
DR_REFCLK 171 SLI_CLKOUT
BI
DR_CLK BI 12.2F<>
I
186 IFPBTXD4 8.2H>
GPIO3_PPEN 224
LVDS_UTX0 184 IFPBTXD4*
IN
10.3F> IN LVDS_PPEN LVDS_UTX0 IN 8.2H>
10.3F> GPIO4_BLEN 228
IN
GPIO2_BL_PWM 226
LVDS_BLEN 180 IFPBTXD5
10.3F> IN LVDS_BL_BRGHT LVDS_UTX1 IN 8.2H>
178 IFPBTXD5* 8.2H>
I2CC_SCL_R 222
LVDS_UTX1 IN
11.2B< 10.3F> DDCC_SCLK
H
IN
11.2B<> 10.3F<> I2CC_SDA_R 220 174 IFPBTXD6 8.2H>
BI DDCC_SDATA LVDS_UTX2 172 IFPBTXD6*
IN
LVDS_UTX2 IN 8.2H>
C
162 IFPBTXC 8.2H>
SMB_DAT 145
LVDS_UCLK 160 IFPBTXC*
IN
10.2A<> BI SMB_DAT LVDS_UCLK IN 8.2H>
10.2A< SMB_CLK 147
OUT SMB_CLK
.
LVDS_LTX0 IN 8.1H>
14.4C< 13.2B< 11.2B< 8.4A< RUNPWROK R39 1K RUNPWROK_IN 16
OUT RUNPWROK
4 0402 1% COMMON 10.3F< OUT
GPIO_AC_BATT* 169
AC/BATT* LVDS_LTX1 210 IFPATXD1
IN 8.1H> 4
208 IFPATXD1* 8.1H>
C33
LVDS_LTX1 IN
1000PF 204 IFPATXD2
LVDS_LTX2 IN 8.2H>
50V
2.5G< SPDIF_IN R565 49.9 SPDIF 170 202 IFPATXD2* 8.2H>
10% OUT SPDIF LVDS_LTX2 IN
W
9.1G> 0402 1% COMMON
X7R
0402 198 IFPATXD3 8.2H>
COMMON
LVDS_LTX3 196 IFPATXD3*
IN
LVDS_LTX3 IN 8.2H>
W
ESD Protection for MOSFET Gates
W ASSEMBLY
PAGE DETAIL
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA,
MXM Connector, IO-Section
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
A B C D E
MXM V1.3, HDCP.
F G
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NV_PN
ID
NAME
600-10407-0001-300 A
p407_a03
myan
H
PAGE
DATE
9 OF 18
21-DEC-2006
5
A B C D E F G H
http://www.elecfans.com
PAGE 10) GPIO, JTAG, TEMP SENSOR 电子发烧友 http://bbs.elecfans.com 电子技术论坛
. C N 1
M
3V3RUN
R596 47.5K
0402 1% NO STUFF
O
R605 47.5K
0402 1% NO STUFF
C
0402 1% NO STUFF 0402 5% COMMON 3V3RUN 3V3RUN
TEMP SENSER
R10
U2 200
MAX6649MUA 1% R612 R603
SO8_122MIL 0402
NO STUFF 3.3V 47.5K 47.5K
NO STUFF
10MIL 12MIL 1% 1%
2 SMB_DAT R7 0 2 1 THERM_VDD 2
.
9.4B<> BI D+ VDD 0402 0402
0402 5% NO STUFF 10MIL 3 R604 5% 0 COMMON COMMON
SMB_CLK
D- 4 M_THERM_ALERT* 0402 NO STUFF THERM_ALERT*
9.4B> R2 0 9.4B<
IN
0402 5% NO STUFF
THERM 6 M_GPIO8_SLOWDOWN* NV_PWRGOOD
OUT
ALERT IN 13.2B> 14.2A<
THERM_SCL 8
1G1D1S
1G1D1S
1G1D1S
THERM_SDA 7
SCL 5 C5 R614 5% 0
I2CC_SCL_R
SDA GND .1UF 0402 NO STUFF
R3 0
1
6.3V
G
0402 5% NO STUFF
C7 10%
I2CC_SDA_R R5 0 X7R
1000PF
D
0402 5% NO STUFF X7R GND 0402
COMMON NO STUFF
RHU002N06
SOT323_1G1D1S
COMMON
RHU002N06
SOT323_1G1D1S
COMMON
COMMON
SOT323_1G1D1S
RHU002N06
3
3
50V TEMP SENSER I2C ADDRESS: 0X98H
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
R_DS_ON=4R
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
R_DS_ON=4R
MAX_CURRENT=800mA
MAX_WATTAGE=200mW
V_BE_GS=+/-20V
V_BE_GS=+/-20V
MAX_WATTAGE=200mW
MAX_CURRENT=800mA
R_DS_ON=4R
CONTINUOUS_CURRENT=200mA
MAX_VOLTAGE=60V
10%
0402 GND
3V3RUN
I
G1
Q509
Q511
G84-600-A1
BGA820 GPIO
Q510
CHANGED
9/14 MISC1 R615 R609
F6 SNN_CLAMP_F6 2.2K 2.2K
CLAMP 5% 5%
0402 0402
F
COMMON COMMON
SNN_THERMAL V6 C1 SMB_CLK_GPU
THERMALSENSOR_OBS I2CS_SCL B1 SMB_DATA_GPU
3V3RUN 3V3RUN 3V3RUN
I2CS_SDA
R22 33 5%
THERM* J1 G2 I2CC_SCL 0402 COMMON 9.4B< 11.2B<
R553 R548 R557
THERMDN I2CC_SCL G1 I2CC_SDA
OUT
I2CC_SDA BI 9.4B<> 11.2B<>
10K 10K 10K THERM K1
A
R23 33 5%
5% 5% 5% THERMDP 0402 COMMON
0402 0402 0402 OUT 8.4A<
NO STUFF COMMON COMMON K3 GPIO0_DVI_A_HPD R602 2.2K DVI_A_HPD 9.2B>
JTAG_TCLK AJ11
GPIO0 H1 GPIO1_DVI_B_HPD 0402 5% COMMON DVI_B_HPD
IN
R572 2.2K 9.2B>
TP502 JTAG_TCK GPIO1 IN
3 TP505
JTAG_TMS AK11
JTAG_TMS GPIO2 K5 GPIO2_BL_PWM
OUT 9.3B< 0402 5% COMMON 3
JTAG_TDI AK12 G5 GPIO3_PPEN_GPU GPIO3_PPEN 9.3B< 3V3RUN 3V3RUN
TP501
JTAG_TDO AL12
JTAG_TDI GPIO3 E2 GPIO4_BLEN_GPU GPIO4_BLEN
OUT
JTAG_TDO GPIO4 9.3B<
N
TP503 OUT
JTAG_TRST AL13 J5 GPIO5_NVVDDCTL0 13.4B< 2 2
TP504 JTAG_TRST GPIO5 G6 GPIO6_NVVDDCTL1
OUT
GPIO6 OUT 13.4B< D503 D502
FOR PEX COMPLIANCE TEST R555 R551 K6 SNN_GPIO7 BAV99 BAV99
10K 10K GPIO7 E1 GPIO8_THERM_ALERT* SOT23 3 SOT23 3
5% 5% GPIO8 D2 SNN_GPIO9 70V 70V
0402 0402 GPIO9 H5 SNN_GPIO10
215MA 215MA
COMMON COMMON GPIO10 COMMON COMMON
I
F4 GPIO_SLI_SYNC 9.3H<> 1 1
DRA_SYNC/GPIO11 E3 GPIO_AC_BATT*
BI
GPIO12 IN 9.4B>
U3 SNN_GPIO13 R616 R571
GPIO13 U4 SNN_GPIO14 R24 R6 R8 R611 47.5K 47.5K
GND GND DRB_SYNC/GPIO14 10K 10K 10K 10K 1% 1%
GND 0402 GND 0402
5% 5% 5% 5%
0402 0402 0402 0402 COMMON COMMON
COMMON COMMON COMMON COMMON
H
GND GND
GND GND GND GND
. C
4 4
W W W ASSEMBLY G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM V1.3, HDCP.
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
5
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PAGE 11) SPREAD SPECTRUM, VBIOS, HDCP BIOS, GPU GND 电子发烧友 http://bbs.elecfans.com 电子技术论坛
N
G1
G84-600-A1
BGA820
CHANGED
14/14 _GND_
C
AA12 K10
AA2
GND GND K23
GND GND
1 AA21
GND GND K29 1
AA31 K4
AB27
GND GND L27
AB6
GND GND L6
GND GND
.
AC10 M12
AC23
GND GND M2
AC29
GND GND M31
AC4
GND GND N15
AD16
GND GND N18
AD17
GND GND N29
SPREAD SPECTRUM GND GND
M
AD2 N4
AD31
GND GND P15
AE17
GND GND P18
AE27
GND GND P27
AE6
GND GND P6
AF11
GND GND R13
AF26
GND GND R14
GND GND
O
AF29 R15
SSFOUT
GND GND
3V3RUN R14 0 OUT 7.4C< 7.5G<
0402 5% CHANGED AF4 R18
AF7
GND GND R19
R9 Place close to ICS91720 AG10
GND GND R2
10K AG11
GND GND R20
U1 GND GND
C
5% 3V3RUN AG14 R31
ICS91730BM 0402 AG15
GND GND T16
SO8 GND GND
NO STUFF NO STUFF AG19 T17
RUNPWROK 8 2 CLK_VDD 12MIL 3.3V AG2
GND GND T24
14.4C< 13.2B< 9.4A> 8.4A< R610 2.2
IN PD VDD
0402 5% NO STUFF AG22
GND GND T29
XTALOUTBUFF 1 CLKOUT/ 4 SS_OUT 1 AG31
GND GND T4
7.5G> 7.4F> IN CLKIN GND GND
FS_IN0 C704 C709 C707 C705
2 50OHM AG8 U16 2
.
REFOUT/ 5 SS_REF R11 4.7UF 4.7UF .1UF 470PF AH24
GND GND U17
I2CC_SCL_R 7 FS_IN1 10K 6.3V 6.3V 6.3V 16V
AJ10
GND GND U24
10.3F> 9.4B< IN SCLK 12MIL 10% 10% 10% 10% GND GND
5%
10.3F<> 9.4B<> I2CC_SDA_R 6 3 X5R X5R X7R X7R AJ13 U29
BI SDATA GND 0402
AJ16
GND GND U8
COMMON 0603 0603 0402 0402
NO STUFF NO STUFF NO STUFF NO STUFF AJ17
GND GND V13
AJ20
GND GND V14
INTERNAL SS : STUFF GND GND
X
SPREAD SPECTRUM CLOCK I2C ADDRESS: 0XD4H EXTERNAL SS : NO STUFF AJ23 V15
AJ26
GND GND V18
AJ29
GND GND V19
GND GND GND
AJ4 V2
AJ7
GND GND V20
AK2
GND GND V31
I
AK28
GND GND W15
AK31
GND GND W18
AL11
GND GND W27
AL14
GND GND W6
AL19
GND GND Y15
AL22
GND GND Y18
GND GND
F
AL25 Y29
AL3
GND GND Y4
AL6
GND GND AL10
AL9
GND GND AM10
AM13
GND GND AG13
AM16
GND GND
AM17
GND
A
AM20
GND
AM23
GND
AM26
GND
3 VBIOS AND HDCP ROM AM29
GND
3
GND
3V3RUN
U3 B12
GND
N
SST25VF512
3V3RUN SO8 3V3RUN B15
G1 R12 B18
GND
G84-600-A1 SO8 GND
BGA820 10K COMMON B21
IN 15.4B> GND
CHANGED 5%
7 8 B24
0402
3
HOLD VCC B27
GND
10/14 MISC2 COMMON
WP GND
AA4 ROMCS* 1 C4 B3
ROMCS CS .1UF GND
I
SNN_STRAP F1 B30
STRAP W2 ROM_SI 5
6.3V
B6
GND
SNN_MSTRAPSEL0 AE26
ROM_SI AA6 ROM_SO 2
SI 10%
B9
GND
MEMSTRAPSEL0 ROM_SO SO X7R GND
SNN_MSTRAPSEL1 AD26 AA7 ROM_SCLK 6 4 0402 C2
SNN_MSTRAPSEL2 AH31
MEMSTRAPSEL1 ROM_SCLK SCK GND COMMON C31
GND
SNN_MSTRAPSEL3 AH32
MEMSTRAPSEL2 D10
GND
MEMSTRAPSEL3 G3 I2CH_SCL D13
GND
I2CH_SCL GND
H
H3 I2CH_SDA GND D16
I2CH_SDA R576 D17
GND
10K D20
GND
SNN_G3_RFU9 V3
5%
D23
GND
SNN_G3_RFU10 V4
RFU 0402
D26
GND
RFU COMMON GND
SNN_G3_RFU11 AM8 F3 SNN_BUFRST* D29
RFU BUFRST GND
C
SNN_G3_RFU12 AM9
SNN_G3_RFU13 B32
RFU T3 SNN_STEREO D4
SNN_G3_RFU14 U6
RFU STEREO D7
GND
RFU GND GND
SNN_G3_RFU15 AC26 M6 SLI_SWAP_OUT 9.3H<> 3V3RUN U4 F11
SNN_G3_RFU16 D1
RFU SWAPRDY_A BI HDCP_KEYROM_PROGD_V2
F14
GND
RFU SO8 GND
A26 TESTMCLK COMMON 3V3RUN F19
TESTMEMCLK H2 TESTMODE R575 F2
GND
.
TESTMODE 2.2K 6 8 F22
GND
R607 R538 5% SCL VCC GND
4 0402 VCC 7 F25
GND 4
10K 10K 5 F31
COMMON SDA GND
5% 5% C696
3 F8
0402 0402 SDA 4 .1UF G26
GND
COMMON COMMON GND GND
6.3V
SNN_HDCP_ROM 2 1 G29
NC GND 10% GND
W
X7R G4
G7
GND
0402
COMMON H27
GND
GND GND GND
H6
J16
GND
GND GND GND
J17
J2
GND
W
J31
GND
GND
GND
W
GND
5 5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM V1.3, HDCP. SANTA CLARA, CA 95050, USA
PAGE DETAIL Spread Spectrum, VBIOS and HDCP ROM
NV_PN 600-10407-0001-300 A
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p407_a03 PAGE 11 OF 18
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME myan DATE 21-DEC-2006
A B C D E F G H
A B C D E F G H
2V5RUN
LB509 220R@100MHz
2.5V 12MIL MIOA_VDDQ M7
G1
G84-600-A1
BGA820
CHANGED
11/14 DRA/MIOA
MIOA_VDDQ
MIOA(SLI)
DR MIO
NET NV_CRITICAL NV_IMPEDANCE
. C N 1
M
BEAD_0603 COMMON M8 SLI_D<14..0> 1 50OHM 9.3F<> 15.4B>
C703 C679 C672 C680 R8
MIOA_VDDQ P2 SLI_D<0>
BI
0
4.7UF .1UF .01UF .01UF T8
MIOA_VDDQ DRA_D0 MIOAD0 N2 SLI_D<1> 1
6.3V 6.3V 16V 16V
U9
MIOA_VDDQ DRA_D1 MIOAD1 N1 SLI_D<2> 2
10% 10% 10% 10% MIOA_VDDQ DRA_D2 MIOAD2 N3 SLI_D<3>
X5R X7R X7R X7R 3
DRA_D3 MIOAD3 M1 SLI_D<4>
0603 0402 0402 0402 4
COMMON COMMON COMMON COMMON
DRA_D4 MIOAD4 M3 SLI_D<5> 5
DRA_D5 MIOAD5
O
P5 SLI_D<6> 6
DRA_D6 MIOAD6 N6 SLI_D<7> 7
DRA_D7 MIOAD7 N5 SLI_D<8> 8
12MIL MIOACAL_PD_VDDQ L1
DRA_D8 MIOAD8 M4 SLI_D<9>
GND R586 49.9 9
0402 1% COMMON
MIOACAL_PD_VDDQ DRA_D9 MIOAD9 L4 SLI_D<10> 10
12MIL MIOACAL_PU_GND L3
DRA_D10 MIOAD10 L5 SLI_D<11>
R581 49.9 11
MIOACAL_PU_GND DRA_D11 MIOAD11
C
0402 1% COMMON
12MIL MIOA_VREF L2
GND MIOA_VREF
R593
1K
2 2
.
1%
0402
COMMON
R580 C700
1K .1UF P3 SLI_D<12> 12
1% 6.3V DRA_D12 MIOA_CTL3
X
R3 SLI_D<13> 13
0402 10% DRA_D13 MIOA_HSYNC R1 SLI_D<14> NET NV_CRITICAL NV_IMPEDANCE
COMMON X7R 14
DRA_D14 MIOA_VSYNC P1 SLI_DE 1 50OHM
0402 9.3G<>
COMMON
DRA_CMD MIOA_DE BI
I
GND NC MIOA_CLKOUT M5 SNN_MIOA_M5
RFU
F
G1 MIOB
A
G84-600-A1
BGA820
CHANGED
12/14 DRB/MIOB
3 3V3RUN 3
AA8
MIOB_VDDQ DR
N
AB7
MIOB_VDDQ
MIO
C684 AB8 AC3 RAMCFG0 15.3B>
.1UF AC6
MIOB_VDDQ DRB_D0 MIOBD0 AC1 RAMCFG1
IN
MIOB_VDDQ DRB_D1 MIOBD1 IN 15.4B>
6.3V
AC7 AC2 SNN_MIOBD<2>
10% MIOB_VDDQ DRB_D2 MIOBD2 AB2 SNN_MIOBD<3>
X7R DRB_D3 MIOBD3
0402 AB1 SNN_MIOBD<4>
DRB_D4 MIOBD4
I
COMMON AA1 SNN_MIOBD<5>
DRB_D5 MIOBD5 AB3 SNN_MIOBD<6>
DRB_D6 MIOBD6 AA3 SNN_MIOBD<7>
GND DRB_D7 MIOBD7 AC5 RAMCFG2 15.4B>
SNN_MIOBCAL_PD_VDDQ Y1
DRB_D8 MIOBD8 AB5 RAMCFG3
IN
MIOBCAL_PD_VDDQ DRB_D9 MIOBD9 IN 15.4B>
AB4 SNN_ROM_TYPE_0
SNN_MIOBCAL_PU_GND Y3
DRB_D10 MIOBD10 AA5 PCI_DEVID3
MIOBCAL_PU_GND DRB_D11 MIOBD11 15.4B>
H
IN
W3 SNN_G3_RFU1
RFU V1 SNN_G3_RFU2
RFU Y5 SNN_G3_RFU3
SNN_MIOB_VREF Y2
RFU W1 SNN_G3_RFU4
MIOB_VREF RFU
C
W4 SNN_G3_RFU5
RFU W5 SNN_G3_RFU6
RFU V5 SNN_G3_RFU7
RFU Y6 SNN_G3_RFU8
RFU
AD3 MIOB_CTL3
.
DRB_D12 MIOB_CTL3 IN 15.4B>
AF3 SNN_MIOB_HSYNC
DRB_D13 MIOB_HSYNC
4 DRB_D14 MIOB_VSYNC AE3 SNN_MIOB_VSYNC 4
AD1 SNN_MIOB_DE
DRB_CMD MIOB_DE
AD4 SNN_MIOB_CLKOUT
DRB_CLK MIOB_CLKOUT
W
AD5 SNN_MIOB_CLKOUT*
NC MIOB_CLKOUT AE4 SLI_REFCLK
DR_REFCLK MIOB_CLKIN BI 9.3G<>
W W ASSEMBLY
PAGE DETAIL
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA,
MIOA(SLI), MIOB
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
MXM V1.3, HDCP.
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NV_PN
ID
NAME
600-10407-0001-300 A
p407_a03
myan
PAGE
DATE
12 OF 18
21-DEC-2006
5
A B C D E F G H
A B C D E F G H
PAGE 13) NVVDD POWER SUPPLY http://www.elecfans.com 电子发烧友 http://bbs.elecfans.com 电子技术论坛 NVVDD
NET
NVVDD
VOLTAGE
1V
MIN_WIDTH_LINE
12MIL
NV_NET_MAX_CURRENT
30A
NVVDD
U501
ISL6269ACRZ
NVVDD SWITCHER POWER SUPPLY
. C N 1
M
PWR_SRC
VR_SW=0.6V
MLFP16
5VRUN MLFP16
COMMON
12 1 C514 C57 C66 C67 C53 C56
PVCC VIN .1UF 4.7UF 4.7UF 4.7UF 4.7UF 4.7UF
50V 25V 25V 25V 25V 25V
O
10% 10% 10% 10% 10% 10%
STUFF FOR ISL6269A 5 LFPAK X7R X5R X5R X5R X5R X5R
NV_VCC 5V 2
D NVVDD=1V
R506 2.2 Q502 0603 1206 1206 1206 1206 1206
0402 5% COMMON
VCC COMMON COMMON COMMON COMMON COMMON COMMON
16MIL RJK0305DPB APPROX. 20A @ 500MHZ
C511 14 NV_DH 4 G LFPAK
C520 R507 1UF UG COMMON
1 MAX_VOLTAGE=30V INPUT CURRENT RMS = 6.8A @ 7.5V INPUT
6.3V 10%
20MIL S GND GND GND GND GND GND
1UF 10K 2 CONTINUOUS_CURRENT=30A
6.3V 5% X5R R_DS_ON=0.013R MAX
OUTPUT PEAK TO PEAK CURRENT = 3A @ 22V INPUT
CONTINUOUS_CURRENT=24A
C
0402 13 NV_BOOT R514 0 NV_BOOTC .1UF C521 3 MAX_CURRENT=120A
10% 0402
COMMON 3
BOOT 0402 5% COMMON 50V 0603
MAX_WATTAGE=45W
V_BE_GS=16V MAX_CURRENT=40A SWITCHING FREQ. = 275KHZ
X5R COMMON FCCM 12MIL 12MIL COMMON
10% DC_RESISTANCE=0.0035R
0402
COMMON X7R HEIGHT=3.5MM
DEM USED 15 NV_PHASE NVVDD
PHASE NV_PN=131-0148-000
16MIL
131-0057-000 CAN BE THE ALTERNATIVE
GND GND
LFPAK LFPAK
2 9 NV_ISEN R513 4.7K 5 5 L1 1.0uH 2
.
ISEN 0402 5% COMMON
D D SMD_520X508 COMMON
12MIL Q507 Q503 C43 C51
BSC030N03LS BSC030N03LS C35 C27
1 D1 330UF 330UF
11 NV_DL 4 G LFPAK 4 G LFPAK C32 4.7UF 4.7UF
LG COMMON COMMON RSX201L-30 COMMON COMMON
1000PF 6.3V 6.3V
14.2A< 10.2F< NV_PWRGOOD 16 20MIL S 1 S 1 SMA 20% 20%
OUT PGOOD 2
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=100A
2
MAX_VOLTAGE=30V
CONTINUOUS_CURRENT=100A 30V 50V 10% 10%
R_DS_ON=3.0mR R_DS_ON=3.0mR 2.5V 2.5V X5R X5R
2A 10%
3 MAX_CURRENT=400A
3 MAX_CURRENT=400A
2 POSCAP POSCAP 0603 0603
MAX_WATTAGE=2.8W@25C MAX_WATTAGE=2.8W@25C COMMON X7R
X
RUNPWROK 4 V_BE_GS=+/-20V V_BE_GS=+/-20V 3900MA@100KHZ,45C 3900MA@100KHZ,45C COMMON COMMON
14.4C< 11.2B< 9.4A> 8.4A< 0402
IN EN COMMON
9MOHM 9MOHM
16MIL SMD_7343 SMD_7343
10 C535 C522 NV_SNUBBER
NV_FSET SET TO 350KHZ 7
PGND 1000PF 1000PF R38
FSET GND GND GND GND
50V 10% 50V 10% 1
12MIL X7R X7R
C49 5%
0402 0402 1206
R45 .01UF TP 8 NO STUFF NO STUFF R515
I
GND(PAD) VO COMMON
47.5K 16V 0
1% 10% 5%
X7R NV_COMP 5 6
0402 COMP FB 0402
COMMON 0402 12MIL NO STUFF
COMMON GND GND GND FOR NVVDD OUTPUT SIDE SENSE
F
0402 1% COMMON 12MIL 0402 16V
10% NVVDD_SENSE_FB R516 0 NVVDD_SENSE
GND IN 2.3G>
X7R
12MIL 0402 5% COMMON 12MIL
COMMON
C515 22PF FOR GPU REMOTE SIDE SENSE
0402 50V
5%
C0G
A
COMMON CONNECT TO R-TOP
3 3
R511
3.01K
N
1%
0402
COMMON
Rtop
I
VOUT = ((RT +RB)/RB) X 0.6 = 0.9 NV_FB
12MIL
G84M RTop RBot GPIO5
Rbot1 Rbot0R517 R512
R518 19.6K 4.42K
8.87K 1% 1%
1.1V 3.01K 4.42K || 19.6K High
H
1% 0402 0402
1.0V 3.01K 4.42K Low 0402 NO STUFF COMMON
NO STUFF Rbot
12MIL
NVCTL1_R 12MIL
1G1D1S 3
NVCTL0_R
D Q505
C
RHU002N06 GND
SOT323_1G1D1S
10.3F> IN
GPIO6_NVVDDCTL1 R523 10K NVVDDCTL1 1 G NO STUFF
0402 5% NO STUFF S 2
MAX_VOLTAGE=60V
CONTINUOUS_CURRENT=200mA
C523 .01UF R_DS_ON=4R
MAX_CURRENT=800mA
0402 16V MAX_WATTAGE=200mW
V_BE_GS=+/-20V
10% 3
1G1D1S
.
X7R D
NO STUFF Q506
4 GND RHU002N06 4
SOT323_1G1D1S
10.3F> IN
GPIO5_NVVDDCTL0 R519 10K NVVDDCTL0 1 G NO STUFF
0402 5% NO STUFF S 2
MAX_VOLTAGE=60V
R526 R560 C533 .01UF CONTINUOUS_CURRENT=200mA
R_DS_ON=4R
W
10K 10K 0402 16V MAX_CURRENT=800mA
MAX_WATTAGE=200mW
5% 5% 10% V_BE_GS=+/-20V
0402 0402 X7R
COMMON COMMON NO STUFF
GND
W
GND GND
W ASSEMBLY
PAGE DETAIL
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA,
NVVDD Power Supply
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
A B C D E
MXM V1.3, HDCP.
F G
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NV_PN
ID
NAME
600-10407-0001-300 A
p407_a03
myan
H
PAGE
DATE
13 OF 18
21-DEC-2006
5
A B C D E F G H
http://www.elecfans.com
PAGE 14) FBVDDQ AND PEX1V2 POWER SUPPLY 电子发烧友 http://bbs.elecfans.com 电子技术论坛 PEX1V2
NET
PEX1V2
VOLTAGE
1.2V
MIN_WIDTH_LINE
12MIL
NV_NET_MAX_CURRENT
2A
PEX1V2
N
FBVDDQ 1.8V 12MIL 10A
FBVDDQ FBVDDQ
C
1 1
.
FBVDDQ SWITCHER POWER SUPPLY
M
U502 PWR_SRC
ISL6269ACRZ
VR_SW=0.6V
MLFP16
5VRUN MLFP16
COMMON C42 C48 C41
12 1 .1UF 4.7UF 4.7UF
PVCC VIN
O
50V 25V 25V
10% 10% 10%
X7R X5R X5R
STUFF FOR ISL6269A D 5 LFPAK 0603 1206 1206 FBVDDQ=1.8V
FB_VCC 5V 2 COMMON COMMON COMMON
R521 2.2 Q504 APPROX. 5A @ 400MHZ
0402 5% COMMON 16MIL VCC
BSC119N03S
R522 C524 14 FB_DH 4 G LFPAK INPUT CURRENT RMS = 2.15A @ 7.5V INPUT
UG COMMON GND GND GND
10K 1UF
C
C517 20MIL S 1 MAX_VOLTAGE=30V
1UF 5% 6.3V 10%
2 CONTINUOUS_CURRENT=30A
OUTPUT PEAK TO PEAK CURRENT = 1.51A @ 22V INPUT
6.3V 0402 X5R [email protected]
.
131-0131-000 CAN BE THE ALTERNATIVE
GND GND
9 FB_ISEN 5 LFPAK 10A
R509 8.2K L2 2.2UH
ISEN 0402 5% COMMON
D SMD_6X6 COMMON
12MIL Q501 C45
BSC030N03LS C503 C50
11 FB_DL 4 G LFPAK 1000PF 330UF 4.7UF
FB_PWRGOOD 16
LG C52
COMMON
1 MAX_VOLTAGE=30V
50V 10% 1 D501 COMMON 6.3V
8.2A< OUT PGOOD 20MIL S X7R 0402
BAT43 20% 10%
X
1000PF 2 CONTINUOUS_CURRENT=100A SOD323 2.5V
50V
R_DS_ON=3.0mR
COMMON X5R
3 MAX_CURRENT=400A 40V POSCAP 0603
MAX_WATTAGE=2.8W@25C
10% FB_SNUBBER 400MA 3900MA@100KHZ,45C
13.2B> 10.2F< NV_PWRGOOD 4 V_BE_GS=+/-20V
16MIL 2 COMMON
IN EN X7R COMMON 9MOHM
0402 R46
SMD_7343
10 NO STUFF 1
FB_FSET SET TO 500KHZ 7
PGND 5%
FSET 1206 GND GND
I
12MIL COMMON GND
C44
R44 .01UF TP 8
33K 16V GND(PAD) VO CONNECT TO R-TOP
5% 10%
X7R FB_COMP 5 6 GND GND
0402 COMP FB
COMMON 0402 12MIL
COMMON
F
R42
R525 75K FB_COMP1 C532 .01UF 3.01K
1%
GND 0402 1% COMMON 12MIL 0402 16V
0402
COMMON 10%
COMMON
Rtop
X7R
C531 22PF FB_FB
0402 50V
A
12MIL
5% R43
C0G 1.5K
COMMON 1%
Vout = Vref * (1 + Rtop / Rbot) 0402
3 COMMON 3
1.804V = 0.6V * (1 + 3.01K/1.5K) Rbot
N
GND
U5
DAC V_REFERENCE SUPPLY
3V3RUN
.
APL5913 R27
SOP8
511
4 1V8RUN 5VRUN COMMON
HEIGHT=1.75MM 1%
4
MAX_WATTAGE=3W PEX1V2 0402
MAX_CURRENT=3A
NO STUFF
6 APPROX. MAX OUTPUT CURRENT = 2A DAC_VREF 1.24V 12MIL
VCNTL OUT 7.4G<
5 3
VIN VOUT
W
9 4 R583
VIN VOUT C20 R34 Rtop C17 150
Rtop
470PF 511 4.7UF 1%
RUNPWROK 8
C12 C10
13.2B< 11.2B< 9.4A> 8.4A< IN EN 16V 1% 6.3V U503 2 0402
C693
SNN_POK 7 2 PEX1V2_FB NO STUFF
1UF 1UF POK FB 10% 0402 10% SC431L
1 DAC_REF_FB .1UF
12MIL X7R COMMON X5R VR=1.240V
6.3V 6.3V GND SOT23 6.3V
0402 0603 12MIL
10% 10% SOT23 10%
COMMON COMMON R592
W
X5R X5R NO STUFF 3 X7R
18.2K
1
W
GND
Vout = Vref * (1 + Rtop / Rbot) GND
1.209V = 0.8V * (1 + 511 /1.02k)
5 5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM V1.3, HDCP. SANTA CLARA, CA 95050, USA
PAGE DETAIL FBVDDQ, PEX1V2 and DAC_Vref Power Supply
NV_PN 600-10407-0001-300 A
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p407_a03 PAGE 14 OF 18
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME myan DATE 21-DEC-2006
A B C D E F G H
A B C D E F G H
http://www.elecfans.com
PAGE 15) STRAPS, MOUNTING HOLES 电子发烧友 http://bbs.elecfans.com 电子技术论坛
. C N 1
M
RAM_CFG[3:0]
RAM_CFG_0
R590 10K RAMCFG0 R574 10K MS_0000: 16Mx16 DDR2 128bit SDRAM, ELPIDA.
0'2 0402 5% NO STUFF 0402 5% COMMON
MS_0001: 16Mx16 DDR2 128bit SDRAM, SAMSUNG, MICRON.
O
RAM_CFG_1 MS_0010: 16Mx16 DDR2 128bit SDRAM. INFINEON.
R585 10K RAMCFG1 R584 10K
0'3 0402 5% NO STUFF 0402 5% COMMON MS_0011: 16Mx16 DDR2 128bit SDRAM, HYNIX.
MS_0100: 32Mx16 DDR2 128bit SDRAM, ELPIDA.
RAM_CFG_2 MS_0101: 32Mx16 DDR2 128bit SDRAM, SAMSUNG, MICRON.
0'4 R591 10K RAMCFG2 R577 10K
C
0402 5% COMMON 0402 5% NO STUFF MS_0110: 32Mx16 DDR2 128bit SDRAM. INFINEON.
RAM_CFG_3 MS_0111: 32Mx16 DDR2 128bit SDRAM, HYNIX.
0'5 R589 10K RAMCFG3 R573 10K
0402 5% COMMON 0402 5% NO STUFF
.
0'13
R600 2.2K PCI_DEVID3 R562 2.2K PCI_DEVID_3 MS_1: DEVICE ID = 0x0408: G84M-700
0402 5% COMMON 0402 5% NO STUFF
MS_1: DEVICE ID = 0x0428: G86M-700
X
R21 2.2K MIOB_CTL3 R20 2.2K
I
0'28 0402 5% COMMON 0402 5% NO STUFF PCI_DEVID_EXT
F
1'12 R1 2.2K ROM_SI
0402 5% COMMON 2V5RUN
MIOA_EN_3.3V
A
SLI_D<13> R582 2.2K
3 1'15 0402 5% COMMON SLOT CLOCK CONFIGURATION 3
N
GND
I
12.3F< RAMCFG0
OUT
H
12.3F< RAMCFG1
OUT MEC2
MEC1
1 MXM_II_MOUNTING_HOLES 1 X4
X2 MXM_I_II_BACKPLATE_HOLES
NO STUFF NO STUFF
12.3F< RAMCFG2
OUT
MEC1
2 MXM_II_MOUNTING_HOLES MEC2
C
X2 2 X4
NO STUFF MXM_I_II_BACKPLATE_HOLES
12.3F< RAMCFG3 NO STUFF
OUT
GND MEC2
3 X4
12.4F< MIOB_CTL3 MXM_I_II_BACKPLATE_HOLES
OUT
.
NO STUFF
4 4
MEC2
12.4F< PCI_DEVID3
OUT 4 X4
MXM_I_II_BACKPLATE_HOLES
NO STUFF
W
12.1F<> 9.3F<> SLI_D<14..0>
OUT
GND
11.3C< ROM_SI
OUT
W W ASSEMBLY
PAGE DETAIL
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA,
STRAPS, TTP, MOUNTING HOLE
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
MXM V1.3, HDCP.
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NV_PN
ID
NAME
600-10407-0001-300 A
p407_a03
myan
PAGE
DATE
15 OF 18
21-DEC-2006
5
A B C D E F G H
A B C D E F G H
N
Design: p555_a00 FBAD<60> 3.3A 4.5D FBCD<0> 3.1E 5.4B FBC_A<3> 3.3G 5.1A 5.1C I2CC_SDA 10.3D PEX_RX4 2.3E ROMCS* 11.3C
Date: Nov 30 11:00:17 2006 FBAD<61> 3.3A 4.5D FBCD<63..0> 3.1E<> 5.4A<> 5.5F<> FBC_A<4> 3.3G 5.1A 5.1C I2CC_SDA_R 9.4B<> 10.3F<> PEX_RX4* 2.3E ROM_SCLK 11.3C
FBAD<62> 3.3A 4.5D FBCD<1> 3.1E 5.4B FBC_A<5> 3.3G 5.1A 5.1C 11.2B<> PEX_RX5 2.3E ROM_SI 11.3C< 15.3C 15.4B>
Base nets and synonyms for FBAD<63> 3.3A 4.5D FBCD<2> 3.1E 5.4B FBC_A<6> 3.3G 5.1A 5.1C 5.1E I2CH_SCL 11.4C PEX_RX5* 2.3E ROM_SO 11.3C
p407_lib.P555_A00(@p407_lib.p555_a00(sch FBADQM<0> 3.3A 4.4B FBCD<3> 3.1E 5.4B 5.1G I2CH_SDA 11.4C PEX_RX6 2.3E RUNPWROK 8.4A< 9.4A> 11.2B<
C
_1)) FBADQM<7..0> 3.3A> 4.4A< 4.5F< FBCD<4> 3.1E 5.4B FBC_A<7> 3.3G 5.1A 5.1C 5.1E IFPABIOVDD 8.2D PEX_RX6* 2.3E 13.2B< 14.4C<
Base Signal Location([Zone][dir]) FBADQM<1> 3.3A 4.4C FBCD<5> 3.1E 5.4B 5.1G IFPABPLLVDD 8.1D PEX_RX7 2.3E RUNPWROK* 8.4B
1 1
FBADQM<2> 3.3A 4.4D FBCD<6> 3.1E 5.4B FBC_A<8> 3.3G 5.1A 5.1C 5.1E IFPABRSET 8.1D PEX_RX7* 2.3E RUNPWROK_IN 9.4C
1V8RUN 9.1G FBADQM<3> 3.3A 4.4D FBCD<7> 3.1E 5.4B 5.1G IFPATXC 8.1H> 9.4G< PEX_RX8 2.4E SLI_CLKOUT 9.3G<> 12.2F<>
2V5RUN 9.1G FBADQM<4> 3.3A 4.5B FBCD<8> 3.1E 5.4C FBC_A<9> 3.3G 5.1A 5.1C 5.1E IFPATXC* 8.1H> 9.4G< PEX_RX8* 2.4E SLI_D<0> 9.3E 12.1E
.
3V3RUN 9.1G FBADQM<5> 3.3A 4.5C FBCD<9> 3.1E 5.4C 5.1G IFPATXD0 8.1H> 9.4G< PEX_RX9 2.4E SLI_D<14..0> 9.3F<> 12.1F<> 15.4B>
5VRUN 9.1G FBADQM<6> 3.3A 4.5D FBCD<10> 3.1E 5.4C FBC_A<10> 3.3G 5.1A 5.1C 5.1E IFPATXD0* 8.1H> 9.4G< PEX_RX9* 2.4E SLI_D<1> 9.3E 12.1E
BXTALOUT 7.4D FBADQM<7> 3.3A 4.5D FBCD<11> 3.1E 5.4C 5.1G IFPATXD1 8.1H> 9.4G< PEX_RX10 2.4E SLI_D<2> 9.3E 12.1E
CLK_VDD 11.2C FBADQS0 3.3A<> 4.4B 4.4F<> FBCD<12> 3.1E 5.4C FBC_A<11> 3.3G 5.1A 5.1C 5.1E IFPATXD1* 8.1H> 9.4G< PEX_RX10* 2.4E SLI_D<3> 9.3E 12.1E
M
DACA_BLUE 7.2F> 9.3B< FBADQS0* 3.4A<> 4.4B 4.4F<> FBCD<13> 3.1E 5.4C 5.1G IFPATXD2 8.2H> 9.4G< PEX_RX11 2.4E SLI_D<4> 9.3E 12.2E
DACA_GREEN 7.1F> 9.3B< FBADQS1 3.4A<> 4.4C 4.4F<> FBCD<14> 3.1E 5.4C FBC_A<12> 3.3G 5.2A 5.2C 5.2E IFPATXD2* 8.2H> 9.4G< PEX_RX11* 2.4E SLI_D<5> 9.3E 12.2E
DACA_HSYNC 7.1F> 9.3B< FBADQS1* 3.4A<> 4.4C 4.4F<> FBCD<15> 3.1E 5.4C 5.2G IFPATXD3 8.2H> 9.4G< PEX_RX12 2.4E SLI_D<6> 9.3E 12.2E
DACA_RED 7.1F> 9.3B< FBADQS2 3.4A<> 4.4D 4.4F<> FBCD<16> 3.1E 5.4D FBC_BA0 3.3H> 5.2A< 5.2C 5.2E IFPATXD3* 8.2H> 9.4G< PEX_RX12* 2.4E SLI_D<7> 9.3E 12.2E
DACA_RSET 7.1C FBADQS2* 3.4A<> 4.4D 4.4F<> FBCD<17> 3.2E 5.4D 5.2G 5.4F< IFPBTXC 8.2H> 9.4G< PEX_RX13 2.5E SLI_D<8> 9.3E 12.2E
O
DACA_VDD 7.1C FBADQS3 3.4A<> 4.4D 4.4F<> FBCD<18> 3.2E 5.4D FBC_BA1 3.3H> 5.2A< 5.2C 5.2E IFPBTXC* 8.2H> 9.4G< PEX_RX13* 2.5E SLI_D<9> 9.3E 12.2E
DACA_VREF 7.1C 7.4H FBADQS3* 3.4A<> 4.4D 4.4F<> FBCD<19> 3.2E 5.4D 5.2G 5.4F< IFPBTXD4 8.2H> 9.3G< PEX_RX14 2.5E SLI_D<10> 9.3E 12.2E
DACA_VSYNC 7.1F> 9.3B< FBADQS4 3.4A<> 4.4F<> 4.5B FBCD<20> 3.2E 5.4D FBC_BA2 3.3H> 5.2A< 5.2C 5.2E IFPBTXD4* 8.2H> 9.3G< PEX_RX14* 2.5E SLI_D<11> 9.3E 12.2E
DACB_BLUE 7.3F> 9.3B< FBADQS4* 3.4A<> 4.4F<> 4.5B FBCD<21> 3.2E 5.4D 5.2G 5.4F< IFPBTXD5 8.2H> 9.3G< PEX_RX15 2.5E SLI_D<12> 9.3E 12.2E
DACB_GREEN 7.2F> 9.2B< FBADQS5 3.4A<> 4.4F<> 4.5C FBCD<22> 3.2E 5.4D FBC_CAS* 3.4H> 5.1A< 5.1C 5.1E IFPBTXD5* 8.2H> 9.3G< PEX_RX15* 2.5E SLI_D<13> 9.3E 12.2E 15.3C
C
DACB_RED 7.2F> 9.2B< FBADQS5* 3.4A<> 4.4F<> 4.5C FBCD<23> 3.2E 5.4D 5.1G 5.5F< IFPBTXD6 8.2H> 9.4G< PEX_TSTCLK 2.2E SLI_D<14> 9.3E 12.2E
DACB_RSET 7.2C FBADQS6 3.4A<> 4.4F<> 4.5D FBCD<24> 3.2E 5.4D FBC_CKE 3.3H> 5.2A< 5.2C 5.2E IFPBTXD6* 8.2H> 9.4G< PEX_TSTCLK* 2.2E SLI_DE 9.3G<> 12.2F<>
DACB_VDD 7.2C FBADQS6* 3.4A<> 4.4F<> 4.5D FBCD<25> 3.2E 5.4D 5.2G 5.4F< IFPBTXD7 8.2H> 9.4G< PEX_TX0 2.2E SLI_REFCLK 9.3G<> 12.4F<>
DACB_VREF 7.2C 7.4H FBADQS7 3.4A<> 4.4F<> 4.5D FBCD<26> 3.2E 5.4D FBC_CLK0 3.4H> 5.2A 5.2C 5.3A< IFPBTXD7* 8.2H> 9.4G< PEX_TX0* 2.2E SLI_SWAP_OUT 9.3H<> 11.4C<>
2 DACC_VDD 7.3C FBADQS7* 3.4A<> 4.4F<> 4.5D FBCD<27> 3.2E 5.4D 5.3F< IFPCDBRSET 8.3D PEX_TX0_C 2.2B SMB_CLK 9.4B> 10.2A< 2
.
DAC_REF_FB 14.4G FBA_A<0> 3.3C 4.1A 4.1C 4.1E FBCD<28> 3.2E 5.4D FBC_CLK0* 3.4H> 5.2A 5.2C 5.3B< IFPCDPLLVDD 8.3D PEX_TX0_C* 2.2B SMB_CLK_GPU 10.3D
DAC_VREF 7.4G< 14.4H> 4.1G FBCD<29> 3.2E 5.4D 5.4F< IFPCTXC 8.3H> 9.2G< PEX_TX1 2.2E SMB_DAT 9.4B<> 10.2A<>
DVIB_EN* 8.4B FBA_A<12..0> 3.3D> 4.1A< 4.4F< FBCD<30> 3.2E 5.4D FBC_CLK0_TERM 5.3B IFPCTXC* 8.3H> 9.2G< PEX_TX1* 2.2E SMB_DATA_GPU 10.3D
DVI_A_HPD 9.2B> 10.3H< FBA_A<1> 3.3C 4.1A 4.1C 4.1E FBCD<31> 3.2E 5.4D FBC_CLK1 3.4H> 5.2E 5.2G 5.3C< IFPCTXD0 8.3H> 9.2G< PEX_TX1_C 2.2B SNN_A2_M1 4.2A
X
DVI_B_EN* 8.4B 4.1G FBCD<32> 3.2E 5.5B 5.4F< IFPCTXD0* 8.3H> 9.2G< PEX_TX1_C* 2.2B SNN_A2_M2 4.2C
DVI_B_HPD 9.2B> 10.3H< FBA_A<2> 3.3C 4.1A 4.1C FBCD<33> 3.2E 5.5B FBC_CLK1* 3.4H> 5.2E 5.2G 5.3E< IFPCTXD1 8.3H> 9.2G< PEX_TX2 2.2E SNN_A2_M3 4.2E
FBAD<0> 3.1A 4.4B FBA_A<3> 3.3C 4.1A 4.1C FBCD<34> 3.2E 5.5B 5.4F< IFPCTXD1* 8.3H> 9.2G< PEX_TX2* 2.2E SNN_A2_M4 4.2G
FBAD<63..0> 3.1A<> 4.4A<> 4.5F<> FBA_A<4> 3.3C 4.1A 4.1C FBCD<35> 3.2E 5.5B FBC_CLK1_TERM 5.3D IFPCTXD2 8.4H> 9.2G< PEX_TX2_C 2.2B SNN_A2_M5 5.2A
FBAD<1> 3.1A 4.4B FBA_A<5> 3.3C 4.1A 4.1C FBCD<36> 3.2E 5.5B FBC_CS0* 3.3H> 5.1A< 5.1C 5.1E IFPCTXD2* 8.4H> 9.2G< PEX_TX2_C* 2.2B SNN_A2_M6 5.2C
I
FBAD<2> 3.1A 4.4B FBA_A<6> 3.3C 4.1A 4.1C 4.1E FBCD<37> 3.2E 5.5B 5.1G 5.5F< IFPC_IOVDD 8.4D PEX_TX3 2.3E SNN_A2_M7 5.2E
FBAD<3> 3.1A 4.4B 4.1G FBCD<38> 3.2E 5.5B FBC_CS1* 5.5F< IFPDTXC 8.4H> 9.3G< PEX_TX3* 2.3E SNN_A2_M8 5.2G
FBAD<4> 3.1A 4.4B FBA_A<7> 3.3C 4.1A 4.1C 4.1E FBCD<39> 3.2E 5.5B FBC_ODT 3.5D> 5.2A< 5.2C 5.2E IFPDTXC* 8.4H> 9.3G< PEX_TX3_C 2.3B SNN_BUFRST* 11.4C
FBAD<5> 3.1A 4.4B 4.1G FBCD<40> 3.2E 5.5C 5.2G 5.5F< IFPDTXD3 8.4H> 9.2G< PEX_TX3_C* 2.3B SNN_CLAMP_F6 10.3D
FBAD<6> 3.1A 4.4B FBA_A<8> 3.3C 4.1A 4.1C 4.1E FBCD<41> 3.2E 5.5C FBC_ODT_GPU 3.1G> 3.4G 3.5C IFPDTXD3* 8.4H> 9.2G< PEX_TX4 2.3E SNN_DACB_CSYNC 7.2D
F
FBAD<7> 3.1A 4.4B 4.1G FBCD<42> 3.2E 5.5C FBC_PLLAVDD 3.4G IFPDTXD4 8.4H> 9.2G< PEX_TX4* 2.3E SNN_DACC_BLUE 7.3D
FBAD<8> 3.1A 4.4C FBA_A<9> 3.3C 4.2A 4.2C 4.2E FBCD<43> 3.2E 5.5C FBC_RAS* 3.3H> 5.1A< 5.1C 5.1E IFPDTXD4* 8.4H> 9.2G< PEX_TX4_C 2.3B SNN_DACC_GREEN 7.3D
FBAD<9> 3.1A 4.4C 4.2G FBCD<44> 3.2E 5.5C 5.1G 5.5F< IFPDTXD5 8.4H> 9.2G< PEX_TX4_C* 2.3B SNN_DACC_HSYNC 7.3D
FBAD<10> 3.1A 4.4C FBA_A<10> 3.3C 4.2A 4.2C 4.2E FBCD<45> 3.2E 5.5C FBC_RESET 3.1G> 3.3G 3.5C IFPDTXD5* 8.4H> 9.2G< PEX_TX5 2.3E SNN_DACC_RED 7.3D
A
FBAD<11> 3.1A 4.4C 4.2G FBCD<46> 3.2E 5.5C FBC_VREF1 5.2B 5.3F< IFPD_IOVDD 8.4D PEX_TX5* 2.3E SNN_DACC_RSET 7.3C
FBAD<12> 3.1A 4.4C FBA_A<11> 3.3C 4.2A 4.2C 4.2E FBCD<47> 3.3E 5.5C FBC_VREF2 5.2F 5.3F< JTAG_TCLK 10.3B PEX_TX5_C 2.3B SNN_DACC_VREF 7.3C
FBAD<13> 3.1A 4.4C 4.2G FBCD<48> 3.3E 5.5D FBC_VREF3 5.2D 5.3F< JTAG_TDI 10.3B PEX_TX5_C* 2.3B SNN_DACC_VSYNC 7.3D
3 FBAD<14> 3.1A 4.4C FBA_A<12> 3.3C 4.2A 4.2C 4.2E FBCD<49> 3.3E 5.5D FBC_VREF4 5.2H 5.3F< JTAG_TDO 10.3B PEX_TX6 2.3E SNN_E2_M1 4.2A 3
FBAD<15> 3.1A 4.4C 4.2G FBCD<50> 3.3E 5.5D FBC_WE* 3.3H> 5.1A< 5.1C 5.1E JTAG_TMS 10.3B PEX_TX6* 2.3E SNN_E2_M2 4.2C
N
FBAD<16> 3.1A 4.4D FBA_BA0 3.3D> 4.2A< 4.2C 4.2E FBCD<51> 3.3E 5.5D 5.1G 5.5F< JTAG_TRST 10.3B PEX_TX6_C 2.3B SNN_E2_M3 4.2E
FBAD<17> 3.2A 4.4D 4.2G 4.4F< FBCD<52> 3.3E 5.5D FBD_A<2> 3.3G 5.1E 5.1G LVDS_IOVDD 8.2B PEX_TX6_C* 2.3B SNN_E2_M4 4.2G
FBAD<18> 3.2A 4.4D FBA_BA1 3.3D> 4.2A< 4.2C 4.2E FBCD<53> 3.3E 5.5D FBD_A<5..2> 3.3H> 5.1A< 5.4F< MIOACAL_PD_VDDQ 12.2C PEX_TX7 2.3E SNN_E2_M5 5.2A
FBAD<19> 3.2A 4.4D 4.2G 4.4F< FBCD<54> 3.3E 5.5D FBD_A<3> 3.3G 5.1E 5.1G MIOACAL_PU_GND 12.2C PEX_TX7* 2.3E SNN_E2_M6 5.2C
FBAD<20> 3.2A 4.4D FBA_BA2 3.3D> 4.2A< 4.2C 4.2E FBCD<55> 3.3E 5.5D FBD_A<4> 3.3G 5.1E 5.1G MIOA_VDDQ 12.1C PEX_TX7_C 2.3B SNN_E2_M7 5.2E
I
FBAD<21> 3.2A 4.4D 4.2G 4.4F< FBCD<56> 3.3E 5.5D FBD_A<5> 3.3G 5.1E 5.1G MIOA_VREF 12.2C PEX_TX7_C* 2.3B SNN_E2_M8 5.2G
FBAD<22> 3.2A 4.4D FBA_CAS* 3.4D> 4.1A< 4.1C 4.1E FBCD<57> 3.3E 5.5D FBVDDQ 14.1G MIOB_CTL3 12.4F< 15.2C 15.4B> PEX_TX8 2.4E SNN_FBA_CMD26 3.4C
FBAD<23> 3.2A 4.4D 4.1G 4.5F< FBCD<58> 3.3E 5.5D FB_BOOT 14.2C M_GPIO8_SLOWDOWN* 10.2C PEX_TX8* 2.4E SNN_FBA_CMD27 3.4C
FBAD<24> 3.2A 4.4D FBA_CKE 3.3D> 4.2A< 4.2C 4.2E FBCD<59> 3.3E 5.5D FB_BOOTC 14.2D M_THERM_ALERT* 10.2C PEX_TX8_C 2.4B SNN_FBA_CMD28 3.4C
FBAD<25> 3.2A 4.4D 4.2G 4.4F< FBCD<60> 3.3E 5.5D FB_COMP 14.3B NVCTL0_R 13.4D PEX_TX8_C* 2.4B SNN_FBA_NC1_D31 3.5C
H
FBAD<26> 3.2A 4.4D FBA_CLK0 3.4D> 4.2A 4.2C 4.3A< FBCD<61> 3.3E 5.5D FB_COMP1 14.3C NVCTL1_R 13.4D PEX_TX9 2.4E SNN_FBA_NC1_D32 3.5C
FBAD<27> 3.2A 4.4D 4.4F< FBCD<62> 3.3E 5.5D FB_DH 14.2C NVVDD 13.1G PEX_TX9* 2.4E SNN_FBC_CMD26 3.4G
FBAD<28> 3.2A 4.4D FBA_CLK0* 3.4D> 4.2A 4.2C 4.3C< FBCD<63> 3.3E 5.5D FB_DL 14.2C NVVDDCTL0 13.4D PEX_TX9_C 2.4B SNN_FBC_CMD27 3.4G
FBAD<29> 3.2A 4.4D 4.4F< FBCDQM<0> 3.3E 5.4B FB_FB 14.3D NVVDDCTL1 13.4C PEX_TX9_C* 2.4B SNN_FBC_CMD28 3.4G
C
FBAD<30> 3.2A 4.4D FBA_CLK0_TERM 4.3B FBCDQM<7..0> 3.3E> 5.4A< 5.5F< FB_FSET 14.2B NVVDD_SENSE 2.3G> 13.3G< PEX_TX10 2.4E SNN_FBC_PLLVDD 3.4G
FBAD<31> 3.2A 4.4D FBA_CLK1 3.4D> 4.2E 4.2G 4.3C< FBCDQM<1> 3.3E 5.4C FB_ISEN 14.2C NVVDD_SENSE_FB 13.3F PEX_TX10* 2.4E SNN_FBVTT_AA23 3.1G
FBAD<32> 3.2A 4.5B 4.4F< FBCDQM<2> 3.3E 5.4D FB_PHASE 14.2C NV_BOOT 13.2C PEX_TX10_C 2.4B SNN_FBVTT_AB23 3.1G
FBAD<33> 3.2A 4.5B FBA_CLK1* 3.4D> 4.2E 4.2G 4.3E< FBCDQM<3> 3.3E 5.4D FB_PWRGOOD 8.2A< 14.2A> NV_BOOTC 13.2D PEX_TX10_C* 2.4B SNN_FBVTT_H16 3.1G
FBAD<34> 3.2A 4.5B 4.4F< FBCDQM<4> 3.3E 5.5B FB_SNUBBER 14.2E NV_COMP 13.2C PEX_TX11 2.4E SNN_FBVTT_H17 3.1G
.
FBAD<35> 3.2A 4.5B FBA_CLK1_TERM 4.3D FBCDQM<5> 3.3E 5.5C FB_VCC 14.2B NV_COMP1 13.3C PEX_TX11* 2.4E SNN_FBVTT_J9 3.1G
4 FBAD<36> 3.2A 4.5B FBA_CS0* 3.3D> 4.1A< 4.1C 4.1E FBCDQM<6> 3.3E 5.5D FB_VREF1 3.5A NV_DH 13.2C PEX_TX11_C 2.4B SNN_FBVTT_J10 3.1G 4
FBAD<37> 3.2A 4.5B 4.1G 4.5F< FBCDQM<7> 3.3E 5.5D FB_VREF2 3.5E NV_DL 13.2C PEX_TX11_C* 2.4B SNN_FBVTT_J23 3.1G
FBAD<38> 3.2A 4.5B FBA_CS1* 4.5F< FBCDQS0 3.3E<> 5.4B 5.4F<> GPIO0_DVI_A_HPD 10.3D NV_FB 13.3D PEX_TX12 2.4E SNN_FBVTT_J24 3.1G
FBAD<39> 3.2A 4.5B FBA_ODT 3.5D> 4.2A< 4.2C 4.2E FBCDQS0* 3.4E<> 5.4B 5.4F<> GPIO1_DVI_B_HPD 8.4A< 10.3F> NV_FSET 13.2B PEX_TX12* 2.4E SNN_FBVTT_K9 3.1G
W
FBAD<40> 3.2A 4.5C 4.2G 4.5F< FBCDQS1 3.4E<> 5.4C 5.4F<> GPIO2_BL_PWM 9.3B< 10.3F> NV_ISEN 13.2C PEX_TX12_C 2.4B SNN_FBVTT_K11 3.1G
FBAD<41> 3.2A 4.5C FBA_ODT_GPU 3.1G> 3.4C 3.5C FBCDQS1* 3.4E<> 5.4C 5.4F<> GPIO3_PPEN 9.3B< 10.3F> NV_PHASE 13.2C PEX_TX12_C* 2.4B SNN_FBVTT_K12 3.1G
FBAD<42> 3.2A 4.5C FBA_PLLAVDD_GPU 3.4C FBCDQS2 3.4E<> 5.4D 5.4F<> GPIO3_PPEN_GPU 10.3D NV_PWRGOOD 10.2F< 13.2B> 14.2A< PEX_TX13 2.5E SNN_FBVTT_K21 3.1G
FBAD<43> 3.2A 4.5C FBA_RAS* 3.3D> 4.1A< 4.1C 4.1E FBCDQS2* 3.4E<> 5.4D 5.4F<> GPIO4_BLEN 9.3B< 10.3F> NV_SNUBBER 13.2F PEX_TX13* 2.5E SNN_FBVTT_K22 3.1G
FBAD<44> 3.2A 4.5C 4.1G 4.4F< FBCDQS3 3.4E<> 5.4D 5.4F<> GPIO4_BLEN_GPU 10.3D NV_VCC 13.2B PEX_TX13_C 2.5B SNN_FBVTT_K24 3.1G
W
FBAD<45> 3.2A 4.5C FBA_RESET 3.1G> 3.3C 3.5C FBCDQS3* 3.4E<> 5.4D 5.4F<> GPIO5_NVVDDCTL0 10.3F> 13.4B< PCI_DEVID3 12.4F< 15.2C 15.4B> PEX_TX13_C* 2.5B SNN_FBVTT_L23 3.1G
FBAD<46> 3.2A 4.5C FBA_VREF1 4.2B 4.3F< FBCDQS4 3.4E<> 5.4F<> 5.5B GPIO6_NVVDDCTL1 10.3F> 13.4B< PEX1V2 14.1G PEX_TX14 2.5E SNN_FBVTT_M23 3.1G
FBAD<47> 3.3A 4.5C FBA_VREF2 4.2F 4.3F< FBCDQS4* 3.4E<> 5.4F<> 5.5B GPIO8_THERM_ALERT* 10.3D PEX1V2_FB 14.4D PEX_TX14* 2.5E SNN_FBVTT_T25 3.1G
FBAD<48> 3.3A 4.5D FBA_VREF3 4.2D 4.3F< FBCDQS5 3.4E<> 5.4F<> 5.5C GPIO_AC_BATT* 9.4B> 10.3F< PEX_PLLDVDD 2.4F PEX_TX14_C 2.5B SNN_FBVTT_U25 3.2G
W
FBAD<49> 3.3A 4.5D FBA_VREF4 4.2H 4.3F< FBCDQS5* 3.4E<> 5.4F<> 5.5C GPIO_SLI_SYNC 9.3H<> 10.3F<> PEX_RCLK 2.2E PEX_TX14_C* 2.5B SNN_G3_RFU1 12.4E
FBAD<50> 3.3A 4.5D FBA_WE* 3.3D> 4.1A< 4.1C 4.1E FBCDQS6 3.4E<> 5.4F<> 5.5D I2CA_SCL 7.1D PEX_RCLK* 2.2E PEX_TX15 2.5E SNN_G3_RFU2 12.4E
FBAD<51> 3.3A 4.5D 4.1G 4.5F< FBCDQS6* 3.4E<> 5.4F<> 5.5D I2CA_SCL_R 7.1F> 9.3B< PEX_RST 2.1D PEX_TX15* 2.5E SNN_G3_RFU3 12.4E
FBAD<52> 3.3A 4.5D FBB_A<2> 3.3C 4.1E 4.1G FBCDQS7 3.4E<> 5.4F<> 5.5D I2CA_SDA 7.1D PEX_RX0 2.2E PEX_TX15_C 2.5B SNN_G3_RFU4 12.4E
FBAD<53> 3.3A 4.5D FBB_A<5..2> 3.3D> 4.1A< 4.4F< FBCDQS7* 3.4E<> 5.4F<> 5.5D I2CA_SDA_R 7.1F<> 9.3B<> PEX_RX0* 2.2E PEX_TX15_C* 2.5B SNN_G3_RFU5 12.4E
FBAD<54> 3.3A 4.5D FBB_A<3> 3.3C 4.1E 4.1G FBC_A<0> 3.3G 5.1A 5.1C 5.1E I2CB_SCL 7.3D PEX_RX1 2.2E PLLVDD 7.4C SNN_G3_RFU6 12.4E
FBAD<55> 3.3A 4.5D FBB_A<4> 3.3C 4.1E 4.1G 5.1G I2CB_SCL_R 7.3G> 9.2B< PEX_RX1* 2.2E PWR_SRC 9.1G SNN_G3_RFU7 12.4E
FBAD<56> 3.3A 4.5D FBB_A<5> 3.3C 4.1E 4.1G FBC_A<12..0> 3.3H> 5.1A< 5.4F< I2CB_SDA 7.3D PEX_RX2 2.2E RAMCFG0 12.3F< 15.1C 15.3B> SNN_G3_RFU8 12.4E
FBAD<57> 3.3A 4.5D FBCAL_PD 3.4G FBC_A<1> 3.3G 5.1A 5.1C 5.1E I2CB_SDA_R 7.3G<> 9.2B<> PEX_RX2* 2.2E RAMCFG1 12.3F< 15.2C 15.4B> SNN_G3_RFU9 11.4A
5 FBAD<58> 3.3A 4.5D FBCAL_PU 3.4G 5.1G I2CC_SCL 10.3D PEX_RX3 2.3E RAMCFG2 12.3F< 15.2C 15.4B> SNN_G3_RFU10 11.4A 5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM V1.3, HDCP. SANTA CLARA, CA 95050, USA
PAGE DETAIL <edit here to insert page detail>
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10407-0001-300 A
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p407_a03 PAGE 16 OF 18
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME myan DATE 21-DEC-2006
A B C D E F G H
A B C D E F G H
SNN_G3_RFU11 11.4A
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N
SNN_G3_RFU12 11.4A
SNN_G3_RFU13 11.4A
SNN_G3_RFU14 11.4A
SNN_G3_RFU15 11.4A
SNN_G3_RFU16 11.4A
C
SNN_GND_SENSE 2.3F
SNN_GPIO7 10.3D
1 1
SNN_GPIO9 10.3D
SNN_GPIO10 10.3D
SNN_GPIO13 10.3D
.
SNN_GPIO14 10.3D
SNN_GPU_AG12 2.1D
SNN_GPU_AH13 2.2D
SNN_HDCP_ROM 11.4D
M
SNN_IFPABVPROBE 8.1D
SNN_IFPCDVPROBE 8.3D
SNN_MIOACLKOUTR* 12.2E
SNN_MIOA_M5 12.2E
SNN_MIOBCAL_PD_VDD 12.3C
O
Q
SNN_MIOBCAL_PU_GND 12.3C
SNN_MIOBD<2> 12.3E
SNN_MIOBD<3> 12.3E
SNN_MIOBD<4> 12.3E
C
SNN_MIOBD<5> 12.3E
SNN_MIOBD<6> 12.3E
SNN_MIOBD<7> 12.3E
SNN_MIOB_CLKOUT 12.4E
2 SNN_MIOB_CLKOUT* 12.4E 2
.
SNN_MIOB_DE 12.4E
SNN_MIOB_HSYNC 12.4E
SNN_MIOB_VREF 12.4C
SNN_MIOB_VSYNC 12.4E
X
SNN_MSTRAPSEL0 11.3A
SNN_MSTRAPSEL1 11.3A
SNN_MSTRAPSEL2 11.3A
SNN_MSTRAPSEL3 11.3A
SNN_POK 14.4C
I
SNN_R3_M1 4.2A
SNN_R3_M2 4.2C
SNN_R3_M3 4.2E
SNN_R3_M4 4.2G
SNN_R3_M5 5.2A
F
SNN_R3_M6 5.2C
SNN_R3_M7 5.2E
SNN_R3_M8 5.2G
SNN_R7_M1 4.2A
A
SNN_R7_M2 4.2C
SNN_R7_M3 4.2E
SNN_R7_M4 4.2G
3 SNN_R7_M5 5.2A 3
SNN_R7_M6 5.2C
N
SNN_R7_M7 5.2E
SNN_R7_M8 5.2G
SNN_R8_M1 4.2A
SNN_R8_M2 4.2C
SNN_R8_M3 4.2E
I
SNN_R8_M4 4.2G
SNN_R8_M5 5.2A
SNN_R8_M6 5.2C
SNN_R8_M7 5.2E
SNN_R8_M8 5.2G
H
SNN_ROM_TYPE_0 12.3E
SNN_STEREO 11.4C
SNN_STRAP 11.3A
SNN_THERMAL 10.3B
C
SPDIF 9.1G> 9.4C
SPDIF_IN 2.5G< 9.1G> 9.4B>
SSFOUT 7.4C< 7.5G< 11.2E>
SS_OUT 11.2C
SS_REF 11.2C
.
TESTMCLK 11.4C
4 TESTMODE 11.4C 4
THERM 10.3B
THERM* 10.3B
THERM_ALERT* 9.4B< 10.2F>
W
THERM_SCL 10.2B
THERM_SDA 10.2B
THERM_VDD 10.2C
TMDSD_IOVDD 8.4C
TMDS_IOVDD 8.4B
W
XTALIN 7.4C 7.5G<
XTALOUT 7.4D 7.5G>
XTALOUTBUFF 7.4F> 7.5G> 11.2B<
W ASSEMBLY
PAGE DETAIL
G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM V1.3, HDCP.
<edit here to insert page detail>
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS.
A B C D E F G
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
SANTA CLARA, CA 95050, USA
NV_PN
ID
NAME
600-10407-0001-300 A
p407_a03
myan
H
PAGE
DATE
17 OF 18
21-DEC-2006
5
A B C D E F G H
N
Report C522 [13.2E] C618 [2.2H] CN1 [9.3D] R36 [5.2F] R582 [14.4G]
Design: p555_a00 C523 [13.4C] C619 [2.4G] D1 [13.2E] R37 [13.2F] R583 [15.2D]
Date: Nov 30 C524 [14.2B] C620 [2.2C] D501 [14.2E] R38 [9.4B] R584 [15.2C]
11:00:17 2006 C525 [6.4C] C621 [2.2G] D502 [10.3G] R39 [4.2E] R585 [12.2C]
C526 [6.4D] C622 [2.2G] D503 [10.3G] R40 [4.3E] R586 [7.1E]
C
C527 [6.2C] C623 [2.2H] G1 [2.3F] R41 [14.3F] R587 [7.1E]
C1 [2.1A] C528 [4.3H] C624 [3.2D] G1 [3.3B 3.3F] R42 [14.3F] R588 [15.2C]
1 1
C2 [7.5E] C529 [6.2H] C625 [2.2D] G1 [7.1D 7.2D 7.4D R43 [14.3B] R589 [15.2C]
C3 [2.3A] C530 [6.2D] C626 [2.4G] 7.3D] R44 [13.2B] R590 [15.2C]
C4 [11.3F] C531 [14.3C] C627 [2.1G] G1 [8.4E 8.2E] R45 [14.2E] R591 [14.4G]
.
C5 [10.2D] C532 [14.3C] C628 [6.2B] G1 [10.3C] R46 [4.2F] R592 [12.2C]
C6 [7.5C] C533 [2.2A] C629 [2.2C] G1 [11.4B 11.3G] R47 [4.3B] R593 [7.3F]
C7 [10.2B] C534 [13.4D] C630 [6.2B] G1 [12.4D 12.2D] R48 [4.3F] R594 [10.2B]
C8 [6.4F] C535 [13.2D] C631 [2.2G] L1 [13.2F] R49 [4.3A] R595 [10.2B]
M
C9 [6.2B] C536 [2.5D] C632 [2.2D] L2 [14.2E] R50 [4.3B] R596 [7.3F]
C10 [14.4C] C537 [2.5C] C633 [2.4G] LB501 [3.4D] R501 [4.3D] R597 [7.1F]
C11 [6.4F] C538 [2.5D] C634 [3.1C] LB502 [2.4H] R502 [4.3D] R598 [7.1F]
C12 [14.4C] C539 [3.4D] C635 [2.2G] LB503 [3.4H] R503 [4.3D] R599 [15.2C]
C13 [6.2A] C540 [2.5C] C636 [2.2G] LB504 [7.4B] R504 [4.2C] R600 [10.2A]
O
C14 [6.4E] C541 [2.1H] C637 [2.2H] LB505 [8.2C] R505 [4.3C] R601 [10.3G]
C15 [6.4E] C542 [3.5A] C638 [2.2G] LB506 [7.1B] R506 [13.2B] R602 [10.2D]
C16 [5.2E] C543 [2.5D] C639 [2.2G] LB507 [8.4C] R507 [13.2B] R603 [10.2D]
C17 [14.4E] C544 [6.2D] C640 [2.2C] LB508 [8.1C] R508 [13.3C] R604 [10.2B]
C18 [5.3B] C545 [3.2D] C641 [2.4G] LB509 [12.1B] R509 [14.2D] R605 [8.4C]
C
C19 [6.4E] C546 [2.5C] C642 [3.1C] LB510 [8.4C] R510 [14.2D] R606 [11.4C]
C20 [14.4E] C547 [3.1D] C643 [2.3G] LB511 [7.2B] R511 [13.3E] R607 [10.2B]
C21 [6.4E] C548 [3.1D] C644 [2.1G] LB512 [8.3C] R512 [13.3E] R608 [10.3E]
C22 [6.2F] C549 [6.2D] C645 [3.2C] M1 [5.4D 5.4C R513 [13.2D] R609 [11.2E]
2 C23 [6.2E] C550 [2.4D] C646 [3.4H] 5.2D] R514 [13.2D] R610 [10.3E] 2
.
C24 [6.2E] C551 [2.4C] C647 [2.4G] M2 [5.2F 5.5B R515 [13.2F] R611 [10.2D]
C25 [5.2G] C552 [2.4D] C648 [2.2G] 5.5D] R516 [13.3G] R612 [10.2A]
C26 [6.2E] C553 [2.4C] C649 [7.4C] M3 [4.2D 4.4D R517 [13.4D] R613 [10.3E]
C27 [13.2H] C554 [2.4D] C650 [2.2G] 4.4B] R518 [13.4D] R614 [10.2D]
X
C28 [6.2E] C555 [6.2D] C651 [7.4B] M4 [4.2F 4.5B R519 [13.4C] R615 [10.4G]
C29 [6.2F] C556 [6.2D] C652 [2.2G] 4.5E] R520 [4.2H] R616 [8.4B]
C30 [6.2A] C557 [2.4C] C653 [6.3D] M501 [4.2B 4.4C R521 [14.2B] R617 [8.4C]
C31 [6.2B] C558 [2.4D] C654 [3.2C] 4.4E] R522 [14.2B] TP501 [10.3B]
C32 [13.2F] C559 [2.4C] C655 [2.4G] M502 [4.5C 4.2H R523 [13.4C] TP502 [10.3B]
I
C33 [9.4B] C560 [2.4D] C656 [7.1B] 4.5D] R524 [4.3H] TP503 [10.3B]
C34 [2.3A] C561 [3.5E] C657 [6.3D] M503 [5.5E 5.2G R525 [14.3C] TP504 [10.3B]
C35 [13.2H] C562 [2.1G] C658 [2.3G] 5.5C] R526 [13.4C] TP505 [10.3B]
C36 [6.2E] C563 [2.4C] C659 [3.4H] M504 [5.4B 5.2B R527 [3.5A] U1 [11.2C]
C37 [4.3E] C564 [2.1H] C660 [3.4H] 5.4E] R528 [4.2A] U2 [10.2C]
F
C38 [6.2E] C565 [2.3D] C661 [3.2C] MEC1 [15.4F 15.4F] R529 [3.5A] U3 [11.3F]
C39 [6.3E] C566 [2.3C] C662 [7.4C] MEC2 [15.4F 15.4F R530 [4.2A] U4 [11.4D]
C40 [6.3F] C567 [5.2H] C663 [8.2D] 15.3F 15.4F] R531 [5.3D] U5 [14.4D]
C41 [14.2F] C568 [3.4C] C664 [8.2D] Q1 [8.4B] R532 [5.2H] U501 [13.2C]
A
C42 [14.2E] C569 [2.4G] C665 [2.3G] Q2 [8.4B] R533 [3.5E] U502 [14.2C]
C43 [13.2G] C570 [2.2H] C666 [8.4D] Q3 [8.4B] R534 [3.5G] U503 [14.4G]
C44 [14.3B] C571 [2.3D] C667 [7.2B] Q501 [14.2D] R535 [3.5D] Y1 [7.5D]
3 C45 [14.2F] C572 [2.1G] C668 [7.2C] Q502 [13.2E] R536 [5.3D] 3
C46 [6.2G] C573 [3.2D] C669 [7.1C] Q503 [13.2E] R537 [3.5D]
N
C47 [2.2A] C574 [3.2D] C670 [3.2D] Q504 [14.2D] R538 [11.4C]
C48 [14.2E] C575 [3.1C] C671 [8.2D] Q505 [13.4D] R539 [3.4G]
C49 [13.2B] C576 [3.1C] C672 [12.1C] Q506 [13.4D] R540 [5.3D]
C50 [14.2G] C577 [3.4C] C673 [2.4G] Q507 [13.2D] R541 [3.4G]
C51 [13.2G] C578 [2.2G] C674 [2.3G] Q508 [8.4C] R542 [5.2H]
I
C52 [14.2D] C579 [3.2C] C675 [8.4D] Q509 [10.2E] R543 [3.5E]
C53 [13.1F] C580 [5.3D] C676 [7.1C] Q510 [10.2E] R544 [5.2A]
C54 [6.2E] C581 [2.1G] C677 [8.2D] Q511 [10.2F] R545 [3.5D]
C55 [6.2F] C582 [2.3C] C678 [5.2C] Q512 [8.2B] R546 [5.2A]
C56 [13.1F] C583 [3.2D] C679 [12.1C] R1 [15.3C] R547 [3.5D]
H
C57 [13.1E] C584 [2.3D] C680 [12.1C] R2 [10.2B] R548 [10.3B]
C58 [6.2E] C585 [2.1G] C681 [3.2D] R3 [10.2B] R549 [7.2F]
C59 [6.2F] C586 [2.1H] C682 [8.4D] R4 [8.4B] R550 [7.2F]
C60 [6.3E] C587 [3.1D] C683 [8.4D] R5 [10.2B] R551 [10.3B]
C
C61 [4.3G] C588 [2.2G] C684 [12.3C] R6 [10.3E] R552 [7.4H]
C62 [6.3E] C589 [2.2G] C685 [8.4D] R7 [10.2B] R553 [10.3B]
C63 [6.3E] C590 [2.3C] C686 [8.2C] R8 [10.3E] R554 [7.2E]
C64 [6.2F] C591 [2.2G] C687 [8.2C] R9 [11.2C] R555 [10.3B]
C65 [6.2G] C592 [6.2C] C688 [8.4D] R10 [10.2D] R556 [7.3F]
.
C66 [13.1F] C593 [3.1D] C689 [7.2C] R11 [11.2C] R557 [10.3B]
4 C67 [13.1F] C594 [2.1H] C690 [6.3C] R12 [11.3E] R558 [5.2C] 4
C68 [4.3B] C595 [6.2C] C691 [6.3C] R13 [7.4F] R559 [5.2C]
C69 [6.3F] C596 [2.3D] C692 [6.3D] R14 [11.2D] R560 [13.4C]
C501 [6.2D] C597 [2.1G] C693 [14.4G] R15 [9.3G] R561 [7.2C]
W
C502 [4.3D] C598 [3.2C] C694 [6.3D] R16 [9.3G] R562 [15.2D]
C503 [14.2E] C599 [2.2G] C695 [8.4C] R17 [7.4E] R563 [7.3E]
C504 [6.4D] C600 [2.1G] C696 [11.4E] R18 [9.3G] R564 [7.1C]
C505 [6.4C] C601 [2.2G] C697 [8.4C] R19 [15.2D] R565 [9.4C]
C506 [4.3C] C602 [3.2D] C698 [8.2D] R20 [15.2C] R566 [7.3C]
W
C507 [6.4D] C603 [2.3C] C699 [7.2B] R21 [10.3D] R567 [7.3F]
C508 [6.2C] C604 [2.1G] C700 [12.2C] R22 [10.3D] R568 [8.3D]
C509 [6.2D] C605 [3.1D] C701 [7.1B] R23 [10.3E] R569 [8.1D]
C510 [6.2D] C606 [3.1D] C702 [8.2C] R24 [9.3G] R570 [10.4G]
W
C511 [13.2C] C607 [2.3D] C703 [12.1B] R25 [7.4H] R571 [10.3G]
C512 [6.2G] C608 [2.2G] C704 [11.2D] R26 [14.4G] R572 [15.2D]
C513 [6.4D] C609 [2.2G] C705 [11.2E] R27 [5.2D] R573 [15.2D]
C514 [13.1E] C610 [3.2C] C706 [8.2B] R28 [5.3B] R574 [11.4D]
C515 [13.3C] C611 [2.1G] C707 [11.2D] R29 [5.3A] R575 [11.4D]
C516 [14.2D] C612 [2.3C] C708 [8.4C] R30 [5.2D] R576 [15.2D]
C517 [14.2B] C613 [2.2G] C709 [11.2D] R31 [14.5E] R577 [7.3E]
C518 [13.3C] C614 [2.2G] C710 [8.4C] R32 [5.3B] R578 [7.3E]
C519 [6.2G] C615 [2.2D] C711 [8.4C] R33 [14.4E] R579 [12.2C]
5 C520 [13.2B] C616 [3.2D] C712 [8.2C] R34 [2.2D] R580 [12.2C] 5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY G84M-600 450/400 256MB 128bit GDDR2 16Mx16 84FBGA, LVDS + DVI_A/DVI_B + TV_OUT + VGA, MXM V1.3, HDCP. SANTA CLARA, CA 95050, USA
PAGE DETAIL <edit here to insert page detail>
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
NV_PN 600-10407-0001-300 A
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL ID p407_a03 PAGE 18 OF 18
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. NAME myan DATE 21-DEC-2006
A B C D E F G H