Ho Chi Minh City University of Technology
FACULTY OF COMPUTER SCIENCE & ENGINEERING
Laboratory Manual
Digital Systems
Experiment 3
Ho Chi Minh City, 11/2020
Digital Systems – Lab 3
1. INTRODUCTION
1.1 Goals:
To become familiar with Flip-flops and their applications
To implement and observe the operation of different flip-flops using 7400-Series ICs
To use Flip-flop ICs to design and implement basic sequential circuits.
1.2 Equipment and apparatus:
Digital System KIT
Lab tools: VOM, Oscilloscope
74-Series Integrated Circuits (IC): new types! 7474, 7473
1.3 References:
Digital Systems: Principles and Applications (11th Edition) – Ronald J. Tocci, Neal S.
Widmer, Gregory L. Moss, 2010.
Lecture Slides/Videos – Assoc. Prof. Dr. Tran Ngoc Thinh.
1.4 Pre-laboratory:
Read this experiment carefully to become familiar with the procedural steps in this
experiment.
1.5 Safety First
You are dealing with live power. Be mindful of the current and voltage you are supplying
to the circuit. No drinks on the working surface!
1.6 Submit your reports:
Complete all exercises in Section 2.3. Show all of your work step-by-step.
Capture and include images about your implemented circuits in Logisim, KIT, and Tools
Submit report to BKeL by deadline.
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Digital Systems – Lab 3
2. EXPERIMENTAL PROCEDURE:
2.1 Basics of Flip-flops
"Flip-flop" is the common name given to two-state devices which offer basic memory for
sequential logic operations. Flip-flops are heavily used for memory elements (digital data
storage and transfer) and are commonly used in banks called "registers" for the storage of
binary numerical data.
Figure 1: General diagram of Digital Systems
There are several types of flip-flops such as S-R, J-K, D, and T. In this experiment, we will
focus on the two most important types that are the D and J-K flip-flops.
2.1.1 D Flip-Flop
The D flip-flop is also known as a data or delay flip-flop. It captures the value of the D-input
at a definite portion of the clock cycle (such as the rising edge of the clock). That captured
value becomes the Q output. At other times, the output Q does not change. The D flip-flop
can be viewed as a memory cell, a zero-order hold, or a delay line.
Figure 2: D Flip-flop Symbol and its truth table
The IC we will use is the 7474 which is a dual D-type positive edge triggered flip-flop and
it's description is shown below.
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Digital Systems – Lab 3
Figure 3: IC 7474 Connection Diagram and Function Table
2.1.2 J-K Flip-Flop
The JK flip-flop is the most versatile of the basic flip-flops. It has the input following character
of the clocked D flip-flop but has two inputs, traditionally labeled J and K. If J and K are
different then the output Q takes the value of J at the next clock edge.
Figure 4: J-K Flip-flop Symbol and its truth table.
The IC we will use is the 7473 which is a dual J-K Master/Slave negative edge triggered flip-
flop with clear and it's description is shown below.
Figure 5: IC 7473 Connection Diagram and Function Table
Be Careful: In IC 7473, PIN 4 is the VCC and PIN 11 is the GND!
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Digital Systems – Lab 3
2.2 Getting started with IC 7474 and IC 7473
Let design and implement simple circuits to exam the function of IC 7474 and IC 7473.
IC 7474:
Assemble the IC and connect the pins as follows.
- POWER PIN: Connected to VCC, GND
- PRESET, CLEAR, DATA PIN: Connected to switches.
- CLOCK: Connected to FREQ, BUT1 or BUT2 (Use buttons for single tick of Positive
Edge Trigger and Negative Edge Trigger)
- OUTPUT, INVERTED OUTPUT: Connected to LEDs.
Observe the results
IC 7473: The procedure is similar to the IC 7474, but please remember to connect the power
supply pins correctly.
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Digital Systems – Lab 3
2.3 Exercises
2.3.1 Design, simulate and implement a D Flip-flop using J-K Flip-flops (allowed to use
other logic gates if necessary)
2.3.2 Design, simulate and implement the following logic circuit.
Observe the operation of circuits and answer the following questions.
a. Assume that QA, QB, QC are connected to the LEDs. What is the phenomenon of the
LEDs? What is the difference among LEDs?
b. How many minimum D Flip-flops required to build a circuit in which the output
frequency is 16 times less than the Clock In frequency?
2.3.3 (Advance) Given the circuit and waveform as follows.
a. Design and simulate the circuit in Logisim.
b. Complete the timing diagram for A, B, and z based on the given waveform.