A Vector Control Technique for Medium Voltage Multilevel Inverters

J. Rodriguez, P. Correa L. Morhn

Dept. of Electronics, Universidad Tdcnica Dept. of Electrical Engineering, Universidad de
Federico Santa Maria. Concepci6n
Phone: 56-32-654203,Fax: 56-32-797469 Phone 56-41-203514,
Casilla 11 0-V, Valparais0,Chile Casilla 5342, Concepcih, Chile
E-mail:[email protected]

Abstract- This paper presents a switching strategy for multilevel Another very interesting altemative is the Space Vector
cascade inverters, based on the space vector theory. The Modulation strategy (SVM) which has been recently
proposed switching strategy generates a voltage vector with very proposed [7],working with a high switching fiequency.
low harmonic distortion and reduced switching frequency. This
new control method is an attractive alternative to the classic
multilevel PWM techniques considering the following aspects: i) On the other hand, methods with low switching
voltage and current THD, ii) range of linear operation, and iii) frequency have been developed. One of them is the
number of commutations. Multilevel Selective Harmonic Elimination PWM technique
(SHEPWM) presented in [6],[8],[10].
I. INTRODUCTION
A new control method based on the space vector theory is
A very important development in Medium Voltage discussed in this paper. This control strategy works with very
Inverters has been observed in the last years. The low switching fiequency to generate high quality load
commercially available topologies are: Current Source voltage.
Inverters (CSI-PWM), Neutral Clamped Inverters and
Cascaded Multicell Inverters (CML) [l], [2]. The most The following sections present the working principle of
relevant feature of multilevel inverters is the generation of the Space Vector Control (SVC) strategy and a comparison
high quality voltage delivered to the load and less current with the multilevel sinusoidalPWM method.
harmonics injected to the power supply, in comparison to the
two-level topologies. A very attractive alternative in II.’POWER CIRCUIT TOPOLOGY
multilevel energy conversion is the cascaded topology which
uses the series connection of multiple single-phase Voltage Fig. 2 presents the power circuit of the CML inverter with
Source Inverters (VSI), achieving a drastic reduction in the 5 cells connected in series per phase, which is applied in
voltage stress across each single power semiconductor. 4.16 (kV) drives. Each cell is composed of a non-controlled
three-phase diode rectifier and a single phase H-type inverter,
To control the cascaded inverter, also called H-type as shown in Fig. 3. Each single phase inverter generates an
inverter [9],several techniques have been developed. These output voltage vceII with values +Vcc, 0, -Vcc.
modulation methods can be observed in Fig. 1 [7]. The
modulation strategies are separated in two major categories N
according to the switching frequency. The method with
highest industrial application is the classic carrier-based
Sinusoidal PWM (SPWM), with phase-shifting technique to Cell A I Cell 81 Cell C1

reduce the harmonics in the load voltage [3],[4],[5],[9].

Cell A2 Cell 82 Cell C2

Cell A3

Cell AS Cell 85 Cell C5

Vector Elimiriation
Ynl! P
I 1 I
n
I

Fig. 1. Classification of multilevel modulation methods. Fig. 2. Power circuit of the cascade multilevel (CML).

0-7803-6618-2/01/$10.000 2001 IEEE 173

 1M)

l
Fig. 3. Power circuit of a single cell o 0.m 0.01 a015 o.m 0.025 o.m 0.035 0.04
Time (s)

111. MULTILEVEL
SINUSODAL PWM (MLSPW)

Cascaded topologies apply modulation strategies like

carrier disposition methods or phase-shifted multicarrier
techniques in order to obtain multilevel
; output
_ voltages
i [4].i l20
The last one is very used in real industrial applications and
for this reason it was employed as a-reference to carry out a 0 i r m z m o m r r m m s m o 7 o " s r m
comparison with the new control strategy. Frequency (Hz)
2

In the phase-shifted multicarrier technique, the gating

pulses for each cell are generated by comparing a sinusoidal
reference respect to a triangular carrier signal of frequency
5 , in a so called unipolar sinusoidal pulse width modulation
[ll]. To increase the linear operating range the third
harmonic injection PWM method is used. As a result each I
0 0.- 0.01 0.015 0.02 0.a 0.m 0.a 0.04
cell produces an output PWM voltage as shown in Fig. 4, Time (s)
with the first group of harmonics centered around 2 5 .
Fig. 5. MLSPWM with 3d harmonic injection (Simulation, fc=600@Iz),
Thus, N, cascaded cells in one phase with their carriers Nc=5). a ) Load voltage. b)Hamionic voltage spectrum. c) Load current.
shifted by an angle q=360"lNc , are compared respect to the
same reference signal in order to obtain a 2N,+l level phase-
neutral N output voltage. The resulting load voltage and the
corresponding currents have the almost sinusoidal waveform 111. VECTOR CONTROL SCHEME
shown in Fig. 5. The first harmonic sidebands appear near to
2&.Nc. The control method proposed in this work is based on the
voltage vector generated by the inverter, defined as

where V A N , VBN , VCN are the voltages of terminals A , B and C

with respect to the neutral Nand a is the complex operator:
a=-112+ j . J T t 2 . (2)
I I
0 0.W 0.01 0.015 0.02 0.m 0.m 0.a 0.04
Time(s) -
Considering the inverter of Fig. 1, with 5 cells per phase,
b) each phase can generate 11 different voltages, and the three-
I I
1
phase inverter can generate 31 1 different space vectors . The
2 0.5 representation of the voltage vectors in the complex plane
a
v
considers that
2 0
2 4.5 v(t)=v,+ j a v , (3)
1
I I where v, and L!, correspond to the components of v(4 in the x
0 OW 001 0015 002 Om Om 0036 OW and y axis respectively. These components are given by
Time (s)
Fig 4 Inverter cell voltages (Simulation) a) Output voltage and reference
with S P W modulation b) Output voltage and reference with sinusoidal (4)
third harmonic injection

174
It can be observed in equations (4) and (5), that the different
values of v, and v, are multiples of VccI3 and Vcc/&
respectively. To simplify the control, it is advantageous to
work with normalized voltage vectors given by

Fig 7. Representationof the highest proximity locus.

Fig. 6 presents the 3 11 normalized vectors generated by the where ceiZ(v) is defined as the smallest integer greater or
inverter and also includes the normalized reference vector. equal than v. These indexes are used to address a table
containing vectors V h ' , VI ' and coefficients a and b of the
The main idea of the proposed control strategy is to select unique trace y~ within the shaded area. The decision between
a voltage vector that minimizes the space error according to a VI,' or V I ' is done by the following relation
reference vector Vref' . The high density of vectors produced
by the 11-level inverter will generate a small error in relation If vyl>av,'+b then vsel'=vhO
(8)
to the reference vector and it is not necessary to use a more else v,,, ' = vl '
complex vector modulation scheme using three-vectors
adjacent to the reference. where v,,~ ' is the normalized selected vector, delivered by
the inverter.
Fig. 7 shows an enlarged representation of different
vectors generated by the CML inverter, with the respective In order to test the proposed control technique a complete
hexagon boundaries of highest proximity area, in dashed low power 11-level multicell converter was constructed. The
lines. The control strategy must determine in which hexagon inverter was controlled using a 16 bit fixed point DSP
the reference vector is located, to apply the corresponding controller Analog Devices ADMC331. Fig. 8 shows the
voltage vector to the load. In order to make the appropriate block diagram of the computationalprocedure. The complete
vector selection, the real and imaginary part of vre/l are algorithm to generate the voltages at the inverter output
used to identify the shaded rectangle shown in Fig. 7, where corresponding to one sample of the reference vector has an
the reference vector and two inverter vectors are located. This execution time of 7 (us).
rectangle is identified with n, and n, given by
With this control strategy each cell works with very low
n, =sign(v,').ceillv,'I 3 ny =sign(v,').cei+,l (7) switching frequency. Fig. 9 reveals this behavior. Fig. 10
shows experimental results of the voltages and currents in the
load obtained with vector control, under the same operating
conditions of Fig. 5.

( a ,b ,vh' ,v!)
Selection of the
commutation state

I >
x' axis VBN
VCN
Fig. 6. Normalized voltage vectors generated by the CML inverter. Fig. 8. Block diagram of the control method

175
U) 40, 1
f ( t ) = M . s i n ( 2f~,..t) (9)
where M is the modulation index (O<M<I) and fo is the
fimdamental output frequency. The maximum line-to-line
amplitude voltage with this method is 0.86 (pu) (1 @U)=
I 10. Vcc / ). The third harmonic injection P W M method
0.005 0.01 0.015 0.02
b) overcomes this problem defining the reference waveform as
Time (s)
f ( t ) = 1.15. ~ - s i n ( 2 fa,. .t)+ 0.1 9.M s i n ( 3 . 2 ~f ,. t).
1 (10)
li:

d o '
2-
' 1 ..,
The reference (10) allows to reach a line-to-line voltage of 1
@U)-

The proposed vector-based scheme has its 'reference

directly in the space vector representation, so the maximum
modulation index is achieved when the reference vector
reaches the boundaries of the locus of voltage vectors
I
generated by the inverter, that is v,fl =l(pu). The reference
vector projections on the imaginary axis are equal to the line-
to-line voltage, therefore that means maximum line-to-line
amplitudes of l(pu). Furthermore, the vector method has an
extended modulation range limited by the boundary Lj, as is
I
shown in Fig. 11 ( v,yl=1.03 @U)).

B. Number of commutations per cycle

- . With pulse width modulation control, the effective

.
-m0 0.m a01 0.015 0.m 0.025 0.m 0.w 0.04
switching frequency in each semiconductor remain constant
Time (s) regardless the modulation index (O<M<Z). The total number
b) 10 of commutations in each phase of the three-phase inverter

2oo I

I
0 0005 001 0015 Om 0'25 Om 0036 004
Time (s)
-100 -
Fig 10 Inverter with SVC (experimental, Nc=5) a) Load voltage
b) Voltage spectrum c) Current of the proposed method

v. COMPARISON CRITERIA -200

-200 -100 0 100 200
A. Linear operating range x axis (V)

Fig. I 1 . Maximum linear-range in each methods. a) MLSPWM with

The reference waveform with sinusoidal P W M method in carrier shift, LI= 0.86 (pu). b) MLSPWM with carrier shift and third
each cell is given by harmonic injection, L F ~(pu). c) Proposed method (SVC) L F ~.03(pu).

176
in a period of the fimdamental voltage, is described by

where fo ,ff , and N, are the reference fi-equency, the carrier

frequency and the number of cells, respectively. With &=SO
(Hz),f,=600 (Hz), Nc=5 the number of commutations is 240.
Time (ms)
On the other hand the SVC has a variable switching
frequency. Fig. 12 has been obtained counting the number of
commutations for each modulation index. It can be observed
that the commutations has the highest value of 28. Note that
quasi-square operation in each cell is achieved when the
number of commutations per phase is 20, that means one
switching in each semiconductor for every period of
reference. This situation is illustrated in Fig. 9.

C. THD analysis

The SVC scheme has a smaller load voltage THD for a wide
range of modulation indexes, as shown in Fig. 13. The reason
for this effect is that the MLSPWM carrier based method -10 -
does not fully utilize the nearest available phase voltage -20 -15 -10 -5 0 5 10 15 20
respect to a sinusoidal reference like the vector method does. x' axis
This can be observed in Figs. 14 and 15.
Fig. 14. SVC method. a) Reference and load voltage in the time domain. b)
The performance of the carrier based method is slightly Reference and output vectors in the complex domain. (1W0.99).
superior considering the harmonic currents. This is a logical

28 -

24 -

20 -
E -

Time (ms)
'0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Modulation Index
Fig. 12. Commutations per phase vs. modulation index, vector
control scheme.

25

-20 -15 -10 -5 0 5 10 15 20

0.3 0.4 0.5 0.8 0.7 0.8 0.9 1 x' axlS

Modulation Index
Fig. 13. Voltage THD of both methods. Fig. 15. MLSPWM scheme. a) Reference and load voltage in the time
domain; b) Reference and output vectors in the complex domain.
(M=O. 99).

177
consequence of the low-pass filtering capability of every AC
machine drive. Nevertheless, the current THD indexes in
both methods are comparable.

VI. CONCLUSIONS

It has been demonstrated that the vector control strategy

proposed in this work originates a high quality load voltage
working with extremely low switching Erequency. In
addition, the results show that this new method has in general
a better performance than carrier-based PWM methods. The
vector control strategy is simple and it can be easily
implemented in a standard DSP motor controller. The
complete control algorithm with the ADMC 331 DSP
controller has an execution time of 7 (us).

ACKNOWLEDGMENTS

The authors gratefully acknowledge the financial support

of the Chilean Research Fund (CONICYT), project Nr.
1990837, and of the research direction of the University
Federico Santa Maria.

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