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0% found this document useful (0 votes)
92 views23 pagesPower Electronic Notes
Class notes
Uploaded by
SiddhuCopyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF or read online on Scribd
/ 23
tion Techniques :
athe commutation technigy
into two categories name),
forced comMUTALION deneng.
RS a,
‘ty
9 og
reese toe AC or DC,
a aT ravine AUTRE hy
the | re freed Or namely current commutation
0. ™
fn | wot? tation :
its Natural commu
two commutation techniques of g
a0 ns, What is the difference hen
ed forced communication ? "
oe {M2Y 10, 10 Marky
‘it
er
vane the ScR is tued of, Ave 0 its forward curgy,
going btw te naling CUTEML MARTA, is aig
be naturally commutated.
tre natural commutation usually takes place when
supplyis used atthe input of the thyristorised circuits
fete Fig. 23:1(0, in which the source voltage is ac ang
| theload is resistive
Vg= Vp Seat
6-689) Fig, 3.3.2 (a) .
Therefore the load voltage and current will have the
same shape and they willbe in phase with each other,
The curent flowing through the thyristor T; is same a
that flowing through R,
As shown in Fig. 3.3.1(b), the thyristor current past
though a natural zero and a reverse voltage appé#
cross the thyristor thereafter,
V,
it
2:
T, OFF
3.1(b) : Waveform
aia Teck
A I I I OTT Ae
Ay
PEOC (Sem. 4 / Electrical / MU) 33
= The conducting thyristor is then tured off due to its
‘anode current going to zero naturally.
= Hence it is known as natural commutation
Natural commutation is used in 2¢-voltage controllers
and phase controlled rectifiers,
‘Advantages of natural commutation ;
1. It does not require any external’ commutation
components,
2. Mis reliable and simple,
2. Forced Commutation ;
rn
Q.1 Explain any two commutation techniques of SCR
with waveforms, What is the difference between
natural and forced communication ?
(May 10, 19 Marks)
When the SCRs operate on a pure DC input voltage.
their forward current cannot be reduced below holding
current naturally.
Therefore the thyristors must be commutated “forcibly”
by using additional "commutation circuit’.
This external commutation circuit will turn off the
thyristor by means of either current commutation or
voltage commutation.
Im the voltage commutation, the conducting SCR is
tumed off by applying a reverse voltage across it
whereas in current commutation, an externally
Produced reverse current is forced to flow through the
Conducting SCR to reduce its net forward current below
the holding current value.
Normally the forced commutation will be used in the
thyristorised inverters or chopper circuits as these
circuits operate on DC power supplies.
1. Current commutation : If the SCR is turned off by
educing its anode current below the holding
current value, then the commutation is called as
“current commutation’
2, Voltage commutation : If the conducting SCR is
tumed off by applying a large reverse voltage
across it then the commutation is called as
“voltage commutation’ = a
uid be small eno
sm IH So that it
Fopaable th 8 total time
Sigh to provide the time tee ie
Sutgoi
| gen off before the gating si Soin,
incoming device. ‘Mal is
| 5 120° Mode of Conduct;
y ION (Wii
g Connected Resistive loadte Star
CETTE
EAA,
SA — om ny
on
aan
4 praw three Phase full bridge i
19e im 3
and its waveform for 129° aa using SR.
lon and 180:
conduction. Explain operation in brief
gi Draw 2 3-4 bridge inverter ce Marks)
conduction. Draw the gating si 120" mode of
phase voltage waveforms across “— fine and
resistive load connected at the ‘ia connected,
| the inverter. terminals of
"i (May 14, 10 Marks)
2.3 Explain with circuit diagram and waveform:
| phase bridge inverter for 120° conduct nhiee
| (Dec. 14, May Net be
| : |, May 15, 10 Marke)
laa explain with circuit diagram and waveforms,
| operating principle of three phase bridge inverter
for 120° conduction mode. (Dec. 15, 10 Marks)
‘aS Explain the operation of three phase bridge inverter.
| for 120° conduction mode. Draw the necessary
waveform for line voltage and phase voltage.
| Justify it (Dec. 16, May 17, 10 Marks)
6 Explain the operation of three phase bridge inverter
| feeding a resistive load for 120" conduction made
Draw the pulse sequence for the switching and
sketch all phase voltages waveforms.
(May 19, 10 Marks),
0.7 With a neet diagram of 3¢ bridge inverts? foeding
star connected resietve (oad OCR? S
operation for 120° conduction mode. siete
phase voltages. (Dec. 18,
~ The same 3 6 bridge inverter circuit which
the 180° mode of conduction is
well
' ict for
~ As the name suggests: each transistor will ond
i adians.
duration of 120° or 2 / 3 © nated
was used for
sed for 120° mode 25
tof | re ai |
: |
LS mee . \
ne e120 .
eee eat
ik ‘ 6 SvS ot
ee fe t20°—t
‘i - 43 ‘on at |
™ Ea. |
Cpe wv
18] se [es [ae
{588 Fig. 9.2.10 Base driving waveforms for 120° mode
Tho wavetorms of Fig. 8.2.10
ol the following : |
Each transistor conducts for a period of 120 or 2/3 |
vad
After every 60° or (& / 3) rad, @ conducting transistor is
turned off and a new transistor is turned dar
In one cycle of output there are six intervals, each one
is 60" wide.
interval two transistors conduct
And in each
simultaneously.
Operation :
‘As sean from Fig. 9.220, one cycle of output can be
divided into six intervals.
‘The operation in different intervals is 25 follows
Interval |(0 ton! 3)
tn this interval as shown in Fig. 92.20, the ‘transistors (1)
‘and (6) conduct simultaneously
int *A’ will be connected to the positive
vill be connected 10
remains
Therefore P
tend of the de supply and point “6°
the negative end of the supply. Point °C *
floating.
The equiv
«, The total
ev/2Rk
therefore the phase vollages 26
alent resistance Rea * 8 * R= 28
current supplied by the de source,
given by Nelye
V/2R)xR =V/2 Volts,
xR==(V/2R)xR = ~V/2 Volts.
3. Ven = OVolt.
——t ot.
@ B. 4
St jn (6-602) Fig. 9.2.13 : Equivalent clreuit for Interval m
Table 9.2.6 : Phose and line voltages for Interval I
= A
aa Say Nan | Ven | Ven | Vee’ | Vac | Vee
4-600) Fig. 9.2.11 : Equivalent circult for Interval o |vi2|-viz]-vi2[ vie] vy
~ The tne voltages inthis made ar given by: ~ Far the remaining tue intervals. 1V,V an6 Vt we can
2 Vin =Vau-Vay =¥ 6 ¥ ov vor, Calculate the phase and line vltages ina sini way
2 Vac ® Va Veu ~ The phase and line voltage waveforms are as shown in
V/2Volts,
3. Vac = Vin=Ven = =V/2 Volts Fig. 9.2.14
Table 9.2.4: Phase and line voltages for Interval! leat i bet ph
Yan | Vn “Mac | Mee P '
of — ai
vi2{-vrat o |v |vs2[-v2 leg ert 4
Interval it (x/3 to 20/3) Lots %
t 12 rt
~ At ot = 2/3, transistor T, is tuned off and T, comes { ol te
into conduction, 4
~ Therefore in this interval the transistors (1) and (2) + i
conduct simultaneously
~The equivalent circuit is as shown in Fig. 9.2.12 and the
hase and line voltages are as listed in Table 9.25.
or ra
foussglt, Orng—A ye :
=
(0-601) Fig. 9.2.12 : Equivalent circuit for Interval I
Table 9.2.5 : Phase and line voltages for Interval It
Van’ | Von “att Vas [Vie [Vee
vz|o [-vel+vel v | ve
Interval Ill (2x/3 to n):
- In mode transistors (2) and (3) conduct
simultaneously
The equivalent circuit is as shown in Fig. 9.2.13,
The phase and line voltages are as listed in Table 926. s
interv i o . th wye
al I, one half cycle of operation -603) Fig. 9.2.14 : Waveforms for 120° mode wit
At the end of the interval I, iW aba
is complete. 1. Turn-on delay time ty on):
SY PEDC (Sem. 4/ Electical/ MU) $$ itizes
0.2. Explain the dynamic “tum ON” and OFF
~The total time taken by SCR to turn on completely can
SCR is turned on by applying a curent pulse of
specified magnitude and duration to the gate of the
device.
~The gate current is applied at t =
Fig. 261.
0 as shown in
"
Gas,
ance
nr
0
i
0-35) Fig. 26.1: SCR voltage and current waveforms at the
time of tum on
~The waveforms for the anode current and anode to
cathode voltage at the time of tum-on are as shown in
Fig. 26.1.
The forward anode current increases at a constant rate
diddt.
be subdivided into three time intervals,
They are:
1. The turn-on delay time tea
2. The rise time (t) and
3. The spreading time (t,,)
ton = talon + ty + yy 261)
During the turn on delay time ty ay the SCR appears to
remain the forward blocking i. off stat.
The voltage across SCR remains constant and high, and
anode current through itis zero as shown in Fig. 261.
= Butasthe gate current has already been applied, excess
carters are injected into the pz 2¥® (the base of nep.n
transistor in the equivalent circuit)
= This increases the sum (a, + a1).
‘This sum finally reaches unity, and SCR tums on, due to
regeneration
‘At the end of this interval, the voltage across SCR
begins to reduce and the anode current starts
increasing
Rise time interval (t):
During the rise time interval (t) the following events
take place
= The anode current rises ata rate diy/dt. This rate is large
‘enough so that the anode current reaches its steady
state value (1) within a short time.
— The rise time interval (t) comes to an end as soon as the
anode current reaches its steady state value 0).
— The anode to cathode voltage begins to drop rapidly
during the rise time interval. (see Fig. 26.1,
= Even after the rise time interval is over the plasma will
Continue to spread over the lateral area of SCR until SCR
is completely shorted out by the large number of excess
carters.
Plasma spreading interval (t,,) :
~The time required for the plasma to spread from the
region around the gate to the entire device cross:
section isthe “Plasma Spreading Time (t,)".
~The voltage drop during the plasma spreading time
takes place at a slower rate than that in the rise time
interval because ts larger than t, and because most of
the voltage drop occurs during the rise time intervat
(Gee Fig. 26.1),
Precautions to avoid SCR damage
1. In order to avoid SCR damage or failure, the rate of
anode current rise diy/dt should be kept fess than the
‘maximum value given in SCR specification sheet. The
failure of the device may take place due to excessive
Power dissipation that takes place during the time
interval
sian pest
pe input pone factor
4 /Eloctrical / Mi
igh.
j yarious PWM Techniques ;
J.
“
ec any two pulse width modulation
8 inverter
techni
(Dec. 18,10 Marea)
re most efficient method of controling the gain and
ne ouput vollave Is 10 incorporate Puse width
osulation (PM) contro! within the inverter.
ne commonly used FWM techniques are as follows
1 Single pulse width modulation (Si.
2 Syumetical eultiple pulse medulation (SMe)
3, Sinusoidal pulce width modulation (Sway
4. Modified sinusoidal pulse - width medulation,
5, Phase - displacement contro
412. Single Pulso Width Modulation (SM}
[Quast Square Output renee
[Pr ctimerer (Bec. 16, 10 Marks)
+f 871is) shows an urmodulated output voltage
woveform whichis a square wave
Thess value of this waveform is Fix, given by,
Vers = ¥ volts
= Fg 87.Ub) shows the inverter output veltage with
sagle pulie modulation.
(@) With modulation
07 Fig. 8.
as
Instead of a pulse of duration m @ pusse ef duration ‘2a
S generated symmetrically around 90° and 279
shown in Fig 87.1(01.
Output voltage waveform of inverter
Cutout voltage is controlled by controlling this pube
Wath 24
a
Single Phase!
The substantial amount
advantage of this method
of harmonics are added to output
= The waveform in Fig. 87.2(b) is 2 Quasi-square ware:
= Thus this method of voltage control is ideally suitable
for the quasi square wave inverter.
Wovetorm analysis :
~The Fourier analysis of the oviput voltage waveform in
Fig 8.7.1(0) yields the following results.
~ _ Thevalues of Fourier caeffiients are.
a, = 2) veosmat dot 72)
°
= Winere Vis the de input voltage tothe inverter
2-8)
a= SF cosnatdat
* 2-9
Xo, ‘
= Fgltin 2 +d)
=2[n(($) cos nd + cos) sand
3) xnav ooG)e]
in (nf? — 4)
a <0 foralln (87.2)
wad
oy BF” ent da
na
= osm v2 + d)—co8 (x2 ah
2 Perm tari ai si
= Cos (ae/2) cos nd sin (ne/2) Sin ne}
Wo
= F2 sin tnayay sin ne}
“
by = isin (an/2) sin nd}
1873)
forn = 2.4.6 .te-evensin (nna) = 0
4 by 20 forn even
butforn = 135, sin (on/2) = 41
ay,
mt Tesinnd ..fornedd 828)
+ _ Therefore the expression for Cys given by,
G =(4288y" =e Gace
1s | te Bt
tion
Scar
aT Ne
miter
1
9
aun Ml. 5.342 Equivalent ciel of SC ayy
characteristics of SIC BIT
Table $213 ents important charaetetles of Sig
naracterlaties of SIC-BJT
ea
Value
Parameter
wo.|
+. | oC ewrent gain
2 | collector emitter saturation
voltage Vee)
3, | coiector emitter ON state | 171026ma
existance
3.4 V typically
4,_ | Base emitter saturation voltage
5.32 GaN Power Devices :
= Today awide range of GaN (Gali Nitride) devices ae
eirg volume produced, and are replacing the wel
established and widely used silicon based MOSFETS in
various applications.
= the GaN based power switching devices are used
because they offer the following advantages.
6.32.1 Advantages of GaN Devices :
= Greater efficiency.
~ Better and higher power handling.
~ Other important performance attributes.
~The GaN power suitching devices are being used in
following appications,
5322 Applications of GaN Power Devices
'n power supplies,
LEENA es
In
the motor control applications. j
1
4/ Electncal / Muy
eae
pe0s S58,
er commercial na plea,
ia Thee mode
pane enreren IPR ALCMOIK aprons tamobieeh
a WY Gan? = Thisisa deci
" ae ensting silicon based power MOSFETS have been | §:32.5 High El
iy suecessiul In a vOreLY of Boner electronics (HEMT!
application - HEMT is ade
has been a continuous improvement in
rete at tte | Gat nae ti
5.32.4 Classification of GaN Devices :
rporont ettiBUts SUCH 35 ON Sate resistance Ry, on
vojrage rating’. HtchIN9 speed, packaging exc
owever, these Improvements have simost reached to
the best possible values and thee is a very tle
vance of much futher improvement in ther values,
‘he slicon MOSFET parameters have reached ther iit
aye 10 the limit decided by the underying Fundarnental
prysics of the matefal slicon and the assocated
processes -
‘hat i¢ why @ new material called Gallium Nitride (Gan) | ~
jsused for the power devices instead of scon,
the GaN devices are broadly classified into m0
categories
1. Devices operating in enhancement mode.
2. Devices operating in the depletion mode
The devices operating in the depletion mode are
normally ON devices.
In order to turn them OFF we need to apply 2 negative
gate voltage with respect 0 the drain and source
terminals.
‘The enhancement mode (e-mode) GaN transistors are
normally OFF devices and we can turn them on by
applying a positive gate voltage.
The depletion mode transistors have the start up
Issues.
That is, when the power Is applied, we have to apply @
negative gate bias first, to tutn it off, and avoid the start
Up short circuit,
This problem can be solve and the depletion devices
€n be converted to normally OFF devices by | 5
Packaging them in a eascade configuration with » low
voltage silicon MOSFET.
‘Similarities:
5.32.6 Advan
Higher elec
GON devi
tesitance
Lower ON
Higher brs
Extremely
Very goo
Reduced)
Higher e
5.32.7 Gab
There 2
devices
‘Tho ter
= like a
termi
2 impor
= like s
@Nn
break
2
- for ce Tae
| no. Power est Power MOSFET
-T commutation | Netesea
“p | core y Not necessary Not
nae necessary Not necessary
ae
Biocking Symmetrical “ag 5
o 5
[owe | YMmetrical Asymmetrical Asymmetrical
[remersure | Woganeg I Negative N
aia egative Positive Flat
Thermal Possible Pos
Ne
i sible Not present Not prasent
34, | Parallel Extemal equalizing ‘Equalizing circuit =
it to parallel
ee operation. Sircuit is necessary. | required one “oeomte
6.4 Silicon Carbide (Sic) Devices :
531.1 Silicon Carbide (Sic) ;
5.31.2 Advantages of SiC Devices
2. They have three times higher bandgap.
3. They have three times higher thermal conductivity,
4. Sic power devices offer lower switching loss
5. They have lower ON state resistance
& They can operate at higher temperatures
their size is small
all the power semiconductor devices which we had
discussed are silicon based devices,
However these devices have a limitation on their
performance due to the inherent characteristics of
sitgon.
Hence the silicon based power devices are unable to
meet the future demands of high voltage, high
efficiency and high power density applications.
The sifcon carbide (SiC) is the only compound of silicon
and carbon which does occur naturally but is extremely
rate.
This material has become the material of choice for the
next generation power semiconductor devices, hecause
35 compared to silicon based devices, the SiC devices
have the following advantages,
1. SiC power devices have ten times higher dielectric
breakdown field strength.
5.31.3 Important Features :
Some of the important features of SiC power device:
are as follows :
Higher breakdown voltage.
Higher operating temperature ranges.
Higher switching speeds.
Loner ON state resistance,
Reduced power loss.
Smaller size.
Higher efficiency due to reduced losses.
igher current density
Due to all these advantages, features, the silicon carbid
Power devices ate finding more applications despit
their high price as compared to silicon based devices.
~ Some of the important applications of SiC devices are ¢
follows :
5.31.4 Applications :
- SMPS
~ Solar inverters
- EV chargers 8
- UPS
= Induction heating equipments
- Motor drives
- Wind power converter.
chew
vopueatie| ee vontrones inn,
iW
conan Vp v0tS 10° fll coma
. > Therefore t
ie centguoton) and cameye ter
2V_. Ol for Me conouration festl
| DC motor speed control ~ Sinitarty 9
nal pater ar9ee cuodeant
———T ual Converter ; for
me 6.8.1 Single Phase Di r for a less
~ Thesver
as
pay) = The direc
Forverany questions] tes
inne os
Siri prince of operation of ual Converter yy heave
wapoutceuaingcuert. (DEC. 18,10 Hayy = thiscon
aie 2.2. Draw the sicut and explain the Working of sing ~The ave
mis known | | @
phase dual converter with” relevant Yohany os
wwavefome. (Dee. 17, 10 ark power
s shown in = Te te
@.3 illustrate the’ diagram and the output vetage (228) Fig. 6.8.3 : Waveforms fora single phase dual Benera
wavelorms of a controlled rectifier suitable for fur comer - Thee
£, ‘quadrant operation, What are its applications 2 682 Four Quadrant Operation Beas
{Dec 49, 10 Markey [Mu Occ. 15, Dec. 19 i
ade
= The circuit iagram of a single phase dual convereris a
nal 2s shown in Fig. 6.8.2. 4. With the circuit diagram and waveform, explain the
90 fll Rescgr "principle of operation of cus! converte, wih and
nian without circulating curent. (Dec. 15, 10 Marks) i
sfore the .2_ilustrate the diagram and the output votage »
‘waveforms of a contol rectier suitable for fur
quadrant operation. What are its applications ? Mee
overs ° ar
"e (Dec. 19, 10 Marks)
; ~The first full converter is capable of operating in two
er i
ea F-comenori—t—— b- Convener Quadrants depending on the value of fring angle a.
ng, for
For the values of a. less than 90°, this converter works as
0-227 Fig. 6.8.2 : Circuit diagram of a single phase dual i
a rectifier, there by producing 2 postive average load |
pind converter Voltage and load current and operates in the first
Mt the | — AS seen from the Fig, 68.2 there are two single Phas uadrant.
tne commutated full converters connected back to beet ~ Where as for values of a greater than 90°, it works in
s been to drive a common load, the inverting mode, making its average output voltage | ¢ 2555
rin the | ~ a ti
The load in this case ie the armature winding of negative, -
Soar excied OC, motor ~—Theload current however mais poste, _1_— ‘gulater
4 off the
‘5 finer
se wolage
ine of tc
lve, then
ouput
vyele and
‘ted in
wes
a2
as
(078 Fig, 10.81: Casifeaton of SPS
= The SMPS are casifed broadly into two categories
amet:
2, Nositolited ypeand 2. Isolated ype
= Noelecwica icltion is provided between the load and
cure in the nonisolated ype SMES,
Whereas 2 transformer is included for provicing the
lecrcal isolation in case of the isalated type SMPS
10,9 Step Down or Buck Switching
SP Regulator: COTTA
Elan the working of a BUCK switen move
regulator ecu Draw the folowing waveforms
1. Inductor eument 2. Supply currant
3. Load eurent, (May 13, 10 Marks)
Derive the expression for the culput voltage and
‘curent or the cut mentioned in Q, 1 in tems of
input vallage and curent respectively,
(Way 14, 10 Marks)
Explain wit nat rei eiagram and waveform he
operation of Buck converter and derive the
‘otression oviut voltage inductor eurret pple
snd output votage ripple, (Dae. 16, 10 Marks)
‘Mention any two applications of de to de converter.
raw the cisgram of © Buck de to de converter and
Stan the incuctrvolage, Inducer eurrent and
(Dec. 18, § Marks)
A buck regulator a de-de converter, wth a varable de
utput vltage that can astume values between z2/0
and the de input voltage.
5 as
‘me maxim
1 fave py
cuts i 98
ths cuits tmted te vg
‘practical Duck switch
nF. 109,
the iy
9 mode regi
% votage of
votage
"I shown
= |
ers Fg. 103
cam
tenancy
theta discern
cami ntsshomatneoare en
te san devel tom be ca 2
network, comparstor —
hog ruber
nd reer source,
= Abo notethat the buck regulates same athe eis 4
step down chopper dicussed in eatin ts capes
= Capacitor Cis the input fte eapsctr hat iy be
connected to reduce the rope in the OC input
voltage Ye
= Land € form an UC fiter that connected to reduce the
‘ple contents in the output ofthe cet
= Dhy is the treewhecling diode. place of transistor
we can connect any other pewer switching vie ke
MOSFET or (68,
= Werder to reduce the siting tess in the
sitchin fequency shoud be elected to Be one tenth
ofthe maxinurn spied sitchin equ of
Operation:
= tn the Fig. 109, Qy Is 2 pomer aster whichis
tumed ON and OF by the rectangular pues pied
itsbase
+ _Wemay connect anyother power senisondicor sch
ins pace.
= Om isa freewheeling dade, whe (and ¢ form ow
ass filter, isthe unregulated de Powe! SUPP:
~ As discutsed eave, we can vary He arene eMPSE
‘tage by changag etre sce FARES?
~ In most application the varavon of 647 9S
‘referred to variation in frequen
oc 12 06 conve
IN teen or acrage oto wage in toms of
9 Oe cven by
% sony,
0931
Te duty cle “0° can be vated between 0 and 1
‘heer seagesutptvelage wil vary beter 0
andy,
42 s1en9e onput vlage Vi vs han oF equal 10
Ws cut cae asthe “thing buck regulator’
Step coun senting regulator
Wavetorms and operation
Operation
The buck converter it 3 step down type switching
pda,
Tei vay sia to a step down clas A chopper The
‘operation i ded into tao made
Nose (hen ison}
When Q, is tamed on the input de velage gets
commeced athe input ofthe LC te,
The output vekage is hela conan bythe lngewaise
capaci,
Tw cuten trough L inteasesneaty fof
‘Theinpt caren ows trough Qs inducer. capacer
and he load eesitance Rae shown in Fg. 10821
220 fig. 10..2(0):Equlvalen eit for
‘model (buck converte)
Energy is gven tothe LC iter and the load during ths
mode of operation, The diode Dy. is verse based and
remains oft
Modo (When Qs s OFF):
‘Tis emodebegine at = 1, when Q: is tuned off Dut to
the interruption in cacent, there i a st induced
otage which appears across the inductance
Tis volage fonvard biases diode Dyy (which is ao
called ascateh ode.
“The oad curent stants owing tough the Day
wie 1.8 Power Electronics
nd the forward break over voltage, the
erative phenomena.
oltage (Vgo), SCR
treated as an open
a. When the voltage is increased beyo
device SCR gets destroyed, because of the regen
b. When the voltage is less than the forward break over V
offers a high impedance. Therefore a thyristor can be
switch, even in the forward blocking mode.
3. Forward conduction mode
When the SCR is forward biased, and the gate circuit is open, J), J, are forward
biased. J, is reverse biased. Under such circumstances, a small leakage current
flows because of the minority charge carriers only. If the anode voltage is
increased to a value of forward break over voltage because of the avalanche
phenomena, the Junction (J) will break down. Immediately the SCR can be
brought back from the forward blocking state to the forward conduction state.
When the SCR is turned on, the voltage drop across the SCR falls to 1 or 2V and
the current through the SCR increases to the rated value. The Current through the
SCR is limited by an external impedance in the circuit. During the f & ‘
conduction mode, the SCR will be treated as closed switch, ile Cane ee Se ee
This statis known as reverse blocking state or of
the reverse biased voltage,
4.5 Tavarston Equivaten;
The equivalent cituit of an $.¢
Tepresented as shown in Fig.
Fespectively during off and on sta
During the
Tepresented wit
‘Ray be
and *b’
te,
Nx= voltage drop across SCR when
vated current is carried by it,
Paring the “OFF” state, an SCR acts
aS 4 high impedance device,
iT Circurr
() Equivalent
kt durin
off state
(b) Equivaient
ckt during
n state
Figure 1.9
Sein Gomtrolled Rectifiers 4.7
locking mode
ee ‘eon When cathode is made positive with respect to anode
Se eora Jcued 4 are reverse biased where a5 the junction ys fenes
Hasta Usderthle song a stall leakage current which is of the pder of
EES emapatcs oor wie ice So. the SCR which is treated asa switch, wil
tein the off sats condition. Wars te reverse voltage is increased continucusly,
Hiialcnositge, a siiealerak ae level, called reverse break down voltage
agin be tached Ai atinimat eee ea Phenomena occurs at and,
jee csleginceurent Sharply. A lorge current associated withthe voltage (Vy)
died fits (o'er eter tk We ee Power dissipation will increase to's
Shauitous level-abich tay deamiy ue dere
Forward condue-
tion (on-state)
(amp)
Latching current
Holding current
Reverse
leakage curent
“v,
Yao ag Wa
Forware
(locking
state)
Forward leakege current
1, = gate curcents
fx f S Reverse
Setecking region
\\\<
(b) Statte vet characteristies of an S.C.
(2) Elementary circutt ror obtaining S.C.R
VA charaetersties eee
If the voltage applied across the device is less than the reverse break down
ulate, the device will behave as a high impedance device (ie) open eiteut in
the reverse direction.
2. Forward blocking
When anode is made positive with respect
[pihecathode, the SCR is said to be forward
biased. During the forwend biased condition
junctions, J), Jy are forward biased and Jy
eters biased. In this mode, small
leakage current which is of the order of
(RE amperes will Now in the circu,
the forward Voltage is increased to Veo
forward break over volta, se), then the
Be), le
{ietion J, which is reverse biased will
down because of avalanche phenomena Figure 3.10
Forward leakage
e, current Power Electronics
2.38
Line current
Fundamental
current
@F
i
af Ree OL
+
I
fi
Lune corer
current
‘Suppiy volag
io
Figure 2.14(¢) For rectifying mode of operat power Elecuvr'-”
2° oltage may be derived as
jt ¥
The RMS outp4
c.
Epms~ s¢
_ [ERIC 32 40
“lon 2
a
Y
Ts fi — cos 2utd(wt)
B 3
JE2 sin 2at dior) a
a
En | On
a
1. sin 2ot}*
ot By | pejot- 5
:
a
sin 2a, I
pf __sin2B
~ Fm [to-w 29
Erms= Em (2) 4 Sin2a. sin 28
2n 4n
,
(for discontinuous conduction)
For continuous Conduction
Bente
1 sin2a 2
Exms~ E, [3+ “2a 2
2 4x
2.13 Eree,
as Sounc aacef
pee AO FULL Cae IMPEDANCE ON-ruc BA-----. . Phase Controlled Rectifiers 2.37
‘om source to load and hence the circuit acts as a rectifier.
ase two modes are ke
1, Reotifying mode a
7. inverting mode t
(. rectifying mode +e
Doring the jnterval o to x, the supply voltage E, and load
| erent 1, are positive and hence power is delivered from Figure 2.14(b)
arce 10 joad. During the interval nto m +a, the supply voltage is negative and
| he load current 1s positive which results the power to flow from load to source.
| ut the net power flows from source to load as (n — &) > o.. For & < 90°, the
:
power flows fr
2E,
| (Eg.) =o » for a= 0.
dinswite mode
When the SCRs are triggered at the firing angles o> 90°, Inverting mode of
operation takes place. In this mode, the net power flows from Joad to source. The
voltage and current waveforms corresponding to rectifying mode and inverting
mode ere shown in Fig. 2.14(c) and 2.14(e) respectively.
The average output voltage is derived as
1
T
ec
8 }
fEnsinor dor)
! a
E, [cosat]t
En
! E. Figure 2.14(¢)
™ (cos B - cos.) = . (cos a - cos B)
x
for continuous conduction mode,
Bante
En [cos a — cos (r +)
7
0.
2E,
—® cos a.
Es
.
The average output current is given aS
2E,
I, Rn cos a. e
v
a
2.36 Power Electronics
pce CrrcuIT WITH (R-L) Loa
ith (R-L) load is as shown in figure ‘
Jained in different modes M4,
y ConTROLLED Bru
trolled bridge circuit WI
e exp
2.12 Fu
The 16 fully co
Its operation principle may
Mode 1: During the positive half
eycle of the supply voltage, the
thyristors T; and T, are 19 the
forward biased condition and the L
thyristors T; and Ty are in the ac supply
reverse biased condition. To
ensure simultaneous firing of T),
T, pair and T3, T, pair during
positive and negative half cycles
of the supply voltage respectively
they should be triggered from same
firing circuit.
Figure 2.14(a)
In this mode, T, and T2 conducts. The load current follows the directions
shown below.
L-T,-P- load-R-T,-N
es the load current is assumed to be con:
supply voltage gets reversed but due to the
+ 2 Tesenc:
parang ise current (load) is maintained in ths seme jel ae end
gnitude. Hence, the thyristors T, and Ty are in the cor ene cou
supply voltage reaches zero. nducting state though the
stant. At the instant ct = x, the
Mode 2: During the negative half cycle of
and T, are triggered simultaneously at an insta
T, and T, are commutated by the negative ee +o.
them through the thyristors T; and T, respecti ine voltage
follows the path as shown. ively. In this
the
'¢ supply voltage, the thyristors T;
ith this, the thyristors
which reverse biases
mode, the load curren!
N-Ty-P- load-R-T
At the instant wt = 2a, the thyristors T; and 7 -
state due to the presence of load inductance as describegetl! in the ducti
ed ab conducting
By the control of phase-angle of the firing pulse whigh
es 2-1 80°. chi ei
of thyristors in the range of 0°-180°, the average value of the PPlied to te pat
changed from positive maximitm to negative maximum eon“ Vol
Minuousy “Be can be
Gwith fully controlled converters, two modes of o
i il CT atiog
average D.C voltage is reversible even though the curre; Toe
As a result, the power lows in the converter in either direction, in nein The
“ . fection.
ff aT
Forced
Natur
commutation
commutation
Tnyristor tums off
due to anode
[current going below
ty or due 10
application of
reverse line voltage.
of [Nit
Voltage
commutation F|
jcurrent
‘commutation.
Commutation
circuits
costly
Big size due to|
large
‘commutating
[components.
5, [Cost ee
[commutation
circuit
6 |size of the
circuit
due to
[Small
of
absence
‘commutation
| components.
4.2, Comparison between Voltage
342 commutation and Current
Commutation
Voltage commutation | Current commutation
The conducting thyristor is
fumed off due to anode}
current reducing below the
holding current.
[A capacitor is discharged
through the thyristor in
opposite direction order to
reduce its current below hy.
1. |The condueting thyristor
is tumed off due to 2
reverse voltage applied
across it.
2. JA charged capacitor is
‘placed across the!
thyristor in forced voltage
commutation.
3. [line commutation is
exemple of voltage
commutation
‘commutation
of current!
Natural
example
commutation.
Examples of
|commutation
commutation,
pulse commutation,
4 [Examples
commutation
‘Complementary
commutation, auxiliary
‘commutation and impulse,
‘commutation.
, 3.5 Self Commutation by Resonating the
Load (Class A):
er eee) LESEEA ea ee}
Q1 Write detail note on commutation circuits for SCR.
(Dec. 09, 10 Marks, Dec. 10, 7 Marks)
Q.2 Explain any two commutation circuits of SCR.
(May 11, 10 Marks, Dec. 14, 6 Marks)
Q.3 Write short notes on class A and B commutation
methods, (May 12, 10 Marks)
2.4 Explain any two commutation methods of SCR.
* current
Seif
resonant
voltage
Commutation Cire,
G1 shows the SCR circuit that Uses 9 class y
L. Gare commutstng
‘components
A (load
4.1228 Fig. 2.5.1: Self commutation circuit (class A)
The dass A commutation is also called a5 sy
commutation
tn Fig, 35:1 Land C are the commutating components
and Ris the load resistance.
— The commutation components L and C form an
underdamped resonant circuit.
Various voltage and current waveforms and equivalent
circuits are shown in Fig. 3.5.2.
3.5.1 Operation of the circuit =
Refer to Fig. 3.52. Att = ta the SCR, is turned on, the de
supply voltage is applied to the resonant circuit
(0)Gae carve
es
cepa
re
varspt cn, on
or
Ms
eta
“Som, ON SCR OFF Sono
em a
2226) Fig. 3.5.2: Waveforms and equivalent circuits for self
commutation (class A) cireuit 32
EDC (Sem. 4 / Electrical MU)
3.4 Turn Off Process of SCR
once SCR ls tured on, i gets latched int its on Se
and acts like a closed switch.
es control over SCR I
(CR remains in the
The gate terminal los fe, even
though the gate pulses are removed 5
on state
va conduetng CR can bernie oF wth te MIP ofan
2 earn by reducing the anode cute Below its |
otingcuret for airman specifies te:
uring ths tim, the stored charge inside the device will
ad due to interval recombination ond C=rieF
be cemov
veep out
Due to this, the transi
it of SCR come out of saturation and
istors Q, and Qz in the equivalent
center into
cireult
active region.
The values of ay and az
wit decrease and the conducting SCR will tum off. The
process of tum offi also called as commutation.
will decrease, the regeneration
The minimum time required for the recombination and
carver sweep out should be provided before the device
is tured on again.
‘This is necessary for the successful turn off of SCR.
2 Commutation =
Definition :
‘The process of turning off of a conducting SCR is known
as “commutation”.
‘Once the SCR is fired (turned on), the gate loses control
overt.
= Depending on the nature of the source (ec or de) the
commutation can be natural or forced. Different forced
commutation methods have been discussed in this
chapter.
The classification of commutation techniques is as
shown in Fig, 3.2.1.
rutin
yechniques are
the comm
pa jories namely natural
‘As seen from Fig:
” egorized into 10 CED n
bendy mt Tmmanton ceri
commutation 9% orate
‘source voltage is A /
set ee Mrmuttincrcuts ae UTET classified
= Te freed commmarerely cent commutation ond
into two
voltage commutation
l-g.3.1 Natural Commutation : (an
commutation techn
itd tig the difference between
ation ?
(May 10, 10 Marks)
ed off, due to its forward current
rurally, it is said to
Explain ony
with waveforms. What
‘ratural and forced communis
at
When the SCR is turn
agcing below the holding current. M2
be naturally commutated
‘The natural commutation
supply is used at the inpu
in which the source voltage is ac and
9 usually takes place when ac
itof the thyristorised circuits
Refer Fig. 33.1(2),
the load is resistive.
V,=Vmsivet ©)
689) Fig. 3.3.1(a) : Circuit diagram
‘Therefore the load voltage and current will have the
same shape and they willbe in phase with each other.
The current flowing through the thyristor T, is same as
that flowing through R.
‘As shown in Fig. 3.3.1(6), the thyristor current passes
through a natural zero and a reverse voltage appears
across the thyristor thereafter.
0-688) Fig. 3.2.1 : Classification of commutation techniques
T, OFF
0-689) Fig. 3.3.1(b) : Waveform = Itshows that
= Each transistor isgoing to conduct for 180° or x radians. | © ®
= At any given instant of time, three power transistors will . Sor
conduct simultaneously, two of which are from one ee
group (upper three or lower three) and the remaining
cone is from the other group. © © A
= Alter every 60° or x / 3 redians, one of the conducting
transistors is tumed off and some other transistor
0-590) Fig. 9.2.2 : Star and Delta configurations of load
- A B and C in this figure are the outputs of the ‘three
phase bridge inverter
480° Mode with a Star Connected
Resistive Load :
comes in to conduction.
= Therefore there are six intervals in one cycle (360° or 25
radians) of output
= _ Each interval is 60° wide.
Types of load :
The load can be resistive (R type) or inductive
Q.1 Draw a circuit diagram of 3 > inverter in which
control signals are applied to transistors
180° conduetion mode. Draw the waveforms of
gating signals, phase voltage and line voltages:
(May 12, 10.Matks)
(RL type)
- Also we can connect
configuration or delta configuration.
the load in the star (wye) 8.4 Performance Parameters of
Inverters : Cnr
IIs
‘Weite and explain the
‘an inverter.
Performance parameters of
(Dec. 15, 10 Marks)
The output of practical inverters c¢
‘ontains harmonies and
the quality of an inverter is no
mally evaluated in terms
of following performance parameters :
2. Harmonic factor of n™ harmonic,
2 Total harmonic distortion,
3. Distortion factor.
4. Lowest order harmonic.
8.4.1 Harmonic Factor of n™ Harmonics HF, :
‘2.1 Write and explain ihe performance parameters of
an inverter. (Dee. 15, 10 Marks)
The harmonic factor is a measure of contribution of
individual harmonics,
It is defined as the ratio of the rms voltage of a
Particular harmonic component to the rms value of
fundamental component.
Mew re
F HF = ya 8.41)
where —Vonme = RMS value of the n® harmonic of
output voltage.
Nd Votms = RMS value of the fundamental
component.
8.4.2 Total Harmonic Distortion (THD) :
CEE
ra
: in the performance parameters of
ve and vie (Dec. 15, 10 Marks)
an inverter.
The total harmonic distortion is a measure of the total
~
Single P}
7 — ver,
(, oa v “a ean,
"Te NG" ay
‘Where, viv,
1
THD =
~ a¥@ the rms voltages at secong theg
harmonic frequencies
THD thus gives the total harmonic content
8.4.3 Distortion Factor DF:
Cay
paramere of
(Dec. 18,40 Marks)
THO gives the total harmonic content but it does ay
indicate the level of each harmonic component.
2.1 White and explain the performance
an inverter.
Ta fiteris used at the output ofthe inverter, th higher
‘order harmonics would be attenuated more efectney
Therefore a knowledge of both the frequency andthe
magnitude of each harmonic is important.
The distortion factor indicates the amount of harmeric
distortion that remains in a particular wavetorm afer
the harmonics ofthat waveform have been subjected to
a second order attenuation. (ie. divided by a4).
Thus OF is a measure of effectiveness in reducing the
unwanted harmonics without having t0 spect the
values ofa second order load fiter. DF is defined as
ue
r
(5 cmn*y)
DF = ym [0vei2y" + 0/3")? asa? +]
ee 844
Voime
a
(849
8.4.4 Lowest Order Harmonic LOH :
f
id explain the performance parameters o
Se ise Doc. 16, 10 Marks
mpltude of the harmonics present ia the output of
ampli
rnverter except the fundamental component.
i
it is the measure of closeness in shape
In other words
its fundamental component.
form and its fun
between a wavel
The lowest order harmonic is that harmonic component
whose frequency is the closest to the fundamental -
and its amplitude is greater than or equal to 3 % of
fundamental component
The THD defined 25. NE PEDC (Sem.4 Electrical Muy
~ _ {The on-state voltage across the Mi
saturation region),
'OSFET is high in the
‘The MOSFET is in the cut-off state when the ‘gate sourcs
Wolag® Voss less than the threshold voltage v, ;
estoy
The device must withstand to the applied voltage and to
avoid the breakdown the drain to source breakdown
voltage should be greater than the applied voltage,
The breakdown takes place due to the avalanche
breakdown of the drain body junction.
‘When a larger positive gate to source voltage is applied
Power MOSFET goes into the ohmic region where the
drain to source voltage Vos jy is small,
In this region of operation the power dissipation can be
kept reasonably low, by minimising the on-state
voltage.
In the saturation region the drain current ig is almost
independent of the drain to source voltage Vos.
Itis only dependent on the gate to source voltage Vas
In the saturation region the gate voltage Ves is greater
than the threshold voltage Vcs ja) and the drain current
increases with increase in Ves.
Conclusions from the static characteristics :
= The important conclusions from the static characteristics
are as follows :
1 The MOSFETs are voltage controlled devices ie. the
output current can be controlled by varying the
gate to source voltage (Ves -
2. With increase in Ves the drain current will increase.
3. The gate to source voltage ( Vos ) should be large
enough to drive the MOSFET into ohmic region.
Practically the minimum Vs required is about 12 V.
If Ves is tess than 12 V, the MOSFET will operate in
the active region which is not desired.
4, When the forward voltage Vos applied to the
MOSFET exceeds the breakdown voltage 8 Voss
the avalanche breakdown takes place. Operation
above the breakdown voltage must be avoided, to
rotect the MOSFET.
5. ihe second breakdown does not exist in MOSFETS.
‘other Power Semiconductor Devices
5.17. Sate-operating Area (SOA) of a
Power MOSFET
7 The SOA is a graph of fog Vos on X-axis versus log (1s)
(On Y-axis as shown in Fig, 5.17.1
‘eg (lp)
|
low Tyas lite
Pulsed
operation
0C operation
'99 Vos)
(0-423) Fig. 5.17.1 : SOA of a n-channel enhancement mode
MosFer.
~ Note that second breakdown is absent.
— In order to ensure a safe operation the device should
‘not operate out of the SOA,
~ “Three factors determine the SOA of the MOSFET, Ipy the
‘maximum drain current, T, the junction temperature and
the breakdown voltage 8 Voss
— ote that the MOSFET does not have any second
breakdown problem like BIT.
=. The SOA for the DC operation is the shaded portion of
Fig, 5.17.1 whereas for the switch mode applications the
SOAs a square,
=, The forward bias safe operating area (FBSOA) and the
reverse bias safe operating area (RBSOA) for a power
MOSFET are identical.
= From the SOA itis evident that
1. If the junction temperature (7) is increased then
the MOSFET should be operated at reduced values
cof maximum drain current in order ensure safe
operation.
2. OC opération means continuous operation of the
device.
3. Fér pulsed operation (discontinuous operation),
the values of maximum drain currents would be
higher than that for the continuous (OC) operation.
‘As we reduce the pulse width the value of
maximum drain curent will increase without
damaging the device. “2 Wie short oles on te Yansistor analogy of SCR,
(Dec. 13, 7 Marks)
2.3 Drow and exgiain the two transsor mode! of a
Ahytser and dere an excression for the anoda
‘corer n terms of tha common base cUent gain
‘of herons. (Dec, 15, 10 Marka)
2.4 win the help of two tonsistor snalogy of SCR,
trill eniain why gate loses ts contol once SCR
Istumed ON, (Dec. 18, § Marks)
0.5 With the help of Wo transistor analogy, describe
‘be principle f operation af SCR.
(Dec. 19, 10 Marks)
The operation of SCR canbe explained with the help of
the one &mensionsl model as shown a Fig. 25.2,
130 Fg. 23: Two transistor equivalent rut of @
‘hyritor
= The devices considered tobe an ideal device.
= Alow tequency equivalent ceuit made up of @p-m-P
‘and mp-n tants Q, and Q, as shown in Fig, 25.
ich’ easly derived frm the one dimensional model
fan SCR
[SCR operation :
The anode is made postive with respect to cathode and
‘gate curent supped.
~The gate curent acts s bae cuent for Qy and it urns
‘on hs callector cent = starts lowing,
= But collector cument of Qy acts as base current for Q
hence stars conducting.
= 5 collector curent ky By
flowiog.
Wee ae lo ieee eames aaa
1 Br he now stats
The colecoreurent
nd colector curert
of,
10 arn toe cron
1) miom a se co
(HS ype oF connec
connection, the caren
imubiplcaion tes place which i cae as camuinve
CUFENE ulation and both the wacsitor wil
The saturated van
WO ar equhalnt 19 cs
witches, iy
Hence the SCR wil get ated ino on sate and ais as
closed site,
ven ifthe gnte curent i reduced t0 20 the 140
Inve wansstors wl supply base cument to eich
‘other anc hence wl reminin saturation.
= Mmce once latched the SR does net tn of even
se reduce he gia cent 208)
Expression forthe anode eurrent:
1 Assume that both the wanssons and Quin Fig 252,
{316 Inthe active region. The tansitr common base
2nd commen emiter cent gine ae; 3nd By
respectively,
2. bipolar wansisor can be described ints ate resin
atlow fequenes by the bee Mot equations.
Forshe vansstors , and Q; these equations are
fa =m tle sw
Bad ky = eal her asa,
‘Where ler andes a6 the leakage curents of the
aoe
ant a hy 233)
3th we mote that y= hy and that ke 8 + Kean
Seting the sum of al the curecs into ore of the
twanstors to 200, then
From the Fig.253,
fy slate 09
4 but bp thee
258)
+l slate
5 it yy eet,
Nok sor ek
but by
256)
hae ea #0 by +,
he Scrla hens ailo he 57
6 Bet te =i rhantty oy
Substiuing all these vaes, Equation GET be
vite,
MOND +L rok ks W282)
ety h-ae =o +h eas
7. “nthe being nate
289
1) eae ofa, + a i
‘uch less thn uty hence the denen ge
and anode canentisqute sma
How does SCR tun on?
= WEqunion 255) 2 nga he ais fa, and ae
smal the ade cetyl lon tod SER wil
beinteotte,
= 1 ta, + a) approsehes unty the denominator of
Equation (2.55 wl be very sralland SCR wi beat the
berakdown pint way %9 eter ita the aston
~The curent guns of the po antos QandO
would be Nah (grater an ene) and the clecter
‘caret of one tarsior cts as base came fo the
‘otheroneand gets lip by caret gin.
= Tis eat then aga acts as base cunt fest
‘rancor and gets uli by is caren gia
= Ts cumulative cuet mutpteation ston wus
soon icra the anode curt to such abe that
SCR wi eter in ite Ors,
= Theme num on proces of CR.
How do th values of "crease?
Thee tothe nam on process to understand how the
aes of and oy of © WaRtoR Q) and
incease fom the smal valves in blocking state 10
te ghee aes required totum SCR on SEELE Sem 4 / Electrical ay) 2 iis
Reverse recovery time t, : The reverse recovery | Difference between SCR turn off time and clreult tun off
‘ime tw is the time required for the minority carers
{© recombine with the opposite charges and get
neutralized, Its the time from zero crossover point
OF SCR current to 25% ofthe peak reverse recovery
current
4. Recombination time t,.: This is the time required
for the recombination of excess charges in the
‘middle pn junction J, A negative reverse voltage
will reduce this time,
26.4 Turn-off Time (t,
~ Device manufactures specify a turn-off time t, for thelr
‘SCRS, which represents the minimum time SCR should
"main in the reverse blocking mode (i. reverse biased)
before any forward voltage is reapplied.
~ That means for successful commutation (turn-off) of
SCR it is necessary to reverse bias it for a period equal
f0 oF greater than (t,) before reapplying a forward
voltage.
~ _ASshown in Fig. 2.63 the turn off time (t,) of SCR is sum
Of reverse recovery period (t,) and the recombination
time (t.) and is of the order of 40 uS to 200 uS, Thus
te = tt he
~The turn-off time of SCR is dependent on:
1. The current through SCR (1,) ‘
(26.2)
2, difdt at the time of commutation (turn-off)
3. The junction temperature and
4. Magnitude of reverse voltage
— Increase in the valves of factors 1, 2 and 3 will increase
the turn off time, whereas with increase in the reverse
voltage the turn off time will decrease.
The commutation circuit used to turn off SCR must have
a turn off time ty greater than t, for successful
commutation.
2. Circuit turn off time tor > b (263)
{All possible efforts should be made in order to minimize
the turn off time.
time:
~ SCR turn off time is the time taken by the conducting
SCR to completely turn off. It is denoted by 4,
~The circuit tum off time tyy is the time for which SCR is
‘reverse biased by an external commutation circuit, to
‘ensure successful commutation,
Roverse recovery charge Qy :
~ tis defined as the amount of charge which has to be
recovered during the turn off process.
~ tis the area enclosed by the path of reverse recovery
current (shaded portion of iit) in Fig. 2.6.2)
~ The value of reverse recovery charge Q,, depends on the
rate at which the anode current decreases and the peak
value of on-state current before turn off
— Reverse recovery charge decides the time required to
tum off SCR.
= Larger Q, more is the time required to turn off and
slower is SCR.
The tum on and tum off te of SCR are important]
because they decide the maximum. switching
frequency of SCR. These time periods also decide|
the power dissipation taking place in-SCR at the|
time. of turn on and tum off. Ideally the turn on and
{um off time periods are zero and practically they
should be as short as possible,
“2.6.1: Calculate the peak reverse recovery current for
‘SCR, if the reverse recovery time t= 10 see
‘and reverse recovery charge Q,, = 150 iC.
Soin. :
Given: t= 1045, Q, = 150 uC
Peak reverse recovery current = 2“ Reverse recovery charge
Reverse recovery time
og 2%Qo _ 2150x104
tw 10x10
= 30A Ans.
2.7. Various Losses in Power Devices
~ There are various static and dynamic power losses that
take place in any power device.
~The ‘classification of power fosses is as shown in
Fig. 27.1. EDC (Sem. 4/ Electrical
Tis power patn can be eced by opti
takes of at arent ding he ta oe tena
For this reason the gate cx =
ret ape ioe ge
grautol pn ene oc grasa ato
sete proceeds sho nig 262
oe
Increased ampttude to reduce
the power ipa eB bine
Socom)
Gate current with an initial large value
30 Fig. 24
2.6.2 °Turn-off Process :
‘once SCR is turned on, it gets latched into its on-state
and acts like a closed switch.
‘he gate terminal loses control over SCR ie, even
though the gate pulses are removed SCR remains in the
on-state.
Acconducting SCR can be turned off with the help of an
extemal circuit, by reducing the anode current below its
holding current for @ minimum specified time,
= During this
be removed due to internal recombination and
