TC1301A/B

Dual LDO with Microcontroller RESET Function

Features Description
• Dual Output LDO with Microcontroller Reset The TC1301A/B combines two Low Dropout (LDO)
Monitor Functionality: regulators and a microcontroller RESET function into a
- VOUT1 = 1.5V to 3.3V @ 300 mA single 8-pin MSOP or DFN package. Both regulator
- VOUT2 = 1.5V to 3.3V @ 150 mA outputs feature low dropout voltage, 104 mV
@ 300 mA for VOUT1, 150 mV @ 150 mA for VOUT2,
- VRESET = 2.20V to 3.20V
low quiescent current consumption, 58 µA each and a
• Output Voltage and RESET Threshold Voltage typical regulation accuracy of 0.5%. Several fixed-
Options Available (See Table 8-1) output voltage and detector voltage combinations are
• Low Dropout Voltage: available. A reference bypass pin is available to further
- VOUT1 = 104 mV @ 300 mA (typical) reduce output noise and improve the power supply
- VOUT2 = 150 mV @ 150 mA, (typical) rejection ratio of both LDOs.
• Low Supply Current: 116 µA (typical), The TC1301A/B is stable over all line and load
TC1301A/B with both output voltages available conditions with a minimum of 1 µF of ceramic output
• Reference Bypass Input for Low-Noise Operation capacitance, and utilizes a unique compensation
scheme to provide fast dynamic response to sudden
• Both Output Voltages Stable with a Minimum of
line voltage and load current changes.
1 µF Ceramic Output Capacitor
• Separate Input for RESET Detect Voltage For the TC1301A, the microcontroller RESET function
(TC1301A) operates independently of both VOUT1 and VOUT2. The
input to the RESET function is connected to the VDET
• Separate VOUT1 and VOUT2 SHDN pins
pin.The SHDN2 pin is used to control the output of
(TC1301B)
VOUT2 only. VOUT1 will power-up and down with VIN.
• RESET Output Duration: 300 ms (typical)
In the case of the TC1301B, the detect voltage input of
• Power-Saving Shutdown Mode of Operation
the RESET function is connected internally to VOUT1.
• Wake-up from SHDN: 5.3 µs (typical) Both VOUT1 and VOUT2 have independent shutdown
• Small 8-pin DFN and MSOP Package Options capability.
• Operating Junction Temperature Range: Additional features include an overcurrent limit and
- -40°C to +125°C overtemperature protection that, when combined,
• Overtemperature and Overcurrent Protection provide a robust design for all load fault conditions.

Applications
Package Types
• Cellular/GSM/PHS Phones
8-Pin DFN/MSOP
• Battery-Operated Systems
• Hand-Held Medical Instruments TC1301A
DFN8 MSOP8
• Portable Computers/PDAs
RESET 1 8 VDET RESET 1 8 VDET
• Linear Post-Regulators for SMPS
VOUT1 2 7 VIN VOUT1 2 7 VIN
• Pagers
GND 3 6 VOUT2 GND 3 6 VOUT2
Related Literature Bypass 4 5 SHDN2 Bypass 4 5 SHDN2

• AN765, “Using Microchip’s Micropower LDOs”,

DS00765, Microchip Technology Inc., 2002 TC1301B
DFN8 MSOP8
• AN766, “Pin-Compatible CMOS Upgrades to
BiPolar LDOs”, DS00766, Microchip Technology RESET 1 8 SHDN1 RESET 1 8 SHDN1
Inc., 2002 VOUT1 2 7 VIN VOUT1 2 7 VIN
• AN792, “A Method to Determine How Much GND 3 6 VOUT2 GND 3 6 VOUT2
Power a SOT23 Can Dissipate in an Application”, Bypass 4 5 SHDN2 Bypass 4 5 SHDN2
DS00792, Microchip Technology Inc., 2001

© 2008 Microchip Technology Inc. DS21798C-page 1

TC1301A/B
Functional Block Diagrams

TC1301A TC1301B
VIN VOUT1 VIN VOUT1
LDO #1 LDO #1
300 mA SHDN1 300 mA

VOUT2 VOUT2
LDO #2 LDO #2
SHDN2 150 mA SHDN2 150 mA

GND Bandgap GND Bandgap

VOUT1
Bypass Reference Bypass Reference
1.2V VDET 1.2V

RESET
VDET RESET Threshold Time Delay
Threshold Time Delay Detector
Detector 300 ms typ
300 ms, typ

Typical Application Circuits

TC1301A
System RESET
1
RESET VDET 8
BATTERY
2.8V @ 300 mA 2 V
OUT1 VIN 7
COUT1 CIN
1 µF Ceramic 3
GND VOUT2 6 2.6V @ 150 mA 1 µF
X5R
4 5 COUT2
Bypass SHDN2 2.7V
1 µF Ceramic to
CBYPASS(Note) X5R 4.2V
10 nF Ceramic

ON/OFF Control VOUT2

ON/OFF Control VOUT1

TC1301B
1 8
System RESET RESET SHDN1
2.8V @ 300 mA 2 V
OUT1 VIN 7 BATTERY
COUT1 CIN
1 µF Ceramic 3
GND VOUT2 6 2.6V @ 150 mA 1 µF
X5R
4 5 COUT2
Bypass SHDN2 2.7V
1 µF Ceramic to
X5R 4.2V

Note: CBYPASS is optional ON/OFF Control VOUT2

DS21798C-page 2 © 2008 Microchip Technology Inc.

 TC1301A/B
1.0 ELECTRICAL † Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is
CHARACTERISTICS a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
Absolute Maximum Ratings † operational listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods
VDD...................................................................................6.5V may affect device reliability.
Maximum Voltage on Any Pin ...... (VSS – 0.3) to (VIN + 0.3)V
Power Dissipation ..........................Internally Limited (Note 7)
Storage temperature .....................................-65°C to +150°C
Maximum Junction Temperature, TJ ........................... +150°C
Continuous Operating Temperature Range ..-40°C to +125°C
ESD protection on all pins, HBM, MM ..................... 4 kV, 400V

DC CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, VIN = VR +1V, IOUT1 = IOUT2 = 100 µA, CIN = 4.7 µF, COUT1 = COUT2 = 1 µF,
CBYPASS = 10 nF, SHDN > VIH, TA = +25°C.
Boldface type specifications apply for junction temperatures of -40°C to +125°C.

Parameters Sym Min Typ Max Units Conditions

Input Operating Voltage VIN 2.7 — 6.0 V Note 1

Maximum Output Current IOUT1Max 300 — — mA VIN = 2.7V to 6.0V (Note 1)
Maximum Output Current IOUT2Max 150 — — mA VIN = 2.7V to 6.0V (Note 1)
Output Voltage Tolerance VOUT VR – 2.5 VR±0.5 VR + 2.5 % Note 2
(VOUT1 and VOUT2)
Temperature Coefficient TCVOUT — 25 — ppm/°C Note 3
(VOUT1 and VOUT2)
Line Regulation ΔVOUT/ — 0.02 0.2 %/V (VR+1V) ≤ VIN ≤ 6V
(VOUT1 and VOUT2) ΔVIN
Load Regulation, VOUT ≥ 2.5V ΔVOUT/ -1 0.1 +1 % IOUTX = 0.1 mA to IOUTMax (Note 4)
(VOUT1 and VOUT2) VOUT
Load Regulation, VOUT < 2.5V ΔVOUT/ -1.5 0.1 +1.5 % IOUTX = 0.1 mA to IOUTMax (Note 4)
(VOUT1 and VOUT2) VOUT
Thermal Regulation ΔVOUT/ΔPD — 0.04 — %/W Note 5
Dropout Voltage (Note 6)
VOUT1 ≥ 2.7V VIN – VOUT — 104 180 mV IOUT1 = 300 mA
VOUT2 ≥ 2.6V VIN – VOUT — 150 250 mV IOUT2 = 150 mA
Supply Current
TC1301A IIN(A) — 103 180 µA SHDN2 = VIN, VDET = OPEN,
IOUT1 = IOUT2 = 0 mA
TC1301B IIN(B) — 114 180 µA SHDN1 = SHDN2 = VIN,
IOUT1 = IOUT2 = 0 mA
Note 1: The minimum VIN has to meet two conditions: VIN ≥ 2.7V and VIN ≥ VR + VDROPOUT.
2: VR is defined as the higher of the two regulator nominal output voltages (VOUT1 or VOUT2).
3: TCVOUT = ((VOUTmax - VOUTmin) * 106)/(VOUT * ΔT).
4: Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested
over a load range from 0.1 mA to the maximum specified output current. Changes in output voltage due to heating
effects are covered by the thermal regulation specification.
5: Thermal regulation is defined as the change in output voltage at a time t after a change in power dissipation is applied,
excluding load or line regulation effects. Specifications are for a current pulse equal to ILMAX at VIN = 6V for
t = 10 ms.
6: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its value
measured at a 1V differential.
7: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction-to-air (i.e., TA, TJ, θJA). Exceeding the maximum allowable power
dissipation causes the device to initiate thermal shutdown.

© 2008 Microchip Technology Inc. DS21798C-page 3

TC1301A/B
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise noted, VIN = VR +1V, IOUT1 = IOUT2 = 100 µA, CIN = 4.7 µF, COUT1 = COUT2 = 1 µF,
CBYPASS = 10 nF, SHDN > VIH, TA = +25°C.
Boldface type specifications apply for junction temperatures of -40°C to +125°C.

Parameters Sym Min Typ Max Units Conditions

Shutdown Supply Current

IIN_SHDNA — 58 90 µA SHDN2 = GND, VDET = OPEN
TC1301A
Shutdown Supply Current
IIN_SHDNB — 0.1 1 µA SHDN1 = SHDN2 = GND
TC1301B
f ≤ 100 Hz, IOUT1 = IOUT2 = 50 mA,
Power Supply Rejection Ratio PSRR — 58 — dB
CIN = 0 µF
f ≤ 1 kHz, IOUT1 = IOUT2 = 50 mA,
Output Noise eN — 830 — nV/(Hz)½
CIN = 0 µF
Output Short-Circuit Current (Average)
VOUT1 IOUTsc — 200 — mA RLOAD1 ≤ 1Ω
VOUT2 IOUTsc — 140 — mA RLOAD2 ≤ 1Ω
SHDN Input High Threshold VIH 45 — — %VIN VIN = 2.7V to 6.0V
SHDN Input Low Threshold VIL — — 15 %VIN VIN = 2.7V to 6.0V
Wake-Up Time (From SHDN VIN = 5V, IOUT1 = IOUT2 = 30 mA,
tWK — 5.3 20 µs
mode), (VOUT2) See Figure 5-1
Settling Time (From SHDN mode), VIN = 5V, IOUT1 = IOUT2 = 50 mA,
tS — 50 — µs
(VOUT2) See Figure 5-2
Thermal Shutdown Die
TSD — 150 — °C VIN = 5V, IOUT1 = IOUT2 = 100 µA
Temperature
Thermal Shutdown Hysteresis THYS — 10 — °C VIN = 5V
1.0 6.0 TA = 0°C to +70°C
Voltage Range VDET — V
1.2 6.0 TA = -40°C to +125°C

RESET Threshold VTH -1.4 — +1.4 %

-2.8 — +2.8 % TA = -40°C to +125°C
RESET Threshold Tempco ΔVTH/ΔT — 30 — ppm/°C
VDET = VTH to (VTH – 100 mV),
VDET RESET Delay tRPD — 180 — µs
See Figure 5-3
VDET = VTH - 100 mV to VTH + 100 mV,
RESET Active Time-out Period tRPU 140 300 560 ms
ISINK = 1.2 mA, See Figure 5-3.
VDET = VTHmin, ISINK = 1.2 mA,
RESET Output Voltage Low VOL — — 0.2 V ISINK = 100 µA for VDET < 1.8V,
See Figure 5-3
0.9 VDET > VTHmax, ISOURCE = 500 µA,
RESET Output Voltage High VOH — — V
VDET See Figure 5-3
Note 1: The minimum VIN has to meet two conditions: VIN ≥ 2.7V and VIN ≥ VR + VDROPOUT.
2: VR is defined as the higher of the two regulator nominal output voltages (VOUT1 or VOUT2).
3: TCVOUT = ((VOUTmax - VOUTmin) * 106)/(VOUT * ΔT).
4: Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested
over a load range from 0.1 mA to the maximum specified output current. Changes in output voltage due to heating
effects are covered by the thermal regulation specification.
5: Thermal regulation is defined as the change in output voltage at a time t after a change in power dissipation is applied,
excluding load or line regulation effects. Specifications are for a current pulse equal to ILMAX at VIN = 6V for
t = 10 ms.
6: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its value
measured at a 1V differential.
7: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction-to-air (i.e., TA, TJ, θJA). Exceeding the maximum allowable power
dissipation causes the device to initiate thermal shutdown.

DS21798C-page 4 © 2008 Microchip Technology Inc.

 TC1301A/B
TEMPERATURE SPECIFICATIONS
Electrical Specifications: Unless otherwise indicated, all limits are specified for: VIN = +2.7V to +6.0V.
Parameters Sym Min Typical Max Units Conditions
Temperature Ranges
Operating Junction Temperature
TA -40 — +125 °C Steady State
Range
Storage Temperature Range TA -65 — +150 °C
Maximum Junction Temperature TJ — — +150 °C Transient
Thermal Package Resistances
Thermal Resistance, 8LD MSOP θJA — 208 — °C/W Typical 4-Layer Board
Thermal Resistance, 8LD DFN θJA — 41 — °C/W Typical 4-Layer Board with Vias

© 2008 Microchip Technology Inc. DS21798C-page 5

TC1301A/B
2.0 TYPICAL PERFORMANCE CURVES
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

Note: Unless otherwise indicated, VIN = VR +1V, IOUT1 = IOUT2 = 100 µA, CIN = 4.7 µF, COUT1 = COUT2 = 1 µF (X5R or X7R),
CBYPASS = 0 pF, SHDN1 = SHDN2 > VIH. For the TC1301A, VDET = VOUT1, RESET = OPEN, TA = +25°C.

350 3.00
TJ = 25°C TJ = 25°C
TC1301B
Quiescent Current (µA)

300 IOUT1 = IOUT2 = 0 µA IOUT1 = 100 mA

Output Voltage (V)

VOUT1 Active IOUT2 = 50 mA
250 2.90
VOUT1
200
2.80
150 VOUT2 Active VOUT2 SHDN

100 2.70
50 VOUT2

0 2.60
2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6.0 2.7 3 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6
Input Voltage (V) Input Voltage (V)

FIGURE 2-1: Quiescent Current vs. Input FIGURE 2-4: Output Voltage vs. Input
Voltage. Voltage.

1.8 2.90
1.7 2.85 VOUT1
SHDN Threshold (V)

1.6
Output Voltage (V)

2.80
1.5 ON
1.4 2.75
1.3 2.70
1.2 VOUT2
2.65
1.1 OFF
2.60 TJ = +25°C
1.0 IOUT1 = 300 mA
0.9 2.55 IOUT2 = 100 mA
0.8 2.50
2.7 3 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6 2.7 3 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6
Input Voltage (V) Input Voltage (V)

FIGURE 2-2: SHDN Voltage Threshold FIGURE 2-5: Output Voltage vs. Input
vs. Input Voltage. Voltage.

140 140.0
Dropout Voltage VOUT1 (mV)

TC1301B VIN = 4.2V VR1 = 2.8V

130 VOUT2 Active IOUT1 = IOUT2 = 0 µA 120.0 VR2 = 2.6V
Quiescent Current (µA)

120 VOUT1 Active IOUT2 = 100 µA TJ = +125°C

110 100.0
100 80.0 TJ = +25°C
VOUT2 SHDN
90 TJ = - 40°C
60.0
80
70 40.0
60 20.0
50
0.0
40
0 50 100 150 200 250 300
-40 -25 -10 5 20 35 50 65 80 95 110 125
Junction Temperature (°C) IOUT1 (mA)

FIGURE 2-3: Quiescent Current vs. FIGURE 2-6: Dropout Voltage vs. Output
Junction Temperature. Current (VOUT1).

DS21798C-page 6 © 2008 Microchip Technology Inc.

 TC1301A/B
Note: Unless otherwise indicated, VIN = VR +1V, IOUT1 = IOUT2 = 100 µA, CIN = 4.7 µF, COUT1 = COUT2 = 1 µF (X5R or X7R),
CBYPASS = 0 pF, SHDN1 = SHDN2 > VIH. For the TC1301A, VDET = VOUT1, RESET = OPEN, TA = +25°C.

140 0.40
VR1 = 2.8V
Dropout Voltage VOUT1 (mV)

VOUT2 IOUT2 = 0.1 mA to 150 mA

120 VR2 = 2.6V IOUT1 = 300 mA 0.30

Load Regulation (%)

IOUT2 = 100 µA 0.20
100
0.10 VOUT1
IOUT1 = 0.1 mA to 300 mA
80 0.00
60 -0.10
IOUT1 = 100 mA VR1 = 2.8V
40 -0.20
VR2 = 2.6V
IOUT1 = 50 mA -0.30 VIN = 4.2
20
-0.40
0 -40 -25 -10 5 20 35 50 65 80 95 110 125
-40 -25 -10 5 20 35 50 65 80 95 110 125
Junction Temperature (125°C)
Junction Temperature (°C)

FIGURE 2-7: Dropout Voltage vs. FIGURE 2-10: VOUT1 and VOUT2 Load
Junction Temperature (VOUT1). Regulation vs. Junction Temperature.

180 0.045
Dropout Voltage, VOUT2 (mv)

VR1 = 2.8V VIN = 3.8V to 6.0V

160 0.040 VR1 = 2.8V, IOUT1 = 100 µA

Line Regulation (%/V)

VR2 = 2.6V TJ = +125°C
140 IOUT1 = 100 µA 0.035 VOUT2 VR2 = 2.6V, IOUT2 = 100 µA
TJ = +25°C
120 0.030
TJ = - 40°C
100 0.025
VOUT1
80 0.020
60 0.015
40 0.010
20 0.005
0 0.000
0 30 60 90 120 150 -40 -25 -10 5 20 35 50 65 80 95 110 125
IOUT2 (mA) Junction Temperature (°C)

FIGURE 2-8: Dropout Voltage vs. Output FIGURE 2-11: VOUT1 and VOUT2 Line
Current (VOUT2). Regulation vs. Junction Temperature.

180 2.832
Dropout Voltage VOUT2 (mV)

VIN = 4.2V
Output Voltage VOUT1 (V)

IOUT2 = 150 mA
160 VR1 = 2.8V
2.828
140 VR1 = 2.8V VR2 = 2.6V, IOUT2 = 100 µA
120 VR2 = 2.6V 2.824 IOUT1 = 100 mA
IOUT1 = 300 mA
IOUT1 = 100 µA
100
2.820
80
IOUT2 = 50 mA
60 2.816
IOUT1 = 100 µA
40
IOUT2 = 10 mA
2.812
20
0 2.808
-40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125
Junction Temperature (°C) Junction Temperature (°C)

FIGURE 2-9: Dropout Voltage vs. FIGURE 2-12: VOUT1 vs. Junction
Junction Temperature (VOUT2). Temperature.

© 2008 Microchip Technology Inc. DS21798C-page 7

TC1301A/B
Note: Unless otherwise indicated, VIN = VR +1V, IOUT1 = IOUT2 = 100 µA, CIN = 4.7 µF, COUT1 = COUT2 = 1 µF (X5R or X7R),
CBYPASS = 0 pF, SHDN1 = SHDN2 > VIH. For the TC1301A, VDET = VOUT1, RESET = OPEN, TA = +25°C.

2.856 30
VR1 = 2.8V, IOUT1 = 300 mA VR1 = 2.8V
Output Voltage VOUT1 (V)

VR2 = 2.6V, IOUT2 = 100 µA VR2 = 2.6V VDET = 6.0V

2.848 25
VIN = 3.0V VDET = 4.2V
2.840 20

IVDET (µA)
2.832 15
VDET = 3.0V
2.824 VIN = 4.2V 10
2.816 5
VIN = 6.0V

2.808 0
-40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125
Junction Temperature (°C) Junction Temperature (°C)

FIGURE 2-13: VOUT1 vs. Junction FIGURE 2-16: IDET current vs. Junction
Temperature. Temperature.

2.645 400
VIN = 4.2V
Output Voltage VOUT2 (V)

IOUT2 = 100 µA

RESET Active Time (ms)

2.640 375 VR1 = 2.8V
IOUT2 = 50 mA
VR2 = 2.6V
350
2.635 VDET = 2.63V
325
2.630 IOUT2 = 150 mA 300
2.625 275
VIN = 4.2V
VR1 = 2.8V, IOUT1 = 100 µA 250
2.620
VR2 = 2.6V 225
2.615
200
-40 -25 -10 5 20 35 50 65 80 95 110 125
-40 -25 -10 5 20 35 50 65 80 95 110 125
Junction Temperature (°C)
Junction Temperature (°C)

FIGURE 2-14: VOUT2 vs. Junction FIGURE 2-17: RESET Active Time vs.
Temperature. Junction Temperature.

2.644 2.6395
VR1 = 2.8V, IOUT1 = 100 µA VIN = 3.0V
Output Voltage VOUT2 (V)

VR2 = 2.6V, IOUT2 = 150 mA 2.6390

2.640
VDET Trip Point (V)

2.6385
VIN = 4.2V
2.636 VIN = 6.0V
2.6380
2.6375
2.632
2.6370 VIN = 4.2V
2.6365 VR1 = 2.8V
2.628
VR2 = 2.6V
2.6360 VDET = 2.63V
2.624
2.6355
-40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125
Junction Temperature (°C)
Junction Temperature (°C)

FIGURE 2-15: VOUT2 vs. Junction FIGURE 2-18: VDET Trip Point vs. Junction
Temperature. Temperature.

DS21798C-page 8 © 2008 Microchip Technology Inc.

 TC1301A/B
Note: Unless otherwise indicated, VIN = VR +1V, IOUT1 = IOUT2 = 100 µA, CIN = 4.7 µF, COUT1 = COUT2 = 1 µF (X5R or X7R),
CBYPASS = 0 pF, SHDN1 = SHDN2 > VIH. For the TC1301A, VDET = VOUT1, RESET = OPEN, TA = +25°C.

10

1 VOUT1

NOISE (μV/—Hz)
VOUT2

VIN = 4.2V
0.1
VR1 = 2.8V
VR2=2.6V
IOUT1 = 150 mA
0.01 IOUT2 = 100 mA
CBYPASS = 10 nF

0.001
0.01 0.1 1 10 100 1000
Frequency (KHz)

FIGURE 2-19: Power Supply Rejection FIGURE 2-22: VOUT1 and VOUT2 Noise vs.
Ratio vs. Frequency (without bypass capacitor). Frequency (with bypass capacitor).

FIGURE 2-20: Power Supply Rejection FIGURE 2-23: VOUT1 and VOUT2 Power-up
Ratio vs. Frequency (with bypass capacitor). from Shutdown TC1301B.

10
VOUT2
NOISE (μV/—Hz)

1
VIN = 4.2V VOUT1
VR1 = 2.8V
VR2=2.6V
0.1
IOUT1 = 150 mA
IOUT2 = 100 mA
CBYPASS = 0 nF

0.01
0.01 0.1 1 10 100 1000
Frequency (KHz)

FIGURE 2-21: VOUT1 and VOUT2 Noise vs. FIGURE 2-24: VOUT2 Power-up from
Frequency (without bypass capacitor). Shutdown Input TC1301A.

© 2008 Microchip Technology Inc. DS21798C-page 9

TC1301A/B
Note: Unless otherwise indicated, VIN = VR +1V, IOUT1 = IOUT2 = 100 µA, CIN = 4.7 µF, COUT1 = COUT2 = 1 µF (X5R or X7R),
CBYPASS = 0 pF, SHDN1 = SHDN2 > VIH. For the TC1301A, VDET = VOUT1, RESET = OPEN, TA = +25°C.

FIGURE 2-25: VOUT1 and VOUT2 Power-up FIGURE 2-28: 150 mA Dynamic Load Step
from Input Voltage TC1301B. VOUT2.

FIGURE 2-26: Dynamic Line Response. FIGURE 2-29: RESET Power-Up From VIN
TC1301B.

FIGURE 2-27: 300 mA Dynamic Load Step FIGURE 2-30: TC1301A RESET Power-
VOUT1. Down.

DS21798C-page 10 © 2008 Microchip Technology Inc.

 TC1301A/B
Note: Unless otherwise indicated, VIN = VR +1V, IOUT1 = IOUT2 = 100 µA, CIN = 4.7 µF, COUT1 = COUT2 = 1 µF (X5R or X7R),
CBYPASS = 0 pF, SHDN1 = SHDN2 > VIH. For the TC1301A, VDET = VOUT1, RESET = OPEN, TA = +25°C.

0.35 4.4
VR1 = 2.8V,VR2 = 2.6V 4.2
IOL = 3.2 mA
0.30 VDET = VTH - 20 mV 4.0 VDET = 4.2V
3.8 RESETISOURCE = 800 µA

RESET VOH (V)

RESET VOL (V)

0.25 VR1 = 2.8V,VR2 = 2.6V

3.6
VDET = VTH + 20 mV
0.20 3.4
3.2
0.15 IOL = 1.2 mA 3.0
2.8 VDET = 3.0V
0.10 2.6 RESETISOURCE = 500 µA
0.05 2.4
2.2
0.00 2.0
-40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125

Junction Temperature (°C) Junction Temperature (°C)

FIGURE 2-31: RESET Output Voltage Low FIGURE 2-32: RESET Output Voltage High
vs. Junction Temperature. vs. Junction Temperature.

© 2008 Microchip Technology Inc. DS21798C-page 11

TC1301A/B
3.0 TC1301A PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.

TABLE 3-1: TC1301A PIN FUNCTION TABLE

Pin No. Name Function

1 RESET Push-pull output pin that will remain low while VDET is below the reset threshold and for
300 ms after VDET rises above the reset threshold.
2 VOUT1 Regulated output voltage #1 capable of 300 mA.
3 GND Circuit ground pin.
4 Bypass Internal reference bypass pin. A 10 nF external capacitor can be used to further reduce
output noise and improve PSRR performance.
5 SHDN2 Output #2 shutdown control Input.
6 VOUT2 Regulated output voltage #2 capable of 150 mA.
7 VIN Unregulated input voltage pin.
8 VDET Input pin for Voltage Detector (VDET).

3.1 RESET Output Pin 3.5 Output Voltage #2 Shutdown

The push-pull output pin is used to monitor the voltage
(SHDN2)
on the VDET pin. If the VDET voltage is less than the ON/OFF control is performed by connecting SHDN2 to
threshold voltage, the RESET output will be held in the its proper level. When the input of this pin is connected
low state. As the VDET pin rises above the threshold, to a voltage less than 15% of VIN, VOUT2 will be OFF. If
the RESET output will remain in the low state for this pin is connected to a voltage that is greater than
300 ms and then change to the high state, indicating 45% of VIN, VOUT2 will be turned ON.
that the voltage on the VDET pin is above the threshold.
3.6 Regulated Output Voltage #2
3.2 Regulated Output Voltage #1 (VOUT2)
(VOUT1) Connect VOUT2 to the positive side of the VOUT2
capacitor and load. This pin is capable of a maximum
Connect VOUT1 to the positive side of the VOUT1
output current of 150 mA. VOUT2 can be turned ON and
capacitor and load. It is capable of 300 mA maximum
OFF using SHDN2.
output current. VOUT1 output is available when VIN is
available; there is no pin to turn it OFF. See TC1301B
if ON/OFF control of VOUT1 is desired. 3.7 Unregulated Input Voltage Pin
(VIN)
3.3 Circuit Ground Pin (GND) Connect the unregulated input voltage source to VIN. If
Connect GND to the negative side of the input and the input voltage source is located more than several
output capacitor. Only the LDO internal circuitry bias inches away, or is a battery, a typical input capacitance
current flows out of this pin (200 µA maximum). of 1 µF to 4.7 µF is recommended.

3.4 Reference Bypass Input 3.8 Input Pin for Voltage Detector
(VDET)
By connecting an external 10 nF capacitor (typical) to
the bypass input, both outputs (VOUT1 and VOUT2) will The voltage on the input of VDET is compared with the
have less noise and improved Power Supply Ripple preset VDET threshold voltage. If the voltage is below
Rejection (PSRR) performance. The LDO output the threshold, the RESET output will be low. If the
voltage start-up time will increase with the addition of voltage is above the VDET threshold, the RESET output
an external bypass capacitor. By leaving this pin will be high after the RESET time period. The IDET
unconnected, the start-up time will be minimized. supply current is typically 9 µA at room temperature,
with VDET = 3.8V.

DS21798C-page 12 © 2008 Microchip Technology Inc.

 TC1301A/B
4.0 TC1301B PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 4-1.

TABLE 4-1: TC1301B PIN FUNCTION TABLE

Pin No. Name Function

1 RESET Push-pull output pin that will remain low while VDET is below the reset threshold and for
300 ms after VOUT1 rises above the reset threshold
2 VOUT1 Regulated output voltage #1 capable of 300 mA
3 GND Circuit ground pin
4 Bypass Internal reference bypass pin. A 10 nF external capacitor can be used to further reduce
output noise and improve PSRR performance
5 SHDN2 Output #2 shutdown control Input
6 VOUT2 Regulated output voltage #2 capable of 150 mA
7 VIN Unregulated input voltage pin
8 SHDN1 Output #1 shutdown control input

4.1 RESET Output Pin 4.5 Output Voltage #2 Shutdown

The push-pull output pin is used to monitor the output
(SHDN2)
voltage (VOUT1). If VOUT1 is less than the threshold ON/OFF control is performed by connecting SHDN2 to
voltage, the RESET output will be held in the low state. its proper level. When this pin is connected to a voltage
As VOUT1 rises above the threshold, the RESET output less than 15% of VIN, VOUT2 will be OFF. If this pin is
will remain in the low state for 300 ms and then change connected to a voltage that is greater than 45% of VIN,
to the high state, indicating that the voltage on VOUT1 is VOUT2 will be turned ON.
above the threshold.
4.6 Regulated Output Voltage #2
4.2 Regulated Output Voltage #1 (VOUT2)
(VOUT1)
Connect VOUT2 to the positive side of the VOUT2
Connect VOUT1 to the positive side of the VOUT1 capacitor and load. This pin is capable of a maximum
capacitor and load. It is capable of 300 mA maximum output current of 150 mA. VOUT2 can be turned ON and
output current. For the TC1301B, VOUT1 can be turned OFF using SHDN2.
ON and OFF using the SHDN1 input pin.
4.7 Unregulated Input Voltage Pin
4.3 Circuit Ground Pin (GND) (VIN)
Connect GND to the negative side of the input and Connect the unregulated input voltage source to VIN. If
output capacitor. Only the LDO internal circuitry bias the input voltage source is located more than several
current flows out of this pin (200 µA maximum). inches away or is a battery, a typical minimum input
capacitance of 1 µF and 4.7 µF is recommended.
4.4 Reference Bypass Input
By connecting an external 10 nF capacitor (typical) to 4.8 Output Voltage #1 Shutdown
bypass, both outputs (VOUT1 and VOUT2) will have less (SHDN1)
noise and improved Power Supply Ripple Rejection
ON/OFF control is performed by connecting SHDN1 to
(PSRR) performance. The LDO output voltage start-up
its proper level. When this pin is connected to a voltage
time will increase with the addition of an external
less than 15% of VIN, VOUT1 will be OFF. If this pin is
bypass capacitor. By leaving this pin unconnected, the
connected to a voltage that is greater than 45% of VIN,
start-up time will be minimized.
VOUT1 will be turned ON.

© 2008 Microchip Technology Inc. DS21798C-page 13

TC1301A/B
5.0 DETAILED DESCRIPTION the LDO as is practical. Larger input capacitors will help
reduce the input impedance and further reduce any
5.1 Device Overview high-frequency noise on the input and output of the
LDO.
The TC1301A/B is a combination device consisting of
one 300 mA LDO regulator with a fixed output voltage, 5.6 Output Capacitor
VOUT1 (1.5V – 3.3V), one 150 mA LDO regulator with a
A minimum output capacitance of 1 µF for each of the
fixed output voltage, VOUT2 (1.5V – 3.3V), and a
TC1301A/B LDO outputs is necessary for stability.
microcontroller voltage monitor/RESET (2.2V to 3.2V).
Ceramic capacitors are recommended because of their
For the TC1301A, the 300 mA output (VOUT1) is always size, cost and environmental robustness qualities.
present, independent of the level of SHDN2. The Electrolytic (Tantalum or Aluminum) capacitors can be
150 mA output (VOUT2) can be turned on/off by used on the LDO outputs as well. The Equivalent
controlling the level of SHDN2. Series Resistance (ESR) requirements on the
For the TC1301B, VOUT1 and VOUT2 each have electrolytic output capacitors are between 0 and 2
independent shutdown input pins (SHDN1 and ohms. The output capacitor should be located as close
SHDN2) to control their respective outputs. In the case to the LDO output as is practical. Ceramic materials,
of the TC1301B, the voltage detect input of the X7R and X5R, have low temperature coefficients and
microcontroller RESET function is internally connected are well within the acceptable ESR range required. A
to the VOUT1 output of the device. typical 1 uF X5R 0805 capacitor has an ESR of 50 milli-
ohms. Larger LDO output capacitors can be used with
5.2 LDO Output #1 the TC1301A/B to improve dynamic performance and
power supply ripple rejection performance. A maximum
LDO output #1 is rated for 300 mA of output current. of 10 µF is recommended. Aluminum electrolytic
The typical dropout voltage for VOUT1 = 104 mV @ capacitors are not recommended for low temperature
300 mA. A 1 µF (minimum) output capacitor is needed applications of < -25°C.
for stability and should be located as close to the VOUT1
pin and ground as possible. 5.7 Bypass Input
The bypass pin is connected to the internal LDO
5.3 LDO Output #2
reference. By adding capacitance to this pin, the LDO
LDO output #2 is rated for 150 mA of output current. ripple rejection, input voltage transient response and
The typical dropout voltage for VOUT2 = 150 mV. A 1 µF output noise performance are all increased. A typical
(minimum) capacitor is needed for stability and should bypass capacitor between 470 pF to 10 nF is
be located as close to the VOUT2 pin and ground as recommended. Larger bypass capacitors can be used,
possible. but results in a longer time-period for the LDO outputs
to reach their rated output voltage when started from
5.4 RESET Output SHDN or VIN.
The RESET output is used to detect whether the level 5.8 GND
on the input of VDET (TC1301A) or VOUT1 (TC1301B) is
above or below a preset threshold. If the voltage For the optimal noise and PSRR performance, the
detected is below the preset threshold, the RESET GND pin of the TC1301A/B should be tied to a quiet
output is capable of sinking 1.2 mA (VRESET < 0.2V circuit ground. For applications that have switching or
maximum). Once the voltage being monitored is above noisy inputs, tie the GND pin to the return of the output
the preset threshold, the RESET output pin will capacitor. Ground planes help lower inductance and
transition from a logic-low to a logic-high after a 300 ms voltage spikes caused by fast transient load currents
delay. The RESET output is a push-pull configuration and are recommended for applications that are
and will actively pull the RESET output up to VDET subjected to fast load transients.
when not in RESET. 5.9 SHDN1/SHDN2 Operation
5.5 Input Capacitor The TC1301A SHDN2 pin is used to turn VOUT2 ON
and OFF. A logic-high level on SHDN2 will enable the
Low input source impedance is necessary for the two VOUT2 output, while a logic-low on the SHDN2 pin will
LDO outputs to operate properly. When operating from disable the VOUT2 output. For the TC1301A, VOUT1 is
batteries or in applications with long lead length not affected by SHDN2 and will be enabled as long as
(> 10 inches) between the input source and the LDO, the input voltage is present.
some input capacitance is recommended. A minimum
of 1.0 µF to 4.7 µF is recommended for most applica- The TC1301B SHDN1 and SHDN2 pins are used to
tions. When using large capacitors on the LDO outputs, turn VOUT1 and VOUT2 ON and OFF. They operate
larger capacitance is recommended on the LDO input. independent of each other.
The capacitor should be placed as close to the input of

DS21798C-page 14 © 2008 Microchip Technology Inc.

 TC1301A/B
5.10 TC1301A SHDN2 Timing 5.12 VDET and RESET Operation
VOUT1 will rise independent of the level of SHDN2 for The TC1301A/B integrates an independent voltage
the TC1301A. Figure 5-1 is used to define the wake-up reset monitor that can be used for low-battery input
time from shutdown (tWK) and the settling time (tS). The voltage detection or a microprocessor Power-On Reset
wake-up time is dependant upon the frequency of (POR) function. The input voltage for the detector is
operation. The faster the SHDN pin is pulsed, the different for the TC1301A than it is for the TC1301B.
shorter the wake-up time will be. For the TC1301A, the input voltage to the detector is
pin 8 (VDET). For the TC1301B, the input voltage to the
detector is internally connected to the output of LDO #1
(VOUT1). The detected voltage is sensed and com-
VIN pared to an internal threshold. When the voltage on the
VDET pin is below the threshold voltage, the RESET
ts
output pin is low. When the voltage on the VDET pin
twk rises above the voltage threshold, the RESET output
will remain low for typically 300 ms (RESET time-out
SHDN2 period). After the RESET time-out period, the RESET
output voltage will transition from the low output state
to the high output state if the detected voltage pin
remains above the threshold voltage.
VOUT1 The RESET output will be driven low within 180 µs of
VDET going below the RESET voltage threshold. The
RESET output will remain valid for detected voltages
greater than 1.2V overtemperature.
VOUT2
5.13 TC1301A RESET Timing
Figure 5-3 shows the RESET timing waveforms for the
TC1301A. This diagram is also used to define the
FIGURE 5-1: TC1301A Timing. RESET active time-out period (tRPU) and the VDET
RESET delay time (tRPD).
5.11 TC1301B SHDN1 / SHDN2 Timing
For the TC1301B, the SHDN1 input pin is used to
control VOUT1. The SHDN2 input pin is used to control VTH
VOUT2, independent of the logic input on SHDN1.
VDET
RESET Time
VIN
VOH TRPD
ts
twk

SHDN1 RESET
VOL
1V
VOUT1

FIGURE 5-3: TC1301A RESET Timing.

SHDN2

VOUT2

FIGURE 5-2: TC1301B Timing.

© 2008 Microchip Technology Inc. DS21798C-page 15

TC1301A/B
5.14 TC1301B RESET Timing 5.15 Device Protection
The timing waveforms for the TC1301B RESET output 5.15.1 OVERCURRENT LIMIT
are shown in Figure 5-4. Note that the RESET
threshold input for the TC1301B is VOUT1. The VOUT1 In the event of a faulted output load, the maximum
to RESET threshold detector connection is made current the LDO output will permit to flow is limited
internal in the case of the TC1301B. internally for each of the TC1301A/B outputs. The peak
current limit for VOUT1 is typically 1.1A, while the peak
current limit for VOUT2 is typically 0.5A. During short-
circuit operation, the average current is limited to
200 mA for VOUT1 and 140 mA for VOUT2.The VDET
VIN
and RESET circuit will continue to operate in the event
of an overcurrent on either output for the TC1301A.
The voltage detect and RESET circuit will continue to
operate in the event of an overcurrent on VOUT1 (or
VOUT2) for the TC1301B. In the event of an overcurrent
VTH on VOUT1, the RESET will detect the absence of VOUT1.

VOUT1 5.15.2 OVERTEMPERATURE

PROTECTION
RESET Time
If the internal power dissipation within the TC1301A/B
VOH TRPD is excessive due to a faulted load or higher-than-
specified line voltage, an internal temperature-sensing
element will prevent the junction temperature from
RESET exceeding approximately 150°C. If the junction
temperature does reach 150°C, both outputs will be
VOL disabled until the junction temperature cools to
1V
approximately 140°C. The device will resume normal
operation. If the internal power dissipation continues to
be excessive, the device will again shut off. The VDET
FIGURE 5-4: TC1301B RESET Timing. and RESET circuit will continue to operate normally
during an overtemperature fault condition for both the
TC1301A and TC1301B.

DS21798C-page 16 © 2008 Microchip Technology Inc.

 TC1301A/B
6.0 APPLICATION CIRCUITS/ EQUATION 6-1:
ISSUES P LDO = ( V IN ( MAX ) ) – V OUT ( MIN ) ) × I OUT ( MAX ) )
Where:
6.1 Typical Application
PLDO = LDO Pass device internal power
The TC1301A/B is used for applications that require dissipation
the integration of two LDO’s and a microcontroller VIN(MAX) = Maximum input voltage
RESET.
VOUT(MIN) = LDO minimum output voltage

In addition to the LDO pass element power dissipation,

TC1301A
1 VDET 8 there is power dissipation within the TC1301A/B as a
System RESET RESET
2.8V @ 300 mA BATTERY
result of quiescent or ground current. The power
2
VOUT1 VIN 7
COUT1
1.8V
CIN
dissipation as a result of the ground current can be
3 VOUT2 6 @ 150 mA
1 µF Ceramic GND 1 µF calculated using the following equation. The VIN pin
X5R 4
Bypass SHDN2
5
COUT2
2.7V quiescent current and the VDET pin current are both
Cbypass to
1 µF Ceramic 4.2V considered. The VIN current is a result of LDO
10 nF Ceramic X5R
quiescent current, while the VDET current is a result of
ON/OFF Control VOUT2 the voltage detector current.
EQUATION 6-2:
ON/OFF Control VOUT1
P I ( GND ) = V IN ( MAX ) × ( I VIN + I VDET )
TC1301B
System RESET
1
RESET SHDN1
8 Where:
2.8V @ 300 mA 2 7 BATTERY
VOUT1 VIN
1.8V PI(GND) = Total current in ground pin
COUT1 CIN
3 VOUT2 6 @ 150 mA
1 µF Ceramic GND 1 µF VIN(MAX) = Maximum input voltage
X5R 4 5
Bypass SHDN2 COUT2 2.7V
IVIN = Current flowing in the VIN pin with
to
1 µF Ceramic
X5R
4.2V no output current on either LDO
output
ON/OFF Control VOUT2
IVDET = Current in the VDET pin with
RESET loaded
FIGURE 6-1: Typical Application Circuit
TC1301A/B. The total power dissipated within the TC1301A/B is the
sum of the power dissipated in both of the LDO’s and
6.1.1 APPLICATION INPUT CONDITIONS the P(IGND) term. Because of the CMOS construction,
Package Type = 3x3 DFN8 the typical IGND for the TC1301A/B is 116 µA.
Operating at a maximum of 4.2V results in a power
Input Voltage Range = 2.7V to 4.2V
dissipation of 0.5 milliWatts. For most applications, this
VIN maximum = 4.2V is small compared to the LDO pass device power
VIN typical = 3.6V dissipation and can be neglected.
VOUT1 = 300 mA maximum The maximum continuous operating junction
VOUT2 = 150 mA maximum temperature specified for the TC1301A/B is 125°C. To
estimate the internal junction temperature of the
System RESET Load = 10 kΩ
TC1301A/B, the total internal power dissipation is
multiplied by the thermal resistance from junction to
6.2 Power Calculations ambient (RθJA) of the device. The thermal resistance
from junction to ambient for the 3x3 DFN8 pin package
6.2.1 POWER DISSIPATION is estimated at 41°C/W.
The internal power dissipation within the TC1301A/B is
a function of input voltage, output voltage, output
current and quiescent current. The following equation
can be used to calculate the internal power dissipation
for each LDO.

© 2008 Microchip Technology Inc. DS21798C-page 17

TC1301A/B
EQUATION 6-3: 6.3 Typical Application
T J ( MAX ) = P TOTAL × Rθ JA + T AMAX Internal power dissipation, junction temperature rise,
Where: junction temperature, and maximum power dissipation
are calculated in the following example. The power
TJ(MAX) = Maximum continuous junction tem- dissipation as a result of ground current is small
perature enough to be neglected.
PTOTAL = Total device power dissipation
6.3.1 POWER DISSIPATION EXAMPLE
RθJA = Thermal resistance from junction-
to-ambient Package
TAMAX = Maximum ambient temperature Package Type = 3x3 DFN8
Input Voltage
The maximum power dissipation capability for a VIN = 2.7V to 4.2V
package can be calculated given the junction to LDO Output Voltages and Currents
ambient thermal resistance and the maximum ambient VOUT1 = 2.8V
temperature for the application. The following equation
IOUT1 = 300 mA
can be used to determine the package maximum
internal power dissipation. VOUT2 = 1.8V
IOUT2 = 150 mA
EQUATION 6-4:
Maximum Ambient Temperature
( T J ( MAX ) – T A ( MAX ) ) TA(MAX) = 50°C
P D ( MAX ) = ---------------------------------------------------
Rθ JA Internal Power Dissipation
Where: Internal power dissipation is the sum of the power
PD(MAX) = Maximum device power dissipation for each LDO pass device.
dissipation PLDO1(MAX) = (VIN(MAX) - VOUT1(MIN)) x
TJ(MAX) = Maximum continuous junction IOUT1(MAX)
temperature PLDO1 = (4.2V - (0.975 x 2.8V)) x 300 mA
TAMAX = Maximum ambient temperature PLDO1 = 441.0 milliWatts
RθJA = Thermal resistance from junction- PLDO2 = (4.2V - (0.975 X 1.8V)) x 150 mA
to-ambient PLDO2 = 366.8 milliWatts
PTOTAL = PLDO1 + PLDO2
EQUATION 6-5: PTOTAL= 807.8 milliWatts

T J ( RISE ) = P D ( MAX ) × Rθ JA Device Junction Temperature Rise

Where: The internal junction temperature rise is a function of
internal power dissipation and the thermal resistance
TJ(RISE) = Rise in device junction
from junction to ambient for the application. The
temperature over the ambient
thermal resistance from junction to ambient (RθJA) is
temperature
derived from an EIA/JEDEC standard for measuring
PD(MAX) = Maximum device power thermal resistance for small surface-mount packages.
dissipation The EIA/JEDEC specification is JESD51-7, “High
RθJA = Thermal resistance from junction- Effective Thermal Conductivity Test Board for Leaded
to-ambient Surface Mount Packages”. The standard describes the
test method and board specifications for measuring the
EQUATION 6-6: thermal resistance from junction to ambient. The actual
thermal resistance for a particular application can vary
T J = T J ( RISE ) + T A depending on many factors such as copper area and
thickness. Refer to AN792, “A Method To Determine
Where: How Much Power a SOT-23 Can Dissipate in Your
TJ = Junction Temperature Application” (DS00792), for more information regarding
this subject.
TJ(RISE) = Rise in device junction
temperature over the ambient
temperature TJ(RISE) = PTOTAL x RqJA

TA = Ambient Temperature TJRISE = 807.8 milliWatts x 41.0° C/W

TJRISE = 33.1°C

DS21798C-page 18 © 2008 Microchip Technology Inc.

 TC1301A/B
Junction Temperature Estimate
To estimate the internal junction temperature, the
calculated temperature rise is added to the ambient or
offset temperature. For this example, the worst-case
junction temperature is estimated below:
TJ = TJRISE + TA(MAX)
TJ = 83.1°C
Maximum Package Power Dissipation at 50°C
Ambient Temperature
3X3DFN8 (41° C/W RθJA)
PD(MAX) = (125°C - 50°C) / 41° C/W
PD(MAX) = 1.83 Watts FIGURE 7-3: 3x3 DFN Silk-Screen
Example.
MSOP8 (208° C/W RθJA)
PD(MAX) = (125°C - 50°C) / 208° C/W 8-lead 3X3 DFN physical layout example with bypass
capacitor.
PD(MAX) = 0.360 Watts

7.0 TYPICAL LAYOUT TC1301A

FIGURE 7-4: 3x3 DFN Top Metal Layer

Example.
FIGURE 7-1: MSOP8 Silk Screen Layer. Vias represent the connection to a ground plane that is
below the wiring layer.
When doing the physical layout for the TC1301A/B, the
highest priority is placing the input and output 8.0 ADDITIONAL OUTPUT
capacitors as close to the device pins as is practical.
Figure 7-1 above represents a typical placement of the
VOLTAGE AND THRESHOLD
components when using SMT0805 capacitors. VOLTAGE OPTIONS
8.1 Output Voltage and Threshold
Voltage Range
Table 8-1 describes the range of output voltage options
available for the TC1301A/B. VOUT1 and VOUT2 can be
factory preset from 1.5V to 3.3V in 100 mV increments.
The VDET (TC1301A) or threshold voltage (TC1301B)
can be preset from 2.2V to 3.2V in 10 mV increments.
TABLE 8-1: CUSTOM OUTPUT VOLTAGE
AND THRESHOLD VOLTAGE
RANGES
FIGURE 7-2: MSOP8 Wiring Layer. VOUT1 VOUT2 VDET Threshold
A wiring example for the TC1301A is shown. The vias 1.5V to 3.3V 1.5V to 3.3V 2.2V to 3.2V
represent the connection to a ground plane that is
below the wiring layer. For a listing of TC1301A/B standard parts, refer to the
Product Identification System on page 25.

© 2008 Microchip Technology Inc. DS21798C-page 19

TC1301A/B
9.0 PACKAGING INFORMATION

9.1 Package Marking Information

8-Lead MSOP Example: 8-Lead DFN Example:

— 31A = TC1301A
XXXXXX 31AFHA XXXX AFHA
— F = 2.8V VOUT1
YWWNNN 435256 YYWW 0435
— H = 2.6V VOUT2
— A = 2.63V Reset NNN 256

X1 represents VOUT1 configuration: Xr represents the reset voltage range:

Code VOUT1 Code VOUT1 Code VOUT1 Code Voltage Code Voltage
A 3.3V J 2.4V S 1.5V A 2.63V J —
B 3.2V K 2.3V T 1.65V B 2.2V K —
C 3.1V L 2.2V U 2.85V C 2.32V L —
D 3.0V M 2.1V V 2.65V D 2.5V M —
E 2.9V N 2.0V W 1.85V E 2.4V N —
F 2.8V O 1.9V X — F 2.6V O —
G 2.7V P 1.8V Y — G — P —
H 2.6V Q 1.7V Z — H — Q —
I 2.5V R 1.6V I — R —
X2 represents VOUT2 configuration:

Code VOUT2 Code VOUT2 Code VOUT2 For a listing of TC1301A/B standard parts, refer to the
Product Identification System section on page 25.
A 3.3V J 2.4V S 1.5V
B 3.2V K 2.3V T 1.65V
C 3.1V L 2.2V U 2.85V
D 3.0V M 2.1V V 2.65V
E 2.9V N 2.0V W 1.85V
F 2.8V O 1.9V X —
G 2.7V P 1.8V Y —
H 2.6V Q 1.7V Z —
I 2.5V R 1.6V

Legend: XX...X Customer-specific information

Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
e3 Pb-free JEDEC designator for Matte Tin (Sn)
* This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.

Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.

DS21798C-page 20 © 2008 Microchip Technology Inc.

 TC1301A/B

       

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DS21798C-page 22 © 2008 Microchip Technology Inc.

 TC1301A/B
APPENDIX A: REVISION HISTORY

Revision C (February 2008)

The following is the list of modifications.
1. Updated Section 9.0 “Packaging Informa-
tion”.

Revision B (January 2005)

The following is the list of modifications.
1. Corrected the incorrect part number options
shown on the Product Identification System
page and changed the “standard” output voltage
and reset voltage combinations.
2. Added Appendix A: Revision History.

Revision A (September 2003)

• Original data sheet release.

© 2008 Microchip Technology Inc. DS21798C-page 23

TC1301A/B
NOTES:

DS21798C-page 24 © 2008 Microchip Technology Inc.

 TC1301A/B
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

PART NO. X- X X X X XX XX Examples:

a) TC1301A-ADAVUA: 3.3, 3.0, 2.63,
TC1301 Type VOUT1 VOUT2 Reset Temp Package Tube MSOP pkg.
A/B Voltage Range or b) TC1301A-APAVMFTR: 3.3 , 1.8, 2.63,
Tape & 8LD DFN pkg.
Reel Tape and Reel
Standard c) TC1301A-DFAVUATR: 3.0, 2.8 , 2.63,
Configurations MSOP pkg.
Tape and Reel
d) TC1301A-DPAVMF: 3.0, 1.8 , 2.63,
Device: TC1301A: Dual LDO with microcontroller RESET function 8LD DFN pkg.
and single shutdown input. e) TC1301A-FDAVMF: 2.8, 3.0, 2.63,
TC1301B: Dual LDO with microcontroller RESET function 8LD DFN pkg.
and dual shutdown inputs. f) TC1301A-FHAVMF: 2.8, 2.6, 2.63,
DFN pkg.
g) TC1301A-PFCVUA: 1.8, 2.8, 2.32,
Standard VOUT1/VOUT2/Reset Configuration MSOP pkg.
Configurations: * Code h) TC1301A-SFCVMFTR: 1.5, 2.8, 2.32,
DFN pkg.
TC1301A 3.3 / 3.0 / 2.63 ADA
Tape and Reel
3.3 / 1.8 / 2.63 APA
i) TC1301A-UWAVUATR: 2.85, 1.85, 2.63,
3.0 / 2.8 / 2.63 DFA
MSOP pkg.
3.0 / 1.8 / 2.63 DPA
Tape and Reel
2.8 / 3.0 / 2.63 FDA
2.8 / 2.6 / 2.63 FHA
1.8 / 2.8 / 2.32 PFC
1.5 / 2.8 / 2.32 SFC a) TC1301B-ADAVMF: 3.3, 3.0, 2.63,
2.85 / 1.85 / 2.63 UWA 8LD DFN pkg.
b) TC1301B-APAVMFTR: 3.3, 1.8, 2.63,
TC1301B 3.3 / 3.0 / 2.63 ADA
8LD DFN pkg.
3.3 / 1.8 / 2.63 APA
Tape and Reel
3.0 / 2.8 / 2.63 DFA
c) TC1301B-DFAVUA: 3.0, 2.8, 2.63,
3.0 / 1.8 / 2.63 DPA
MSOP pkg.
2.8 / 3.0 / 2.63 FDA
d) TC1301B-DPAVUATR: 3.0, 1.8 ,2.63,
2.8 / 2.6 / 2.63 FHA
MSOP pkg.
2.7 / 2.8 / 2.5 GFD
Tape and Reel
2.7 / 3.0 / 2.50 GDD
e) TC1301B-FDAVMF: 2.8 ,3.0, 2.63,
2.85 / 1.85 / 2.63 UWA
8LD DFN pkg.
* Contact Factory for Alternate Output Voltage and Reset f) TC1301B-FHAVMFTR: 2.8, 2.6 ,2.63,
Voltage Configurations. 8LD DFN pkg.
Tape and Reel
g) TC1301B-GDDVUA: 2.7, 3.0, 2.50,
Temperature Range: V = -40°C to +125°C MSOP pkg.
h) TC1301B-GFDVMF: 2.7, 2.8, 2.5,
8LD DFN pkg.
Package: MF = Dual Flat, No Lead (3x3 mm body), 8-lead i) TC1301B-UWAVUATR: 2.85, 1.85, 2.63,
UA = Plastic Micro Small Outline (MSOP), 8-lead MSOP pkg.
Tape and Reel

Tube or Blank = Tube

Tape and Reel: TR = Tape and Reel

© 2008 Microchip Technology Inc. 21798C-page 25

TC1301A/B
NOTES:

21798C-page 26 © 2008 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device Trademarks

applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, Accuron,
and may be superseded by updates. It is your responsibility to
dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
ensure that your application meets with your specifications.
PICSTART, PRO MATE, rfPIC and SmartShunt are registered
MICROCHIP MAKES NO REPRESENTATIONS OR trademarks of Microchip Technology Incorporated in the
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
U.S.A. and other countries.
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION, FilterLab, Linear Active Thermistor, MXDEV, MXLAB,
INCLUDING BUT NOT LIMITED TO ITS CONDITION, SEEVAL, SmartSensor and The Embedded Control Solutions
QUALITY, PERFORMANCE, MERCHANTABILITY OR Company are registered trademarks of Microchip Technology
FITNESS FOR PURPOSE. Microchip disclaims all liability Incorporated in the U.S.A.
arising from this information and its use. Use of Microchip Analog-for-the-Digital Age, Application Maestro, CodeGuard,
devices in life support and/or safety applications is entirely at dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
the buyer’s risk, and the buyer agrees to defend, indemnify and ECONOMONITOR, FanSense, In-Circuit Serial
hold harmless Microchip from any and all damages, claims, Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB
suits, or expenses resulting from such use. No licenses are Certified logo, MPLIB, MPLINK, mTouch, PICkit, PICDEM,
conveyed, implicitly or otherwise, under any Microchip PICDEM.net, PICtail, PIC32 logo, PowerCal, PowerInfo,
intellectual property rights. PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total
Endurance, UNI/O, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2008, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.

Microchip received ISO/TS-16949:2002 certification for its worldwide

headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.

© 2008 Microchip Technology Inc. DS21798C-page 27

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Fax: 86-756-3210049

01/02/08

DS21798C-page 28 © 2008 Microchip Technology Inc.