WEEK TWO

OBJECTIVES:
• By the end of this lesson students should be
able to understand and explain the following:

1. System Architecture, RISC and CISC

2. Hardware Devices and Drivers
3. Introduction to Computer Networking

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 SYSTEMS ARCHITECTURE

 A computer system is basically a machine

that simplifies complicated tasks.

 It should maximize performance and

reduce costs as well as power consumption

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 SYSTEMS ARCHITECTURE
 Computer architecture is a specification
detailing how a set of software and
hardware technology standards interact to
form a computer system or platform.

 computer architecture refers to how a

computer system is designed and what
technologies it is compatible with.

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 SYSTEMS ARCHITECTURE

 computer architecture is likened to the art of

determining the needs of the
user/system/technology, and creating a
logical design and standards based on those
requirements.

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 SYSTEMS ARCHITECTURE
There are three categories of computer
architecture:

 System Design: This includes all hardware

components in the system. Including data
processors
 Instruction Set Architecture (ISA): This is the
embedded programming language of the
central processing unit
 Microarchitecture: This type of architecture
defines the data paths, data processing and
storage elements 5
 Microarchitecture ARCHITECTURE

 This type of architecture defines the data

paths, data processing and storage elements

 x86-based systems use the BIOS whereas

 Itanium-Based Systems use EFI (Extensible

Firmware Interface)

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 Computer-System Bus Architecture

The busses are the data channels which connect the

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PC’s components together
 Computer-System Bus Architecture

• The bus system is subdivided into

different branches.

Bridges connect the various buses together

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 Buses

• RAM is the component which has the

greatest data traffic, and is therefore
connected directly to the CPU by a
particularly powerful bus.

• It is called the front side bus (FSB) or (in

older systems) the system bus.

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 Buses

• The PC’s most important bus looks after

the “heavy” traffic between the CPU and
RAM.

The buses connecting the motherboard to the PC’s

peripheral devices are called I/O buses. They are
managed by the controllers. 10
 Instruction Set Architecture
• It is defined as an interface to allow easy
communication between the
programmer and the hardware.

• This is the embedded programming language

of the central processing unit

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 Instruction Set:
• It is a group of instructions that can be given
to the computer.

• These instructions direct the computer in

terms of data manipulation

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 System Architecture
• In the computer world, 32-bit and 64-bit refer
to the type of central processing unit,
operating system, driver, software program,
etc. that utilizes that particular architecture.

• 32-bit hardware and software is often

referred to as x86 or x86-32.
• 64-bit hardware and software is often
referred to as x64 or x86-64.
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 System Architecture
• There are several other advantages to a 64-bit
system as well, most practically the ability to
use significantly greater amounts of physical
memory (more than the 4 GB allowed by a 32-
bit machine).

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 System Design
(RISC and CISC)
• It is a basic standard architecture for
designing a computer with the aim of
improving performance.

• The two popular competing

architectures were developed for this
purpose, and different processors
conformed to each one.

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 RISC and CISC
• Development have been undertaken into
improving the architecture of the central
processing unit

• The main aim is to improve performance.

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 RISC and CISC Architecture
• Central Processing Unit Architecture operates
the capacity to work from “Instruction Set
Architecture” to where it was designed.

• The architectural designs of CPU are RISC

(Reduced instruction set computing) and CISC
(Complex instruction set computing).

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 CISC Architecture
• CISC has the ability to execute addressing modes
or multi-step operations within one instruction
set.

• It is the design of the CPU where one instruction

performs many low-level operations.

• For example, memory storage, an arithmetic

operation and loading from memory.
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CISC Architecture

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Complex Instruction Set Architecture
(CISC)
• The CISC approach attempts to minimize the
number of instructions per program,
sacrificing the number of cycles per
instruction.

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 CISC
• A computer with a large number of in-
structions is classified as a complex instruction
set computer, abbreviated CISC

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 CISC Characteristics
• The design of an instruction set for a
computer must take into consideration not
only machine language constructs, but also
the requirements imposed on the use of high-
level programming languages

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 CISC Characteristics
• The translation from high-level to machine
language programs is done by means of a
compiler program

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Major Summary characteristics of CISC
architecture
• A large number of instructions: typically from
100 to 250 instructions

• Some instructions that perform specialized

tasks and are used infrequently

• A large variety of addressing modes: typically

from 5 to 20 different modes
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Major Summary characteristics of CISC
architecture
• Variable-length instruction formats
• Instructions that manipulate operands in
memory

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 RISC Architecture
• RISC is a CPU design strategy based on the
insight that simplified instruction set gives
higher performance when combined with a
microprocessor architecture which has the
ability to execute the instructions by using
some microprocessor cycles per instruction.

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RISC Architecture

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Reduced Instruction Set Architecture
(RISC):
• RISC does the opposite, reducing the cycles per
instruction at the cost of the number of
instructions per program

• computers use fewer instructions with simple

constructs so they can be executed much
faster within the CPU without having to use
memory as often.

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 RISC Characteristics
• The concept of RISC architecture involves an
attempt to reduce execution time by
simplifying the instruction set of the
computer.

• Compiler support for efficient translation of

high-level language programs into machine
language programs

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 Major characteristics of a RISC
processor
• Relatively few instructions
• Relatively few addressing modes
• Memory access limited to load and store
instructions

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 Major characteristics of a RISC
processor
• All operations done within the registers of the
CPU
• Fixed-length, easily decoded instruction
format
• Single-cycle instruction execution

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Major characteristics of CISC and RISC
architectures

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 The Summary differences between the
architectures
CISC RISC
Large (100 to 300) Instruction Set Small (100 or less)
Complex (8 to 20) Addressing Modes Simple (4 or less)
Specialized Instruction Format Simple
Variable Code Lengths Fixed
Variable Execution Cycles Standard for most
Cost / CPU
Higher Lower
Complexity
Compilation Simplifies Processor design
Processor design Complicates Software
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 RISC & CISC Comparison
• .

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 Comparison between CISC & RISC
• MUL instruction is divided into three instructions

“LOAD” – moves data from the memory bank to a

register
“PROD” – finds product of two operands located within
the registers
“STORE” – moves data from a register to the memory
banks

• The main difference between RISC and CISC is the

number of instructions and its complexity. 35
 Comparison between CISC & RISC
.

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 The Advantages of RISC architecture

• RISC(Reduced instruction set

computing)architecture has a set of
instructions, so high-level language compilers
can produce more efficient code
• It allows freedom of using the space on
microprocessors because of its simplicity.
• Many RISC processors use the registers for
passing arguments and holding the local
variables.
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 The Advantages of RISC architecture

• RISC functions use only a few parameters, and

the RISC processors cannot use the call
instructions, and therefore, use a fixed length
instruction which is easy to pipeline.
• The speed of the operation can be maximized
and the execution time can be minimized.
Very less number of instructional formats, a
few numbers of instructions and a few
addressing modes are needed.
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 The Disadvantages of RISC architecture

• Mostly, the performance of the RISC

processors depends on the programmer or
compiler as the knowledge of the compiler
plays a vital role while changing the CISC code
to a RISC code
• While rearranging the CISC code to a RISC
code, termed as a code expansion, will
increase the size. And, the quality of this code
expansion will again depend on the compiler,
and also on the machine’s instruction set.
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 The Disadvantages of RISC architecture

• The first level cache of the RISC processors is

also a disadvantage of the RISC, in which these
processors have large memory caches on the
chip itself. For feeding the instructions, they
require very fast memory systems.

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 Advantages of CISC architecture
• Microprogramming is easy assembly language
to implement, and less expensive than hard
wiring a control unit.
• The ease of microcoding new instructions
allowed designers to make CISC machines
upwardly compatible:
• As each instruction became more
accomplished, fewer instructions could be
used to implement a given task.

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Disadvantages of CISC architecture
• The performance of the machine slows down
due to the amount of clock time taken by
different instructions will be dissimilar

• Only 20% of the existing instructions is used in

a typical programming event, even though
there are various specialized instructions in
reality which are not even used frequently.

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Disadvantages of CISC architecture
• The conditional codes are set by the CISC
instructions as a side effect of each instruction
which takes time for this setting – and, as the
subsequent instruction changes the condition
code bits – so, the compiler has to examine
the condition code bits before this happens.

Source: http://www.edgefxkits.com/blog/what-is-risc-and-cisc-architecture/ 43
QUESTIONS TIME
 NEXT TOPIC

Hardware Devices & Operating

Systems