Statistical On Chip Variation (SOCV)

Library Format
Product: Tempus 19.1 and Above
Innovus 19.1 and Above

August 12, 2020

Copyright Statement

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence and the Cadence logo are
registered trademarks of Cadence Design Systems, Inc. All others are the property of their respective
holders.

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 2
 SOCV Library Format

Table of Contents
Purpose .........................................................................................................................................4
Audience .......................................................................................................................................4
Introduction ..................................................................................................................................5
Lexical Conventions and Data Types ...............................................................................................6
Units ..................................................................................................................................................... 6
Comments ............................................................................................................................................ 6
Whitespace........................................................................................................................................... 6
Wildcarding .......................................................................................................................................... 7
Overview of SOCV Library Usage ....................................................................................................8
Design-level spatial derate data ........................................................................................................... 8
Cell-level spatial derate data ................................................................................................................ 9
Interconnect variation modeling........................................................................................................ 10
File Structure ...............................................................................................................................11
Handling of table styles ...................................................................................................................... 11
Precedence Rules ............................................................................................................................... 11
Attributes ....................................................................................................................................14
object_type ........................................................................................................................................ 14
object_spec ........................................................................................................................................ 14
path_type ........................................................................................................................................... 15
delay_type .......................................................................................................................................... 15
early_distance, late_distance ............................................................................................................ 16
early_distance_derate, late_distance_derate .................................................................................. 17
voltage ................................................................................................................................................ 17
early_variation_multiplier, late_variation_multiplier....................................................................... 18
pin_direction ...................................................................................................................................... 19
Application Support............................................................................................................. 20
Importing SOCV side-file library data ............................................................................................20
Single-corner ...................................................................................................................................... 20
MMMC ............................................................................................................................................... 21
Configuring spatial derating in SOCV analysis................................................................................21
Providing chip size data ...................................................................................................................... 21
Methods for determining path bounding box size ............................................................................ 22
GBA bounding-box mode .................................................................................................................. 22
GBA chip-size mode........................................................................................................................... 25
PBA ..................................................................................................................................................... 26
Spatial derating of the variation component ..................................................................................... 27
Specifying interconnect variation ...................................................................................................... 27
Support .......................................................................................................................................29
Feedback...................................................................................................................................29

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 3
 SOCV Library Format

Purpose
This application note provides a description of the syntax of the Cadence SOCV side-
file library format. The side-file library is used to provide spatial derating and
interconnect variation data that is not natively provided in the user's main Liberty LVF
libraries.

Before the adoption of the Liberty LVF standard, the SOCV format was also used for
modeling cell-level process variation. This use-model has been deprecated in favor of
LVF. Syntax specific to the modeling of cell-level random process variation will not be
covered in this document.

Audience
This document is intended for users of Statistical On-Chip Variation (SOCV) analysis in
Cadence's Tempus and Innovus software applications.

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 4
 SOCV Library Format

Introduction
SOCV is a side-file library format which provides an ASCII representation of variation
modeling data for advanced semiconductor processes. The main consumers of the
SOCV file data are Cadence's Tempus signoff timing analyzer software and Innovus
design implementation software.

The SOCV library format provides the software tools with variation data that is not
available in the Liberty timing libraries in the current design kits. The SOCV library
references library cells defined in Liberty and overlays additional data on top of the
basic Liberty data.

Although the Liberty LVF syntax can support distance derating factors for modeling
spatial variation - it is currently very uncommon to see a fully integrated LVF that
contains this data. It is currently not standard practice to incorporate spatial derates in
most industry Liberty characterization flows. As a result, spatial derating data is often
provided by the library vendors in separate side-files so that the main Liberty libraries do
not have to be post-processed.

The SOCV format can represent that following types of variation data:

 Design-level spatial derating

This data provides distance-based derating factors at the design-level. This

allows the user to specify derating factors for nets as well as instances if desired.

 Library cell-level spatial derating

Spatial derating can be provided at the library cell level allowing specific distance
derate values per cell type

 Interconnect variation factor

This data provides a means of configuring a portion of the calculated mean

interconnect delay to be treated as an interconnect variation sigma value.

 Library cell-level variation sigma data

Liberty LVF is the industry standard for modeling of cell-level random process
variation. Use of the SOCV side-file for this purpose is not recommended.

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 5
 SOCV Library Format

Lexical Conventions and Data Types

Units
The SOCV side-file libraries units are tied to the definitions of their master Liberty
libraries. The definition of time units and capacitive units was important to the slew x
load indexed sigma tables. This data is now handled by LVF.

The units of distance are still important in the calculation of spatial derating factors. In
Innovus and Tempus, the distance indices are currently interpreted with respect to the
default distance unit of the application - which in both cases is microns. A global control
is available in both tools to change the definition to nanometers.

set timing_derate_spatial_distance_unit 1nm | 1um

Comments
To include comments in the SOCV side-file library, you can use the '#' as the first token
of the comment line. Commented lines will be ignored by the parser.

Note: There is a known parsing issue if the '#' is the only character on the line.

Whitespace
The library syntax is not sensitive to whitespace between elements.
The following specifications are equivalent:

pin:Y
pin: Y
pin : Y

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 6
 SOCV Library Format

Wildcarding

The SOCV object_spec attribute supports simple glob-style wildcard expressions to

match against the library or library cell names.

object_type : library
object_spec : */BUFX?
path_type : clock
early_distance : 0,350,700,2250,4000
early_distance_derate: 1.0, 0.6451, 0.6258, 0.6113, 0.6001
late_distance : 0,350,700,2250,4000
late_distance_derate : 1.40, 1.41, 1.42, 1.43, 1.44

The get_lib_cells command may also be embedded in the object_spec to describe

the cells that the data block applies to:

object_type: library
object_spec: [get_lib_cells */BUF*]
path_type: clock
early_distance: 0,350,700,2250,4000
early_distance_derate: 1.0, 0.6451, 0.6258, 0.6113, 0.6001
late_distance: 0,350,700,2250,4000
late_distance_derate: 1.40, 1.41, 1.42, 1.43, 1.44

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 7
 SOCV Library Format

Overview of SOCV Library Usage

Design-level spatial derate data

object_type : design
[path_type]? : [clock data]*
[voltage]? : <voltage value>?
late_distance : <list of distance indices>
late_distance_derate : <list of derate values>
early_distance : <list of distance indices>
early_distance_derate: <list of derate values>

object_type: design

late_distance: 0,100,200,300,500,1000
late_distance_derate: 1.0,1.100,1.200,1.300,1.500,2.000
early_distance: 0,100,200,300,500,1000
early_distance_derate: 1.0,0.9,0.8,0.700,0.500,0.100

The design-level spatial derate file shown above would provide all nets and cell
instances in the design with the specified distance derating factors. If cell-level spatial
derates are also applied, the design-level derates will still apply to net derating.

The path_type and delay_type attributes can optionally be specified to provide more
specificity in the application of the derates. The voltage attribute can also be specified
to provide different derating to different voltage regions or to allow interpolation to an
operating point that is between characterization points.

The support of these additional qualifiers is dependent on the application.

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 8
 SOCV Library Format

Cell-level spatial derate data

object_type : library
object_spec : <library/lib_cell glob expression>
[path_type]? : [clock data]*
late_distance : <list of distance indices>
late_distance_derate : <list of derate values>
early_distance : <list of distance indices>
early_distance_derate: <list of derate values>

object_type: library
object_spec: slow/AND*
path_type: clock
late_distance: 0,350000,700000,2250000,4000000
late_distance_derate: 1.000, 1.050, 1.054, 1.068, 1.0799
early_distance: 0,350000,700000,2250000,4000000
early_distance_derate: 1.000, 0.950, 0.925, 0.911, 0.900

Spatial derating can also be specified at the library cell level. The object specification
attribute takes a wildcard expression for the library cell name which will be matched
against Liberty library cells. The Liberty library cell must exist in order for the spatial
derate to be overlaid.

Characterization voltages are inherited from the parent Liberty timing library.

Consult individual application user guides for information on the support of cell-level
spatial derate data.

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 9
 SOCV Library Format

Interconnect variation modeling

object_type : design
[path_type]? : [clock data]*
[pin_direction]? : [rise fall]*
[voltage]? : <voltage value>?
delay_type : net
late_variation_multiplier? : <0.0 < value < 1.0 >?
early_variation_multiplier? : <0.0 < value < 1.0 >?

object_type : design
pin_direction : rise fall
delay_type : net
voltage : 1.620
path_type : data
early_variation_multiplier : 0.10

object_type : design
pin_direction : rise fall
delay_type : net
voltage : 1.620
path_type : data
late_variation_multiplier : 1.00

Liberty LVF does not currently provide a means of modeling interconnect variation for
SOCV-style analysis. The early and late variation multipliers can be used to prescribe
that a certain percentage of the calculated interconnect delay should be treated as a
statistical process variation quantity. This is intended to be treated similarly during
analysis as an LVF delay sigma value for a timing arc.

A delay_type of net should be used when describing tables for interconnect variation
modeling.

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 10
 SOCV Library Format

File Structure

Handling of table styles

The different types of SOCV library tables:

 Design-level spatial derates

 Library cell-level spatial derates
 Interconnect variation factors
 Library cell-level random variation sigma tables (deprecated)

can be delivered in the same file or be separated by function into different files.

The same library import mechanisms are used in Innovus and Tempus for all flavors of
SOCV library modeling.

Precedence Rules
Design-level vs. library-level specifications

 Library cell-level specifications defined using object_type:library will have

precedence over similar data provided at the design-level using
object_type:design.

 If a cell-level specification provides partial data - perhaps only has tables for
paths of type clock - the design-level data can be used to fill in if it is available

Overlapping specifications

 If two specifications are overlapping - the first specification has precedence

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 11
 SOCV Library Format

object_type: library
object_spec: slow/BUFX2
path_type: clock
early_distance: 0,350,700,2250,4000
early_distance_derate: 1.0, 0.6451, 0.6258, 0.6113, 0.6001
late_distance: 0,350,700,2250,4000
late_distance_derate: 1.40, 1.41, 1.42, 1.43, 1.44

object_type: library
object_spec: slow/BUFX2
early_distance: 0,350,700,2250,4000
early_distance_derate: 1.0, 0.7451, 0.7258, 0.7113, 0.7001
late_distance: 0,350,700,2250,4000
late_distance_derate: 1.30, 1.31, 1.32, 1.33, 1.34

In the above scenario, derating for clock paths will come from the first table, and
derating for data paths will be filled in from the second.

If the order of the tables is reversed:

object_type: library
object_spec: slow/BUFX2
early_distance: 0,350,700,2250,4000
early_distance_derate: 1.0, 0.7451, 0.7258, 0.7113, 0.7001
late_distance: 0,350,700,2250,4000
late_distance_derate: 1.30, 1.31, 1.32, 1.33, 1.34

object_type: library
object_spec: slow/BUFX2
path_type: clock
early_distance: 0,350,700,2250,4000
early_distance_derate: 1.0, 0.6451, 0.6258, 0.6113, 0.6001
late_distance: 0,350,700,2250,4000
late_distance_derate: 1.40, 1.41, 1.42, 1.43, 1.44

the data for both clock and data paths will come from the first table only - since it is
equivalent to having a path_type specification of 'clock data'.

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 12
 SOCV Library Format

The enumeration of spatial distance derate factors that can be specified is shown
below:

 Design Clock Early Net

 Design Clock Late Net
 Design Data Early Net
 Design Data Late Net
 Design Clock Early Cell
 Design Clock Late Cell
 Design Data Early Cell
 Design Data Late Cell

 Libcell Clock Early

 Libcell Clock Late
 Libcell Data Early
 Libcell Data Late

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 13
 SOCV Library Format

Attributes

The following table provides the usage details the various attributes of the SOCV side-
file library for use in spatial derating and interconnect variation modeling. Constructs
which apply only to modeling of cell-level random variation have been omitted - LVF is
the preferred manner for describing this data.

object_type

SYNTAX

object_type : [ library | design ]

USAGE

Use the object_type attribute to define the current table section as either library or
design-level data. Spatial derate data can be provided at either library or cell levels.
Interconnect variation scaling factors must also be design-level. Cell-level random
variation sigma tables are always at the library level.

object_spec

SYNTAX

object_spec: <glob wildcard library/lib_cell specification>

USAGE

When providing a library-level description, use the object_spec to indicate the

library_cell(s) that the data should apply to. All design-level data is global in nature
and cannot be qualified with design object identifiers such as net or instance names.

You can provide a wildcard specification using glob style matching - for example:

object_spec: libs_*_1p5V_120T/*

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 14
 SOCV Library Format

path_type

SYNTAX

path_type : [ data | clock ]?

USAGE

Use the path_type attribute to specify that a particular data block is applicable to
only clock paths, data paths, or both types of paths. The path_type attribute is not
required. If it is not specified, the data will be applied to both clock and data paths.

path_type : clock
path_type : clock data
path_type : data

delay_type

SYNTAX

delay_type : [ net | cell ]?

USAGE

Use the delay_type attribute to specify that a particular data block is applicable to
nets, library cells, or both. The delay_type attribute is not required. If it is not
specified for design tables, the data will be applied to both types of objects. Library
cell-level tables will always be delay_type cell.

delay_type : net
delay_type : net cell
delay_type : cell

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 15
 SOCV Library Format

early_distance,
late_distance

SYNTAX

early_distance : index1, index2, ... , indexn

late_distance : index1, index2, ... , indexn

USAGE

The early_distance and late_distance attributes provide the distance indices

associated with the 1-D early and late derate data. The indices are expressed as a
comma separated list of distance values. The number of indices should match the
number of derate entries in the associated early_distance_derate and
late_distance_derate 1-D tables. Distance derating tables may be specified in
both design and library data sections.

The default scale of the distance indices in Cadence Innovus and Tempus
applications is in microns (um), but can be configured to nanometers. This is
described in a previous section.

early_distance : 0,1000,5000,10000,20000
early_distance_derate: 0.97,0.965,0.945,0.92,0.90
late_distance : 0,1000,5000,10000,20000
late_distance_derate : 1.00,1.00,1.00,1.00,1.00

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 16
 SOCV Library Format

early_distance_derate,
late_distance_derate

SYNTAX

early_distance_derate : derate1, derate2, ... , deraten

late_distance_derate : derate1, derate2, ... , deraten

USAGE

The early_distance_derate and late_distance_derate attributes provide a 1-D

lookup table of spatial derating factors. These distance derating tables may be
specified with design or library data sections of the SOCV library.

While the SOCV syntax provides for distance derating specifications at both design
and library levels, applications may have requirements for when and how this data
can be used. You should consult the applications' user guides for more tool specific
information on utilizing this data.

voltage

SYNTAX

voltage : <voltage value in volts>

USAGE

The voltage attribute describes the characterization voltage that the current data
section is applicable for. The behavior of this specification is dependent on the type
of data being modeled.

If spatial derating is applied at the design level, the user can provide different spatial
derating sections associated with different voltage characterizations. If there are
power domains running with different voltages, derating for each domain can be
customized. If the operating voltage of a domain is between characterization points in
the library, the spatial derate factor can be interpolated.

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 17
 SOCV Library Format

The voltage attribute is not used when describing distance derating at the library cell
level. It is assumed that voltage associated with the distance derate data in the
SOCV library is consistent with the Liberty parent library of that library cell - the
Liberty voltage is inherited. Interpolation is still possible if distance derate data for
several characterization voltages is available.

If the voltage attribute is part of data block modeling interconnect variation, it will
allow different variation multipliers to be selected based on the operating voltage of
the domain that each net belongs to.

early_variation_multiplier,
late_variation_multiplier

SYNTAX

early_variation_multiplier : 0.0 < earlyValue < 1.0

late_variation_multiplier : 0.0 < lateValue < 1.0

USAGE

The early_variation_multiplier and late_variation_multiplier allow the

user to configure a specified fraction of the mean interconnect delay to be considered
as a statistical interconnect variation component. This value is intended to be treated
during analysis in a similar manner as cell-level sigma components from LVF. The
delay_type is always net for this type of data block.

The variation multiplier can be specified (or not specified at all) differently for:

Different voltage regions by including a voltage attribute in the data block

Data vs. clock path types by including a path_type attribute
Rise vs. fall by including a pin_direction attribute

object_type : design
pin_direction : rise fall
delay_type : net
voltage : 1.620
path_type : data
early_variation_multiplier : 0.100

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 18
 SOCV Library Format

pin_direction

SYNTAX

pin_direction : [ rise | fall ]

USAGE

The pin_direction attribute can be used within early or late variation multiplier
blocks to allow the user to specify different multipliers for rising vs. falling transitions.

This attribute is not used in any spatial derating modeling context. It has previously
been used for describing transitions in the cell-level variation models.

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 19
 SOCV Library Format

Application Support
The primary consumers of SOCV side-file data are the Cadence Tempus sign-off timer
and the Innovus implementation software packages. The section of the document will
describe the commands and controls for loading SOCV side-file data, configuring the
analysis to use it, and options for controlling reporting output.

Importing SOCV side-file library data

Tempus analysis supports both a single-mode/single-corner (SMSC) analysis mode as
well as a multi-mode/multi-corner (MMMC) mode. Innovus supports only the MMMC
use model.

Single-corner
When configuring Tempus for SMSC analysis, all library data is imported via the
read_lib command. Use the read_lib command with the -socv option to load any
format of SOCV side file library. You may use this command to load multiple SOCV
files.

read_lib -socv global_spatial_derate.socv

read_lib -socv lib_cell_spatial_derates.socv
read_lib -socv rc_variation.socv

or

read_lib -socv [list global_spatial_derate.socv

lib_cell_spatial_derates.socv
rc_variation.socv
]

You may also include all of the data into a single .socv library file.

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 20
 SOCV Library Format

MMMC
To include SOCV side-file libraries in an MMMC configuration file, you should add them
to the library_set objects using the -socv option to either create_library_set or
update_library_set commands.

create_library_set -name my_libset_typ

-timing [list ./libs/syn/stdcell/slow/slow.lib]
-socv [list global_spatial_derate.socv
lib_cell_spatial_derates.socv
rc_variation.socv
]

Configuring spatial derating in SOCV analysis

Providing chip size data

In order to determine either the chip or bounding-box sizes, physical coordinate
information must be provided to the analysis. There are three sources of data in order
from highest precedence to lowest:

 A static chip-size in microns specified by the global variable

set timing_spatial_derate_chip_size <sizeInMicrons>

If this global is set to any value other than the default 1E30, the associated value
will always be used for the chip size.

 Coordinate data derived from the physical floorplan

 Coordinate data provided via SPEF

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 21
 SOCV Library Format

Methods for determining path bounding box size

The software provides different methods for determining the distance value to use for
the look-up of the spatial derate factor. In graph-based analysis (GBA), the chip-size
dimensions can be used for all paths. Alternatively, the timer can estimate the distance
parameter by determining a worst-case GBA bounding-box.

In path-based analysis, a path-correct bounding-box is normally used. If physical

coordinate data is not available than the system will default to using the chip's
dimensions to derive the distance parameter.

You can enable and configure the spatial derating mode with the following global
variable settings:

set timing_enable_spatial_derate_mode true | false

set timing_spatial_derate_distance_mode chip_size | bounding_box

GBA bounding-box mode

Enable GBA chip-size mode using the following settings:

set timing_enable_spatial_derate_mode true

set timing_spatial_derate_distance_mode bounding_box

In graph-based mode, it is not possible to determine bounding-box's that are specific to

each reported path. The software attempts to determine a worst-case bounding box by
considering a union of all the instances in the logic cone fanning out from each CPPR
common point with the instance of the fan-in cone for each data endpoint.

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 22
 SOCV Library Format

 The distance determined by the GBA bounding-box is used to look-up the spatial
derate factor from a design-level spatial derate table. Libcell-based derate tables
cannot be used with GBA bounding-box mode.
 The effect of spatial derating is applied on the final arrival and required times of
the path. Instance-by-instance derating is not done. A Spatial Adjustment
entry is added to the slack calculation section of the report
 Selection criteria such data vs. clock, net vs. cell, and voltage cannot be used in
GBA bounding-box mode because the different components of the Arrival time
cannot be separated out into these different sections
 All paths with the same CPPR common point and the same data endpoint will
receive the same worst-case spatial adjustment. This is pessimistic for Setup
analysis, but is not recommended for Hold analysis.

Path 1: MET Setup Check with Pin BLK/BR2/CK

Endpoint: BLK/BR2/D (v) checked with leading edge of 'WAVE'
Beginpoint: BLK/BR1/Q (v) triggered by leading edge of 'WAVE'
Common point: BLK/blkint/Y
Path Groups: {WAVE}
Analysis View: default_analysis_view_setup
Other End Arrival Time 1.0534 (-3.00S) | 1.5200 | 0.1555
- Setup 0.2992 (+3.00S) | 0.2992 | 0.0000
+ Phase Shift 10.0000
+ CPPR Adjustment 0.0000 (+3.00S) | 0.0000 | 0.0000
- Spatial Adjustment 0.2631 (+3.00S) | 0.2056 | 0.0192
= Required Time 10.5451 (-3.00S) | 11.0152 | 0.1567
- Arrival Time 2.7956 (+3.00S) | 2.3111 | 0.1615
= Slack Time 8.0290 (-3.00S) | 8.7041 | 0.2250
Clock Rise Edge 0.0000
= Beginpoint Arrival Time 0.0000 (+3.00S) | 0.0000 | 0.0000
Timing Path:
--------------------------------------------------------------------
Timing Point Arc Cell Socv Total Delay Arrival
Derate Derate Time
--------------------------------------------------------------------
tclk tclk ^ - - - - 0.0000
tclk - (net) - - - -
CG/BC1/A - BUFX2 - 1.0000 0.0001 0.0001
CG/BC1/Y A ^ -> Y ^ BUFX2 - 1.0000 0.3193 0.3194
clkroot - (net) - - - -
TC1/A - BUFX2 - 1.0000 0.0003 0.3197
TC1/Y A ^ -> Y ^ BUFX2 - 1.0000 0.4528 0.6884
Example GBA spatial derating with bounding_box mode enabled

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 23
 SOCV Library Format

The following example shows how the GBA Spatial Adjustment entry is calculated.
This example uses a late_distance_derate = 1.05 and an early_distance_derate = 0.90.
For Setup check analysis, the late derate is applied to delay of the launch path
measured from the CPPR common point to the path endpoint. The early derate factor
is applied to the capture clock path delay - measured from the CPPR point to the
capture clock pin. These two values are summed to produce the final Spatial
Adjustment value. Both factors increase pessimism and result in an earlier Required
time.

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 24
 SOCV Library Format

GBA chip-size mode

Enable GBA chip-size mode using the following settings:

set timing_enable_spatial_derate_mode true

set timing_spatial_derate_distance_mode chip_size

Chip-size mode allows the user to specify a static distance value to use for all GBA
paths. Since the bounding-box distance is always fixed, some of the restrictions of GBA
bounding-box mode are removed:

 Design-level spatial derate files are required for net-based derating, but lib_cell
specific derating tables can be provided for instance derating
 Spatial derating can be applied instance-by-instance for each path
 The software can apply different derates depending on whether the instance is
being used on the clock or data path
 The spatial derates can be reported in a more typical derate manner in the
detailed path section by using the socv_derate report_timing field.

Path 1: MET Setup Check with Pin BLK/BR2/CK

Endpoint: BLK/BR2/D (v) checked with leading edge of 'WAVE'
Beginpoint: BLK/BR1/Q (v) triggered by leading edge of 'WAVE'
Common point: BLK/blkint/Y
Path Groups: {WAVE}
Analysis View: default_analysis_view_setup
Other End Arrival Time 0.7654 (-3.00S) | 1.0455 | 0.0934
- Setup 0.2992 (+3.00S) | 0.2992 | 0.0000
+ Phase Shift 10.0000
+ CPPR Adjustment 1.7211 (+3.00S) | 0.9778 | 0.2477
= Required Time 12.4126 (-3.00S) | 11.7242 | 0.2295(-)
- Arrival Time 3.7486 (+3.00S) | 3.0534 | 0.2317
= Slack Time 8.5735 (-3.00S) | 8.6708 | 0.0324
Clock Rise Edge 0.0000
= Beginpoint Arrival Time 0.0000 (+3.00S) | 0.0000 | 0.0000
Timing Path:
---------------------------------------------------------------------
Timing Point Arc Cell Socv Total Delay Arrival
Derate Derate Time
---------------------------------------------------------------------
tclk tclk ^ - - - - 0.0000
tclk - (net) - - - -
CG/BC1/A - BUFX2 1.1400 1.1400 0.0001 0.0001
CG/BC1/Y A ^ -> Y ^ BUFX2 1.4400 1.4400 0.4598 0.4600
Example GBA spatial derating with chip_size mode enabled

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 25
 SOCV Library Format

PBA

Path-based analysis will always compute a path-correct bounding-box as long as

coordinate information is available. Lacking coordinate data, it will default to using the
chip-size for distance. The bounding-box is computed by considering the pin locations
of all pins of all instances of the launching and capture paths downstream from the
CPPR common point. If there is no CPPR common point for the path, then the chip-
size distance is used.

Path-based spatial-derating handles:

 Design or cell-level derating from SOCV side-file libraries

 Supports different derating for data vs. clock path types
 Applies derates instance-by-instance
 Derates are reported in the socv_derate field per arc

Path 1: MET Setup Check with Pin BLK/BR2/CK

Endpoint: BLK/BR2/D (v) checked with leading edge of 'WAVE'
Beginpoint: BLK/BR1/Q (v) triggered by leading edge of 'WAVE'
Common point: BLK/blkint/Y
Path Groups: {WAVE}
Analysis View: default_analysis_view_setup
Retime Analysis { Data Path-Slew Spatial(CS) SOCV RC }
Retime SOCV Analysis { Distance(um) : 356.968 }
Other End Arrival Time 0.7654 (-3.00S) | 1.0455 | 0.0934
- Setup 0.2983 (+3.00S) | 0.2983 | 0.0000
+ Phase Shift 10.0000
+ CPPR Adjustment 1.7211 (+3.00S) | 0.9778 | 0.2477
= Required Time 12.4135 (-3.00S) | 11.7251 | 0.2295(-)
- Arrival Time 3.7486 (+3.00S) | 3.0534 | 0.2317
= Slack Time 8.5744 (-3.00S) | 8.6717 | 0.0324
= Slack Time(original) 8.5735 (-3.00S) | 8.6708 | 0.0324
Clock Rise Edge 0.0000
= Beginpoint Arrival Time 0.0000 (+3.00S) | 0.0000 | 0.0000
Timing Path:
---------------------------------------------------------------------
Timing Point Arc Cell Socv Total Retime Arrival
Derate Derate Delay Time
---------------------------------------------------------------------
tclk tclk ^ - - - - 0.0000
tclk - (net) - - - -
CG/BC1/A - BUFX2 1.1400 1.1400 0.0001 0.0001
CG/BC1/Y A ^ -> Y ^ BUFX2 1.4400 1.4400 0.4598 0.4600
clkroot - (net) - - - -
TC1/A BUFX2 1 1400 1 1400 0 0003 0 4603
Learn more at Cadence Online Support - https://support.cadence.com
© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 26
 SOCV Library Format

Spatial derating of the variation component

By default, in SOCV analysis the spatial derate factor that is computed is applied to both
the nominal and variation components of delay. To control whether any spatial derate is
applied on top of the variation (sigma) component you can use the following global
control:

set timing_socv_sigma_spatial_multiplier [ 0.0 <= value <= 1.0 ]

Specifying interconnect variation

The SOCV side-file format can also be used to provide coefficients to be used to model
random variation on the interconnect.

To use the library to estimate interconnect variation, you must enable the flow with the
global setting:

set timing_socv_rc_variation_mode true | false

This variable has a default setting of false.

object_type : design
[path_type]? : [clock data]*
[pin_direction]? : [rise fall]*
[voltage]? : <voltage value>?
delay_type : net
late_variation_multiplier? : <0.0 <= value <= 1.0 >?
early_variation_multiplier? : <0.0 <= value <= 1.0 >?

The format allows different variation multipliers to be provided for clock vs. data paths,
for rising vs. falling nets, and for early vs. late delays if that level of specificity is
required. The voltage attribute may also be used to specify different multipliers for
different parts of the design based on the voltage of the domain.

When interconnect variation is enabled, delay calculation will provide the timer with the
full interconnect delay as the mean, and the percentage specified by the variation
multiplier as a random variation sigma component. Statistical arrival time calculations
will treat the interconnect sigma similarly to the sigma delay of a gate arc from LVF -
mean delays are added and the variation component is root-sum-squared.

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 27
 SOCV Library Format

Path 1: MET Setup Check with Pin BLK/BR2/CK

Endpoint: BLK/BR2/D (^) checked with leading edge of 'WAVE'

Beginpoint: BLK/BR1/Q (v) triggered by leading edge of 'WAVE'

Path Groups: {WAVE}

Other End Arrival Time 1.59548 (-3.00S) | 2.46980 | 0.29144

- Setup 0.21179 (+3.00S) | 0.21179 | 0.00000

+ Phase Shift 10.00000

+ CPPR Adjustment 1.26667 (+3.00S) | 0.03440 | 0.41076

= Required Time 13.16077 (-3.00S) | 12.29241 | 0.28945(-)

- Arrival Time 4.91407 (+3.00S) | 4.02600 | 0.29602

= Slack Time 8.08035 (-3.00S) | 8.26641 | 0.06202

Clock Rise Edge 0.00000

= Beginpoint Arrival Time 0.00000 (+3.00S) | 0.00000 | 0.00000

Timing Path:

-----------------------------------------------------------------------------------------

Timing Point Arc Cell Delay Delay Delay Arrival Arrival Arrival

Mean Sigma Mean Sigma Time

-----------------------------------------------------------------------------------------

tclk tclk ^ - - - - 0.00000 0.00000 0.00000

tclk - (net) - - - - - -

CG/BC1/A - BUFX2 0.02900 0.00290 0.03770 0.02900 0.00290 0.03770

CG/BC1/Y A ^ -> Y ^ BUFX2 0.69810 0.15516 1.16358 0.72710 0.15519 1.19266

clkroot - (net) - - - - - -

TC1/A - BUFX2 0.01070 0.00110 0.01400 0.73780 0.15519 1.20337

TC1/Y A ^ -> Y ^ BUFX2 0.86940 0.24094 1.59222 1.60720 0.28659 2.46698

tclkint - (net) - - - - - -

CG1/B - AND2X4 0.03350 0.00340 0.04370 1.64070 0.28661 2.50054

CG1/Y B ^ -> Y ^ AND2X4 0.36620 0.00175 0.37145 2.00690 0.28662 2.86676

SOCV timing report with 10% interconnect variation specified

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 28
 SOCV Library Format

The variation component on interconnect arcs can be accessed using the Tcl API by
querying the following properties on the timing_arc object:

 delay_sigma_max_fall
 delay_sigma_max_rise
 delay_sigma_min_fall
 delay_sigma_min_rise

Support
Cadence Online Support provides access to support resources, including an extensive
knowledge base, access to software updates for Cadence products, and the ability to
interact with Cadence Customer Support. Visit https://support.cadence.com.

Feedback
Email comments, questions, and suggestions to [email protected].

Learn more at Cadence Online Support - https://support.cadence.com

© 2020 Cadence Design Systems, Inc. All rights reserved worldwide. Page 29