Gyan Sagar College of Engineering
MID SEMESTER TEST – I
(FEB.- 2023) Gyan Sagar College of Engineering
BRANCH – CSE, SEM –III MID SEMESTER TEST – I
(FEB.- 2023)
Subject Name : DIGITAL SYSTEMS Code : CS-304 BRANCH – CSE, SEM –III
Max. Marks : 20 Time : 01:30
Subject Name : DIGITAL SYSTEMS Code : CS-304
hrs.
Max. Marks : 20 Time : 01:30
Note : All questions carry equal marks. Attempt any two questions from
hrs.
each unit.
Note : All questions carry equal marks. Attempt any two questions from
each unit.
UNIT-I
Q.1) State and prove basic law of algebra. (5) UNIT-I
Q.1) State and prove basic law of algebra. (5)
Q.2) Explain 1’s & 2’s complement in detail. Also subtract (1010)2 from
(1000)2 using 2’s compliment. (5)
Q.2) Explain 1’s & 2’s complement in detail. Also subtract (1010)2 from
(1000)2 using 2’s compliment. (5)
Q.3) Simplify the Boolean function using K-map
F ( A , B ,C , D )=∑m ( 1 , 3 ,7 , 11, 15 ) +∑ d (0 , 2 ,5) Q.3) Simplify the Boolean function using K-map
(5)
F ( A , B ,C , D )=∑m ( 1 , 3 ,7 , 11, 15 ) +∑ d (0 , 2 ,5)
(5)
UNIT-II
Q.1) Explain Full-adder circuit with block diagram, Truth table and logic UNIT-II
diagram . (5)
Q.1) Explain Full-adder circuit with block diagram, Truth table and logic
diagram . (5)
Q.2 ) Drive the Boolean expression for 4-bit adder/subtractor circuit. (5)
Q.2 ) Drive the Boolean expression for 4-bit adder/subtractor circuit. (5)
Q.3) Explain in detail about the encoder circuit. (5)
Q.3) Explain in detail about the encoder circuit. (5)