FDD770N15A FairchildSemiconductor
FDD770N15A FairchildSemiconductor
April 2015
FDD770N15A
N-Channel PowerTrench® MOSFET
150 V, 18 A, 77 mΩ
Features Description
• RDS(on) = 61 mΩ ( Typ.) @ VGS = 10 V, ID = 12 A This N-Channel MOSFET is produced using Fairchild Semicon-
ductor’s advanced PowerTrench® process that has been tai-
• Fast Switching Speed
lored to minimize the on-state resistance while maintaining
• Low Gate Charge superior switching performance.
• High Performance Trench Technology for Extremely Low
RDS(on) Applications
• High Power and Current Handling Capability • DC to DC Converters
• RoHS Compliant • Synchronous Rectification for Server / Telecom PSU
• Battery Charger
• AC motor drives and Uninterruptible Power Supplies
• Off-line UPS
G G
S D-PAK
Thermal Characteristics
Symbol Parameter FDD770N15A Unit
RθJC Thermal Resistance, Junction to Case, Max. 2.2 o
C/W
RθJA Thermal Resistance, Junction to Ambient, Max. 87
Off Characteristics
BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 150 - - V
ΔBVDSS Breakdown Voltage Temperature
ID = 250 μA, Referenced to 25oC - 0.0824 - V/oC
/ ΔTJ Coefficient
VDS = 120 V, VGS = 0 V - - 1
IDSS Zero Gate Voltage Drain Current μA
VDS = 120 V, VGS = 0 V, TC = 125oC - - 500
IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V - - ±100 nA
On Characteristics
VGS(th) Gate Threshold Voltage VGS = VDS, ID = 250 μA 2.0 - 4.0 V
RDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 12 A - 61 77 mΩ
gFS Forward Transconductance VDS = 10 V, ID = 12 A - 20 - S
Dynamic Characteristics
Ciss Input Capacitance - 575 765 pF
VDS = 75 V, VGS = 0 V,
Coss Output Capacitance - 64 85 pF
f = 1 MHz
Crss Reverse Transfer Capacitance - 3.9 6 pF
Coss(er) Energy Related Output Capacitance VDS = 75 V, VGS = 0 V - 113 - pF
Qg(tot) Total Gate Charge at 10V - 8.4 11 nC
Qgs Gate to Source Gate Charge VDS = 75 V, ID = 12 A, - 2.7 - nC
VGS = 10 V
Qgd Gate to Drain “Miller” Charge - 1.8 - nC
Vplateau Gate Plateau Volatge (Note 4) - 5.7 - V
Qsync Total Gate Charge Sync. VDS = 0 V, ID = 6 A - 6.9 - nC
Qoss Output Charge VDS = 37.5 V, VGS = 0 V - 14 - nC
ESR Equivalent Series Resistance (G-S) f = 1 MHz - 0.5 - Ω
Switching Characteristics
td(on) Turn-On Delay Time - 10.3 30.6 ns
tr Turn-On Rise Time VDD = 75 V, ID = 12 A, - 3.1 16.2 ns
td(off) Turn-Off Delay Time VGS = 10 V, RG = 4.7 Ω - 15.8 41.6 ns
tf Turn-Off Fall Time (Note 4) - 2.8 15.6 ns
6.0V
5.5V 10
10
o
150 C
o
25 C
o
-55 C
*Notes:
1 1. 250μs Pulse Test
o
2. TC = 25 C
0.5 1
0.1 1 7 3 4 5 6 7
VDS, Drain-Source Voltage[V] VGS, Gate-Source Voltage[V]
0.09
Drain-Source On-Resistance
0.08 o
RDS(ON) [Ω],
0.07
o
25 C
VGS = 20V
0.06 *Notes:
1. VGS = 0V
o
*Note: TC = 25 C 2. 250μs Pulse Test
0.05 1
0 10 20 30 40 50 0.4 0.6 0.8 1.0 1.2 1.4
ID, Drain Current [A] VSD, Body Diode Forward Voltage [V]
6
Coss
*Note: 4
10 1. VGS = 0V
2. f = 1MHz
2
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd Crss
Crss = Cgd *Note: ID = 12A
1 0
0.1 1 10 100 200 0 2 4 6 8 10
VDS, Drain-Source Voltage [V] Qg, Total Gate Charge [nC]
Drain-Source On-Resistance
2.0
1.05
BVDSS, [Normalized]
RDS(on), [Normalized]
1.6
1.00
1.2
0.95
*Notes: 0.8 *Notes:
1. VGS = 0V 1. VGS = 10V
2. ID = 250μA 2. ID = 12A
0.90 0.4
-80 -40 0 40 80 120 160 -80 -40 0 40 80 120 160
o o
TJ, Junction Temperature [ C] TJ, Junction Temperature [ C]
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
60 20
10
ID, Drain Current [A]
100μs 15
ID, Drain Current [A]
Figure 11. Eoss vs. Drain to Source Voltage Figure 12. Unclamped Inductive
Switching Capability
0.8 20
IAS, AVALANCHE CURRENT (A)
0.6 10
TJ = 25 oC
EOSS, [μJ]
0.4
TJ = 125 oC
0.2
0.0 1
0 25 50 75 100 125 150 0.001 0.01 0.1 1 10
VDS, Drain to Source Voltage [V]
tAV, TIME IN AVALANCHE (ms)
2.5
θJC [Z [ C/W]
]
o
0.5
1
Response
Response
0.2
PDM
0.1
(t), Thermal
t1
0.05 t2
Thermal
0.02 *Notes:
0.01 o
1. ZθJC(t) = 2.2 C/W Max.
0.1
ZθJC
Single pulse
2. Duty Factor, D= t1/t2
3. TJM - TC = PDM * ZθJC(t)
0.05
10
-5 -4
10 10
-3
10
-2
10
-1
1
Rectangular Pulse
t1, Rectangular PulseDuration
Duration [sec]
[sec]
RL VDS
VDS 90%
VGS VDD
RG
10%
VGS
V
10V
GS
DUT
td(on) tr td(off)
tf
t on t off
VGS
VDS
I SD
L
Driver
RG
Same Type
as DUT VDD
IRM
VSD VDD
Body Diode
Forward Voltage Drop
Figure 17. Peak Diode Recovery dv/dt Test Circuit & Waveforms
Driver
VGS
( Driver)
t
VGS 10V
VDD (DUT)
t
VRG
DUT
RG
1
⋅ VR ( t ) dt
RG ∫ G
Qsync =
VGS
Figure 18. Total Gate Charge Qsync. Test Circuit & Waveforms