Chapter 1

Introduction to CMOS VLSI

Design

Chapter 1: introduction to VLSI design

Course Topics

• Introduction to CMOS circuits

• MOS transistor theory, processing technology
• CMOS circuit and logic design
• System design methods
• CAD algorithms for backend design

Chapter 1: introduction to VLSI design

Course materials
• Textbook
• Weste and Harris. CMOS VLSI Design
(4rd edition)
• D. Hodges, H. G. Jackson, R.A. Saleh,
Analysis and design of Digital
integrated circuits

Chapter 1: introduction to VLSI design

Introduction
• Integrated circuits: many transistors on one chip.
• Very Large Scale Integration (VLSI): very many
• Complementary Metal Oxide Semiconductor
• Fast, cheap, low power transistors
• Introduction: How to build your own simple CMOS
chip
• CMOS transistors
• Building logic gates from transistors
• Transistor layout and fabrication

Chapter 1: introduction to VLSI design

A Brief History of integrated circuit
1. Early Beginnings: Pre-Integrated Circuits (Before
1958)
Before the invention of the integrated circuit, electronic devices
relied on discrete components like resistors, capacitors, and
transistors. These components were manually assembled onto
circuit boards, which made devices bulky, less reliable, and more
expensive to produce
2. The Birth of the Integrated Circuit (1958-1959)
1958: Jack Kilby, an engineer at Texas Instruments, developed the
first working integrated circuit. Kilby’s invention was revolutionary;
it consisted of a single piece of germanium semiconductor that
integrated a transistor, several resistors, and a capacitor, all on one
chip. His work laid the foundation for the miniaturization of
electronic circuits. Kilby was awarded the Nobel Prize in Physics in
2000 for his invention

Chapter 1: introduction to VLSI design

A Brief History of integrated circuit
1959: Robert Noyce, a co-founder of Fairchild Semiconductor,
independently invented a more practical version of the integrated
circuit using silicon as the semiconductor material. Noyce's
approach used a planar process, which involved layering and
etching on the silicon wafer, allowing for more efficient production.
This method became the standard for IC fabrication and was more
easily scalable for mass production.
3. The Growth of Integrated Circuits (1960s-1970s)

Chapter 1: introduction to VLSI design

A Brief History of integrated circuit
3. The Growth of Integrated Circuits (1960s-1970s)
1960s: The integrated circuit began to gain traction as companies
like Texas Instruments and Fairchild Semiconductor started mass-
producing ICs. The number of transistors that could be placed on a
single chip increased steadily, a trend that was famously captured
by Gordon Moore’s 1965 prediction, known as Moore’s Law. Moore,
another co-founder of Intel, predicted that the number of
transistors on a chip would double approximately every 18-24
months, a prediction that held true for several decades.

Chapter 1: introduction to VLSI design

A Brief History of integrated circuit
3. The Growth of Integrated Circuits (1960s-1970s)
1968: Intel was founded by Robert Noyce and Gordon Moore.
The company quickly became a leader in the IC industry
1971: Intel introduced the first commercially available
microprocessor, the Intel 4004. It was a 4-bit processor with
2,300 transistors on a single chip, capable of performing basic
arithmetic and control tasks. The introduction of the
microprocessor marked the beginning of a new era, leading to
the development of personal computers.

Chapter 1: introduction to VLSI design

A Brief History of integrated circuit
4. Advances in IC Technology (1980s-1990s)
1980s: The industry saw the adoption of CMOS
(Complementary Metal-Oxide-Semiconductor) technology,
which became the dominant technology for manufacturing
ICs due to its low power consumption and high noise
immunity. This period also witnessed the rise of
microprocessors and microcontrollers, which became
essential components in consumer electronics, computers,
and industrial applications.
1989: The Pentium microprocessor was introduced by Intel,
representing a significant leap in processing power and
marking the beginning of modern computing.

Chapter 1: introduction to VLSI design

A Brief History of integrated circuit
1990s: This decade saw the rise of complex ICs with millions
of transistors, capable of performing sophisticated tasks. The
development of ASICs (Application-Specific Integrated
Circuits) allowed for customization of ICs for specific
applications, leading to more efficient and specialized devices.

Chapter 1: introduction to VLSI design

A Brief History of integrated circuit
5. Modern Era of Integrated Circuits (2000s-Present)
2000s: The industry witnessed exponential growth in IC complexity
and performance. The number of transistors on a single chip grew
into the billions. The introduction of multi-core processors allowed
for parallel processing, significantly improving computational
power. The size of transistors continued to shrink, with
manufacturing processes moving from 130nm to 45nm, 32nm, and
smaller.
2010s: FinFET (Fin Field-Effect Transistor) technology was
introduced, allowing for further miniaturization and energy
efficiency improvements. This period also saw the rise of
System-on-Chip (SoC) designs, integrating various functions
such as processing, memory, and input/output on a single
chip, making devices like smartphones and tablets more
powerful and energy-efficient.
Chapter 1: introduction to VLSI design
A Brief History of integrated circuit
5. Modern Era of Integrated Circuits (2000s-Present)
2020s: The semiconductor industry continues to push the
boundaries with advanced manufacturing nodes like 5nm and
3nm processes. Innovations in chip design, such as 3D
stacking and chiplet architectures, are helping to overcome
the limitations of traditional scaling. The demand for high-
performance computing, driven by artificial intelligence, data
centers, and edge computing, has pushed the development of
specialized ICs such as GPUs (Graphics Processing Units) and
TPUs (Tensor Processing Units).

Chapter 1: introduction to VLSI design

A Brief History of integrated circuit
6. The Future of Integrated Circuits
The future of ICs is likely to be shaped by several key trends:
• Continued miniaturization: As manufacturers continue to shrink
the size of transistors, we are approaching physical limits, leading
to the exploration of new materials and architectures, such as
quantum computing and neuromorphic computing.
• Increased integration: More functions will be integrated into
single chips, leading to even more compact and energy-efficient
devices.
• New materials and processes: Research into materials like
graphene and carbon nanotubes, as well as advanced lithography
techniques, could drive the next wave of IC innovation.

Chapter 1: introduction to VLSI design

A Brief History of integrated circuit
• 1958: First integrated circuit
• Flip-flop using two transistors
• Built by Jack Kilby at Texas Instruments
• 2003
• Intel Pentium 4 µprocessor (55 million transistors)
• 512 Mbit DRAM (> 0.5 billion transistors)
• 53% compound annual growth rate over 45 years
• No other technology has grown so fast so long
• Driven by miniaturization of transistors
• Smaller is cheaper, faster, lower in power!
• Revolutionary effects on society

Chapter 1: introduction to VLSI design

Invention of the Transistor

• Vacuum tubes ruled in first half of 20th century

Large, expensive, power-hungry, unreliable
• 1947: first point contact transistor
• John Bardeen and Walter Brattain at Bell Labs
• Read Crystal Fire
by Riordan, Hoddeson

Chapter 1: introduction to VLSI design

Transistor Types
• Bipolar transistors
• npn or pnp silicon structure
• Small current into very thin base layer controls large
currents between emitter and collector
• Base currents limit integration density
• Metal Oxide Semiconductor Field Effect Transistors
• nMOS and pMOS MOSFETS
• Voltage applied to insulated gate controls current
between source and drain
• Low power allows very high integration

Chapter 1: introduction to VLSI design

MOS Integrated Circuits
• 1970’s processes usually had only nMOS transistors
• Inexpensive, but consume power while idle

Intel 1101 256-bit SRAM Intel 4004 4-bit µProc

• 1980s-present: CMOS processes for low idle power
Chapter 1: introduction to VLSI design
 Moore’s Law
• 1965: Gordon Moore plotted transistor on each
chip
• Fit straight line on semilog scale
• Transistor counts have doubled every 24 months
1,000,000,000

100,000,000
Pentium 4 Integration Levels
Pentium III
10,000,000 Pentium II
Pentium Pro
SSI: 10 gates
Transistors

Pentium
Intel486
1,000,000

100,000
80286
Intel386
MSI: 1000 gates
8086
10,000
8008
8080 LSI: 10,000 gates
4004
1,000
VLSI: > 10k gates
1970 1975 1980 1985 1990 1995 2000

Year

Chapter 1: introduction to VLSI design

Chapter 1: introduction to VLSI design
Chapter 1: introduction to VLSI design
Chapter 1: introduction to VLSI design
Corollaries
• Many other factors grow exponentially
• Ex: clock frequency, processor performance
10,000

1,000 4004

8008

8080
Clock Speed (MHz)

100 8086

80286

Intel386

10 Intel486

Pentium

Pentium Pro/II/III

1 Pentium 4

1970 1975 1980 1985 1990 1995 2000 2005

Year

Chapter 1: introduction to VLSI design

Semiconductor - Silicon Lattice
• Transistors are built on a silicon substrate
• Silicon is a Group IV material
• Forms crystal lattice with bonds to four neighbors

Chapter 1: introduction to VLSI design

Dopants
• Silicon is a semiconductor
• Pure silicon has no free carriers and conducts poorly
• Adding dopants increases the conductivity
• Doping phosphorus (P) of Group V into silicon (Si) of Group
IV makes n-type semiconductor.
• Doping boron (B) of Group III into silicon (Si) of Group IV
makes p-type semiconductor.

Chapter 1: introduction to VLSI design

Dopants
• Silicon is a semiconductor
• Pure silicon has no free carriers and conducts
poorly
• Adding dopants increases the conductivity
• Group III: missing electron, called hole (p-type)
• A p-type semiconductor is an intrinsic semiconductor
doped with boron (B) or indium (In). Silicon of Group IV
has four valence electrons and boron of Group III has
three valence electrons

Chapter 1: introduction to VLSI design

Dopants
• Silicon is a semiconductor
• Pure silicon has no free carriers and conducts
poorly
• Adding dopants increases the conductivity
• Group V: extra electron (n-type)
• An n-type semiconductor is an intrinsic semiconductor
doped with phosphorus (P), arsenic (As), or antimony
(Sb) as an impurity. Silicon of Group IV has four valence
electrons and phosphorus of Group V has five valence
electrons.

Chapter 1: introduction to VLSI design

p-n Junctions
• A junction between p-type and n-type p-type n-type
semiconductor forms a diode.
anode cathode
• Current flows only in one direction
• A PN-junction is formed when an N-type material is
fused together with a P-type material creating a
semiconductor diode

Sketch and explain in detail the IV characteristic of a diode

Chapter 1: introduction to VLSI design
p-n Junctions

Chapter 1: introduction to VLSI design

nMOS Transistor
• Four terminals: gate, source, drain, body
• Gate – oxide – body stack looks like a capacitor
• Gate and body are conductors
• SiO2 (oxide) is a very good insulator
• Called metal – oxide – semiconductor
Source
(MOS)
Gate
capacitor
Drain
• Even though gate is Polysilicon

no longer made of metal SiO2

n+ n+

p bulk Si

Chapter 1: introduction to VLSI design

nMOS Operation
• Body is commonly tied to ground (0 V)
• When the gate is at a low voltage:
• P-type body is at low voltage
• Source-body and drain-body diodes are OFF
• No current flows, transistor is OFF
Source Gate Drain
Polysilicon
SiO2

0
n+ n+
S D
p bulk Si

Chapter 1: introduction to VLSI design

nMOS Operation Cont.
• When the gate is at a high voltage:
• Positive charge on gate of MOS capacitor
• Negative charge attracted to body
• Inverts a channel under gate to n-type
• Now current can flow through n-type silicon from source
through channel to drain, transistor is ON
Source Gate Drain
Polysilicon
SiO2

1
n+ n+
S D
p bulk Si

Chapter 1: introduction to VLSI design

pMOS Transistor
• Similar, but doping and voltages reversed
• Body tied to high voltage (VDD)
• Gate low: transistor ON
• Gate high: transistor OFF
• Bubble indicates inverted behavior
Source Gate Drain
Polysilicon
SiO2

p+ p+

n bulk Si

Chapter 1: introduction to VLSI design

Power Supply Voltage
• GND = 0 V
• In 1980’s, VDD = 5V
• VDD has decreased in modern processes
• High VDD would damage modern tiny transistors
• Lower VDD saves power
• VDD = 3.3, 2.5, 1.8, 1.5, 1.2, 1.0, …

Chapter 1: introduction to VLSI design

Transistors as Switches
• We can view MOS transistors as electrically
controlled switches
• Voltage at gate controls path from source to drain
g=0 g=1

d d d
nMOS g OFF
ON
s s s

d d d

pMOS g OFF
ON
s s s

Chapter 1: introduction to VLSI design

CMOS Inverter

A Y VDD
0
1

A Y

A Y
GND
Chapter 1: introduction to VLSI design
CMOS Inverter

A Y VDD
0
1 0 OFF
A=1 Y=0

ON
A Y
GND
Chapter 1: introduction to VLSI design
CMOS Inverter

A Y VDD
0 1
1 0 ON
A=0 Y=1

OFF
A Y
GND
Chapter 1: introduction to VLSI design
CMOS NAND Gate
M1
A B Y
0 0 M1 M2

0 1 Y
M3
1 0
A
1 1
B M4

Chapter 1: introduction to VLSI design

CMOS NAND Gate
A B Y
0 0 1 ON ON
0 1 Y=1
A=0
1 0 OFF
1 1
B=0
OFF

Chapter 1: introduction to VLSI design

CMOS NAND Gate
A B Y
0 0 1 OFF ON
0 1 1 Y=1
A=0
1 0 OFF
1 1
B=1
ON

Chapter 1: introduction to VLSI design

CMOS NAND Gate
A B Y
0 0 1 ON OFF
0 1 1 Y=1
A=1
1 0 1 ON
1 1
B=0
OFF

Chapter 1: introduction to VLSI design

CMOS NAND Gate
A B Y
0 0 1 OFF OFF
0 1 1 Y=0
A=1
1 0 1 ON
1 1 0
B=1
ON

Chapter 1: introduction to VLSI design

CMOS NOR Gate
A B Y
0 0 1 A M1
0 1 0
1 0 0 B M2

1 1 0 Y
M3 M4

Chapter 1: introduction to VLSI design

3-input NAND Gate
• Y pulls low if ALL inputs are 1
• Y pulls high if ANY input is 0

Y
A
B
C

Chapter 1: introduction to VLSI design

CMOS Circuit design concept
• Pull Up And Pull Down Network

Chapter 1: introduction to VLSI design

 Compound Gates
• Compound gates can do any inverting function
• Ex: For the nMOS pull-down network, take
the uninverted expression

A C A C indicating when the output should be

B D B D pulled to ‘0.’
(a) (b)

C D
The AND expressions (A · B) and (C
A B C D
A B · D) may be implemented by series
(c)
(d) connections of switches
C D
ORing the result requires the parallel
A B
A
B
connection of these two structures
Y Y
A C
C
D
For the pMOS pull-up
B D
(f) network, we must compute the
(e) complementary expression using
switches that turn on
with inverted polarity
Chapter 1: introduction to VLSI design
Example: O3AI

A
B
C D
Y
D
A B C

Chapter 1: introduction to VLSI design

Pass transistors and transmission gate
• An nMOS transistor is an almost perfect switch when
passing a 0 and thus we say it passes a strong 0. However,
the nMOS transistor is imperfect at passing a 1. We say it
passes a degraded or weak 1
• A pMOS transistor again has the opposite behavior, passing
strong 1s but degraded 0s
• When an nMOS or pMOS is used alone as an imperfect
switch, we sometimes call a pass transistor

Explain: pMOS is perfect at passing 1 and imperfect at

passing 0?

Chapter 1: introduction to VLSI design

Pass transistors and transmission gate

Chapter 1: introduction to VLSI design

Pass transistors and transmission gate

Chapter 1: introduction to VLSI design

Multiplexers
• Multiplexers are key components in CMOS memory
elements and data manipulation structures
• Two transmission gates can be tied together to
form a compact 2-input multiplexer

Design Multiplexers with 4 inputs

Chapter 1: introduction to VLSI design
Sequential Circuits
• So far, we have considered combinational circuits,
whose outputs depend only on the current inputs.
Sequential circuits have memory: their outputs
depend on both current and previous inputs
• Flip Flops: These elements receive a clock, CLK,
and a data input, D, and produce an output, Q
• A D latch is transparent when CLK = 1, meaning
that Q follows D. It becomes opaque when CLK =
0, meaning Q retains its previous value and
ignores changes in D
• An edge-triggered flip-flop copies D to Q on the
rising edge of CLK and remembers its old value at
other times

Chapter 1: introduction to VLSI design

Latches
A D latch built from a 2-input multiplexer and two
inverters
The D latch is also known as a level-sensitive latch
because the state of the output is dependent on the
level of the clock signal

Chapter 1: introduction to VLSI design

Flip-Flops
By combining two level-sensitive latches, one negative-sensitive and one
positive-sensitive, we construct the edge-triggered flip-flop
The first latch stage is called the master and the second is called the slave

Chapter 1: introduction to VLSI design

 CMOS Fabrication
• CMOS transistors are fabricated on silicon wafer
• The fabrication sequence consists of a series of steps in
which layers of the chip are defined through a process
called photolithography
• Lithography process similar to printing press
• On each step, different materials are deposited or
etched
• Easiest to understand by viewing both top and cross-
section of wafer in a simplified manufacturing process

Chapter 1: introduction to VLSI design

Inverter Cross-section
• Typically use p-type substrate for nMOS transistors
• Requires n-well for body of pMOS transistors
A
GND VDD
Y SiO2

n+ diffusion

p+ diffusion
n+ n+ p+ p+
polysilicon
n well
p substrate
metal1

nMOS transistor pMOS transistor

Chapter 1: introduction to VLSI design

Well and Substrate Taps
• Substrate must be tied to GND and n-well to VDD
• Metal to lightly-doped semiconductor forms poor
connection (used for Schottky Diode)
• Use heavily doped well
A and substrate contacts /
taps GND Y
V DD

p+ n+ n+ p+ p+ n+

n well
p substrate

substrate tap well tap

Chapter 1: introduction to VLSI design

Inverter Mask Set
• Transistors and wires are defined by masks
• Cross-section taken along dashed line

Chapter 1: introduction to VLSI design

Chapter 1: introduction to VLSI design
Detailed Mask Views
• Six masks n well

• n-well
Polysilicon

• Polysilicon
n+ Diffusion

• n+ diffusion
p+ Diffusion

• p+ diffusion Contact

• Contact

• Metal
Metal

Chapter 1: introduction to VLSI design

Fabrication Steps
• Start with blank wafer
• Build inverter from the bottom up
• First step will be to form the n-well
• Cover wafer with protective layer of SiO2 (oxide)
• Remove layer where n-well should be built
• Implant or diffuse n dopants into exposed wafer
• Strip off SiO2

p substrate

Chapter 1: introduction to VLSI design

Oxidation
• Grow SiO2 on top of Si wafer
• The wafer is first oxidized in a high-temperature
(typically 900–1200 °C) furnace that causes Si and O2 to
react and become SiO2 on the wafer surface

SiO2

p substrate

Chapter 1: introduction to VLSI design

Photoresist
• Spin on photoresist
• Photoresist is a light-sensitive organic polymer
• Softens where exposed to light

Photoresist
SiO2

p substrate

Chapter 1: introduction to VLSI design

Lithography
• Expose photoresist through n-well mask
• Strip off exposed photoresist

Photoresist
SiO2

p substrate

Chapter 1: introduction to VLSI design

Etch
• Etch oxide with hydrofluoric acid (HF)
• Seeps through skin and eats bone; nasty stuff!!!
• Only attacks oxide where resist has been exposed

Photoresist
SiO2

p substrate

Chapter 1: introduction to VLSI design

Strip Photoresist
• Strip off remaining photoresist
• Use mixture of acids called piranha etch
• Necessary so resist doesn’t melt in next step

SiO2

p substrate

Chapter 1: introduction to VLSI design

n-well
• n-well is formed with diffusion or ion implantation
• Diffusion
• Place wafer in furnace with arsenic gas
• Heat until As atoms diffuse into exposed Si
• Ion Implanatation
• Blast wafer with beam of As ions
• Ions blocked by SiO2, only enter exposed Si
SiO2

n well

Chapter 1: introduction to VLSI design

Strip Oxide
• Strip off the remaining oxide using HF
• Back to bare wafer with n-well
• Subsequent steps involve similar series of steps

n well
p substrate

Chapter 1: introduction to VLSI design

Polysilicon
• Deposit very thin layer of gate oxide
• < 20 Å (6-7 atomic layers)
• Chemical Vapor Deposition (CVD) of silicon layer
• Place wafer in furnace with Silane gas (SiH4)
• Forms many small crystals called polysilicon
• Heavily doped to be good conductor

Polysilicon
Thin gate oxide

n well
p substrate

Chapter 1: introduction to VLSI design

Polysilicon Patterning
• Use same lithography process to pattern polysilicon

Polysilicon

Polysilicon
Thin gate oxide

n well
p substrate

Chapter 1: introduction to VLSI design

N-diffusion
• Use oxide and masking to expose where n+
dopants should be diffused or implanted
• N-diffusion forms nMOS source, drain, and n-well
contact

n well
p substrate

Chapter 1: introduction to VLSI design

N-diffusion (cont.)
• Pattern oxide and form n+ regions

n+ Diffusion

n well
p substrate

Chapter 1: introduction to VLSI design

N-diffusion (cont.)
• Historically dopants were diffused
• Usually ion implantation today
• But regions are still called diffusion

n+ n+ n+

n well
p substrate

Chapter 1: introduction to VLSI design

N-diffusion (cont.)
• Strip off oxide to complete patterning step

n+ n+ n+

n well
p substrate

Chapter 1: introduction to VLSI design

P-Diffusion
• Similar set of steps form p+ diffusion regions for
pMOS source and drain and substrate contact

p+ Diffusion

p+ n+ n+ p+ p+ n+

n well
p substrate

Chapter 1: introduction to VLSI design

Contacts
• Now we need to wire together the devices
• Cover chip with thick field oxide
• Etch oxide where contact cuts are needed

Contact

Thick field oxide

p+ n+ n+ p+ p+ n+

n well
p substrate

Chapter 1: introduction to VLSI design

Metalization
• Sputter on copper / aluminum over whole wafer
• Pattern to remove excess metal, leaving wires

Metal

Metal
Thick field
oxide
p+ n+ n+ p+ p+ n+

n well
p substrate

Chapter 1: introduction to VLSI design

Layout Design Rules
• Mead and Conway [Mead80] popularized scalable
design rules based on a single parameter, λ, that
characterizes the resolution of the process. λ is
generally half of the minimum drawn transistor
channel length. This length is the distance between
the source and drain of a transistor and is set by
the minimum width of a polysilicon wire. For
example, a 180 nm process has a minimum
polysilicon width (and hence transistor length) of
0.18 um and uses design rules with

Chapter 1: introduction to VLSI design

Layout
• Chips are specified with set of masks
• Minimum dimensions of masks determine transistor
size (and hence speed, cost, and power)
• Feature size f = distance between source and drain
• Set by minimum width of polysilicon
• Feature size scales ~X0.7 every 2 years both lateral and
vertical
• Moore’s law
• Normalize feature size when describing design rules
• Express rules in terms of l = f/2
• E.g. l = 0.3 µm in 0.6 µm process
• Today’s l = 0.01 µm (10 nanometer = 10-8 meter)

Chapter 1: introduction to VLSI design

Simplified Design Rules
• Mead and Conway popularized scalable design
rules based on a single parameter, λ, that
characterizes the resolution of the process. λ is
generally half of the minimum drawn transistor
channel length
• A conservative but easy-to-use set of design rules
for layouts with two metal layers in an n-well
process is as follows:
vMetal and diffusion have minimum width and spacing of
4 λ.
vContacts are 2 λ × 2 λ and must be surrounded by 1 λ on
the layers above and below.
vPolysilicon uses a width of 2 λ.

Chapter 1: introduction to VLSI design

Simplified Design Rules
• Conservative rules to get you started

Chapter 1: introduction to VLSI design

Inverter Layout
• Transistor dimensions specified as Width / Length
• Minimum size is 4l / 2l, sometimes called 1 unit
• In f = 0.01 µm process, this is 0.04 µm wide, 0.02 µm
long

Chapter 1: introduction to VLSI design

Reference
• IC fabrication:
https://www.youtube.com/watch?v=bor0qLifjz4
• https://www.youtube.com/watch?v=fwNkg1fsqBY
• https://www.youtube.com/watch?v=CkNn98WE5_
k
• https://www.youtube.com/watch?v=GU87SH5e0eI
• https://www.youtube.com/watch?v=c9arR8T0Qts

Chapter 1: introduction to VLSI design