Module 1 Introductory Concepts
Module 1 Introductory Concepts
FACULTY OF COMPUTING
CONTENTS
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3
Analog quantities
95
90
85
80
75
70
Time of day
1 2 3 4 5 6 7 8 9 10 11 12 1 2 3 4 5 6 7 8 9 10 11 12
A .M . P.M .
Temperature
(°F)
100
95
90
85
80
75
70
Time of day
1 2 3 4 5 6 7 8 9 10 11 12 1 2 3 4 5 6 7 8 9 10 11 12
A .M . P.M .
1 1 1 1 HIGH
0 0 0 0 0 LOW
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Nyquist’s theorem for
digitization
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world-of-digital-music/digital_sampling/
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http://musicandcomputers306.blogspot.com/2010/10/waveforms-ad-conversion-sampling.html
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Self-Test: Which of the following
belong to analog system?
(a) (c)
(e)
Resource: Google searched 10
Example: Analog systems
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Digital
Exercise: Match the picture to which digital
application system it belong to.
(b)
(a)
(b)
(c)
(d) (f)
(e)
(e)
(f)
20Mhz
6Mhz
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Analog and Digital Systems
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Conversion:
20
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Binary digits and logic levels
VH(max)
Digital electronics uses circuits HIGH
that have two states, which are VH(min)
represented by two different Invalid
voltage levels: VL(max)
LOW
VL(min)
LOW LOW
t0 t1 t0 t1
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25
Digital Waveforms
Periodic
Non-Periodic / Aperiodic
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http://commons.wikimedia.org/wiki/File:Waveforms.png
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Hz
seconds
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103
102
101
10-1
10-2
10-3
http://ruthpawson.rbe.sk.ca/johnson_math0910
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= (0.01 * 10-3) s x 103 = (0.01 * 10-3) s x 106
= (0.01 * 10-3+3) ms = (0.01 * 10-3+6) μs
= (0.01 * 100) ms = (0.01 * 103) μs
= 0.01 ms = 10 μs
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Exercise 1.1 : Calculate the frequency of signals if time
period are given as the following:
a) .
b) .
c) .
d) .
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Exercise 1.2 : Calculate the time period of signals if the
frequencies are given as the following:
a) .
b) .
c) .
d) .
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Pulse Definition
Overshoot
Ringing
Droop
90%
Amplitude tW
50%
Pulse width
10%
Ringing
Volts
Pulse
width
Amplitude (A) (tW)
Time
Period, T
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Exercise 1.3: Given the duration or period of a system is
1000ms, determine the on state and off state
of the system that operate with the ratio of
duty cycle is 25%. Show your works.
On State
Off State
Off state :
(module: page 18) 39
Exercise 1.4: Given the duration or period of a system is
1000ms, determine the on state and off state
of the system that operate with the ratio of
duty cycle is 50%. Show your works.
On State Off State
Off state :
(module: page 18) 40
Exercise 1.5: Given the duty cycles of a system is 40% for a
duration of 500ms.
a) Calculate the pulse width of the system.
b) Determine the off state of the system that
operate with the ratio of duty cycle.
Show your works.
Solution 1.5:
a). b).
𝑡𝑡𝑤𝑤
40 = 100 Off State = 500 - 200
500
= 300 ms
40(500)
𝑡𝑡𝑤𝑤 = = 200 𝑚𝑚𝑚𝑚
100
(module: page 18) 41
Timing diagram
At time 8, all
Clock A, B, and C LOW
0 1 0 1 0 1 0 1 0
A
0 0 1 1 0 0 1 1 0
B
0 0 0 0 1 1 1 1 0
C
Clock
1 2 3 4 5 6 7 8
A = ?, B = ?, C = ? A, B, and C HIGH
A = 1,
A and B = HIGH = 1, B = 1,
C = LOW = 0 C = 1
0 0 1
1 0 1
0 1 1
1 0 1 1 0 0 1 0
t0 t1 t2 t3 t4 t5 t6 t7
Computer Modem
Serial data
Data can be
transmitted by 1
transfer 1
or parallel transfer. 1
Parallel data
0
0
t0 t1
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Introduction
• 1854
– George Boole ( Irish mathematician ) developed
mathematical proofs regarding logic.
• 1938
– Claude Shannon, applied George Boole's ‘Boolean
Algebra' to the analysis of electrical circuits
– and that's kind of where the digital electronics started
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Basic logic function
XNOR
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Resource: Floyd, Digital Fundamentals, 10th Edition 57
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http://msdn.microsoft.com/en-us/library/60ecse8t(v=vs.80).aspx
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HIGH
9 Encoder
8
7
6 Binary code
Binary input
7-segment display
∆t3 ∆t3
C F
Switching Switching
sequence sequence
control input control input
Semiconductor
Memories
Optical Memories
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Examples:
Counter Parallel
output lines Binary Binary Binary Binary Binary
code code code code code
1 2 3 4 5 for 1 for 2 for 3 for 4 for 5
Input pulses
Sequence of binary codes that represent
the number of input pulses counted.
DIP
chips
In this case, testing
can be done by a
computer connected to
the system.
Pin 1
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Integrated circuit
Pins
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http://www.visual6502.org/images/263P/S
SI_263P_8404_chip1_package_top.jpg
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(Transistor-transistor Logic)
(Emitter-Coupled Logic)
(Complementary Metal–Oxide–Semiconductor)
(N-Type Metal–Oxide–Semiconductor)
CMOS –
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Altera_MAX_7128_2500_gate_CPLD.jpg/300px-Altera_MAX_7128_2500_gate_CPLD.jpg 80
Resource: http://upload.wikimedia.org/wikipedia/commons/thumb/f/fa/
Altera_StratixIVGX_FPGA.jpg/300px-Altera_StratixIVGX_FPGA.jpg
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Resource: Floyd, Digital Fundamentals, 10th Edition 82