Distribution Transformer Voltage Control Using a Single-

Phase Matrix Converter

Citation for published version (APA):
Wang, R., Huisman, H., & Wijnands, C. G. E. (2022). Distribution Transformer Voltage Control Using a Single-
Phase Matrix Converter. In 2022 24th European Conference on Power Electronics and Applications (EPE'22
ECCE Europe) Article 9907157 Institute of Electrical and Electronics Engineers.
https://ieeexplore.ieee.org/document/9907157

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 Distribution transformer voltage control using a single-phase matrix

converter

Rui Wang, dr. ir. Henk Huisman, prof. Korneel Wijnands

Eindhoven University of Technology
P.O. Box 513, 5600 MB Eindhoven, The Netherlands Eindhoven, the Netherlands
Email: [email protected]

Keywords

On-load tap changer(OLTC), Hybrid transformer,AC-AC converter, Single-phase ma-

trix converter.

Abstract

A new topology is proposed for fully-electronic tap changers in distribution transformers. In every single

phase, the voltage is regulated by a 2 × 1 matrix converter, which can be extended using the concept of

multilevel converters. The topology allows reaching the desired functionality with one single tap, which

reduces the cost of the transformer.

Introduction

Medium-voltage (MV) to low-voltage (LV) distribution transformers are used to step down MV grid

voltage to a suitable level for residential consumers. LV side end-users shall receive a stable voltage.

However, due to voltage drop on transmission lines, users can receive different voltage levels due to cor-

responding line impedance and currents. As a trend, residential loads are increasing due to the growing

penetration of electrical vehicles, heat pumps and solar panels. Apart from these, the loads become bidi-

rectional, which roughly doubles the voltage swing at consumer side. As a result, voltage fluctuations

become larger and happen more frequently.

To maintain a relatively stable LV side voltage, tap changers are used to vary the effective transformer

turns ratio. In principle, tap changers can be placed at either MV or LV side of the transformer; the

most common is at the MV side. Fig. 1 shows a simplified circuit of a distribution transformer with

tap changers. The transformer is in Delta-Wye connection; it has (n1a + n1b ) turns at the MV side and
n2 turns at the LV side. The tap winding is located at the MV side, in this example, it has n1b turns in

total and five equivalent tap positions. By switching to different positions, different voltage levels can be

obtained at the LV side.

Fig. 1: Distribution transformer with mechani- Fig. 2: Proposed voltage regulators for a distri-
cal tap changers at the MV side. bution transformer.

Conventional tap changers use mechanical switches, which limit the speed of the tap-changing process.

The resolution of the voltage regulation depends on the number of tap positions. Lifetime of mechan-

ical switches is significantly impacted by arcs during switching. To prolong the lifetime and reduce

maintenance cost, electronically-assisted tap changers use both mechanical and semiconductor switches.

Semiconductor switches are used in the process of switching between different tap position, which helps

to reduce arcs and to extend the lifetime of the mechanical switches. However, the time of the tap-

changing process (between two taps) is still 100 ∼200 ms [1, 2, 3]; and jumping taps is not allowed as

this would lead to large circulating current. Fully-electronic tap changers replace mechanical switches

with semiconductor switches, which bring many advantages compared to mechanical switches [2]:

• Low maintenance cost: The arcs caused by mechanical switches disappear.

• Fast tap-changing process because of the high switching speed of semiconductor devices.

• Better controllability: The LV side voltage can be controlled continuously, which suggests that

these tap changers can be potentially used in power quality management.

Considering the switching and conduction losses, efficiencies of fully-electronic tap changers are lower.

For cost concerns, manufacturing costs are higher for fully-electronic tap changers; however, their main-

tenance costs will be significantly lower compared to designs using mechanical switches. Therefore,

fully-electronic tap changers are very promising compared to conventional products. Previous research

proposed fully-electronic tap changers by inserting parallel half-bridge circuits between multiple tap po-

sitions [5, 6, 7]. In this paper, a new topology is proposed for fully-electronic tap changers as shown in

Fig. 2. The tap changer requires only one tap connection. LV side voltages are controlled by voltage
regulators (VR) on the MV side. In principle, VRs can also be installed at the LV side; in this paper, only

the MV side version is considered.

For simplicity, the following discussion will focus on the VR in one single phase of the distribution

transformer as shown in Fig. 3. Also for simplicity, the transformer is assumed ideal; and filters design

will not be covered.

Voltage regulator

Fig. 4 provides an equivalent circuit of the VR. In this circuit, the VR is presented as three voltage sources

ux , uz and uy . According to coupling of the transformer:

n1a + n1b
uy = uz − uUV + uL (1)
n2

uy can be defined as a function of inputs ux and uz :

1
uy = ((ux + uz ) + K(ux − uz )) (2)
2

where K is a control variable to realize different LV side voltages and −1 6 K 6 1. The effective MV

side winding turns n1,e is defined as:

n1,e uUV
= (3)
n2 uL

By combining (1) and (2), n1,e can be obtained:

1
n1,e = n1a + (1 − K) n1b (4)
2

For K = 1, the tap winding n1b is open and only n1a is used; for K = −1, tap winding is fully connected

and (n1a + n1b ) winding is used at the MV side. The effective MV side winding can be controlled to any

value in between n1a and (n1a + n1b ) by setting K.

For a conventional mechanical tap changer, the grid voltage is applied to the main transformer winding

n1a and part of the tap winding 12 (1 − K) n1b ; whereas the rest of the tap winding 21 (1 + K) n1b is open

and there is no current flowing. However, for the electronic VR, a current iz flows through the entire tap

winding n1b .

Fig. 5 and Fig. 6 show two basic topologies for the VR. For the half-bridge topology, the VR is directly
 iy iy
uU iL uU iL
+ +
+ +
un1a n1a un1a n1a
+ +
uUV − ix − uUV − ix −
n2 uL ZL n2 uL ZL

−
+
iy u y Voltage
ux + iy uy ux +
uV un1b n1b uV un1b n1b

+
−
Regulator − uz −
iz − iz −

−
+
uz ideal ideal
Voltage
Regulator

Fig. 3: Voltage regulator of one phase. Fig. 4: Simplified single-phase circuit.

switching between the tap winding terminals. Gate signals are often modulated using PWM. Bidirec-

tional voltage-blocking switches are required due to the AC voltage. The advantage of this circuit is its

simplicity. However, these bidirectional switches need to be controlled very accurately in the commuta-

tion process.

Fig. 6 shows a different solution using the matrix topology, it contains three switching legs X,Y, Z and

a DC link capacitor Cdc . Phases X and Z are connected to the tap winding; they control the circulating

current between the VR and the tap winding. The LV side voltage is determined by the duty cycle of

phase Y . Because of the DC link, bidirectional switches are unnecessary; standard IGBTs or MOSFETs

with diodes can be used. As in the case of mechanical switches, the VR does not need to store energy.

Thus, the DC link voltage is constant in the steady state; and as a consequence, the capacitor can be

small in principal. This circuit needs two more switches compared to the AC half bridge. Thus, the

matrix circuit has a higher manufacturing cost. However, the implementation of control is easier because

bidirectional switches are not required.

Considering MV applications, the high voltage is challenging for IGBTs/MOSFETs. For the half bridge

circuit, the possible solution would be using series connected switches to reduce voltage stress on a single

switch. However, this requires a lot of efforts in hardware design. For the matrix converter, there are

more multilevel solutions available, such like modular multilevel converters (MMC). This topic will be

covered in future research.

Matrix converter control

A cascade control strategy is used for the matrix circuit. The inner current loop controls the circulating

current to guarantee energy balance; and the voltage loop keeps the DC link voltage constant.

The current loop is shown in Fig. 8. The circulating current is defined as:

i∆ = ix − iz (5)
 ix phase Y phase X phase Z
ux
S1 S1 S3 S5
ux
uy ix
uy Cdc
iy iy
uz
iz
S2 S2 S4 S6
uz
iz

Fig. 5: Half bridge Fig. 6: Matrix converter

The reference of circulating current is derived from the requirement of energy balance of the VR:

Z t0 + 1
f0
(ix ux + iz uz − iy uy ) dt = 0 (6)
t0

where f0 is the fundamental frequency of the grid voltage; and this equation can be simplified as:

Z t0 + 1  
f0 K∆
i − iy (ux − uz ) dt = 0 (7)
t0 2

According to (7), the circulating current reference i∆ref should be

K
i∆ref = iy + i∆⊥ (8)
2

where the term i∆⊥ only contributes to reactive power and 90◦ phase difference is required between the

current term i∆⊥ and the voltage (ux − uz ).

A proportional-resonant (PR) controller Ci∆ is used in the current loop due to the sinusoidal current

reference. In practice, an addition integrator (PIR) might be needed to prevent DC offset in the current.

a
i∆ref −1 a mx
K
× b
iy + i∆err uzx,ref b
+ −
Ci∆ +
0.5 × my
ix −
− i∆ a
iz 1 a mz
b
b
Udc

Fig. 7: Current loop control.

The control diagram including the voltage loop is shown in Fig. 8, a PI controller CUdc is used to keep

a constant DC link voltage. The output of the PI controller is multiplied by the normalized modulation

signal mx , in order to obtain a sinusoidal reference i∆ref,2 to be added to the current loop.
 + i∆ref,2
Udc,ref CUdc
Udc
− ×
normalized mx
+ a
i∆ref,1 + i∆ref −1 a mx
K
× b
iy + i∆err uzx,ref b
+ −
Ci∆ +
0.5 × my
ix −
− i∆ a
iz 1 a mz
b
b
Udc

Fig. 8: Control diagram for the matrix baseline.

Scaled-down test

The purpose of this test is to verify the operating principle of the proposed matrix topology. Fig. 9 shows

the lab setup; the schematic is shown in Fig. 10. The input voltage uin is 50Hz and 240 Vrms. The VR

circuit uses an existing 3-phase IGBT inverter with a 2.45 mF capacitor. the IGBTs are switching at

20kHz with 2µs dead time. The high frequency components of the modulated voltages are eliminated by

LC filters. The selected transformer (USTE 1000/2x115) has rated power of 1 kVA and the turns ratio is

n1a : n1b : n2 = 2.02 : 0.48 : 1. The tap winding n1b is arranged at the primary side. A 60Ω resistor RL is

placed at the secondary side as load.

A V
V
A

Fig. 9: Lab setup Fig. 10: Schematic of the test setup

The control is realized using dSPACE MicrolabBox 1202/1302. The DC link voltage Udc should be

higher than the tap winding peak voltage in order to prevent over modulation. Initially, Udc is controlled

at 80V to just satisfy this requirement. In the current loop, the orthogonal term i∆⊥ is set to zero.
Results

Fig. 11 shows an example of the operation when K is 0.5. Waveforms were recorded using dSPACE. The

input voltage uin and regulated transformer secondary voltage u2 are shown in Fig. 11a; and resulting

VR currents are shown in Fig. 11b. Fig. 11c shows the DC link voltage of the VR; udc was controlled at

80V with a very small ripple. In Fig. 11d, the circulating current i∆ was tracking the reference. However,

the actual current was larger than its ideal reference (Kiy ). This difference could be related to the dead

time, which was not considered in the ideal situation. The modulation errors caused by the dead time

are nonlinear functions of currents. In the VR, currents in switching legs X, Z and Y have different

amplitudes, which lead to different errors of ux , uz and uy . As a result, the circulating current reference

needs to be corrected to maintain the energy balance. Besides, the converter loss is also a concern.

Especially the switching loss can be considerable due to the hard switching.

(a) voltage (b) VR currents

(c) DC link voltage ripple (d) circulating current

Fig. 11: Test results at K = 0.5.

The current flow to the input voltage source iy and also the load current i2 were measured using the
oscilloscope Tektronix MSO54 as shown in Fig. 12. Spikes appeared in the unfiltered waveform of iy

due to the hard switching of IGBTs. After filtering, harmonics at the switching frequency were mostly

eliminated. In terms of the load current i2 , the amplitude of the ripple was less than 3%. The ripple and

harmonic distortion can be further reduced by optimizing the filter design if necessary.

(a) One 50Hz cycle (b) ripples at peak currents

Fig. 12: Current iy and i2 , measured by oscilloscope (K = 0.5).

The dynamic performance was investigated by using step references for K. Results are shown in Fig. 13

and Fig. 14. In both test scenarios, the current loop immediately followed new references. Due to

the disturbance in the current loop, the DC link voltage changed in the beginning and was gradually

controlled back to its references. Especially, in Fig. 14, the step of K happened when the input voltage

was at its peak value. Though oscillations were observed initially, controllers regulated the system to the

steady state in a short period.

(a) voltage (b) circulating current (c) DC link voltage

Fig. 13: Step response: K steps up from -1 to 1.

According to (4), the effective number of turns n1e at the primary side of the transformer can be more

than (n1a + n1b ) if K > 1, or less than n1a if K < 1. However, when K is beyond the normal operation

range of −1 6 K 6 1, the amplitude of the VR output voltage uy will increase. Thus, a higher DC link
 (a) voltage (b) circulating current (c) DC link voltage

Fig. 14: Step response: K steps down from 1 to -1.

voltage is required to prevent overmodulation. In Fig. 15, the DC link voltage was increased to 120V. In

the normal operation, the waveform of u2 was limited to the area between u2 |K=−1 and u2 |K=1 . When K

was set to +/-1.2, u2 resulted in slightly larger/smaller amplitudes.

Fig. 15: u2 wrt. K values, Udc = 120V Fig. 16: Voltage regulation range

Fig. 16 summarizes the voltage regulation range as a function of the control variable K. The voltage base

is chosen as the ideal voltage of U2 when K = 0, and the input grid voltage is 240Vrms.

n2
Ubase = 240 × = 106.2 V. (9)
n1a + 21 n1b

The ideal curve is estimated by:

240 V n2
U2 [pu] = × 1
. (10)
Ubase n1a + 2 (1 − K) n1b

During the test, u2 was measured when a different DC link voltage Udc was applied. In normal operation,

U2 did not show a dependency on Udc . However, operations at K < −1 or K > 1 were not allowed when
Udc was 80V. As shown in Fig. 16 , the measured secondary voltages were smaller than their ideal values.

To explain this difference, aside from the dead time distortion as mentioned before, another reason could

be the leakage components of the transformer. This will be investigated in the future.

Conclusion and future work

In this paper, a new power-electronic tap changer (VR) is proposed for distribution transformers. The

voltage regulation is realized by a single-phase matrix type converter. This VR is capable to realize a

wider range of effective turns coupled to the input voltage, which was often limited by the length of tap

winding in previous research. The functionalities of the proposed matrix type circuit are verified in the

scaled-down test. However, there were some mismatches between ideal estimations and measurements.

Further study needs to include more details in modelling: for instance, the three-winding transformer

model including leakage components and also considering the converter loss in the energy balance cal-

culation.

The voltage of the MV grid is normally 10kV or 23kV in Europe. Thus, extending the proposed concept

to multilevel/multi-cell topologies (e.g. modular multilevel converters) is needed. This will be addressed

in future research.

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