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59 Sayali A Expt4

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17 views8 pages

59 Sayali A Expt4

Uploaded by

saykulkarni69
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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EXPERIMENT NO: 4

Title: To realize various flip-flops

Name: Sayali Kulkarni

Div: A

Batch: C

Roll no.:59

Class: S.E Comps (Sem III) Lecturer: Sejal M Chopra


Subject: DLCA Lab
Don Bosco Institute of Technology, Kurla
Academic Year 2024-25

EXPERIMENT NO: 4
To realize various flip-flops
AIM To simulate flip-flop circuits using a circuit simulator applet.
LEARNING To learn building of sequential circuits and then verifying their truth table.
OBJECTIVE
LEARNING
OUTCOME Students will be able to implement the simulation of a sequential circuit.

LAB CSL 302.3: Ability to analyze various sequential circuits


OUTCOME
PROGRAM PO1-1,
OUTCOME PO2-1,
PO4-1,
PO8-3,
PO9-3
BLOOM'S Analyze
TAXONO
MY LEVEL
THEORY D Flip-Flop
● D flip-flop stands for DATA (also known as Delay) flip-flops.
● Constructed from SR flip-flops using a NOT gate between the input
terminals.
● D flip-flop can be used to Hold the input conditions.
● D flip-flops can be used in registers, shift registers and some of the
counters.

Class: S.E Comps (Sem III) Lecturer: Sejal M Chopra


Subject: DLCA Lab
Don Bosco Institute of Technology, Kurla
Academic Year 2024-25
Equation- Qt+1=D

T Flip-Flop
● The T flip flop stands for Toggle flip-flop.
● Simplified version of JK flip-flop by connecting the same input ‘T’ to
bothinputs of JK flip-flop.
● T flip-flop can be used for one of these two functions such as Hold
&Complement of present state based on the input conditions.
● Widely used in counters.

Class: S.E Comps (Sem III) Lecturer: Sejal M Chopra


Subject: DLCA Lab
Don Bosco Institute of Technology, Kurla
Academic Year 2024-25

Equations:
Q(t+1)=T’ Q(t) +T Q(t)’

SOFTWARE Circuit simulator applet(https://falstad.com/circuit/)


USED
PROBLEM Problem statement 1:
STATEMENTS Implement various flip-flops using gates.

Batch A
Realize SR and D flip flop

Class: S.E Comps (Sem III) Lecturer: Sejal M Chopra


Subject: DLCA Lab
Don Bosco Institute of Technology, Kurla
Academic Year 2024-25

Batch B
Realize D and T flip flop

Batch C
Realize JK and T flip flop

Class: S.E Comps (Sem III) Lecturer: Sejal M Chopra


Subject: DLCA Lab
Don Bosco Institute of Technology, Kurla
Academic Year 2024-25

D FLIP-FLOP
url:- https://tinyurl.com/2dqeu8h8

Class: S.E Comps (Sem III) Lecturer: Sejal M Chopra


Subject: DLCA Lab
Don Bosco Institute of Technology, Kurla
Academic Year 2024-25

T FLIP-FLOP:-
URL LINK:- https://tinyurl.com/27hwsejv

Class: S.E Comps (Sem III) Lecturer: Sejal M Chopra


Subject: DLCA Lab
Don Bosco Institute of Technology, Kurla
Academic Year 2024-25

CONCLUSION D Flip-Flop
 Functionality: Captures input data (D) on the rising or falling edge of
the clock signal.
 Purpose: Primarily used for data storage and synchronization in digital
systems.
 Behavior: Maintains a stable output (Q) until the next clock pulse,
ensuring data integrity.
 Applications: Widely used in registers, memory devices, and state
machines.

T Flip-Flop
 Functionality: Toggles its output state (Q) with each clock pulse when
the input (T) is high.
 Purpose: Primarily used in counting and frequency division
applications.
 Behavior: Changes output based on its previous state, making it ideal
for toggle operations.
 Applications: Commonly used in binary counters, frequency dividers,
and toggle switches

REFERENCES 1. https://www.tutorialspoint.com/digital_circuits/digital_circuits_flip_flops.htm
2. R. P. Jain, “Modern Digital Electronic”, McGraw-Hill Publication, 4thEdition.
3. https://www.youtube.com/watch?v=aFJ6yZQ7myQ

Class: S.E Comps (Sem III) Lecturer: Sejal M Chopra


Subject: DLCA Lab

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