CARLETON UNIVERSITY

Department of Systems and Computer Engineering

SYSC 4507 Computer Systems Architecture Winter 2010
Course Handout

Instructors:
Professor J.R. Green, P.Eng., room 4488ME, e-mail [email protected] (Please send from
your connect account and include “SYSC4507” in the subject line to ensure a response.)

Professor R.A. Goubran, P.Eng., email [email protected]

Office hours: By appointment. See course web site for additional hours.

Instructional Hours per Week:

3 lecture hours: Tuesdays & Thursdays 4:05-5:25pm in 4499 ME
One problem analysis hour: Mondays 1:35-2:25pm in C164 LOEB

Prerequisites:
(ELEC2607) AND (SYSC2001 OR SYSC3006)

Students who have not satisfied the prerequisites for this course must either: a) withdraw from the
course, b) submit a prerequisite waiver online at http://www.sce.carleton.ca/ughelp, or c) may be
deregistered from the course after the last day to register for courses in the Winter 2010 term.

Textbook:
"Computer Architecture and Organization", John P. Hayes, McGraw-Hill, Third Edition,
ISBN 0-07-027355-3, 2002

Web Page:
The course web page can be located at www.sce.carleton.ca/courses/sysc-4507/. Students are
required to check this page often for course updates. Supplementary lecture notes will be posted
there for student use. Note that reading the supplementary lecture notes only is NOT ENOUGH to
pass this course! The single best predictor of student performance is attendance at lectures and labs.

Other References:
"Modern Processor Design: Fundamentals of Superscalar Processors", John P. Shen, Mikko
Lipatsi, McGraw-Hill, ISBN 0-07-057064-7, 2005
"Computer Organization and Architecture: Designing for Performance", William Stallings, 7th
edition, Prentice Hall, ISBN 0-13-185644-8, 2006
"Computer Organization: A Quantitative Approach", J. Hennessy and D. Patterson, Morgan
Kaufmann, Third Edition, ISBN 1-55860-724-2, 2003
"Computer Organization", C. Hamacher, Z. Vranesic and S. Zaky, McGraw Hill, Fifth Edition,
ISBN 0-07-232086-9, 2002
Additional materials may be made available on the course website.
SYSC4507 Computer Systems Architecture Winter 2010

Grading Scheme:
Problem Assignments: .......................................... 2X 5% ........ = 10 %
In-Class Tests: ...................................................... 2 X 15 % ........ = 30 %
Final Exam (scheduled 3 hours, closed-book): .... 60 % ........ = 60 %

Important Notes:
1) Students must pass the Final Examination Paper (50% or higher) in order to pass the course.
(i.e. Failing to pass the Final Examination results in an F grade for the course). The final
examination is for evaluation purposes only and will not be returned to the students.

2) Students are expected to attend all lectures and labs. If a student is absent from a lecture, it is
up to the student to obtain missed lecture material from colleagues in the course.

3) Students who miss a test due to illness must provide a valid medical certificate to the instructor
not later than 48Hrs after returning to campus. The certificate must clearly state the name of the
doctor with contact information, the date & time that you were seen, the time of onset, the degree of
incapacitation, and the expected recovery date. Once the certificate has been verified, the test
weight will be added to the final examination weight.

4) Academic Accommodation. You may need special arrangements to meet your academic
obligations during the term because of disability, pregnancy or religious obligations. Please review
the course outline promptly and write to me with any requests for academic accommodation during
the first two weeks of class, or as soon as possible after the need for accommodation is known to
exist.

Students with disabilities requiring academic accommodations in this course must register with the
Paul Menton Centre for Students with Disabilities (PMC) for a formal evaluation of disability-
related needs. Documented disabilities could include but not limited to mobility/physical
impairments, specific Learning Disabilities (LD), psychiatric/psychological disabilities, sensory
disabilities, Attention Deficit Hyperactivity Disorder (ADHD), and chronic medical conditions.
Registered PMC students are required to contact the PMC, 613-520-6608, every term to ensure that
your Instructor receives your Letter of Accommodation, no later than two weeks before the first
assignment is due or the first in-class test/midterm requiring accommodations. If you only require
accommodations for your formally scheduled exam(s) in this course, please submit your request for
accommodations to PMC by the last official day to withdraw from classes in each term.

5) Plagiarism (e.g. copying and handing in for credit someone else's work) is a serious instructional
offence that will not be tolerated. Please refer to the section on instructional offences in the
Undergraduate Calendar for additional information.

6) Deferred Exams. Students who miss the final exam may be granted permission to write a
deferred examination (see the Undergraduate Calendar for regulations on deferred exams). To be
considered for a deferred exam, satisfactory performance during the term includes submitting all
tests and assignments and achieving an overall average of at least 50%.

7) Accreditation of our Engineering programs requires that classes and laboratories, tutorials, or
problem analysis sessions continue to run through the review period of the winter term.
SYSC4507 Computer Systems Architecture Winter 2010

Health and Safety:

Every student should have a copy of our Health and Safety Manual. An electronic version
of the manual can be found at:
http://www.sce.carleton.ca/courses/health-and-safety.pdf

Outline of Topics:
1 Evolution of Computers

The Nature of Computers and their Limitations

The Mechanical Era (Pascal, Babbage's Difference & Analytical Engines)
First & Second Generations (ENIAC, EDVAC, IAS, IBM 7094)
The Von-Neumann Architecture
Third & Fourth Generations (ILLIAC IV, IBM 360, LISP-Machines)
Fifth Generation Computers and Data Flow Architectures
The Harvard Architecture

2 Central Processing Unit (CPU)

General Description and Basic Concepts

Instruction Formats (Fixed and Variable Length Fields)
Instruction Set Characteristics and Completeness

3 Arithmetic Logic Unit (ALU)

Computer Arithmetic and Information Representation

Arithmetic Logic Unit Design (Carry-Look-ahead and Ripple-Carry Adders,
Hardware Array Multipliers, ...)
Co-Processors Architecture and Performance

4 Control Unit Design

Control Unit Operation and Instruction Sequencing

Hardwired Control Units and Design Methods
Microprogrammed Control Units & Microinstruction Optimization

5 Reduced Instruction Set Computers (RISC)

RISC Characteristics Compared to Complex Instruction Set Computers (CISC)

RISC Pipelining and Register Window Concept
Representative Architectures: Berkeley RISC1, SUN SPARC, IBM 6000
Data and Control Hazards
SYSC4507 Computer Systems Architecture Winter 2010

6 Memory & I/O Organization

Memory Characteristics (Access Modes, Alterability, Permanence of Storage)

Memory Technologies:
- Magnetic: Tapes, Floppies, Hard Disks, USB memory keys, ...
- Optical: CD-ROMS, DVD RW,
Hierarchical Memory Structures and Virtual Memories
High-Speed Memories (Cache, Interleaved, and Associative)
I/O Organization (Programmable IO, Interrupt, DMA, IO Processors)

7 Parallel Organization & Supercomputers

Overview of Parallel Processing: Goals, Approaches, and Challenges

Classification of Parallel Architectures: SISD, SIMD, MISD, and MIMD
Instruction-Level Parallelism, Superscalar Architectures, and Hyper-Threading
(e.g. Intel Pentium, PowerPC)
Pipeline Processors and Array/Vector Processors
Multiprocessor Systems: Shared Memory and Distributed Memory
Design Considerations: Interconnection Networks, Communication Protocols,
and Software
Performance Limitations of Parallel Processing: Amdahl's Law / Effect
Scalable Architectures; Supercomputer Architectures
Case study of modern multi-core processors (e.g. Cell BE, GPGPU)

8 Fault Tolerant Computers

Classification of Redundancy (HW, SW, Information, & Time Redundancies)

Hardware Redundancy: Static (TMR) & Dynamic (Diagnosis and Recovery)
Reliability, Availability, and Mean Time to Failure (MTTF)
Error Detection & Correction
Examples (TANDEM Computers)

9 Digital Signal Processing (DSP) Architectures and Embedded Systems

DSP Characteristics and Typical Applications

Digital Signal Processors (Texas Instruments TMS320 family, Motorola, Intel,
Analog Devices ADSP-218x, ADSP-2106x and SHARC)
TI TMS320 Family of DSP's (C55x, C67x, and the VLIW Architecture)
Multiprocessor Architectures for DSP and Systolic Arrays
Embedded Systems Characteristics and Examples