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COA - Unit 4

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COA - Unit 4

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VIJAY
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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UNIT – IV

What is a peripheral device?

A peripheral device is a device that either enters information into a computer system or receives
information from the computer system. The normal workflow of a computer system is the following.

It receives data and commands from the user, processes the data according to the given commands, presents
the processed data to the user, and stores or prints the processed data if the user gives a command to save or
print.

Except for the components that process the given data, all other components of a computer system are
known as peripheral devices.

In simple words, if a hardware component is not part of the core components and is used either to put
information into the computer system or to get information from the computer system, then it is a
peripheral device. The core components of a computer system are the components that control the computer
system and process the data.

A computer system can function without peripheral devices but it cannot function without core components.
Examples of core components are CPU, motherboard, power supply, RAM, and ROM. Keyboard, mouse,
monitor, printer, scanner, and USB drive are examples of peripheral devices.

Types of peripheral devices


Peripheral devices are classified into three types. These types are input devices, output devices, and
input/output devices.

An input device inserts data or commands into the computer system. A keyboard, mouse, scanner, barcode
reader, digital pen, webcam, microphone are some examples of input devices.
An output device receives the processed data from the computer system and presents that data to the user.
A monitor, printer, speaker, headphone, and projector are some examples of output devices.

An input/output device can perform both input and output functions. A hard drive, USB drive, memory
card, tape drive, and NIC are some examples of input/output devices.

Examples of peripheral devices


So far we have discussed what a peripheral device is and how many types of peripheral device are. Now,
let's discuss some most common peripheral devices and their functions.

Keyboard

A keyboard is the most common and important input device. It allows the user to enter letters,
numbers, and symbols. When a user presses a key on a keyboard, the keyboard sends a unique signal to the
computer. The processing unit of the computer receives the signal and translates the signal to know which
key is pressed.

Mouse

A mouse is another important input device. It uses point-and-click technology to interact with the system.
Most mice have two buttons and a scroll wheel between them. To track motion, a ball was used in older
mice. Modern mice use laser light to track motion.

Webcam

A webcam is a popular input device. It captures live videos and photos. Usually, it is inbuilt on laptops and
tablets. Mostly, it is used for video calls and live presentations.

Scanner

A scanner is another popular input device. It is used to scan documents. Normally, it is used to save and use
a soft copy of the document.

Monitor

A monitor is one of the most important output devices. It receives output from the processing unit and
displays that output. The output displayed on the monitor is temporary. Because of this, the output
displayed on the monitor is called the soft copy of the output. To make it permanent, you have to store it on
other output devices.

Printer

A printer is another important output device. It prints the given output. After printing, the output is
permanently stored on the paper. Because of this, the output printed on the paper is called the hard copy of
the output. There are mainly three types of printers: dot-matrix, inkjet, and laser. A dot printer uses pins
and an ink-coated ribbon for printing. An inkjet printer uses liquid ink for printing while a laser printer uses
a laser toner for printing.
Speaker

A speaker is a popular output device. It plays the audio output signals. Laptops and tablets have inbuilt
speakers. On desktop computers, they can be attached via ports.

Hard disk

A hard disk is the most important input/output device. It provides both input and output functionalities.
When a computer reads data from the hard disk, the hard disk provides input functionality. When the
computer stores data on the hard disk, the hard disk provides output functionality.

USB drive

USB drives are another popular input/output device. They are compact and small. They are mostly used to
transfer data between computers that are not connected. When you transfer data from a computer to the
USB drive, the USB drive provides output functionality. When you transfer data from a USB drive to the
computer, the USB drive provides input functionality.

NIC

NIC stands for the network interface card. A NIC is an input/output device. A computer uses a NIC to
connect the network. When the computer sends data to the network, it uses the output function of the NIC.
When the computer receives data from the network, it uses the input function of the NIC.

Input-output subsystems
The Input/output organization of computer depends upon the size of computer and the
peripherals connected to it. The I/O Subsystem of the computer provides an efficient mode of
communication between the central system and the outside environment.
The most common input output devices are: Monitor, Keyboard, Mouse, Printer, Magnetic tapes
Input Output Interface provides a method for transferring information between internal storage and
external I/O devices. Peripherals connected to a computer need special communication links for
interfacing them with the central processing unit. The purpose of communication link is to resolve the
differences that exist between the central computer and each peripheral.

The Major Differences are:-


• Peripherals are electromechnical and electromagnetic devices and CPU and memory are
electronic devices. Therefore, a conversion of signal values may be needed.
• The data transfer rate of peripherals is usually slower than the transfer rate of CPU and
consequently, a synchronization mechanism may be needed.
• Data codes and formats in the peripherals differ from the word format in the CPU and memory.
• The operating modes of peripherals are different from each other and must be controlled so as
not to disturb the operation of other peripherals connected to the CPU.

To resolve these differences, computer systems include special hardware components between the CPU
and Peripherals to supervises and synchronizes all input and out transfers. These components are called
Interface Units because they interface between the processor bus and the peripheral devices.

I/O DEVICE INTERFACE


The I/O Bus consists of data lines, address lines and control lines. The I/O bus from the processor is
attached to all peripherals interface. To communicate with a particular device, the processor places a
device address on address lines. Each Interface decodes the address and control received from the I/O
bus, interprets them for peripherals and provides signals for the peripheral controller. It is also
synchronizes the data flow and supervises the transfer between peripheral and processor. Each
peripheral has its own controller.
For example, the printer controller controls the paper motion, the print timing. The control lines are
referred as I/O command. The commands are as following:
Control command- A control command is issued to activate the peripheral and to inform it what to do.
Status command- A status command is used to test various status conditions in the interface and the
peripheral.
Data Output command- A data output command causes the interface to respond by transferring data
from the bus into one of its registers.
Data Input command- The data input command is the opposite of the data output.

Functions of Input-Output Interface:

1. It is used to synchronize the operating speed of CPU with respect to input-output devices.
2. It selects the input-output device which is appropriate for the interpretation of the input-output
device.
3. It is capable of providing signals like control and timing signals.
4. In this data buffering can be possible through data bus.
5. There are various error detectors.
6. It converts serial data into parallel data and vice-versa.
7. It also convert digital data into analog signal and vice-versa.

In this case the interface receives on item of data from the peripheral and places it in its buffer register.
I/O Versus Memory Bus

To communicate with I/O, the processor must communicate with the memory unit. Like the I/O
bus, the memory bus contains data, address and read/write control lines. There are 3 ways that computer
buses can be used to communicate with memory and I/O:
1. Use two Separate buses, one for memory and other for I/O.
2. Use one common bus for both memory and I/O but separate control lines for each.
3. Use one common bus for memory and I/O with common control lines.

Programmed I/O Mode:


In this mode of data transfer the operations are the results in I/O instructions which is
a part of computer program. Each data transfer is initiated by a instruction in the
program. Normally the transfer is from a CPU register to peripheral device or vice-
versa. Once the data is initiated the CPU starts monitoring the interface to see when next
transfer can made. The instructions of the program keep close tabs on everything that
takes place in the interface unit and the I/O devices.

The transfer of data requires three instructions:


• Read the status register.
• Check the status of the flag bit and branch to step 1 if not set or to step 3 if set.
• Read the data register.

In this technique CPU is responsible for executing data from the memory for
output and storing data in memory for executing of Programmed I/O as shown in Fig.
Drawback of the Programmed I/O:
The main drawback of the Program Initiated I/O was that the CPU has to monitor the
units all the times when the program is executing. Thus the CPU stays in a program loop
until the I/O unit indicates that it is ready for data transfer. This is a time consuming process
and the CPU time is wasted a lot in keeping an eye to the executing of program.

Interrupt-Initiated I/O:
In this method an interrupt facility an interrupt command is used to inform the device
about the start and end of transfer. In the meantime the CPU executes other program. When
the interface determines that the device is ready for data transfer it generates an Interrupt
Request and sends it to the computer.
When the CPU receives such an signal, it temporarily stops the execution of the
program and branches to a service program to process the I/O transfer and after completing it
returns back to task, what it was originally performing.
In this type of IO, computer does not check the flag. It continues to perform its task.
Whenever any device wants the attention, it sends the interrupt signal to the CPU.CPU then
deviates from what it was doing, store the return address from PC and branch to the address
of the subroutine.
There are two ways of choosing the branch address:
Vectored Interrupt: In vectored interrupt the source that interrupts the CPU
provides the branch information. This information is called interrupt vectored.
Non-vectored Interrupt: In non-vectored interrupt, the branch address is
assigned to the fixed address in the memory.
Types of Interrupts:
• Hardware Interrupts: Interrupts present in the hardware pins.
• Software Interrupts: These are the instructions used in the program whenever the required
functionality is needed.
• Vectored interrupts: These interrupts are associated with the static vector address.
• Non-vectored interrupts: These interrupts are associated with the dynamic vector address.
• Maskable Interrupts: These interrupts can be enabled or disabled explicitly.
• Non-maskable interrupts: These are always in the enabled state. we cannot disable them.
• External interrupts: Generated by external devices such as I/O.
• Internal interrupts: These devices are generated by the internal components of the processor
such as power failure, error instruction, temperature sensor, etc.
• Synchronous interrupts: These interrupts are controlled by the fixed time interval. All the
interval interrupts are called as synchronous interrupts.
• Asynchronous interrupts: These are initiated based on the feedback of previous instructions.
All the external interrupts are called as asynchronous interrupts.

Direct Memory Access (DMA):


In the Direct Memory Access (DMA) the interface transfer the data into and out of the
memory unit through the memory bus. The transfer of data between a fast storage device
such as magnetic disk and memory is often limited by the speed of the CPU. Removing the
CPU from the path and letting the peripheral device manage the memory buses directly
would improve the speed of transfer. This transfer technique is called Direct Memory
Access (DMA).
During the DMA transfer, the CPU is idle and has no control of the memory buses. A DMA Controller
takes over the buses to manage the transfer directly between the I/O device and memory.

The CPU may be placed in an idle state in a variety of ways. One common method extensively used in
microprocessor is to disable the buses through special control signals such as:
Bus Request (BR)
Bus Grant (BG)
These two control signals in the CPU that facilitates the DMA transfer. The Bus Request (BR) input
is used by the DMA controller to request the CPU. When this input is active, the CPU terminates the

execution of the current instruction and places the address bus, data bus and read write lines into a high
Impedance state. High Impedance state means that the output is disconnected.
The CPU activates the Bus Grant (BG) output to inform the external DMA that the Bus Request
(BR) can now take control of the buses to conduct memory transfer without processor.
When the DMA terminates the transfer, it disables the Bus Request (BR) line. The CPU disables the Bus
Grant (BG), takes control of the buses and return to its normal operation.

The transfer can be made in several ways that are:


DMA Burst
Cycle Stealing
DMA Burst: In DMA Burst transfer, a block sequence consisting of a number of memory words is
transferred in continuous burst while the DMA controller is master of the memory buses.
Cycle Stealing: Cycle stealing allows the DMA controller to transfer one data word at a time, after
which it must returns control of the buses to the CPU.

DMA Controller:
The DMA controller needs the usual circuits of an interface to communicate with the CPU and I/O
device. The DMA controller has three registers:
Address Register
Word Count Register
Control Register
Address Register: Address Register contains an address to specify the desired location in memory.
Word Count Register: WC holds the number of words to be transferred. The register is incre/decre by
one after each word transfer and internally tested for zero.
Control Register: Control Register specifies the mode of transfer

The unit communicates with the CPU via the data bus and control lines. The registers in the
DMA are selected by the CPU through the address bus by enabling the DS (DMA select) and RS
(Register select) inputs. The RD (read) and WR (write) inputs are bidirectional.
When the BG (Bus Grant) input is 0, the CPU can communicate with the DMA registers through the
data bus to read from or write to the DMA registers. When BG =1, the DMA can communicate directly
with the memory by specifying an address in the address bus and activating the RD or WR control.
DMA Transfer:
The CPU communicates with the DMA through the address and data buses as with
any interface unit. The DMA has its own address, which activates the DS and RS lines. The
CPU initializes the DMA through the data bus. Once the DMA receives the start control
command, it can transfer between the peripheral and the memory.
When BG = 0 the RD and WR are input lines allowing the CPU to communicate
with the internal DMA registers. When BG=1, the RD and WR are output lines from the
DMA controller to the random access memory to specify the read or write operation of
data.

Privileged Instructions and Non- Privileged Instructions:


Instructions are divided into two categories:
non-privileged instructions
privileged instructions.
A non-privileged instruction is an instruction that any application or user can execute.

A privileged instruction, on the other hand, is an instruction that can only be executed in
kernel mode. Instructions are divided in this manner because privileged instructions could
harm the kernel.

What are Privileged Instructions?


Privileged instructions are the instructions that are only executed in kernel mode.
• If a privileged instruction is attempted to get executed in user mode, that instruction will get ignored
and treated as an illegal instruction. It is trapped in the operating system by the hardware.
• It is the responsibility of the operating system to ensure that the Timer is set to interrupt before
transferring control to any user application. As a result, the operating system can regain control if the
timer is interrupted.
• The operating system uses privileged instruction to ensure proper operation.

Examples of privileged instructions


Some examples of privileged instructions include-
1. I/O instructions
2. Context switching
3. Clear memory
4. Set the timer of the CPU
5. Halt instructions
6. Interrupt management
7. Modify entries in the Device-status table

What are Non-Privileged Instructions?


Now we will discuss the second type of instructions, i.e., non-privileged instructions.
Non-Privileged instructions are the instructions that are only executed in user mode.
Examples of Non-privileged instructions
1. Generate trap instruction
2. Reading system time
3. Reading status of processor
4. Sending the output to the printer
5. Performing arithmetic operations

Now, the following figure will show the layered based organization of the operating system.
The whole computer system is divided into two parts- hardware and software. The software part
communicates with the hardware part using the instruction set.
The instruction set is divided into two categories:
1. Privileged instruction - These instructions must be used wisely as their misuse can harm the system.
2. Non-privileged instruction - These are normal instructions.

The software part can be divided into two categories based on the instructions:
1. Kernel - Can execute only privileged instructions.
2. Application - Can execute both privileged and non-privileged instructions.

Difference between Privileged and Non-Privileged Instructions


S.No Privileged instruction Non-privileged instruction

1., These instructions are only executed in These instructions are only executed in user
kernel mode. mode.

2. These instructions get executed under These instructions get executed without
specific restrictions and are mostly used interfering with other tasks because they do not
for sensitive operations. share any resources.

3. Examples of privileged instructions are - Examples of non-privileged instructions are -


I/O instructions, context switching, clear generate trap instruction, reading system time, the
memory, etc. reading status of the processor, etc.

INTERRUPT AND EXCEPTIONS

Interrupt is one of the classes of Exception. There are 4 classes of Exception- interrupt, trap, fault
and abort. Though, interrupt belongs to exception still there are many differences between them.
In any computer, during its normal execution of a program, there could be events that can cause the
CPU to temporarily halt. Events like this are called interrupts. Interrupts can be caused by either
software or hardware faults. Hardware interrupts are called Interrupts, while software interrupts are
called Exceptions. Once an interrupt is raised, the control is transferred to a special sub-routine called
Interrupt Service Routine (ISR), that can handle the conditions that are raised by the interrupt.
Exceptions and Software interrupts:
Exceptions and interrupts are unexpected events that disrupt the normal flow of
instruction execution. An exception is an unexpected event from within the processor. An
interrupt is an unexpected event from outside the processor. You are to implement
exception and interrupt handling in your multicycle CPU design.
External interrupts come from input input (I/O) devices, from a timing device, from a circuit
monitoring the power supply, or from any other external source. Examples that cause external interrupts
are l/0 device requesting transfer of data, l/0 device finished transfer of data, elapsed time of an event,
or power failure.
Internal interrupts arise from illegal or erroneous use of an instruction or data. Internal interrupts
are also called traps. Examples of interrupts caused by internal error conditions are register overflow,
attempt to divide by zero, an invalid operation code, stack overflow, and protection violation.
External and internal interrupts are initiated from signals that occur in the hardware of the CPU.
A software interrupt is initiated by executing an instruction.

What is Trap, Fault and Abort ?


1. Trap –
It is typically a type of synchronous interrupt caused by an exceptional condition (e.g.,
breakpoint, division by zero, invalid memory access).
2. Fault –
Fault exception is used in a client application to catch contractually-specified SOAP faults. By
the simple exception message, you can’t identify the reason of the exception, that’s why a Fault
Exception is useful.
3. Abort –
It is a type of exception occurs when an instruction fetch causes an error.
What is Interrupt ?
The term Interrupt is usually reserved for hardware interrupts. They are program control interruptions
caused by external hardware events. Here, external means external to the CPU. Hardware interrupts
usually come from many different sources such as timer chip, peripheral devices (keyboards, mouse,
etc.), I/O ports (serial, parallel, etc.), disk drives, CMOS clock, expansion cards (sound card, video
card, etc). That means hardware interrupts almost never occur due to some event related to the
executing program.
Example –
An event like a key press on the keyboard by the user, or an internal hardware timer timing out can
raise this kind of interrupt and can inform the CPU that a certain device needs some attention. In a
situation like that the CPU will stop whatever it was doing (i.e. pauses the current program), provides
the service required by the device and will get back to the normal program. When hardware
interrupts occur and the CPU starts the ISR, other hardware interrupts are disabled (e.g. in 80×86
machines). If you need other hardware interrupts to occur while the ISR is running, you need to do
that explicitly by clearing the interrupt flag (with sti instruction). In 80×86 machines, clearing the
interrupt flag will only affect hardware interrupts.
What is Exception ?
Exception is a software interrupt, which can be identified as a special handler routine. Exception can
be identified as an automatically occurring trap. Generally, there are no specific instructions
associated with exceptions (traps are generated using a specific instruction). So, an exception occurs
due to an “exceptional” condition that occurs during program execution.
Example –
Division by zero, execution of an illegal opcode or memory related fault could cause exceptions.
Whenever an exception is raised, the CPU temporarily suspends the program it was executing and
starts the ISR. ISR will contain what to do with the exception. It may correct the problem or if it is
not possible it may abort the program gracefully by printing a suitable error message. Although a
specific instruction does not cause an exception, an exception will always be caused by an instruction.
For example, the division by zero error can only occur during the execution of the division
instruction.
Difference between Interrupt and Exception :

Interrupt Exception

These are Hardware interrupts. These are Software Interrupts.

Occurrences of hardware
This is not a true case in terms of
interrupts usually disable other
Exception.
hardware interrupts.

These are asynchronous These are synchronous internal requests


external requests for service for service based upon abnormal events
(like keyboard or printer needs (think of illegal instructions, illegal
service). address, overflow etc).
Interrupt Exception

Being synchronous, exceptions occur


Being asynchronous, interrupts
when there is abnormal event in your
can occur at any place in the
program like, divide by zero or illegal
program.
memory location.

These are normal events and


These are abnormal events and often
shouldn’t interfere with the
result in the termination of a program
normal running of a computer.

What is a Program?
A program is a set of instruction codes that has been designed to complete a certain task. It is a passive entity stored
in the secondary memory of the computer system. A program is considered as a passive and static entity.

A program is like a file which contains a set of instruction codes stored on a disk in the form of an executable file. A
program contains instructions written in any programming language. Programs have an unlimited span of time.

Features of the program


There are various features of the program. Some of the features of the program are as follows:

1. A single user may execute various programs.


2. The operating system is responsible for providing main memory for the storage of all program
instructions.
3. It is a passive entity. It is simply a file containing a set of instructions that have yet to be executed.
4. It doesn't have a control block.
5. It is stored in the system's secondary memory.
6. Various processes may be connected to a single program. For instance, a browser may contain
various tabs open simultaneously.

What is a Process?
A process is an instance of a program that is being currently executed. It is a dynamic and active entity of a program.
Processes are created when the programs are executing and they reside in the main memory.
A process exists only for a limited time, and hence gets terminated as soon as the task completes. A process always
consists of instructions written in machine language. A process contains temporary data, data selection, etc.

Features of the Process


There are various features of the process. Some of them are as follows:

1. Each process contains a definite set of data linked to it. For example, its parent's name, the address
of the allotted memory space, and security properties such as ownership credentials and rights.
2. A process contains a limited lifetime, i.e., only when a process is being executed.
3. Processes are allotted system resources. Network ports and file descriptors are two examples.
4. It is an active entity.
5. It contains high resources.
6. It needs resources including memory address, CPU, I/O during its working.
7. Each process may produce child processes. Furthermore, they may die or be killed.

aDifference between Program and Process


The following table highlights the important differences between a program and a process −

Program Process

It is a set of instructions that has been It is an instance of a program that is being


designed to complete a certain task. currently executed.

It is a passive entity. It is an active entity.

It resides in the secondary memory of It is created when a program is in execution


the system. and is being loaded into the main memory.

It exists in a single place and continues It exists for a limited amount of time and it
to exist until it has been explicitly gets terminated once the task has been
deleted. completed.

It is considered as a static entity. It is considered as a dynamic entity.


It doesn't have a resource requirement. It has a high resource requirement.

It requires memory space to store It requires resources such as CPU, memory


instructions. address, I/O during its working.

It doesn't have a control block. It has its own control block, which is known
as Process Control Block.

Programs and processes-Role of interrupts in process state transitions


An interrupt is the automatic transfer of software execution in response to a hardware event that
is asynchronous with the current software execution. This hardware event is called a trigger. The
hardware event can either be a busy to ready transition in an external I/O device (like the UART
input/output) or an internal event (like bus fault, memory fault, or a periodic timer).
When the hardware needs service, signified by a busy to ready state transition, it will request an
interrupt by setting its trigger flag. A thread is defined as the path of action of software as it executes.
The execution of the interrupt service routine is called a background thread. This thread is created by the
hardware interrupt request and is killed when the interrupt service routine returns from interrupt (e.g., by
executing a BX LR). A new thread is created for each interrupt request.
It is important to consider each individual request as a separate thread because local variables
and registers used in the interrupt service routine are unique and separate from one interrupt event to the
next interrupt. In a multi-threaded system, we consider the threads as cooperating to perform an overall
task. Consequently we will develop ways for the threads to communicate (e.g., FIFO) and to
synchronize with each other. Most embedded systems have a single common overall goal.
On the other hand, general-purpose computers can have multiple unrelated functions to perform.
A process is also defined as the action of software as it executes. Processes do not necessarily cooperate
towards a common shared goal. Threads share access to I/O devices, system resources, and global
variables, while processes have separate global variables and system resources. Processes do not share
I/O devices.
I/O Device Interfaces

SCSI:
The acronym SCSI stands for Small Computer System Interface. It refers to a standard bus
defined by the American National Standards Institute (ANSI) under the designation X3.131 . In the
original specifications of the standard, devices such as disks are connected to a computer via a 50-wire
cable, which can be up to 25 meters in length and can transfer data at rates up to 5 megabytes/s. The
SCSI bus standard has undergone many revisions, and its data transfer capability has increased very
rapidly, almost doubling every two years. SCSI-2 and SCSI-3 have been defined, and each has several
options.
A SCSI bus may have eight data lines, in which case it is called a narrow bus and transfers data
one byte at a time. Alternatively, a wide SCSI bus has 16 data lines and transfers data 16 bits at a time.
There are also several options for the electrical signaling scheme used. Devices connected to the SCSI
bus are not part of the address space of the processor in the same way as devices connected to the
processor bus. The SCSI bus is connected to the processor bus through a SCSI controller. This controller
uses DMA to transfer data packets from the main memory to the device, or vice versa. A packet may
contain a block of data, commands from the processor to the device, or status information about the
device.
To illustrate the operation of the SCSI bus, let us consider how it may be used with a disk drive.
Communication with a disk drive differs substantially from communication with the main memory. A
controller connected to a SCSI bus is one of two types – an initiator or a target. An initiator has the
ability to select a particular target and to send commands specifying the operations to be performed.
Clearly, the controller on the processor side, such as the SCSI controller, must be able to operate as an
initiator. The disk controller operates as a target. It carries out the commands it receives from the
initiator. The initiator establishes a logical connection with the intended target. Once this connection has
been established, it can be suspended and restored as needed to transfer commands and bursts of data.
While a particular connection is suspended, other device can use the bus to transfer information. This
ability to overlap data transfer requests is one of the key features of the SCSI bus that leads to its high
performance.
Data transfers on the SCSI bus are always controlled by the target controller. To send a
command to a target, an initiator requests control of the bus and, after winning arbitration, selects the
controller it wants to communicate with and hands control of the bus over to it.
Then the controller starts a data transfer operation to receive a command from the initiator.
The processor sends a command to the SCSI controller, which causes the following sequence of
event to take place:
1. The SCSI controller, acting as an initiator, contends for control of the bus.
2. When the initiator wins the arbitration process, it selects the target controller and hands over control
of the bus to it.
3. The target starts an output operation (from initiator to target); in response to this, the initiator sends a
command specifying the required read operation.
4. The target, realizing that it first needs to perform a disk seek operation, sends a message to the
initiator indicating that it will temporarily suspend the connection between them. Then it releases the
bus.
5. The target controller sends a command to the disk drive to move the read head to the first sector
involved in the requested read operation. Then, it reads the data stored in that sector and stores them in a
data buffer. When it is ready to begin transferring data to the initiator, the target requests control of the
bus. After it wins arbitration, it reselects the initiator controller, thus restoring the suspended connection.
6. The target transfers the contents of the data buffer to the initiator and then suspends the connection
again. Data are transferred either 8 or 16 bits in parallel, depending on the width of the bus.
7. The target controller sends a command to the disk drive to perform another seek operation. Then, it
transfers the contents of the second disk sector to the initiator as before. At the end of these transfers, the
logical connection between the two controllers is terminated.
8. As the initiator controller receives the data, it stores them into the main memory using the DMA
approach.
9. The SCSI controller sends as interrupt to the processor to inform it that the requested operation has
been completed.
This scenario show that the messages exchanged over the SCSI bus are at a higher level than
those exchanged over the processor bus. In this context, a “higher level” means that the messages refer
to operations that may require several steps to complete, depending on the device. Neither the processor
nor the SCSI controller need be aware of the details of operation of the particular device involved in a
data transfer. In the preceding example, the processor need not be involved in the disk seek operation.

USB
The USB has been designed to meet several key objectives:
Provide a simple, low-cost, and easy to use interconnection system that overcomes the
difficulties due to the limited number of I/O ports available on a computer. ‹
Accommodate a wide range of data transfer characteristics for I/O devices, including telephone
and Internet connections. ‹
Enhance user convenience through a “plug-and-play” mode of operation.

USB Structure
A serial transmission format has been chosen for the USB because a serial bus satisfies the low-
cost and flexibility requirements.
Clock and data information are encoded together and transmitted as a single signal.Hence, there
are no limitations on clock frequency or distance arising from data skew.
To accommodate a large number of devices that can be added or removed at any time, the USB
has the tree structure. Each node of the tree has a device called a hub, which acts as an
intermediate control point between the host and the I/O device. At the root of the tree, a root hub
connects the entire tree to the host computer.
The tree structure enables many devices to be connected while using only simple point-to-point
serial links.
Each hub has a number of ports where devices may be connected, including other hubs.
In normal operation, a hub copies a message that it receives from its upstream connection to all
its downstream ports. As a result, a message sent by the host computer is broadcast to all I/O
devices, but only the addressed device will respond to that message.
A message sent from an I/O device is sent only upstream towards the root of the tree and is not
seen by other devices. Hence, USB enables the host to communicate with the I/O devices, but it
does not enable these devices to communicate with each other.

USB Protocols:
All information transferred over the USB is organized in packets, where a packet consists of one
or more bytes of information.
The information transferred on the USB can be divided into two broad categories: control and
data. ‹ Control packets perform such tasks as addressing a device to initiate data transfer,
acknowledging that data have been received correctly, or indicating an error. Data packets carry
information that is delivered to a device. For example, input and output data are transferred
inside data packets
Modes of Data Transfer
Synchronous Transmission: In Synchronous Transmission, data is sent in form of blocks or frames. This
transmission is the full-duplex type. Between sender and receiver, synchronization is compulsory. In Synchronous
transmission, There is no gap present between data. It is more efficient and more reliable than asynchronous
transmission to transfer a large amount of data.

Example:
Chat Rooms
Telephonic Conversations
Video
Conferencing

Asynchronous Transmission: In Asynchronous Transmission, data is sent in form of byte or


character. This transmission is the half-duplex type transmission. In this transmission start bits and
stop bits are added with data. It does not require synchronization.
Example:
• Email
• Forums
• Letters

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