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Analog Ic QN Bank

ANALOG IC QN BANK

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100% found this document useful (1 vote)
4K views4 pages

Analog Ic QN Bank

ANALOG IC QN BANK

Uploaded by

Ananthi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

QUESTION BANK
CEC 334—ANALOG IC DESIGN

UNIT I
SINGLE STAGE AMPLIFIERS

PART A
1. What are the advantages of cascade stage over cascade stage?
2. Name and draw any two type of load that are connected to MC differential amplifier
3. Derive output impedance of source follower
4. Draw and explain the basic differential pair
5. Sketch the small signal differential gain of a differential pair as a function of the input CM
level.
6. Define single stage amplifier
7. Draw the small signal model of MOSFET.
8. Mention the properties of common source amplifier
9. Draw the equivalent circuit of cascade.
10. What do you mean by voltage swing?
11. Define bandwidth in cascade amplifier.
PART B
1. Explain the basic concept of MOSFET and derive the models of MOSFET in detail.
2. Analysis the small signal models of common source MOSFET in detail with neat diagram
3. Draw the source follower and analysis the small signal models of same in detail with neat
diagram
4. Explain differential amplifier with active load in detail
5. Discuss about cascade and folded cascade configuration with active load in detail
6. Explain the design of differential amplifier with neat diagram
7. Write short notes on common gate stage. Determine expression for input impedence, output
impedence and voltage gain.

UNIT II
HIGH FREQUENCY AND NOISE CHARACTERISTICS OF AMPLIFIERS
PART A
1. What is the effect of high frequency supply noise in differential amplifier?
2. Compare frequency response characteristics of CS CD and CG amplifiers.
3. Define the Miller effect.
4. What are the various types of noises that affect the performance of op amp?
5. List the statistical characteristics of noise.
6. What is frequency response of amplifier?
7. Mention the statistical characteristics of noise.
8. Define flicker noise
9. What is input referred noise?
10. What is noise in differential amplifier?
11. Define the noise figure in single stage amplifier.
12. Define noise bandwidth.
PART B
1. Explain the frequency response of common source and common gate in detail
2. Discuss the frequency response of source follower in detail
3. Explain the concept of cascade amplifier with neat diagram
4. Discuss the differential amplifier stages in detail
5. Mention the different noises in differential amplifier and explain each noise in detail
6. Discuss the statistical characteristics of noise in amplifier
7. Explain the noise in single stage amplifier in detail.

UNIT III
FEEDBACK AND SINGLE STAGE OPERATIONAL AMPLIFIERS
PART A
1. Define gain boosting.
2. What are the types of noises encountered in op amps?
3. Mention any one method for improving slew rate
4. Define slew rate and state its significance
5. Listed advantages of negative feedback
6. List some applications of feedback
7. List some op amp design parameters
8. Define feedback amplifier
9. Mention the four types of feedback topology
10. What are the properties of negative amplifier?
11. What is PSSR?
12. Draw the circuit diagram of one stage OP-AMP.
PART B
1. Explain the effect of loading in feedback network with neat diagram

2. Discuss the performance of operational amplifier parameters In detail.

3. With neat diagram, explain in detail about the types of negative feedback amplifier in detail

4. Explain the performance of single stage op amp in detail with neat diagram.

5. Discuss in detail about noise in op amp with neat diagram

6. Explain the operation of two stage op amp in detail

7. Draw the voltage feedback amplifier. Draw the basic amplifier without feedback and derive
gain

UNIT IV
STABILITY, FREQUENCY COMPENSATION
PART A
1. State the importance of phase margin in op amp design.
2. What is compensation technique?
3. Define phase margin.
4. What is slewing in two stage op-amp and what causes it?
5. Mention the compensation techniques.
6. Define a multi pole system
7. Explain the purpose of compensation in opamps.
8. Define pole splitting. Draw the effect of pole splitting in miller compensation.
9. What is dominant pole compensation in op-amp design?
10. What is the significance of the unity gain bandwidth product in opamp design?
PART B
1. Explain the working of compensation of two stage op amps.
Derive the relation between gain and bandwidth in feedback amplifier.
2. Explain the frequency response of op amp with multiple poles. Explain stability issues of
op-amp.
3. Explain the compensation methods of two stage op amps in detail.
4. Discuss the compensation techniques using in common gate stage.
5. Examine the role of stability analysis in operational amplifier design.
6. Summarize in detail about slewing in two stage opamp and alternating compensation
technique with neat diagram.
7. Define phase margin in the context of operational amplifier stability analysis. Describe the
relationship between phase margin and stability, and discuss how phase margin is
determined and optimized in opamp design.

UNIT V
LOGIC CIRCUIT TESTING
PART A
1. What are faults in logic circuits?
2. What is design for testability?
3. What are the faults in logic circuits?
4. What is level sensitive scan design?
5. What is Built-In Self-Test (BIST)?
6. Explain ad hoc techniques in fault detection.
7. What is the aim of adhoc test techniques
8. Define fault detection.
9. Describe partial scan in fault detection.
10. What are some advantages of partial scan over full scan?
PART B
1. Discuss the principles and advantages of BIST in fault detection for digital circuits. Explain
the architecture and operation of BIST.
2. Describe LSSD and significance in fault detection and testing of sequential logic circuit.
3. Discuss the architecture and operation of LSSD.
4. Explore the concept of design of testability (DFT) in digital circuit design. Discuss the key
objectives and principles of DFT.
5. Explain the different types of faults commonly encountered in logic circuits. Provide
examples for each type.
6. Examine the concept of partial scan in fault detection and testing of digital circuits.
7. Define fault detection. Describe the fundamental principles of fault detection techniques,
including fault modeling, test generation and fault simulation.

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