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Application Brief
Zero-Drift Amplifiers: Features and Benefits
VDD
Introduction
VIN-
Zero-drift amplifiers employ a unique, self-correcting
technology which provides ultra-low input offset Q1 Q2
Amplification Stage
Q3 Q4
over time and temperature (dVOS/dT) suitable for
To Voltage
VIN+
general and precision applications. TI’s zero-drift
topology also delivers other advantages including no
1/f noise, low broadband noise, and low distortion –
simplifying development complexity and reducing
cost. This may be done 1 of 2 ways; chopper or auto-
VSS
zeroing. This tech note will explain the differences Figure 1. Simplified PMOS / NMOS Differential Pair
between standard continuous-time and zero-drift
amplifiers. The result of this input architecture exhibits some
degree of crossover distortion (for more information
Applications suitable for zero-drift amplifiers
on crossover distortion, see Zero-crossover
Zero-drift amplifiers are suitable for a wide variety of Amplifiers: Features and Benefits). However, the
general-purpose and precision applications that offset of the amplifier is corrected through internal
benefit from stability in the signal path. The excellent periodic calibration, so the magnitude of the offset
offset and drift performance of these amplifiers make transition and the crossover distortion is greatly
it especially useful early in the signal path, where high diminished. Figure 2 shows a comparison of the offset
gain configurations and interfacing with micro-volt between a standard CMOS rail-to-rail and a zero-drift
signals are common. Common applications that amplifier.
benefit from this technology include precision strain 200
gauge and weight scales, current shunt
Input Offset Voltage (µV)
- 100
System performance can be optimized by using
standard continuous-time amplifiers plus a system- - 200
level auto-calibration mechanism. However, this Standard CMOS Rail-to-
Rail Amplifier
additional auto-calibration requires complicated - 300
0.0 1.0 2.0 3.0 4.0 5.0
hardware and software which results in increased
Common Mode Voltage (V)
development time, cost and board space. The
alternative and more efficient solution is to use a zero- Figure 2. CMOS and Zero-drift Input Offset Voltage
drift amplifier, such as the OPA388. Comparison
A traditional rail-to-rail input CMOS architecture has How zero-drift works
two differential pairs; one PMOS transistor pair (blue)
and one NMOS transistor pair (red). Zero-drift Chopping zero-drift amplifiers' internal structure can
amplifiers with rail-to-rail input operation use the same have as many stages as continuous-time amplifiers –
complementary p-channel (blue) and n-channel (red) the main difference is that the input and output of the
input configuration shown below in Figure 1. first stage has a set of switches that inverts the input
signal every calibration cycle. Figure 3 shows the first
half cycle. In the first half cycle, both sets of switches
are configured to flip the input signal twice, but the
SBOA182C – FEBRUARY 2017 – REVISED JANUARY 2021 Zero-Drift Amplifiers: Features and Benefits 1
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offset flips once. This keeps the input signal in phase Figure 5 shows the 1/f and broadband voltage noise
but the offset error polarity is reversed. spectral density for a zero-drift (red) and continuous-
+IN
time (black) amplifier. Notice the zero-drift curve has
+ t no 1/f voltage noise.
VOS CC VOUT
t + 1000
2 Zero-Drift Amplifiers: Features and Benefits SBOA182C – FEBRUARY 2017 – REVISED JANUARY 2021
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