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45 views18 pagesComputer Organization
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—_ i COMPUTER ORGANIZATION — UNIT - 4 Adee
Register Transfer Language and! Micro Operations: Introduction- Functional units, computer
registers, register transfer language, register transfer, bus and memory transfers, arithmetic,
logic and shift micro-operations, arithmetic logic shift uni
Basic Computer Organization and Design: Instruction codes, instruction cycle. Register
reference instructions, Memory reference instructions,input-output and interrupt
REGISTER TRANSFER LANUGAE AND MICRO OPERATIONS
Register Transfer Language
Introduction :,
A digital computer system exhibits an interconnection of digital modules such as
registers, decoders, arithmetic elements, and Control logic.
These digital modules are interconnected with some common data and control paths to form a
complete digital system. Moreover, digital modules are best defined by the re:
operations that are|performed on the data stored in them.
The operations performed on the'data stored in registers are called Micro-operations.
The internal hardware organizatign of a digital system is best defined by specifying.
The set of registers and the flow bf data between them.
The sequence of micro-operations performed on the data which are stored in the registers.
The control paths that initiates the sequence of micro-operation
The Register Transfer Language is the symbolic representat
the sequence of micro-operations.
In a computer system, data transfer takes place between processor registers and memory and
between processor registers and input-output systems. These data transfer can be
represented by standard notations given below:
Notations RO, R1, R2..., and so on represent processor registers.
The addresses of memory locations are represented by names such as LOC, PLACE, MEM,
etc. °
n of notations used to specify
Input-output! registers are represented by names such as DATA IN, DATA OUT and so
on.
Functional Units |
atts |
A computer BES catton describes the functions and design of the various units of a
digital system. — 4
‘¢ A general-purpose computer system is the best-known example of a digital system
Other examples include telephone switching exchanges, digital voltmeters, digital
counters, electronic calculators and digital displays.
struction set and. the
© Computer architecture deals with the specification of the
hardware units that implement the instructions.
Computer hardware consists of electronic circuits, displays, magnetic and optic storage
mediaand also the communication facilities.
© Functional units are a part of a CPU that performs the operations and calculations
called for, by the computer|program.
sh Functions wns of computer system aro paisa he GPU (Cari rocaasing nt
inat performs the operations and calculations called for by the computer program. A
computer consists of five main components namoly, Input unit, Cantal Processing Unit
Memory unit Arithmetic & logical unit, Control unit and an Output unit
—! srowoe )__,f —
teas aU ress
nT
: Cores Processing
i unt
sRoTETIC i
LoccunT |
Input units are used by the computer to read the data. The most commonly used input
devices are keyboards, mouse, joysticks, trackballs, microphones, etc.
© However, the most well-known input device is a keyboard. Whenever a key is pressed,
the corresponding letter or digit is automatically translated into its corresponding binary
code and transmitted over a cable to either the memory or the processor.
Central processing unit
Central processing unit commonly known as CPU can be referred as an electronic
circuitry within a computer that carries out the instructions given by a computer program
by performing the basic arithmetic, logical, control and input/output (/O) opera’
specified by the instructions.
Memory unit E 4 {
which programs are Kept
© The Memory unit can be referred to as the storage area ii
which are running, and that contains data needed by ine) running programs.
The Memory unit can be categorized in two ways namely, primary memory and
secondary memory. \ |
It enables a processor to access running execution applications and services that a
temporarily stored in a specific memory location. £
- Primary storage is the fastest memory that operates at electronic speeds. Primal
memory contains a large number of semiconductor storage cells, capable of storing
bit of information. The word length of a computer is between 16-64 bits.
© Itis also known as the volatile form of memory, means when the computeris shut d
anything contained in RAM is lost Coche membry is also a kind of memory which is used to fetch the data very soon Th
are highly cqupled with the processor
The most cdiimon examples of primary momory aro RAM and ROM.
Secondary memory is usbd when a Iatge amount of data and programs have to be
stored for @ long-term basis.
Itis also known as the Non-volatile memory form of memory, means the data is stored
permanently irrespective of shut down.
The most common examples of secondary memory are magnetic disks, magnetic tapes,
and optical disks.
Arithmetic & logical unit
Control uni
Most of all the arithmetic and logical operations of a computer are executed in the ALU
(Arithmetic and Logical Unit) of the processor. It performs arithmetic operations like
addition, subtraction, multiplication, division and also the logical operations like AND.
‘OR, NOT operations.
The control unit is a component of a computer's central processing unit that coordinates
the operation of the processor. It tells the computer's memory, arithmetic/logic unit and
input and output devices how to respond to a program's instructions.
The control unit is also known as the nerve center of a computer system.
Let's us consider an example of addition of two operands by the instruction given as
Add LOCA, RO. This instruction adds the memory location LOCA to the operand in the
register RO and places the sum in the register RO. This instruction internally performs
several steps.
Output Unit
The primary function of the output unit is to send the processed results to the user.
Output devices display information in a way that the user can understand.
Output devi¢es are pieces of equipment that are used to generate information or any
other resporise processed by the computer. These devices display information that has
been held or generated wi
ina computer.
The most common example of an output device is a monitor
Computer Registers
Registers are a type of computer memory used to quickly accept, store, and transfer
data and instructions that are being used immediately by the CPU. The registers used by the
CPU are often termed as Processor registers.
A processor register may hold an instruction, a storage address, or any data (such as
bit sequence or individual characters). Tho con
UIE NEEDS Pro
memory address
the next instruction
Register Symbol
Data register oR
Acdress register AR
Accumulator ac
Instruction register IR
Program counter PC
Temporary register TR
Input register INPR
Output register ‘OUTR
The following image shows the regi:
Register and Memory Configuration of a basic computer:
un
ORSOF HEGiRter
The register hold
ina the mem
N after the executh
HON of
Following is the list of some of the most c
"PR
ones hay)
| z
stor for holding A
8 for manipulating data and a rodistor fo hling
ory location is used to calculate the addross
{Ne current instruction is completed.
HOMMON rogistors Used in a basic computer
Number of bits
Function
16 Holds momory operand
12 Holds address for the memory
16 Processor register
16 | Holes instruction code
12 Holds addrost of tho
instruction |
we Holds temporary data
8 : | Carries input character
8 - (ates output character
ter and memory configuration for a basic computer.
INPR ~
© 'Thd Memory unit has a capacity of 4096 words, and each word contains 16 bits.
© The Data Rogister (OR) contains 16 bits which hold the operand read from the memory
location. |
o The
memory location,
Tho Program Counter (PC) also contains 12 bits which hold the address of the next
Instruction to be read from memory after the current instruction is executed,
Istor (MAR) contains 12 bits which hold the address for the
© The Accumulator (AC) register is a general purpose processing register.
© The instruction read from memory is placed in the Instruction register (IR)
° The Temporary Realster (TR) is used for holding the temporary data during the
Processing.
© The Input Registers (IR) holds the input characters given by the user.
© The Output Registers (OR) holds the output after processing the input data.
I
Register Transfer |Lanquage
A digital compute system exhibits an interconnection of digital modules such as registers,
decoders, arithmetic elements, ahd Control logic.
These digital modules are interconnected with some common data and contro! paths to form a
complete digital system.
Moreover, digital modules are best defined by the registers and the operations that are
Performed on the data stored in them.
The operations performed on the data stored in registers are called Micro-operations.
The internal hardware organization of a digital system is best defined by specifying
o The set of registers and the flow of data between them.
© The sequence of micro-operations performed on the data which are stored in the
registers. |
© The control paths that initiates the sequence of micro-operation
The Register Tran fer Language is the symbolic representation of notations used to specify
the sequence of mic rh ‘
In a computer system, data transfer takes place between processor registers and memory and
between processor registers and input-output systems. These data transfer can be
represented by standard notations given below:
Notations RO, R1, R2..., and so on represent processor registers.
The addresses of memory locations are represented by names such as LOC, PLACE,
MEM, etc.
input-output registers are represented by names such as DATA IN, DATA OUT and so
on. Reals
The term Register Trahster refers to the availability of hardware lagie circ!
reoister
Most of the standard notations
below
ft are brackets
The content of register or memory location ie denoted by placing sq
Around the name of the register oF memory location
ter Transte
its that can perform
ther
P Meto-eperation and transfer the result of the operation to the same or ano!
used for specifying operations on various registers are stated
The memory address register is designated by MAR.
Program Counter PC holds the next instruiction’s addiels
Instruction Register IR holds the instruction being exectited |
R14 (Processor Register), '
We can also
15), R2 (5), ete.
‘dual bits by placing them in parenthesis. For instance, PC (8-
Data Transfer from one register to another register is represented in symbolic form by
means of replacement operator. For instance, the following statement denotes a
transfer of the data of register R1 into register R2.
Ri
Typically, most of the users want the transfer to occur only in a predetermined control
condition. This can be shown by following _if-then _ statement:
if (P=1) then (R2 — R1); Here P is a control signal genérated in the control section.
Itis more convenient to specify a control function (P) ay separating the control variables
from the register transfer operation. For instance, the| following stalement defines the
data transfer operation under a specific control function|(P). \
P: R2—R1 |
The following image shows the block diagram that depicts the transfer of data from R1 to R2.
‘Transfer from R1 to R2 when P LT a
, of the register
Here, the letter ‘n' indicates the number of bits for the reaister. The ‘n’ outputs of the rea
R1 are connected to the ‘h’ inputs of register R2.
A load input is activated by the control variable ‘P* which is transferred fo the register R2
re brackets
The Sones st register Ot memory location is denoted by placing sauare Pra
around the Home of the register or memory location
Bus and Memory Transfers [ BUS.
4 be provided to transfer
of the registers
sin the
A digital system composed of many registers. and paths must
information from one register to another. The number of wires connecting all
will be excessive if separate lines are used between each register and all other register
system.
___ Abus structure, on the other hand, is more efficient for transferring information between
registers in a multi-register configuration system.
____ A bus consists of a set of common lines, one for each bit of register, through which
binary information is transferred one at a time. Control signals determine which register Is
selected by the bus during a particular register transfer.
‘The following block diagram shows a Bus system for four registers. It is constructed with
the help of four 4 */1 Multiplexers each having four data inputs (0 through 3) and two selection
inputs (S1 and S2)}) \
We have used labels to make it more convenient for you to understand the input-outout
configuration of a Bus system!for four registers. For instance, output 1 of register A is
connected to input 0 of MUX1.
¢
ae
|
|
The two selection lines S1 and S2 are connected to the selection inputs of all four
multiplexers. The selection lines choose the four bits of one register and transfer them into the
four-line common bus. © 0 data inputs of aif
i turn,
e bus. This, in
is register are
4180 = 00, thi
that forms th
ince the outputs of thi
When both of the select lines are at low logic, i.e.
four multiplexers are selected and applied to the outputs
causes the bus lines to receive the content of register A si
connected to the 0 data inputs of the multiplexers.
8 eive the
Similarly, when S1S0 = 04, register B is selected, and the bus lines will recs
content provided by register B
is selected by the bus for each of
The following function table shows the register that
the four possible binary values of the Selection lines.
si SO | Register f
Selected
Note: The number of multiplexers needed to construct the bus is equal to the number of bits in
each register. The size of each multiplexer must be ‘k * 1' since it multiplexes 'k’ data lines. For
instance, a common bus for eight registers of 16 bits each requires 16 multiplexers, one for
each line in the bus. Each multiplexer must have eight data input lines and three selection
lines to multiplex one significant bit in the eight registers.
A bus system can also be constructed using three-state gates instead of multiplexers.
The three state gates can be considered as a digital, circuit that has three gates, two of
which are signals equivalent to logic 1 and 0 as ina conventignal gate. However, the third gate
exhibits a high-impedance state.
The most commonly used three state gates in case of the bus small is a buffer gate.
The graphical symbol of a three-state buffer gate can be represented as:
Normal input A ‘output Y
Normal input B Yea, if C=1
High-impedance if C=0
The following diagram demonstrates the construction of a bus system with three-state buffers. 4
| Nr
The outputs generated by the four buffers are connected to form a single bus line:
Only one buffer can be in active state at a given point of time.
The control inputs to the buffers determine which of the four normal inputs will
communicate with the bus line.
A 2 * 4 decoder ensures that no more than one control input is active at any given point
of time.
Memory Transfer
Most of the standard notations used for specifying operations on memory transfer are stated
below. | |
© The transfer of information from a memory unit to the user end is called
a Read operation.
The transfer of new information to be stored in the memory is called a Write operation
© Amemory word is designated by the letter M.
° We must specify the address of memory word while writing the memory transfer
operations.
© The address register is designated by AR and the data register by DR.
© Thus, a read operation can be stated as:
Read: DR — M[AR]
© The Read statement causes a transfer of information into the data register (DR) from
the memory|word (M) selected by the address register (AR).
© And the conpspending re operation can be stated as:
Write: M [AR] <— R1
Write: M [AR] — R14 | }
© The Write statement causes a transfer of information from register R1 into the memory
word (M) selected by address register (AR) write
Data Out Data In
Arithmetic Micro-operations ‘
i i smed on numeric
In general, the Arithmetic Micro-operations deals with the 4 sore performe
data stored in the registers. |
The basic Arithmetic Micro-operations are classified in the ftiing categorie:
4. Addition | |
2. Subtraction
3. Increment
4. Decrement
5. Shift
Some additional Arithmetic Micro-operations are classified as:
4. Add with carry i
2. Subtract with borrow i HH.
3. Transfer/Load, etc.
The following table shows the symbolic representation of various Aritpmetic|Mioro-operations.
s aes Ee 4 i
Symbolic Representation —_ Description |
R3—R1+R2 The contents of R1 plus R2 are transferred to R3.
R3<—R1-R2 | The contents of R1 minus R2 are transferred to R3.
2 ai 2 Lea Ai aha St |
R2<— R2 Complement the contents of R2 (1's complement) |
R2—R2'+1 | 2's complement the contents of R2 (negate) | |
R3<—R1+R2'+1 | R1 plus the 2's complement of R2 (subtraction) |
RI R141 Increment the contents of R1 by one RI-R1-14 Decrement the contents of R1 by one
1 and '? 1
Note: The increment and decroment micro-oporations aro symbolized by “+
basic sot of
respectively. Arithmetic operations like multiply and divide aro not Included in the
micro-operations.
} |
Binary Adder
The Add microopdation requires registers that can hold the data and the digital components
that can perform the arithmetic afidition
A Binary Adder is'a digital circuit that performs the arithmetic sum of two binary numbers
provided with any length.
A Binary Adder is constructed using full-adder circuits connected in series, with the output
carry from one full-adder connected to the input carry of the next full-adder.
The following block diagram shows the interconnections of four full-adder circuits to provide a
4-bit binary adder.
4 bit binary adder:
The augend bits (A) and the addend bits (B) are designated by subscript numbers from
right to left, with subscript '0’ denoting the low-order bit.
The carry inputs starts from CO to C3 connected in a chain through the full-adders. C4 is
the resultant output carry generated by the last full-adder circuit.
The output carry from each full-adder is connected to the input carry of the next-high-
order full-adder.
The sum outputs (SO to S3) generates the required arithmetic sum of augend and
addend bits.) i
© The ndata bits for the Aand Binputs come from different source registers.
de bits for A input comes from source register R1 and data bits for B input
For
instance, di
comes from source register R2.
The arithmetic sum of the fata inputs of A and B can be transferred to a third register or
to one of the source registers (R1 or R2). Arithmetic Logic Shift Unit
‘A computer systoms croate uso of sovoral storage register
operational unit is known as tho arithmotic and logic unit (ALU). A\
the most essential units internal the CPU of the computer.
J toa typical
id one of
Wha’
5 that are linke'
LU is the central an
{All the logical and numerical operations of a computer are implemented here. The
contents of a particular register are arranged in the input of Atv. ‘ALU implements the given
operation and then transfers it to the target register. \ i
The one stage of an arithmetic logic shift unit is demonstrated jin the figure. The
lare used for both the arithmetic
subscript i nominate a frequent stage. There are two inputs
and logic units.
‘One stage of Arithmetic Logie Shift Unit
53
s2
so [one stage oF
‘arithmetic
cireult
oy
t
Ais
A specific micro-operation is choosing with inputs S; and So A 4 x 1 multiplexer at the
output select between an arithmetic output inand a logic output in . The data in the multiplexer
are chosen with inputs Ss and Sz.
There are two data inputs to the multiplexer receive inputs Aix for the shiftright
operation and Ais: for the shift-left operation. The circuit should be continued n times for an n-
| 4
bit ALU,
The output carry Ci: of a given arithmetic stage toil be linked to the input carry Cio
the next stage in the series. The input carries to the first stage is the input carry Cin It cat
support a selection variable for the arithmetic operations.
i
| |
The circuit whose one stage is determined in the diagram. It provides eight arithmet
operations, four logic operations, and two-shift operations. Each operation is selected with tt five Variables S3.S2,S1,SoTho input carlos C\ACW can be used for
selecting an arithmetic
operation only.
Functional Table for Arithmotic Logie Shift Unit
Ss
oO
°
0
°
°
°
°
°
°
°
0
°
1
S: SS Cn Operation Function
0 oO 9 oO Fea Transfer A
0 0 0 4 FH hn +1 Increment A
oO oO 4 0 F =} +B Addition
0 oO 1 1 FrA+B+1 i Add with carry
o 1 of OC F=A+B Subtract with borrow
oO 1 0 1 F=A+B'+1 Subtraction
0 1 1 0 F=A-1 Decrement A
oO 1 1 1 FHA Transfer A
1 oO F=AAAB AND
4 oO F=AwB OR
1 1 F= n@@s XOR
1 a Fe w Complement A
ox F=phra 4 Shiftright A into F
aX F=BhiA | Shift Left A into F
This table shows the 14 operations of the ALU. The first eight are arithmetic operations and
are selected with S3S2 = 00. The next four are logic operations and are selected with S3Sz2 =
01. The final two operations are shift operations and are selected with SeS2 = 10 and 11. The
other three selection inputs do no influence the shift.
Register-Reference Instruction:
© Register-reference instructions are recognized by the control when D7 = 1 and
Io.
These instructions use bits 0 through 11 of the instruction code to specify one of
12 instructions.
Thesé 12 bits are ayailable in IR (0-11).
The |control functions and microoperations for the
instructions are listed in Table5-3.
Thesé instructions &re executed with the clock transition associated with timing
variable Ts. t
Control function needs the Boolean relation Dr!'Ts, which we designate for
register-reference convenience by thesymbol r,
~ By assigning the symbol 8, to bit | of /R, all control functions can be simply denoted
by rB,
wan
entac | |
Somplefsont 2 |
Aga ac. acusy— eB acoy SUN E |
AEE AE AEC AC Scala seh
AEA facscinentcac
HUCNS "9 hen Poe rc sy BESTS
SNA. I CACUS) = 1) then PEs PC +1 Skip if negative
SZA TB: ICCAG = 0) then POPC + 1D Skip if AC zero
Sze Af (B= 0) then (PO Pe + 1) Skip if £ zero.
HLT 50 (Sis a start_stop flip-flop) Hi
© For example, the instruction CLA has the hexadecimal code 7800, which gives
the binary equivalent 0111 1000 0000 0000. The first bit is a’ zero and is
equivalent to |
© The next three bits constitute the operation code and are recognized from
decoder output D;,
* Bit 11 in IR is 1 and is recognized from, By;. The control function that
initiates the microoperation forthis instruction is D7l'Ts By = 1B 11
© The execution of a register-reference instruction|is completed at time Ts.
© The sequence counter SC is cleared to 0 and the control gobs back to fetch
the next instruction withtiming signal To. if
© The first seven register-reference instructions perform clear,
complement, circular shift, andincrement microgperations on the AC or
E registers. i |
© The next four instructions cause a skip of the next instruction
in sequence whena stated condition is satisfied. The skipping |
of the instruction is achieved by incrementing PC once again.
© The condition control statements must be recognized as part of the control
conditions.
© The ACis positive when the sign bit in AC(15) = 0; it is negative when AC(15) =
1. The content of AC iszero (AC = 0) if all the flip-flops of the register are zero.
© The HLT instruction clears a start-stop flip-flop S and stops the sequence counter
from counting.
Memory-Reference Instructions:
af 4
© Table 5-4 lists the seven memory-reference instructions. |
© The decoded output D; for i = 0, 1, 2, 3, 4, 5, and'6 from the i sa decoder
that belongs to eachinstruction is included in the table. i
© The effective address of the instruction is in the address register AR and
was placed there duringtiming signal Tz when |= 0, or during timing signal Ts
when I = 1. ail oy
> The execution of the memory-reference instructions starts with timing signal Ta of
t 6
> The symbolic description of each instruction is specified in the table in terms
rogistor transfornotation.
TABLE 5-4 Momory-Reference Instructions
Operation
Symbot___ decoder Symbolic description
AND Do AC+AC A MIAR] 4
ADD D ACHAC HO MLAR], Come
Lpa D: AGAR}
STA Ds MIAR]—ACc
{
BSA Ds MIAR}<—Pc, po
