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Sequential-Logic

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Sequential-Logic

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beacamille1212
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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CLOCK CIRCUIT

Sequential circuits that use clocks are typically synchronous, meaning they are
controlled by a sequence of clock pulses. These circuits use a clock generator to
create the clock pulses, which are then applied to all the sequential elements to
make them operate in sync.
Here are some types of sequential circuits that use clocks:
 Synchronous sequential circuits
Use a clock signal to synchronize the state of memory elements. The output is
stored in flip-flops or latches, and is synchronized with the clock's positive or
negative edges.
 Clocked sequential circuits
Use flip-flops or gated latches as memory elements. A periodic clock is connected to
the clock inputs of all the memory elements to synchronize internal changes.
 D flip-flop circuits
Also known as data flip-flops, these circuits can store a digital value and change it
based on a clock signal and inputs.
 D-latches
These circuits can hold a digital value indefinitely until it is updated with a new
value.
There are also asynchronous sequential circuits, which do not use a clock signal but
instead use the pulses of the inputs.
ON/OFF DELAY TIMER
The sequential logic for an on/off delay timer circuit involves a 555 timer IC’s trigger
pin (Pin 2), threshold pin (Pin 6), and discharge pin (Pin 7):
 Initial state
When the circuit is powered on, the output is off, and the discharge pin is grounded,
discharging the capacitor.
 Activate the timer
Pressing the push button switch grounds the trigger pin, which turns the output
on. The discharge pin disconnects from 0V, allowing the capacitor to charge through
the resistor or potentiometer.
 Output turns off
The voltage across Pin 6 increases as the capacitor charges. When the capacitor
reaches 2/3rds of the supply voltage, Pin 6 turns off the output.
 Repeat
The above steps repeat each time the push button switch is pressed.
The 555 timer IC is an integrated circuit used in many timer, delay, pulse generator,
and oscillator circuits.
An SR flip-flop is a sequential circuit that acts as a one-bit memory device with two
inputs and one output:
Input Function

S Sets the device to output a 1

R Resets the device to output a 0

Q The output, which can be either a 1 or a 0

SR FLIP FLOPS
The term “SR” stands for “set-reset”. The flip-flop’s state is controlled by the
S and R inputs when the clock pulse goes from low to high. The flip-flop will not
change until the clock pulse is on a rising edge.
Here are some other things to know about SR flip-flops:
 They are made up of two logic gates, usually NAND or NOR gates.
 The output of each gate is connected to the input of the other gate, creating
cross-coupling or positive feedback.
 They are commonly used in memory circuits to store a single data bit.
 The name “flip-flop” comes from the device’s operation, which can be
“flipped” into a set state or “flopped” back into a reset state.
 When both S and R are high at the same time, it’s uncertain whether the
outputs will be high or low.

D-TYPE FLIP FLOPS


D-type flip-flops are a fundamental building block of sequential circuits and are
used in a wide range of applications. They are often used in shift registers, clock
division circuits, and internal CPU registers.
Here are some details about D-type flip-flops and sequential circuits:
 Operation
A D-type flip-flop has an input data pin (D), a clock pin (CK), and an output data
pin (Q). When the clock's rising edge is applied, the flip-flop latches the input
data (D) and transfers it to Q. The output (Q) remains unchanged until the next
rising edge of the clock, regardless of the input data (D).
 Sequential circuits
Sequential logic circuit designs create counters and state machines. The state
machines can be based on either the Moore machine or Mealy machine.
 D flip-flop uses
D flip-flops can be used to create shift registers and clock division circuits. They
can also be used for synchronizers for asynchronous signals and delay circuits
for digital signals.
 D flip-flop construction
A D flip-flop can be constructed from an S-R flip-flop by placing an inverter
between the S and R, or from a J-K flip-flop by placing an inverter between the J
and K.
Sequential circuits using JK flip-flops can be designed in a variety of ways,
including:
 Master-slave configuration
A master flip-flop that is positive-edge-triggered and a slave flip-flop that is
negative-edge-triggered. The master flip-flop responds to its inputs before the
slave, and the slave copies the master's actions.
 Toggle mode
Connecting four JK flip-flops in a way that keeps them in toggle mode. The clock
inputs can be connected so that each bit toggles when the previous bit
transitions from 1 to 0.
 State table
Adding columns to a state table to show the input required for each JK flip-flop to
cause the correct state transition.

JK FLIP FLOPS
Sequential circuits using JK flip-flops can be designed in a variety of ways,
including:
 Master-slave configuration
A master flip-flop that is positive-edge-triggered and a slave flip-flop that is
negative-edge-triggered. The master flip-flop responds to its inputs before the
slave, and the slave copies the master's actions.
 Toggle mode
Connecting four JK flip-flops in a way that keeps them in toggle mode. The clock
inputs can be connected so that each bit toggles when the previous bit
transitions from 1 to 0.
 State table
Adding columns to a state table to show the input required for each JK flip-flop to
cause the correct state transition.
A JK flip-flop is a logical circuit that uses sequential logic to maintain information
about one bit. It has two inputs, J and K, and two outputs, Q and Q̅. The output is
dependent on both the current inputs and the previous state. The four possible
input combinations are:
 J=0, K=0: The flip-flop retains its previous state.
 J=0, K=1: The flip-flop resets, resulting in Q=0 and Q̅=1.
 J=1, K=0: The flip-flop sets, resulting in Q=1 and Q̅=0.
 J=1, K=1: The flip-flop toggles.
CMOS FLIP FLOPS
A CMOS flip-flop is a sequential circuit that stores and changes logic states in
response to a clock signal:
 Sequential circuits
Have memory, so the output depends on the current and previous inputs. Examples
of sequential circuits include flip-flops, clocks, counters, registers, and memories.
 CMOS flip-flops
A type of bistable circuit that uses a clock signal to sample inputs and change
outputs at specific times. The data stored in the flip-flop is then used as input for
other sequential circuits.
 Clock
An external logic signal that synchronizes signals in complex circuits.
 Edge-triggered
Flip-flops are edge-triggered, meaning they copy the data input to the output on the
rising edge of the clock.
Here are some other types of sequential circuits:
 Latches: Store one bit of information and are transparent when the clock is
high.
 Synchronous circuits: Use a clock input and pulsed or level inputs to drive
the circuit.
 Asynchronous circuits: Do not use a clock signal.
COUNTERS
Counters are sequential circuits that use flip-flops to count pulses and display the
count value on output signals:
Description

Function Counts pulses, increments or decrements the count value on each


clock edge

Memory Uses flip-flops as memory elements


Types Synchronous, asynchronous, up, down, up-down

Application Digital timers, electronic calculators, stopwatches, and more


s

OFF COUNTER
Counters are sequential circuits that can be used to count pulses, and can also be
used to count down:
 Counters: Use a clock signal input and output signals to show the count
value. Counters can count up or down, and can be used to measure time.
 Down counters: Count down from the maximum value to zero.
 Up-down counters: Can count both up and down based on a control input.
o Here are some things to consider when working with counters:

 Types of counters
Counters can be synchronous or asynchronous, depending on how the flip-flops
change state:
 Synchronous counters: All flip-flops share a common clock and
change state simultaneously.
 Asynchronous counters: Each flip-flop has a separate clock
and changes state at different times.
 Maximum count
The maximum count for an N-bit counter is

2N2 to the cap N-th power

2𝑁
. For example, a 3-bit counter can count up to 8.
 State diagrams and state output tables
You can use state diagrams and state output tables to design counters.
 Flip-flops
The type of flip-flop to use in a design can be determined by constructing an
excitation table.
 Logic diagram
The logic diagram can be drawn after deriving the output equations from the
transition output table.
 Counters are used in many devices, including digital timers, electronic
calculators, and stopwatches.

DOWN COUNTER
A sequential down counter is a type of counter circuit that uses flip-flops to count
down from the maximum value to zero:
 Explanation
A counter is a sequential circuit that counts pulses using a clock input signal and
output signals that show the count value. Counters use flip-flops as memory
elements and increment or decrement the count value on each clock edge. A down
counter counts down from the maximum value to zero.
 Types of counters
There are two main types of counters: asynchronous (ripple carry) and synchronous
(parallel carry). In an asynchronous counter, each flip-flop has a separate clock and
changes state at different times. In a synchronous counter, all flip-flops share a
common clock and change state simultaneously.
 Other types of counters
There are also up counters, which count upwards from zero to the maximum value,
and up-down counters, which can count both up and down based on a control
input.
 Applications
Counters are used in many devices, including digital timers, electronic calculators,
and stopwatches.

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