191EC52B-DSP lab manual (1)
191EC52B-DSP lab manual (1)
1
2
DATE:
EXP NO: 1 GENERATION OF ELEMENTARY DISCRETE-TIME SEQUENCES
AIM:
To generate a discrete time signal (Unit Step , Unit Ramp, Sine, Cosine, Exponential and Unit impulse) using
MATLAB function.
ALGORITHM:
1. Get the length of different input sequence.
2. To plot the different input sequence.
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OUTPUT RESPONSE
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%Program for cosine sequence
N3=input('Enter the length of the cosine sequence(N3)= ');
n3=0:0.1:N3-1;
y3=cos(2*pi*n3);
subplot(3,2,4);
stem(n3,y3,'k');
xlabel('Time');
ylabel('Amplitude');
title('Cosine sequence');
5
INPUT DATA
Enter the length of unit step sequence(N)= 10
Enter the length of unit ramp sequence(N1)= 10
Enter the length of sinusoidal sequence(N2)= 2
Enter the length of the cosine sequence(N3)= 2
Enter the length of the exponential sequence(N4)= 10
Enter the value of the exponential sequence(a)= 0.5
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RESULT:
Thus the continuous time signal and discrete time signal using MATLAB program was generated
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8
DATE:
EXPT NO:2 LINEAR AND CIRCULAR CONVOLUTIONS
AIM
To perform Linear and Circular convolution of the two sequences using MATLAB function.
ALGORITHM
1. Get the two sequence x(n) and h(n) in matrix form.
2. The convolution of the two sequences is given by
%Impulse Sequence
h=input('enter the impulse sequence h(n)=');
N2=length(h);
n1=0:1:(N2-1);
subplot(3,1,2);
stem(n1,h,'k');
xlabel('n--------->');
ylabel('amplitude');
title('impulse response h(n)');
%output convolution
y=conv(x,h)
n2=0:1:(N1+N2-2);
subplot(3,1,3);
stem(n2,y,'k');
xlabel('n--------->');
ylabel('amplitude');
title('linear convolution of two sequences');
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INPUT AND OUTPUT SEQUENCES
enter the input sequence x(n)=[1 2 3 4]
enter the impulse sequence h(n)=[2 1 2 1]
y=
2 5 10 16 12 11 4
>>
OUPUT RESPONSE
10
B) TO PERFORM THE CIRCULAR CONVOLUTION OF TWO SEQUENCES
%FIRST SEQUENCE
clc;
x1=input('Enter the First Input Sequence X1(n)= ');
N1=length(x1);
%SECOND SEQUENCE
N=max(N1,N2);
N3=N1-N2;
%CIRCULAR CONVOLUTION
disp('The output of circular convolution is')
for m=1:N %This 'for' loop is for circular shifting
sum=0;
for k=1:N %This 'for' loop is for summation
if((m-k)>=0) %This 'if' loop is for circular folding
n=m-k+1;
else
n=m-k+N+1;
end
sum=sum+x1(k)*x2(n);
end
disp(sum) %display the result of circular convolution
end
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INPUT AND OUTPUT SEQUENCES
Enter the First Input Sequence X1(n)=[1 2 3 4]
Enter the Second Input Sequence X2(n)=[4 3]
x2 = 4 3 0 0
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RESULT
Thus the Linear and Circular convolution of the two sequences using MATLAB program
was performed.
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DATE:
EXP NO: 3 AUTOCORRELATION AND CROSS CORRELATION
AIM
To perform auto and Cross correlation of the two sequences using MATLAB function.
ALGORITHM
1. Get the input sequences in matrix form.
2. The correlation of the two sequences is given by
PROGRAM
clc;
disp('Autocorrelation and cross correlation of sequences')
disp('1 autocorrelation 2 cross correlation');
choice = input('Enter the choice of correlation = ');
switch(choice)
case{1} % Autocorrelation of the sequence
x = input('Enter the sequence x = ');
y = fliplr(x); % flip the sequence in left/right direction
r = conv(x,y) % Compute the correlation sequence
stem(r); % display the correlation sequence
xlabel('n');
ylabel('Amplitude');
grid;
title('Autocorrelation');
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INPUT AND OUTPUT SEQUENCE
Case 1:
Autocorrelation and cross correlation of sequences
1 autocorrelation 2 cross correlation
Enter the choice of correlation = 1
Enter the sequence x = [1 2 3 4]
r=
4 11 20 30 20 11 4
>>
Case 2:
Autocorrelation and cross correlation of sequences
1 autocorrelation 2 cross correlation
Enter the choice of correlation = 2
Enter the sequence x = [1 2 3 4]
Enter the sequence y = [4 3 2 1]
r=
1 4 10 20 25 24 16
>>
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RESULT
Thus the auto and Cross correlation of the two sequences using MATLAB program was performed.
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DATE:
EXPT NO:4 FREQUENCY ANALYSIS USING DFT
PROGRAM:
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OUTPUT RESPONSE
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RESULT:
Thus a MATLAB program was performed for analysis of spectrum using DFT.
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DATE:
EXP NO: 5A DESIGN OF FIR FILTERS (LPF/HPF) AND DEMONSTRATES THE
FILTERING OPERATION.
AIM
To design a linear phase Low Pass and High Pass FIR Digital Filter using different windows in
MATLAB Function.
ALGORITHM
1. Get the number of samples of impulse response.
2. Get the cut off frequency.
3. Determine the value of infinite impulse response.
4. Choose the window sequence.
5. Determine the filter co-efficient of finite impulse response.
6. Draw the magnitude and phase response.
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INPUT AND OUTPUT SEQUENCE
Enter the number of samples (N)=9
Enter the cut off frequency (wc)=0.9*pi
hnr = -0.0757 0.0858 -0.0935 0.0984 0.9000 0.0984 -0.0935 0.0858 -0.0757
hnm = -0.0061 0.0184 -0.0505 0.0851 0.9000 0.0851 -0.0505 0.0184 -0.0061
hnn = -0.0072 0.0297 -0.0612 0.0890 0.9000 0.0890 -0.0612 0.0297 -0.0072
hnb = 0.0000 0.0057 -0.0318 0.0761 0.9000 0.0761 -0.0318 0.0057 0.0000
>>
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%To determine the finite impulse response
hnm=hd.*wham'
w=0:0.001:pi;
h=freqz(hnm,1,w);
plot(w/pi,20*log10(abs(h)),'k.');
hold on
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B) PROGRAM FOR DESIGN OF LINEAR PHASE HIGH PASS FILTER USING
DIFFERENT WINDOWS
clc;
N=input('Enter the number of samples (N)=');
wc=input('Enter the cut off frequency (wc)=');
alpha=(N-1)/2;
plot(w/pi,20*log10(abs(h)),'g.');
hold on
hnr = 0.0046 -0.0717 -0.1591 -0.2283 0.7454 -0.2283 -0.1591 -0.0717 0.0046
hnm = 0.0004 -0.0154 -0.0859 -0.1976 0.7454 -0.1976 -0.0859 -0.0154 0.0004
hnn = 0.0004 -0.0248 -0.1041 -0.2065 0.7454 -0.2065 -0.1041 -0.0248 0.0004
hnb = -0.0000 -0.0048 -0.0541 -0.1766 0.7454 -0.1766 -0.0541 -0.0048 -0.0000
>>
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%To determine the finite impulse response
hnb=hd.*wb'
w=0:0.001:pi;
h=freqz(hnb,1,w);
plot(w/pi,20*log10(abs(h)),'b.');
grid;
xlabel('Normalized frequency in rad/sec');
ylabel('Gain in db');
title('Magnitude response of LPF');
hold off
RESULT:
Thus the linear phase Low Pass and High Pass FIR Digital Filter using different window was designed in
MATLAB program.
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DATE:
EXP NO:5B DESIGN OF FIR FILTERS (BPF/BSF) AND DEMONSTRATES THE
FILTERING OPERATION.
AIM
To design a linear phase Band Pass and Band Stop FIR Digital Filter using different windows in
MATLAB Function.
ALGORITHM
1. Get the number of samples of impulse response.
2. Get the cut off frequencies (wc1 & wc2).
3. Determine the value of infinite impulse response.
4. Choose the window sequence.
5. Determine the filter co-efficient of finite impulse response.
6. Draw the magnitude and phase response.
alpha=(N-1)/2;
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INPUT AND OUTPUT SEQUENCE
Enter the number of samples (N)=9
Enter the lower cut off frequency (wc1)=pi/4
Enter the upper cut off frequency (wc2)=3*pi/4
hnr = 0.0000 -0.0000 -0.3183 0.0000 0.5000 -0.0000 -0.3183 0.0000 -0.0000
hnm = 0.0000 -0.0000 -0.1719 0.0000 0.5000 -0.0000 -0.1719 0.0000 -0.0000
hnn = 0.0000 -0.0000 -0.2083 0.0000 0.5000 -0.0000 -0.2083 0.0000 -0.0000
hnb = -0.0000 -0.0000 -0.1082 0.0000 0.5000 -0.0000 -0.1082 0.0000 0.0000
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%Choose the hamming window sequence
wham=hamming(N);
w=0:0.001:pi;
h=freqz(hnm,1,w);
plot(w/pi,20*log10(abs(h)),'k.');
hold on
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INPUT AND OUTPUT SEQUENCE
Enter the number of samples (N)=9
Enter the lower cut off frequency (wc1)=pi/4
Enter the upper cut off frequency (wc2)=3*pi/4
hnr = -0.0000 0.0000 0.3183 0.0000 0.5000 -0.0000 0.3183 -0.0000 0.0000
hnm = -0.0000 0.0000 0.1719 0.0000 0.5000 -0.0000 0.1719 -0.0000 0.0000
hnn = -0.0000 0.0000 0.2083 0.0000 0.5000 -0.0000 0.2083 -0.0000 0.0000
hnb = 0.0000 0.0000 0.1082 0.0000 0.5000 -0.0000 0.1082 -0.0000 -0.0000
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B) PROGRAM FOR DESIGN OF LINEAR PHASE BAND STOP FILTER USING
DIFFERENT WINDOWS
clc;
N=input('Enter the number of samples (N)=');
wc1=input('Enter the lower cut off frequency (wc1)=');
wc2=input('Enter the upper cut off frequency (wc2)=');
alpha=(N-1)/2;
h=freqz(hnr,1,w);
plot(w/pi,20*log10(abs(h)),'r.');
hold on
hold on
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%Choose the blackman window sequence
wb=blackman(N);
%To determine the finite impulse response
hnb=hd.*wb'
w=0:0.001:pi;
h=freqz(hnb,1,w);
plot(w/pi,20*log10(abs(h)),'b.');
grid;
xlabel('Normalized frequency in rad/sec');
ylabel('Gain in db');
title('Magnitude response of LPF');
hold off
RESULT
Thus the linear phase Band Pass and Band Stop FIR Digital Filter using different window was designed in
MATLAB program.
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DATE:
EXP NO:6 DESIGN OF BUTTERWORTH AND CHEBYSHEV IIR FILTERS
(LPF/HPF/BPF/BSF) AND DEMONSTRATE THE FILTERING OPERATIONS.
AIM
To design a digital Butterworth and chebyshev Low pass IIR Filter from the given specification using
MATLAB Function.
ALGORITHM
1. Get the pass band and stop band attenuation.
2. Get the pass band and stop band frequencies.
3 Get the sampling frequency
4. Calculate the order and cut off frequency.
5. Find out the filter co-efficient both numerator and denominator.
6. Draw the magnitude and phase response.
A) PROGRAM FOR DESIGN OF BUTTERWORTH DIGITAL IIR FILTER
clc;
alphap=input('Enter the passband attenuation in dB (alphap)= ');
alphas=input('Enter the stopband attenuation in dB (alphas)= ');
omp=input('Enter the stopband frequency in rad/sec (omp)= ');
oms=input('Enter the stopband frequency in rad/sec (oms)= ');
T=input('Enter the sampling time in sec(T)= ');
%Calculate the order of filter and cut-off frequency
[N,omc]=buttord(omp,oms,alphap,alphas)
%Tofind out coefficient of analog filter
[b,a]=butter(N,omc);
%To find out the analog filter transfer function
Hs=tf(b,a)
%To find out the coefficient of digital filter
[bz,az]=bilinear(b,a,1/T);
%To find out the digital filter transfeer function
Hz=tf(bz,az,T)
%Draw the magnitude and phase response
w=0:0.001:pi;
h=freqz(b,a,w);
subplot(2,1,1);
plot(w/pi,20*log10(abs(h)),'k');
grid;
xlabel('Normalised frequency');
ylabel('Gain in dB');
title('Magnitude response');
subplot(2,1,1);
plot(w/pi,angle(h),'k');
grid;
xlabel('Normalised frequency');
ylabel('Angle in radians');
title('Phase response');
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INPUT AND OUTPUT DATA
Enter the passband attenuation in dB (alphap)= 3
Enter the stopband attenuation in dB (alphas)= 16
Enter the stopband frequency in rad/sec (omp)= 0.02
Enter the stopband frequency in rad/sec (oms)= 0.9
Enter the sampling time in sec(T)= 1
N=
1
omc =
0.5043
Transfer function:
0.5033 s + 0.5033
-----------------
s + 0.006691
Transfer function:
0.7525 z - 0.2508
-----------------
z - 0.9933
Sampling time: 1
OUTPUT RESPONSE
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B) PROGRAM FOR DESIGN OF CHEBYSHEV DIGITAL IIR FILTER
clc;
alphap=input('Enter the passband attenuation in dB (alphap)= ');
alphas=input('Enter the stopband attenuation in dB (alphas)= ');
omp=input('enter the passband frequency in rad/sec(omp)=');
oms=input('enter the stopband frequency in rad/sec(oms)=');
T=input('enter the sampling time in sec(T)=');
subplot(2,1,1);
plot(w/pi,20*log10(abs(h)),'k');
grid;
xlabel('Normalised frequency');
ylabel('Gain in dB');
title('Magnitude response');
subplot(2,1,2);
plot(w/pi,angle(h),'k');
grid;
xlabel('Normalised frequency');
ylabel('Angle in radians');
title('Phase response');
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INPUT AND OUTPUT DATA
Enter the passband attenuation in dB (alphap)= 3
Enter the stopband attenuation in dB (alphas)= 16
enter the passband frequency in rad/sec(omp)=0.02
enter the stopband frequency in rad/sec(oms)=0.9
enter the sampling time in sec(T)=1
N=
1
omc =
0.5043
Transfer function:
0.08254 s + 0.08254
-------------------
s - 0.8349
Transfer function:
0.2125 z - 0.07085
------------------
z - 2.433
Sampling time: 1
OUTPUT RESPONSE
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RESULT
Thus the digital Butterworth and Chebyshev Low Pass IIR Filter from the given specification was designed
using MATLAB program.
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DSP PROCESSOR
BASED
IMPLEMENTATION
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DATE:
EXP NO:7 STUDY OF ARCHITECTURE OF DSP PROCESSOR
INTRODUCTION:
A digital signal processor (DSP) is a specialized microprocessor (or a SIP block), with its architecture
optimized for the operational needs of digital signal processing.
The goal of DSPs is usually to measure, filter and/or compress continuous real-world analog signals. Most
general-purpose microprocessors can also execute digital signal processing algorithms successfully, but
dedicated DSPs usually have better power efficiency thus they are more suitable in portable devices such as
mobile phones because of power consumption constraints. DSPs often use special memory architectures that are
able to fetch multiple data and/or instructions at the same time.
OVERVIEW:
A typical digital processing system
Digital signal processing algorithms typically require a large number of mathematical operations to be
performed quickly and repeatedly on a series of data samples. Signals (perhaps from audio or video sensors) are
constantly converted from analog to digital, manipulated digitally, and then converted back to analog form.
Many DSP applications have constraints on latency; that is, for the system to work, the DSP operation must be
completed within some fixed time, and deferred (or batch) processing is not viable.
Most general-purpose microprocessors and operating systems can execute DSP algorithms successfully, but are
not suitable for use in portable devices such as mobile phones and PDAs because of power efficiency
constraints. A specialized digital signal processor, however, will tend to provide a lower-cost solution, with
better performance, lower latency, and no requirements for specialized cooling or large batteries.
The architecture of a digital signal processor is optimized specifically for digital signal processing. Most also
support some of the features as an applications processor or microcontroller, since signal processing is rarely
the only task of a system. Some useful features for optimizing DSP algorithms are outlined below.
ARCHITECTURE:
By the standards of general-purpose processors, DSP instruction sets are often highly irregular. One implication
for software architecture is that hand-optimized assembly-code routines are commonly packaged into libraries
for re-use, instead of relying on advanced compiler technologies to handle essential algorithms.
Hardware features visible through DSP instruction sets commonly include:
1. Hardware modulo addressing, allowing circular buffers to be implemented without having to constantly test
for wrapping.
2.A memory architecture designed for streaming data, using DMA extensively and expecting code to be
written to know about cache hierarchies and the associated delays.
3.Driving multiple arithmetic units may require memory architectures to support several accesses per
instruction cycle
4. Separate program and data memories (Harvard architecture), and sometimes concurrent access on multiple
data buses
5.Special SIMD (single instruction, multiple data) operations
6.Some processors use VLIW techniques so each instruction drives multiple arithmetic units in parallel
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7.Special arithmetic operations, such as fast multiply–accumulates (MACs). Many fundamental DSP
algorithms, such as FIR filters or the Fast Fourier transform (FFT) depend heavily on multiply–accumulate
performance.
8. Bit-reversed addressing, a special addressing mode useful for calculating FFTs
9. Special loop controls, such as architectural support for executing a few instruction words in a very tight
loop without overhead for instruction fetches or exit testing
10.Deliberate exclusion of a memory management unit. DSPs frequently use multi-tasking operating systems,
but have no support for virtual memory or memory protection. Operating systems that use virtual memory
require more time for context switching among processes, which increases latency.
PROGRAM FLOW:
Floating-point unit integrated directly into the datapath
Pipelined architecture
Highly parallel multiplier–accumulators (MAC units)
Hardware-controlled looping, to reduce or eliminate the overhead required for looping operations
MEMORY ARCHITECTURE:
DSPs often use special memory architectures that are able to fetch multiple data and/or instructions at the
same time:
1. Harvard architecture
2.Modified von Neumann architecture
3.Use of direct memory access
4.Memory-address calculation unit
DATA OPERATIONS:
Saturation arithmetic, in which operations that produce overflows will accumulate at the maximum (or
minimum) values that the register can hold rather than wrapping around (maximum+1 doesn't overflow to
minimum as in many general-purpose CPUs, instead it stays at maximum). Sometimes various sticky bits
operation modes are available.
Fixed-point arithmetic is often used to speed up arithmetic processing
Single-cycle operations to increase the benefits of pipelining
INSTRUCTION SETS
Multiply–accumulate (MAC, including fused multiply–add, FMA) operations, which are used extensively in
all kinds of matrix operations, such as convolution for filtering, dot product, or even polynomial evaluation (see
Horner scheme)
Instructions to increase parallelism: SIMD, VLIW, superscalar architecture
Specialized instructions for modulo addressing in ring buffers and bit-reversed addressing mode for FFT
cross-referencing
Digital signal processors sometimes use time-stationary encoding to simplify hardware and increase coding
efficiency.
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RESULT
Thus the architecture of digital signal processor was studied.
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DATE:
EXP NO:8 STUDY OF MAC OPERATION USING VARIOUS ADDRESSING MODES
SHIFTERS
Shifters can be provided at the input of the MAC to normalize the data and at the
output to denormalize the same.
GUARD BITS
As the normalization process does not yield accurate result, it is not desirable for
some applications. In such cases we have another alternative by providing additional bits
called guard bits in the accumulator so that there will not be any overflow error. Here the
add/subtract unit also has to be modified appropriately to manage the additional bits of
the accumulator.
SATURATION LOGIC
Overflow/ underflow will occur if the result goes beyond the most positive
number or below the least negative number the accumulator can handle. Thus the
overflow/underflow error can be resolved by loading the accumulator with the most
positive number which it can handle at the time of overflow and the least negative
number that it can handle at the time of underflow. This method is called as saturation logic.
In saturation logic, as soon as an overflow or underflow condition is satisfied the
accumulator will be loaded with the most positive or least negative number overriding the
result computed by the MAC unit.
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These are the some of the important parts of the processor .
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RESULT:
Thus the MAC using various addressing modes was studied.
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DATE:
EXP NO:9 GENERATION OF VARIOUS SIGNALS AND RANDOM NOISE
AIM:
To generate a different wave forms (Square, Saw tooth and Triangular Wave) with amplitude of 5 volts
by using TMS320C50 DSP processor.
APPARATUS REQUIRED:
TMS320C50 DSP processor kit, PC, CRO with probe.
ALGORITHM:
1.Start the program.
2.Load the amplitude of the input signal of 5 volts.
3.Load the frequency of the input signal.
4.Observe the waveform by using CRO.
5.Stop the program.
A) PROGRAM FOR GENERATION OF SQUARE WAVEFORM USING TMS320C50
.MMREGS
.TEXT
START: LDP #100H
LACC #0FFFH ;change this value for amplitude.
LOOP: SACL 0
RPT #0FFH ; change this value for frequency.
OUT 0,04H ; address for DAC.
CMPL
B LOOP
.END
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OBSERVATION:
NAME OF
S.No TIME PERIOD (msec) AMPLITUDE (volts)
WAVEFORMS
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C) PROGRAM FOR GENERATION OF TRIANGULAR WAVEFORM USING TMS320C50
PROCESSOR:
AMPLITUDE .SET 4
FREQ .SET 350
TEMP .SET 0
;
.MMREGS
.TEXT
START: LDP #100H
SPLK #0,TEMP
CONT1: LAR AR2,#FREQ
CONT: OUT TEMP,4
LACC TEMP
ADD #AMPLITUDE
SACL TEMP
MAR *,AR2
BANZ CONT,*-
LAR AR2,#FREQ
CONTx: OUT TEMP,4
LACC TEMP
SUB #AMPLITUDE
SACL TEMP
MAR *,AR2
BANZ CONTx
B CONT1
RESULT:
Thus the Square, Saw tooth and Triangular Wave was generated using TMS320C50 DSP Processor.
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DATE:
EXP NO:10 DESIGN AND DEMONSTRATION OF FIR FILTER FOR LOW PASS,
HIGH PASS, BAND PASS AND BAND STOP FILTERING.
AIM
To implement FIR by using TMS320C5416 DSP processor.
APPARATUS REQUIRED
TMS320C5416 DSP processor kit, PC, CRO with probe.
ALGORITHM:
1.Start the program.
2.Load the amplitude of the input signal of 5 volts.
3.Load the frequency of the input signal.
4.Observe the waveform by using CRO.
5.Stop the program.
PROGRAM:
A) LOW PASS FILTER
.mmregs
.text
START:
MAR *,AR0
LAR AR0,#0200H
RPT #33H
BLKP CTABLE,*+
SETC CNF
; Input data and perform convolution
ISR:LDP #0AH
LACC #0
SACL 0
IN 0,06H
LAR AR7,#0 ;Change value to modify sampling freq
MAR *,AR7
BACK:BANZ BACK,*-
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OUTPUT RESPONSE OF LPF:
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IN 0,04H
; NOP
; NOP
; NOP
; NOP
MAR *,AR1
LAR AR1,#0300H
LACC 0
AND #0FFFH
XOR #800H
SUB #800H
SACL *
LAR AR1,#333H
; MPY #0
; ZAC
ZAP
RPT #33H
MACD 0FF00H,*-
APAC
LAR AR1,#0300H
MAR *,AR1
; RPT #01H
; SFR
SACH * ; give as sach *,1 incase of overflow
LACC *
ADD #800H
SACL*
OUT *,04H
;IN 0,16H
NOP
B ISR
NOP
NOP
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HLT: B HLT
CTABLE:
.word 0FE8BH
.word 0FEE2H
.word 0FF74H
.word 02BH
.word 0ECH
.word 0196H
.word 0208H
.word 022BH
.word 01EDH
.word 0150H
.word 061H
.word 0FF40H
.word 0FE18H
.word 0FD19H
.word 0FC77H
.word 0FC5EH
.word 0FCEEH
.word 0FCEEH
.word 0FE35H
.word 02BH
.word 02B4H
.word 059EH
.word 08A9H
.word 0B8FH
.word 0E07H
.word 0FD4H
.word 010C7H
.word 010C7H
.word 0FD4H
.word 0E07H
.word 0B8FH
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66
.word 08A9H
.word 059EH
.word 02B4H
.word 02BH
.word 0FE35H
.word 0FCEEH
.word 0FC5EH
.word 0FC77H
.word 0FD19H
.word 0FE18H
.word 0FF40H
.word 061H
.word 0150H
.word 01EDH
.word 022BH
.word 0208H
.word 0196H
.word 0ECH
.word 02BH
.word 0FF74H
.word 0FEE2H
.word 0FE8BH
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ISR: LDP #0AH
LACC #0
SACL 0
IN 0,06H
LAR AR7,#0 ;Change value to modify sampling freq
MAR *,AR7
BACK:BANZ BACK,*-
IN 0,04H
; NOP
; NOP
; NOP
; NOP
MAR *,AR1
LAR AR1,#0300H
LACC 0
AND #0FFFH
XOR #800H
SUB #800H
SACL *
LAR AR1,#333H
; MPY #0
; ZAC
ZAP
RPT #33H
MACD 0FF00H,*-
APAC
LAR AR1,#0300H
MAR *,AR1
; RPT #01H
; SFR
SACH * ; give as sach *,1 incase of overflow
LACC *
ADD #800H
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OUTPUT RESPONSE OF HIGH PASS FILTER:
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SACL *
OUT *,04H
;IN 0,16H
NOP
B ISR
NOP
NOP
HLT: B HLT
CTABLE:
.word 0FCD3H
.word 05H
.word 0FCB9H
.word 087H
.word 0FD3FH
.word 01ADH
.word 0FE3DH
.word 0333H
.word 0FF52H
.word 04ABH
.word 0FFF8H
.word 0595H
.word 0FFACH
.word 0590H
.word 0FE11H
.word 047CH
.word 0FB0BAH
.word 029DH
.word 0F6BAH
.word 0F6BAH
.word 029DH
.word 0FBOBAH
.word 047CH
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.word 0FE11H
.word 0590H
.word 0FFACH
.word 0595H
.word 0FFF8H
.word 04ABH
.word 0FF52H
.word 0333H
.word 0FE3DH
.word 01ADH
.word 0FD3FH
.word 087H
.word 0FCB9H
.word 05H
.word 0FCD3H
C) BANDPASS FILTER :
PROGRAM:
.mmregs
.text
;Move the Filter coefficients from program memory to data memory
START:
MAR *,AR0
LAR AR0,#0200H
RPT #33H
BLKP CTABLE,*+
SETC CNF
;Input data and perform convolution
ISR: LDP #0AH
LACC #0
SACL 0
IN 0,06H
LAR AR7,#0 ;Change value to modify sampling frequency
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MAR *,AR7
BACK: BANZ BACK,*-
IN 0,04H
; NOP
; NOP
; NOP
; NOP
MAR *,AR1
LAR AR1,#0300H
LACC 0
AND #0FFFH
XOR #800H
SUB #800H
SACL *
LAR AR1,#333H
MPY #0
; ZAC
; ZAP
RPT #33H
MACD 0FF0H,*-
APAC
LAR AR1,#0300H
MAR *,AR1
RPT #01H
; SFR
; SACH *
LACC *
ADD #800H
SACL *
OUT *,04H
; IN 0,16H
NOP
B ISR
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NOP
NOP
HLT: B HLT
CTABLE:
.word 024AH
.word 010H
.word 0FH
.word 0FFECH
.word 0C6H
.word 0220H
.word 0321H
.word 02D3H
.word 012FH
.word 0FEBDH
.word 0FC97H
.word 0FBCBH
.word 0FCB0H
.word 0FE9EH
.word 029H
.word 0FFDCH
.word 0FD11H
.word 0F884H
.word 0F436H
.word 0F2A0H
.word 0F58AH
.word 0FD12H
.word 075H
.word 01135H
.word 01732H
.word 01732H
.word 01135H
.word 075FH
.word 0FD12H
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OUTPUT (BPF):
78
.word 0F58AH
.word 0F2A0H
.word 0F436H
.word 0F884H
.word 0FD11H
.word 0FFDCH
.word 029H
.word 0FE9EH
.word 0FCB0H
.word 0FBCBH
.word 0FC97H
.word 0FEBDH
.word 012FH
.word 02D3H
.word 0312H
.word 0220H
.word 0C6H
.word 0FFECH
.word 0FH
.word 010FH
.word 024AH
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OUTPUT(BSF):
80
;Input data and perform convolution
ISR: LDP #0AH
LACC #0
SACL 0
IN 0,06H
LAR AR7,#0 ;Change value to modify sampling frequency
MAR *,AR7
BACK: BANZ BACK,*-
IN 0,04H
; NOP
; NOP
; NOP
; NOP
MAR *,AR1
LAR AR1,#0300H
LACC 0
AND #0FFFH
XOR #800H
SUB #800H
SACL *
LAR AR1,#333H
MPY #0
; ZAC
; ZAP
RPT #33H
MACD 0FF0H,*-
APAC
LAR AR1,#0300H
MAR *,AR1
RPT #01H
; SFR
; SACH *
LACC *
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ADD #800H
SACL *
OUT *,04H
; IN 0,16H
NOP
B ISR
NOP
NOP
HLT: B HLT
CTABLE:
.word 0FEB9H
.word 14EH
.word 0FDA1H
.word 155H
.word 0FE1BH
.word 282H
.word 0FEAFH
.word 2ACH
.word 0FD35H
.word 8DH
.word 0F9D9H
.word 0FE07H
.word 0F7CCH
.word 0FEE2H
.word 0FA2FH
.word 4BAH
.word 1AH
.word 25CH
.word 420H
.word 1008H
.word 89H
.word 0D61H
.word 0F3F2H
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.word 0AF9H
.word 0DB7EH
.word 045DFH
.word 045DFH
.word 0DB7EH
.word 045DFH
.word 045DFH
.word 0DB7EH
.word 0AF9H
.word 0F3F2H
.word 0D61H
.word 89H
.word 1008H
.word 420H
.word 25CH
.word 1AH
.word 4BAH
.word 0FA2FH
.word 0FEE2H
.word 0F7CCH
.word 0FE07H
.word 0F9D9H
.word 8DH
.word 0FD35H
.word 2ACH
.word 0FEAFH
.word 282H
.word 0FE1BH
.word 155H
.word 0FDA1H
.word 14EH
.word 0FEB9H
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RESULT
Thus the implementation of FIR was done using TMS320C5416 DSP Processor.
87
88
DATE:
EXP NO:11 DESIGN AND DEMONSTRATION OF BUTTER WORTH AND
CHEBYSHEV IIR FILTER FOR LOW PASS, HIGH PASS, BAND PASS AND BAND
STOP FILTERING.
AIM:
To implementation digital IIR Filter using TMS320C5416 DSP Processor.
APPARATUS REQUIRED
TMS320C5416 DSP processor kit, PC, CRO with probe.
ALGORITHM:
1.Start the program.
2.Load the amplitude of the input signal of 5 volts.
3.Load the frequency of the input signal.
4.Observe the waveform by using CRO.
5.Stop the program.
solve the problem theoretically to find H(z).From H(z),the terms x(n) and y(n) are to be found.feed the
coefficients of x(n) and y(n) to design the IIR filter
**This routine implements an N-th order IIR filter
*d(n)=x(n)-d(n-1)a1-d(n-2)a2-........-d(n-N+1)aN-1
*y(n)=d(n)b0+d(n-1)b1+.....+d(n-N+1)bN-1
**Memory Requirement:*State variables(low to high data memroy):
*d(n)d(n-1)...d(n-N+1)**Coefficient(low to high Program memroy):
*-a(N-1)-a(N-2)-....-a(-1)b(N-1)b(N-2)....b(1)b(0)
**Entry Conditions:
*AR0-> Input
*AR1-> d(n-N+1)
*AR2-> output *COEFA->-a(N-1)
*COEFB->-b(N-1)
*ARP=AR0
PROGRAM :
.mmregs
.text
IIR_N
ZPR ;Clear P register
LACC *,15,AR1 ;Get Q15 input
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OUTPUT :
90
T #(N-2) ;For i=1,i<=N-1,++i
MAC COEFA,*- ;Acc+=-a(N-i))*d(n-N+i)
APAC ;Final accumulation
SACH *,1 ;Save d(n)
ADRK N-1 ;AR1->d(n-N+1)
LAMM BMAR ;Acc->a(N-1)
ADD #N-1 ;Acc->b(N-1)
SAMM BMAR ;BMAR->b(N-1)
RPTZ #(N-1) ;For i=1,i<=N-1,++i
MACD COEFFB,*- ;Acc+=-b(N-i))*d(n-N+i)
LTA *,AR2 ;Final accumulation
SACH *,1 ;Save Yn
RESULT
Thus the digital IIR Filter was implemented using TMS320C5416 DSP Processor.
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DATE:
EXP NO: 12 IMPLEMENT AN UP-SAMPLING AND DOWN-SAMPLING
OPERATION IN DSP PROCESSOR.
AIM:
To implementation up-sampling and down-sampling operation using TMS320C5416 DSP Processor.
APPARATUS REQUIRED
TMS320C5416 DSP processor kit, PC, CRO with probe.
ALGORITHM:
1.Start the program.
2.Load the amplitude of the input signal of 5 volts.
3.Load the frequency of the input signal.
4.Observe the waveform by using CRO.
5.Stop the program.
PROGRAM:
.mmregs
.text
START: LDP #0100H
IN 0,06H ;soc of adc
IN 1,04H ;1st channel adc
BIT 1,4
BCND CALL,TC
LACC 1
ADD #0800H
AND #0FFFH
SACL 1
B LOOP
B START
CALL: LACC 1
SUB #0800H
AND #07FFH
SACL 1
LOOP: OUT 1,04H ;O/P of latch
B START
END
RESULT
Thus the up-sampling and down-sampling was implemented using TMS320C5416 DSP Processor.
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