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Final Exam Question 242 CSE4325 B MSTR

The document outlines the final-term exam for the course CSE 4325: Microprocessors and Microcontrollers at United International University, scheduled for Summer 2024. It includes various questions related to microprocessor operations, ADC systems, I2C protocols, and smart irrigation system design, each with specific marks allocated. The exam emphasizes understanding of microprocessor architecture, assembly language, and practical applications in electronics.

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Hasan Emad
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16 views2 pages

Final Exam Question 242 CSE4325 B MSTR

The document outlines the final-term exam for the course CSE 4325: Microprocessors and Microcontrollers at United International University, scheduled for Summer 2024. It includes various questions related to microprocessor operations, ADC systems, I2C protocols, and smart irrigation system design, each with specific marks allocated. The exam emphasizes understanding of microprocessor architecture, assembly language, and practical applications in electronics.

Uploaded by

Hasan Emad
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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United International University (UIU)

Dept. of Computer Science & Engineering (CSE)


Final-Term Exam Trimester: Summer 2024
Course Code: CSE 4325 Course Title: Microprocessors and Microcontrollers
Total Marks: 50 Duration: 2 hours

Any examinee found adopting unfair means would be expelled from the trimester/ program as per
UIU disciplinary rules.

Question 1: Answer all the questions. (12.5 Marks)

An 80286 microprocessor is executing a segment in protected mode and a portion of its descriptor table is given
above. If the current physical address produced by this processor is B123ABH, then determine the followings:

a. Find out the descriptor (index number) of which this physical address belongs to. [5]

b. For an offset value of 2D4H, determine the physical address. [1.5]

c. Segment type (CS/DS/SS/ES). [2]

d. Has the segment been accessed? [1]

e. What is the descriptor privilege level? [2]

f. Is the descriptor defined or undefined? [1]

Question 2: Answer all the questions. (12.5 Marks)

a. Suppose, you are using a device which uses an “N” bit ADC on a 5v system. This system [4+2]
converts an analog voltage of 3V into a digital value of 2457. Find out the value of “N”. If we
want to reduce quantization error, should we increase or decrease the value of “N”? Give an
explanation for your answer.

b. Why is I2C called a handshaking protocol? In a particular communication in I2C, Master (index [1.5+
- 10H) receives 4 byte data (char - ‘FaiL’) from Slave (index - 14H). Draw the corresponding 3]
sequence diagram. ASCII codes for ‘A’ and ‘a’ are 65 and 97 respectively.

c. Design a Smart Irrigation System that automates water pumps based on soil moisture levels [2]
while sending data to a server for real-time monitoring. For example, when soil moisture drops
below 50%, the pump automatically activates, and it turns off once the moisture reaches 55%. The
system can be built using either a Raspberry Pi (microprocessor-based system) or Arduino
(microcontroller-based system). Which platform would be more suitable?

1
Question 3: Answer all the questions. (12.5 Marks)
a. Consider the following fetch cycle in an 8086 BIU: [4]

[Fetch, Fetch, Fetch, Fetch, Fetch, Fetch,Fetch, Fetch]

When the first instruction is being executed, two instructions are fetched and saved in the
instruction queue. If the 2nd instruction is a ‘JUMP <4th>’, the 3rd is a ‘JUMP <6th instruction
address>’ and 6th instruction is a ‘MOV <address>’ instruction, then draw the corresponding
BIU and EU’s cycle.

b. I. What is ‘Wait State’ in an 8086 microprocessor? Which pin is used to insert ‘Wait States’ [3+4]
into the timing of an 8086 microprocessor?
II. Draw the timing diagram for Memory Write operation of microprocessor “808x” showing the
activities of 𝑀𝑒𝑚/𝐼𝑂, Address-Data bus (AD0 - AD15, AD16 - AD19), ALE, 𝑊𝑅, RD, 𝐷𝐸𝑁,
𝐷𝑇/R in each clock cycle. [Observe the pins carefully]

c. When does page fault occur in the paging mechanism? [1.5]

Question 4: Answer all the questions. (12.5 Marks)


RAM Content

Opcode Table

a. Write the assembly code for the below expression using the RAM content. [5.5]
2 2 2
3 −2 +1
[Hints: Exponents can be done by Multiplications, and Multiplications can be done by Additions]

b. Fill-up the RAM content table with the instructions machine code. (Start from 0H). [3]
Use the opcode given in the opcode table.

c. Write the control words for Execution T-states (T4, T5, T6) to perform the instruction at Address [4]
3H of the given RAM using the controller sequence below.

CON = 𝐶𝑝𝐸𝑝𝐿𝑀 𝐶𝐸 𝐿𝐼 𝐸𝐼 𝐿𝐴𝐸𝐴 𝑆𝑈𝐸𝑈𝐿𝐵 𝐿𝑂

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