Lect 5 Introduction of Microprocessors and Organization of 8085
Lect 5 Introduction of Microprocessors and Organization of 8085
3. Control Unit
Control Unit
(iii) WR:
1) This is write control signal. This is also active low signal.
2) This signal indicates that the data on data bus are to be written into
selected memory or I/O locations.
3) It is tristated during HOLD and HALT.
Q.6 Describe in brief functions of following pins in 8085
microprocessor.
(a) HOLD (b) INTR (c) RESET IN
Ans.:
(a) HOLD
1) It indicates that a peripheral such as DMA (Direct Memory Access)
controller is requesting the use of address and data buses.
2) Having received a HOLD request the microprocessor releases the
use of the buses as soon as the current machine cycle is completed.
Internal processing may continue.
3) The processor regains the bus after the removal of the HOLD
signal.
(b) INTR
1) INTR is a level triggered maskable Interrupt Request input signal.
2) This is a general purpose interrupt with lowest priority.
3) When interrupt signal is given on this line, the microprocessor
executes interrupt acknowledge cycle to read interrupt information
from interrupting device.
4) When this arises, program counter does not increment its contents.
5) The INTR is enabled or disabled by software.
Q.7 Describe the functions of following pins in 8085 microprocessor.
1) READY 2) RST 7.5 3) S0S1 4) HLDA
Ans.
1) READY:
a) It is a input signal used by the microprocessor to sense whether
a peripheral is ready to transfer data or not.
b) This signal is used to delay the microprocessor until a slow
responding peripheral is ready to send or accept data.
c) If READY is high, the peripheral is ready. If it is low, the
microprocessor waits for an integral number of clock cycles until it
goes high.
d) It is used to synchronize slower peripheral to faster
microprocessor.
2) RST 7.5:
a) RESTART INTERRUPT: This signal is used to interrupt the
microprocessor.
b) When an interrupt is recognized the next instruction is executed
from a fixed location in the memory i.e. 7.5 × 8 = 003CH
c) It is maskable interrupt.
d) They cause an internal restart to be automatically insert.
3) 𝑆0 𝑆1
a) These are status signals sent by microprocessor to distinguish the
various operations or type of machine cycle in progress.
b) Status code for Intel 8085 is :
𝑺𝟏 𝑺𝟎 Operations
0 0 HALT
0 1 WRITE
1 0 READ
0 1 FETCH
4) HEADL
a) It is signal for HOLD ACKNOWLEDGEMENT.
b) A HLDA output indicates to a peripheral that a HOLD request has
been received and that the microprocessor will relinquish control of
buses in the next clock cycle.
c) After the removal of HOLD request HLDA goes low.
Q.8 Explain following Pins of 8085 Micro – processor.
1) CLK (out) 2) WR 3) RST 5.5
Ans.
RST 5.5 : This signal is used to interrupt the microprocessor. When
an interrupt is recognized the next instruction is executed from a
fixed location in memory i.e. 002C H. it is maskable interrupt. It
cause internal restart to be automatically insert.
Q.9 Describe the functions of following pins of 8085:
(i) SID (ii) READY (iii) ALE
Ans:
1) An interrupt is a subroutine called, initiated by external device
through hardware (hardware interrupt) or microprocessor itself
(software interrupt).
2) An interrupt can also be viewed as a signal, which suspends the
normal sequence of microprocessor and then microprocessor
gives service to that device which has given the signal. After
completing the service, microprocessor again returns to the main
program.
3) Microprocessor is connected to different peripheral devices. To
communicate with these devices, microprocessor 8085 uses
interrupt method.
4) An interrupt is an input signal, which transfers control to specific
routine known as Interrupt Service Routine (ISR). After executing
ISR, control is again transfer to main program.
S Z - Ac - P - Cy - Status flags
where, S - Sign flag, Z - Zero flag, Ac - Auxiliary carry flag,
P - Parity flag, Cy - Carry flag.
(i) Sign flag (S): After the execution of arithmetic and logic operation,
if the most significant bit of the result is 1, then the sign flag is set
to 1 otherwise 0. This flag is used with signed number. If MSB is 1,
the number will be negative and if it is 0, the number will be
positive.
(ii) Zero flag (Z): After performing an arithmetic or logic operation, if
the result is zero, then zero flag is set to 1, else it is reset. This flag
is modified by the results in accumulator as well as in other
registers.
(iii) Auxiliary carry flag (Ac): In an arithmetic operation, when carry is
generated from bit D3 to D₁, the auxiliary carry flag is set to 1. This
flag is only available internally and used for B.C.D. operations and
not available for programmer.
(iv) Parity flag (P): Parity flag is set to 1, if the result stored in
accumulator contains even parity i.e. even number of 1's. If
accumulator contains odd number of 1's, the flag is 0.
(v) Carry flag (Cy): This flag sets if carry produced by most significant
bit during the execution of an arithmetic operation.
In subtraction carry flag serve as borrow flag.
Q.27 Flag register contains data D5H. Interprete its meaning.
Ans.:
D5 = 11010101
1 1 0 1 0 1 0 1