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Session8-Memory Unit

This document provides an overview of memory units in computer organization, detailing types of memory such as RAM, ROM, cache, and virtual memory, along with their functions and characteristics. It explains the memory hierarchy, access methods, and the internal organization of memory chips, highlighting the differences between static and dynamic RAM. Additionally, it discusses secondary storage options like magnetic disks and tapes, as well as RAID and optical memory technologies.

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0% found this document useful (0 votes)
8 views

Session8-Memory Unit

This document provides an overview of memory units in computer organization, detailing types of memory such as RAM, ROM, cache, and virtual memory, along with their functions and characteristics. It explains the memory hierarchy, access methods, and the internal organization of memory chips, highlighting the differences between static and dynamic RAM. Additionally, it discusses secondary storage options like magnetic disks and tapes, as well as RAID and optical memory technologies.

Uploaded by

lucbrouillard381
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 40

UNIT-3 MEMORY UNIT

UNIT STRUCTURE
3.1 Learning Objectives
3.2 Introduction
3.3 Memory Hierarchy
3.4 Main Memory
3.5 Semiconductor RAM
3.5.1 Static and Dynamic RAM
3.5.2 Internal Organization of Memory Chips
3.6 ROM
3.6.1 Types of ROM
3.7 Locality of Reference
3.8 Cache Memory
3.8.1 Cache Operation - an overview
3.9 Mapping Functions
3.9.1 Direct Mapping
3.9.2 Associative Mapping
3.9.3 Set-Associative Mapping
3.10 Replacement Algorithm
3.11 Virtual Memory
3.11.1 Paging
3.12 Magnetic Disk
3.12.1 Data Organization in Magnetic Disk
3.12.2 Disk Access Time
3.13 RAID
3.14 Optical Memory
3.14.1 CD-ROM
3.14.2 DVD Disks
3.15 Magnetic Tape
3.16 Let Us Sum Up
3.17 Further Readings
3.18 Answers To Check Your Progress
3.19 Model Questions

Computer Organization and Architecture


3.1 LEARNING OBJECTIVES

After going through this unit, you will be able to :

• learn about main memory


• describe the role of RAM, ROM and their types
• learn the concept of locality of reference
• learn about cache and virtual memory
• describe different types of mapping techniques
• decribe the mechanism of paging
• illustrate the organization of data in magnetic disks as well as
magnetic tapes
• learn about RAID technology
• describe the technology of optical memory

3.2 INTRODUCTION
In the previous unit, we have learnt about the peripheral devices
associated with a computer system and various techniques with the
help of which data transfers between the main memory and the
input-output devices takes place.
In this unit we shall discuss about various types of memory
associated with a computer system including main memory, cache
and virtual memory and various technology associated with these
memory units. Finally, we conclude the unit discussing the concept
of secondary memory along with their types.

3.3 MEMORY HIERARCHY

The computer stores the programs and the data in its memory unit.
The CPU fetches the instructions out of the memory unit to execute
and process them.

Memory can be primary (or main) memory and secondary (or auxiliary)
memory. Main memory stores programs and data currently executed
by the CPU of a computer. Auxiliary memory provides backup storage
of information. Data as well as instructions are transferred from the
secondary memory to the main memory whenever it is needed by
the CPU.

2 Computer Organization and Architecture


The capacity of the memory is typically expressed in terms of bytes
or words (1 byte = 8 bits). Word lengths are commonly 8 bits, 16
bits and 32 bits. The size of a word is generally the number of bits
that are transferred at a time between the main memory and the
CPU.

Memory has different locations, which are called its addresses, to


store the data. There are different methods for accessing those
address locations such as sequential access, direct access and
random access.

• In Sequential access method, the records or the data are


accessed in a linear fashion, from its current location in the
memory to the desired location moving through each and every
record in the memory unit. For example , in case of the magnetic
tapes this method is used.

• In Direct Access, each record has different addresses based


on the physical location of the memory and the shared Read/
Write head moves directly to the desired record. This method
is used in magnetic disks.

• In Random access each location can be randomly selected


and accessed directly. Main memory can be randomly accessed.

Memory has two basic operations: Read and Write operations. In


Read operation, the processor reads data from a particular memory
location and transmits that data to the requesting device via bus. On
the other hand, a memory Write operation causes the memory to
accept data from a bus and to write that particular information in a
memory location.

Regarding the speed of the memory, there are two useful measures
of the speed of memory units : Memory Access Time and Memory
Cycle Time.

Memory Access Time is the time between the initiation of a memory


operation and the completion of that operation. Memory Cycle Time
is the minimum time delay that is required between the initiation of
two successive memory operations, for example between two
successive memory read operations.

The computer system has a memory hierarchy consisting of the


storage devices in it. A typical memory hierarchy is illustrated in the

Computer Organization and Architecture


figure below :

Register

Static RAM
Dynamic RAM

Magnetic disks

Magnetic Tapes

Fig. 3.1 : Memory Hierarchy

There are three key characteristics of the memory. They are cost,
capacity and access time. On moving down the memory hierarchy,
it is found that the cost of the storage devices decreases but their
storage capacity as well as the memory access time increases. In
other words, the smaller memories are more expensive and much
faster. These are supplemented by the larger, cheaper and slower
storage devices.

Thus from the above figure it can be seen that the registers are at
the top of the hierarchy and so provides the fastest, the smallest and
the most expensive type of memory device for the CPU to access
data. Registers are actually small amount of storage available on the
CPU and their contents can be accessed more quickly than any
other available storage. They may be 8–bit registers or 32-bit registers
according to the number of bits that they can hold in them.

Magnetic disks and Magnetic Tapes are the secondary storage


mediums whose data holding capacities are much larger than the
Processor Registers and the semiconductor memories which cannot
hold all the data to be stored in the computer system. The magnetic
tapes are more suited for the off-line storage of the large amounts
of the computer data. The data are kept as records which are again
separated by gaps.

3.4 MAIN MEMORY


The main memory is the central storage unit of the computer system.
Main memory refers to the physical memory which is internal to a
computer. The word “Memory” when used usually refers to the Main
Memory of the computer system. The computer can process only

4 Computer Organization and Architecture


those data which are inside the main memory. For execution, the
programs and the data must be first brought into the main memory
from the storage device where they are stored. Computer memory
has a crucial role in the performance, reliability and the stability of the
system. It is also an important factor in the software support of the
system. More number of software can be used with more memory
than with lesser ones. There are two types of main memory :

• RAM (Random Access Memory) and

• ROM (Read Only Memory).

RAM : In RAM, it is possible to both read and write data from and
to the memory in a fixed amount of time independent of the memory
location or address. RAM is also a volatile memory which means it
stores the data in it as long as power is switched on. Once the
power goes off, all the data stored in it is also lost. Therefore, a RAM
cell must be provided a constant power supply.

ROM : ROM is a non-volatile semiconductor memory; that is, it doesn’t


lose its contents even when the power is switched off. ROM is not
re-writable once it has been written or manufactured. ROM is used
for programs such as bootstrap program that starts a computer and
load its operating system.

3.5 SEMICONDUCTOR RAM

The basic building block of the semiconductor memories is the RAM


chip. RAM is actually made up of a number of RAM chips. They
contain a number of memory cells, which are electronic circuits having
two stable states : 0 and 1. The binary information are stored in the
form of arrays having rows and columns in the memories. With the
advent and advances of VLSI (Very Large Scale Integration) circuits,
thousands of memory cells can be placed in one chip. As a result,
the cost of the semiconductor memories has dropped dramatically.

3.5.1 Static and Dynamic RAM

There are two main types of semiconductor RAM Memories :


Static RAM (SRAM) and Dynamic RAM (DRAM) and also their

Computer Organization and Architecture


variations.

Static RAM consists of internal flip-flops to store the binary


information. Each flip-flop has four to six transistors in them.
SRAM can hold its data as long as the power is supplied to the
circuit. Also SRAM cells can keep the data intact without any
external refresh circuitry. This fact makes SRAM simple and
contrasted to Dynamic RAM, which needs to be refreshed many
times per second in order to hold its data contents.

The figure below shows the implementation of a SRAM cell. A


latch is formed by cross-connecting two inverters. The latch is
then connected to two bit lines by the transistors T1 and T2.
T1 and T2 are controlled by a word line. They are in the off-
state when the word line is at the ground level.

b b'

T1 T2

Word Line
Bit Lines

Fig. 3.2 : Implementation of SRAM cell

Static RAM is so called as they can retain their state as long


as the power is applied. As SRAM never has to be refreshed,
it is very fast. However, because it requires several transistors,
it takes up more space on a RAM chip than the Dynamic RAM
cells. Thus, there is less memory per chip which makes it lot
more expensive. The size of SRAM is so larger comparatively
than DRAM. In other words performance-wise SRAM is superior
to the DRAM. But because of the size and cost of the SRAMs,
DRAM is used for the system memory or main memory instead
and SRAM are used for Cache memory as cache memory
needs to be more faster and small. D-type and RS-type flip-
flops are generally used for SRAM.

Dynamic RAM are so named because their cells do not retain

6 Computer Organization and Architecture


their states indefinitely. DRAM stores the information in the
form of a charge on capacitors. The capacitor holds a charge
if the bit is a “1” and holds no charge if the bit is a “0”. Unlike
SRAM, DRAM uses only one transistor to read the contents of
the capacitor. The capacitors are very tiny and can hold a
charge only for a short period of time, after which it starts
fading away. Therefore a refresh circuitry is required in case of
DRAM cells to read the contents of the cell and to refresh them
with a fresh charge before the contents are lost. This refreshing
of the cells are done hundreds of time in every second
irrespective of whether the computer is using the DRAM memory
at that time or not. So the DRAM is slower than the SRAM just
because of the refresh circuitry overhead.

DRAMs are used for the computer’s main memory system as


they are cheaper and take up much less space than the SRAM.
Even though there is the overhead of the refresh circuitry, it is
but possible to use a large amount of inexpensive main memory.
The figure given below is a DRAM cell consisting of a capacitor
C and a transistor T.

Bit Line

Word Line

T
C

Fig. 3.3 : A DRAM cell

To store the binary information in this cell, the transistor T is


first turned on and voltage is applied to the bit line. This causes
the capacitor to get some amount of charge. After the transistor
is turned off, the capacitor begins to discharge. Therefore, the
cell contents can be got correctly only if it is read before the
capacitor’s charge falls below some threshold value. During a

Computer Organization and Architecture


Read operation, the transistor in a DRAM cell is first turned on.
To check whether the amount of charge on the capacitor is
above the threshold value, there is a sense amplifier connected
to the bit line. If so, the amplifier pulls the bit line to full voltage
to represent logical 1. This voltage then recharges the capacitor
to its full voltage.

Refresh
Counter

Cell
Row Row
address decoder Array
latch
Row /
Column
Address
Read/Write
Column
Column circuits &
address
decoder
counter

Clock

RAS Mode register


and Timing
Data input Data output
CAS Control register register
R/W

CS

3.4: Synchronous DRAM Data

On the other hand, if it was detected that the amount of charge


on the capacitor is below the threshold value, then the bit line
is pulled down to the ground level so that the capacitor now has
no charge at all, that is it will represent logical 0. Thus, reading
the cell contents automatically refreshes its cell contents. The
time taken in doing all this is very short and is expressed in
nanoseconds.

DRAM can again be Synchronous DRAM and Asynchronous


DRAM. The DRAM discussed above is Asynchronous DRAM,

8 Computer Organization and Architecture


that is, the memory is not synchronized to the system clock.
The memory signals are not at all coordinated with the system
clock.

The Synchronous DRAM or SDRAM is synchronized with the


system clock; that is, it is synchronized with the clock speed
of the microprocessor. All signals are according to the clocks
so the timings are controlled and tight. The figure below shows
the structure of SDRAM.

The speed of the DRAM has become more critical as the


electronic systems that utilizes these devices are now operating
at increasing speeds. Thus SDRAM will soon be replacing the
conventional DRAM as it is designed to work with higher
operating bus speeds in the computer systems.

3.5.2 Internal Organization of Memory Chips

Internally, the memory in the computer system is organized in


b7 b’7 b1 b’1 b0 b’0

W0

A0

A1 W1

Address Memory
A2 Decoder
Cell
A3

W15

Read/ Write Read/ Write Read/ Write


circuit circuit circuit

b7 b1 b0
Fig.3.5: Organization of cells in a memory chip
the form of array of rows and columns. Each cell in the array
can hold one bit of information. Each row in the array forms

Computer Organization and Architecture


a memory word. The cells in the column are all connected to
a Read/Write circuit. The figure below presents a possible
organization of the memory cells.

Let us consider a simple example of the organization of a 64-


bit memory. If the memory is organized into 16 groups or words,
then it can be arranged as 16 x 4 memory, that is, it contains
16 memory words and each of the word is 4 bits long. There
are also other ways of organizing the same memory, like for
example, it can be arranged as 64 x 1, 32 x 2 or 8 x 8.

CHECK YOUR PROGRESS

1. Compare the characteristics of SRAM and DRAM.


2. Fill in the blanks :
(a) Data and _____ are transferred from the secondary
memory to the _______ whenever it is needed by the CPU.
(b) The records or the data are accessed in a linear fashion,
from its current location in the memory in _________ access.
(c) Memory _______time is the time between the initiation of a
memory operation and the completion of that operation.
(d) Memory ________ time is the minimum time delay that is
required between the initiation of two successive memory
operations.
(e) Memory access time is _________ in Magnetic disks than
in magnetic tapes.
(f) Registers are small storage inside the ___________.
(g) RAM can access data in a fixed amount of time _______
of the memory location or address.
(h) RAM is a ______ memory and ROM is a _______memory.
(i) Registers are measured by the number of _____ that they
can hold.
(j) The magnetic tapes are more suited for the __________ of
the large amounts of the computer data.

10 Computer Organization and Architecture


3.6 ROM

ROM (Read Only Memory) is another type of main memory that can
only be read. Each memory cell in ROM is hardware preprogrammed
during the IC (Integrated Circuit) fabrication process. That is the code
or the data in ROM is programmed in it at the time of its manufacture.
The data stored in ROM is not lost even if the power is switched off.
For this reason, it is called a non-volatile storage. It is used to store
programs that are permanently stored and are not subject to change.
The system BIOS program is stored in ROM so that the computer
can use it to boot the system when the computer is switched on.

The figure below shows a possible configuration for a ROM memory


cell.

Bit Line
Word Line

Fig. 3.6 : A ROM memory cell

If the point at P is connected to ground, then a logic value 0 is stored


in the cell and if it is not connected then a logic value 1 is stored in
the cell. To read the cell contents, the word line is activated. A sense
circuit connected at the end of the bit line generates the output value.

ROM can also be randomly accessed as RAM. Only unlike RAM it


cannot be written.

3.6.1 Types of ROM

There are five types of ROM :


1. ROM (Read Only Memory)
2. PROM (Programmable Read Only Memory)

3. EPROM (Erasable Programmable Read Only Memory)

Computer Organization and Architecture


4. EEPROM (Electrically Erasable Programmable Read Only
Memory)

5. Flash EEPROM Memory

1. ROM (Read Only Memory)

The contents of ROM are permanent and is programmed at


the factory. It is designed to perform a specific function and
cannot be changed. It is reliable.

2. PROM (Programmable Read Only Memory)

As the name indicates, this type of ROM chips allows the user
to code data into it. They were created as making ROM chips
from scratch. It is time-consuming and also expensive in creating
small numbers of them. PROM chips are like ROM chips but
the difference is that PROM chips are created by inserting a
fuse at the point P (in the above diagram). Before programming,
all the memory cells in PROM contains 0. The user then can
insert 1’s wherever needed by burning out the fuses at those
locations by sending high current pulses. However, PROMs
can be programmed only once. They are more fragile than
ROMs.

3. EPROM (Erasable Programmable Read Only Memory)

An EPROM is another type of ROM chip that allows data to be


erased and reprogrammed. They can be rewritten many times.
It is also similar to a ROM chip. However, an EPROM cell has
two transistors. One of the transistors is known as the floating
gate and the other is known as the control gate. In an EPROM
cell, the connection to ground is always made at point P. The
erasing of the contents is done by exposing the chip to
ultraviolet light. EPROM chips are mounted in packages that
has a small glass window through which the UV light is sent
into it.

4. EEPROM (Electrically Erasable Programmable Read


Only Memory)

The drawbacks of EPROMs are that they must be physically


removed to be rewritten and also the entire chip has to be
completely erased to just change a particular portion of it.
EEPROM was introduced to remove these drawbacks of

12 Computer Organization and Architecture


EPROM. EEPROM chips can be both programmed and the
contents can be erased electrically. They are versatile but slow
as they are changed one byte at a time.

5. Flash EEPROM Memory

As EEPROM is slow to be used in products that have to make


quick changes to the data on the chip, so the Flash EEPROM
devices were developed. Although the flash memory devices
are similar to EEPROM, there are also differences between
them. In EEPROM, a single cell contents can be read and
written while in flash memory single cell contents can be read
but it is possible to write an entire block of cells. Also, before
writing, the previous contents of the block are erased.

The advantage is that they work faster and the power


consumption is low.

CHECK YOUR PROGRESS

3. Write True or False :


(a) SRAM and DRAM are the two types of semiconductor
memories.
(b) SRAM stores the data in flip-flops and DRAM stores the data
in capacitors.
(c) Main memory is actually the Static RAM.
(d) DRAM is more expensive as compared to SRAM.
(e) The capacitors have their own tendency to leak their charge.
(f) Conventional DRAM is the Synchronous DRAM.

4. Fill in the blanks :


(a) A refresh circuitry is required in case of ___________.
(b) SRAM are used for _______________ memory and DRAM is
used for ______________ memory
(c) DRAM uses one transistor to read the contents of
the______________________.
(d) The type of RAM that can hold its data without external
refresh for as long as power is supplied to the circuit is called
_________________.
(e) SDRAM is synchronized to the ____________________.
(f)_________________ is rapidly becoming the new memory
standard for modern PC’s.

Computer Organization and Architecture


3.7 LOCALITY OF REFERENCE

During program execution, memory access time is of utmost


importance. It has been observed that data and instructions which
are executed repeatedly are located near to each other. Many
instructions in localized areas of the program are executed repeatedly
during some time period and the other remaining instructions of the
program are accessed relatively infrequently. This characteristic of
the program is referred to as the “locality of reference”. There are
two types of locality of references. These are : temporal locality and
spatial locality.

 Temporal locality of reference means that a recently ex-


ecuted instruction is likely to be executed again very soon. This
is so because when a program loop is executed the same set
of instructions are referenced and fetched repeatedly. For ex-
ample, loop indices, single data element etc.

 Spatial locality of reference means that data and instructions


which are close to each other are likely to be executed soon.
This is so because, in a program, the instructions are stored
in consecutive memory locations. For example, sequential code,
array processing, code within a loop etc.

3.8 CACHE MEMORY

To make use of the locality of reference principle, a small


high-speed memory can be used to hold just the active portions of
code or data. This memory is termed as cache memory. The word
cache is pronounced as cash. It stores data and instructions which
are to be immediately executed. Two types of caching are com-
monly found in computers. These are : memory caching and disk
caching.

14 Computer Organization (Block 2)Computer Organization and Architecture


 Memory Caching

In case of memory caching, the cache is made up of high-speed


static RAM (SRAM). Static RAM is made up of transistors that do not
need to be constantly refreshed. It is much faster than the dynamic
RAM; access time is about 10 nanoseconds(ns). The main memory
is usually made up of dynamic RAM(DRAM) chip. It is directly
addressed by the CPU and its access time is about 50 ns. Data
and instructions stored in cache memory are transferred to the CPU
many times faster as compared to main memory. By using an
intelligent algorithm, a cache contains the data that is accessed most
often between a slower peripheral device and the faster processor.
SRAM chips are much more expensive as compared to DRAM chips.
If the whole main memory is made using SRAM chips, then the need
of cache memory will be eliminated.

Some memory caches are built into the architecture of


microprocessors. These are called internal cache. For example,
the Intel 80486 microprocessor contains a 8K memory cache and
the Pentium has a 16K cache. Such internal caches are often called
Level 1(L1) caches. Cache outside the microprocessor i.e., on the
motherboard is called external cache or Level 2(L2) cache. External
caches are found in almost all modern personal computers. These
caches are placed between the CPU and the DRAM. Like L1 caches,
L2 caches are composed of SRAM but they are much larger.

 Disk Caching

Disk caching works under the same principle as memory caching,


but instead of using high-speed static RAM, it uses dynamic RAM.
The most recently accessed data from disk is stored in the main
memory which is made up of DRAM. When a program needs to
access data from the disk, it first checks the disk cache to see if the
data is there. Disk caching can improve the performance of
applications, because accessing a byte of data in DRAM can be

14

Computer Organization and Architecture


thousands times faster than accessing a byte on a hard disk.

3.8.1 Cache Operation - an overview


When the CPU sends an address of instruction code or
data, the cache controller examines whether the content of the
specified address is present in the cache memory. If the
requested data or instruction code is found in the cache, the
cache controller enables the cache memory to send the
specified data/instruction to the CPU. This is known as a ‘hit’.
If it is not found in the cache memory, then it is said that a
‘miss’ has occured and the cache controller enables the
controller of the main memory to send the specified code or
data from the main memory. The performance of cache memory
is measured in terms of hit ratio. It is the ratio of number of
hits divided by the total number of requests made. By adding
number of hits and number of misses, the total request is
calculated.
It is not necessary for the processor to know about the
existence of cache. Processor simply issues READ and WRITE
requests using addresses that refer to locations in the memory.
Both the main memory and the cache are divided into equal-
size units called blocks. The term block is usually used to
refer to a set of contiguous address locations of some size.
In a READ operation, the main memory is not involved. When
a READ request is received from the processor, the contents
of a block of memory words containing the location specified
are transferred into the cache, one word at a time. Subse-
quently, when the program references any of the locations in
this block, the desired contents are read directly from the cache.
Usually, the cache memory can store a reasonable number of
blocks at any given time.The correspondence between the main
memory blocks and those in the cache is specified by a map-
ping function. When the cache is full, it becomes necessary to
implement a replacement algorithm. The replacement algorithm
decides which block should be moved out of the cache to
make room for the new block. Normally, the block that
will be replaced is the one that will not be accessed or needed
again for the longest time. Cache provides a timer to control
this situation.

16 Computer Organization and Architecture


When the memory operation is a WRITE, there are two
ways to proceed: write-through method and write-back method.

 Write-through method: In this method, the cache


location and the main memory location are updated
simultaneously.

 Write-back method: This method is to update only the


cache location and to mark it as updated with an
associated flag bit also known as dirty bit . Here, the
update of main memory occurs only when the block
containing this marked word is to be removed from the
cache to make room for a new block.

CHECK YOUR PROGRESS

5. Choose the appropriate option:


(i) The cache is made up of high-speed ______ in case of
memory caching.
(a) EPROM (b) SRAM
(c) ROM (d) none of these
(ii) Cache memory is used in computer sytem to
(a) Replace static RAM (b) Replace ROM
(c) Ensure first booting (d) Speed-up memory access
(iii) Compared with primary storage, secondary storage is
(a) fast and inexpensive (b) fast and expensive
(b) slow and inexpensive (d) slow and expensive

6. Fill in the blanks:


(i) ______ occurs when the requested word is not present in
the cache memory.
(ii) __________ states that data and instruction which are
close to each other are likely to be accessed in near future.
(iii) Level 2 cache are also termed as _________ cache.
(iv) The performance of cache memory is measured in terms
of ______.

Computer Organization and Architecture


3.9 MAPPING FUNCTIONS

To search for a word in the cache memory, cache is mapped


to the main memory. There are three different ways that this mapping
can generally be done. These are:

• Direct Mapping
• Associative Mapping
•  Set-Associative Mapping

Mapping functions are used as a way to decide which main memory


block occupies which line of cache. As there are less lines (or block)
of cache than main memory blocks, an algorithm is needed to decide
this. Let us take an example, a system with a cache of 2048 (2K)
words and 64K (65536) words of the main memory. Each block of
the cache memory is of size 16 words. Thus, there will be 128 such
blocks (i.e., 16*128 = 2048). Let the main memory is addressable
by 16 bit address (i.e., 216 = 65536 = 64*1024).

3.9.1 Direct Mapping

The simplest way for determining the cache location for


placement of a main memory block is the direct mapping
technique. Here, the block i of the main memory maps onto
block i modulo 128 of the cache memory. For example,

Block 0 of main memory = 0 %128 = 0, i.e., Block 0 of cache memory


Block 128 of main memory = 128%128 = 0, Block 0
Block 256 of main memory = 256%120 = 0, i.e., Block 0
Block 1 of main memory = 1%128 =1, i.e., Block 1
Block 129 of main memory = 129%128 =1, i.e., Block 1
Block 257 of main memory = 257%128 =1, i.e., Block 1

Thus, whenever one of the main memory blocks 0,


128, 256,... is loaded in the cache, it is stored in cache block
0. Block 1, 129, 257, ... are stored in cache block 1, and so
on. Since more than one main memory block is mapped onto
a particular cache block, contention may arise for that position
even when the cache is not full. Currently resident block in the

18 Computer Organization and Architecture


cache is overwritten by new block. The detailed operation of
the direct mapping technique is as follows:

5 bits 7 bits 4 bits


Block 0

Tag Block Word


Block 1
(a) 16-bit main memory address
Block 3

Tag
Block 0
Tag
Block 1
Tag Block 2 Block 127

Block 128

Block 129

BB
Tag
Block 127

(b) Cache memory


Block 255

Block 256

Block 257

Block 4095

(c) 4K Main memory

Fig.3.7 : Direct Mapping Technique

In the figure 3.7(c), the 64K words main memory is


viewed as 4K (4096) blocks of 16 words each. In direct
mapping technique, the 16 bit address sent by CPU is
interpreted a tag, a block and a word field as shown in figure
3.7(a). The low-order 4 bits are used to select one of 16
words in a block. When a new block enters the cache, the 7
bits block field determines the cache position in which this
new block can be stored. The high-order 5 bits of the memory
address of the block are stored in 5 tag bits associated with

Computer Organization and Architecture


its location in the cache. These bits identify which of the 32
blocks that are mapped into this cache block field of each
address generated by the processor points to a particular block
location in the cache. The tag field of that block is compared
to the tag field of the address. If they match, then the desired
word specified by the low-order 4 bits of the address is in that
Cache li
block of the cache. If there is no match, then the block
(or Cach
containing the required word must first be read from the main It is the sm
memory and loaded into the cache. memory
transferre
The advantage of direct mapping is that it is simple and main mem
inexpensive. The main disadvantage of this mapping is that cache. Th

there is a fixed cache location for any given block in main generally
typically ra
memory. If a program accesses two blocks that map to the
to 256 by
same cache line repeatedly, then cache misses are very high.

3.9.2 Associative Mapping

This type of mapping overcomes the disadvantage of direct


mapping by permitting each main memory block to be loaded
12 bits 4 bits

Tag Word
(a)16- bit main memory address Block 0

Block 1
Tag
Tag

Tag

Tag

Block i

Tag Block 4095

(c) Main memory


(b) Cache memory

Fig.3.8 : Associative Mapping Technique

20 Computer Organization and Architecture


into any line of cache. To do so, the cache conroller interprets
a memory address as a tag and a word field. The tag uniquely
identifies a block in main memory. For a 16 bit memory address,
12 bits are used as tag field and 4 bits are used as word field
as shown in figure 3.8(a).
With this mapping, the space in the cache can be used more
ine
efficiently.The primary disadvantage of this method is that to
he block) :
mallest unit of find out whether a particular block is in cache, all cache lines
that can be would have to be examined. Using this method, replacement
ed between the algorithms are required to maximize its potential.
emory and the
he cache line is 3.9.3 Set-Associative Mapping
y fixed in size,
anging from 16 Set-associative mapping combines the best of direct and
ytes. associative cache mapping techniques. In this mapping,
cache memory blocks are grouped into sets. It allows a
block of the main memory to reside in any block of a
specific set. Thus, the contention problem which usually arise
in direct mapping can be avoided by having a few choices for
placement of block. In the figure 3.9, set-associative mapping
technique is shown. Here, the cache is divided into sets where
each set contains 2 cache blocks. Thus, there will be 64 sets
in the cache of 2048(2K) words. Each memory address is
assigned a set, and can be cached in any one of those 2
locations within the set that it is assigned to. In other words,
within each set the cache is associative, and thus the name
set associative mapping.
The 6 bits set field of the address determines which
set of the cache might contain the desired block. The tag field
of the address must then be associatively compared to the
tags of the two blocks of the set to check if the desired block
is present. For the main memory and cache sizes shown in
figure 3.9, four blocks per set can be accommodated by a 5
bits set field, eight blocks per set by a 4 bits set field, and so
on. If there is 128 block per set, then it requires no set bits and
it becomes a fully associative technique with 12 tag bits. The
other extreme condition of one block per set is the direct-
mapping method. A cache that has N blocks per set is referred

Computer Organization and Architecture


to as N-way set-associative cache. Figure 3.9(b) is a 2-way
set-associative cache.
6 bits 6 bits 4 bits
Block 0

Tag Set Word Block 1

(a) 16-bits main memory address

Block 63

Block 64

Block 65

Block 4
Block 127

Block 128

Block 129

Block 126
Block 4095
Block 127
(c) Main memory
(b) Cache memory

Fig.3.9 : Set-Associative Mapping Technique

CHECK YOUR PROGRESS

7. Fill in the blanks :

(i) Main memory block can reside in any cache position in


case of ________ mapping.

(ii) In Set-associative mapping blocks of the cache are


grouped into _______.

(iii) In _______ mapping, main memory address consists of


tag, block and word fields.

(iv) A cache that has 4 blocks per set is referred to as _____.

22 Computer Organization and Architecture


3.10 REPLACEMENT ALGORITHMS

For direct mapping where there is only one possible line for a block
of memory, no replacement algorithm is required. For associative
and set associative mapping, however, an algorithm is needed. At
this point, we will describe the one most common replacement
algorithm, called LRU algorithm. This algorithm is easy to understand
and provides a good background to understand the more advanced
replacement algorithms. Several other replacement algorithms are
also used in practice such as: first in first out replacement algorithm,
random replacement algorithm etc.

Least Recently Used (LRU) : Due to locality of reference,


programs usually stay in localized areas for reasonable period of
time. So there is a high probability that the blocks that have been
referenced recently will be referenced again soon. Therefore, it
overwrites block in cache memory that has been there the longest
with no reference to it. That block is known as the least recently
used block and the technique is known as least recently used
(LRU) replacement algorithm. In this method, a counter is associted
with each page in the main memory and it is incremented by 1 at
fixed intervals of time. When a page is referenced, its counter is set
to 0. Thus, counter gives the age of a page. When a page needs to
be removed, the page with the highest counter is removed.

3.11 VIRTUAL MEMORY

Before coming to the point virtual memory, let us review some basics:
physical memory(RAM) versus secondary memory(disk space).

Computers these days typically have somewhere between 128


megabytes (128 million bytes) and 4 gigabytes (4 billion bytes) of
main memory (RAM). What is important is that when we turn the
computer off or if it crashes - anything stored in RAM is gone. That
is why when we are editing a document it is a better to save to disk
often. When we talk about disks, we are talking about the hard disk

Computer Organization and Architecture


address of main memory. In such a case, an address generated by
the CPU is called virtual address or logical address. A set of such
addresses is called the address space. Virtual addresses might be
the same as physical addresses. Physical address refers to the
address of a location of the main(physical) memory. A set of physical
addresses is termed as memory space. If virtual and physical
addresses are different, then virtual addresses must be mapped into
physical addresses and this mapping is done by Memory Management
Unit (MMU).

3.11.1 Paging

Paging is a method for achieving virtual memory. It is the most


common memory management technique. Here, the virtual
address space and memory space are broken up into several
equal sized groups. To facilitate copying the virtual memory
into the main memory, the operating system divides virtual
address space into fixed size pages. Physical address
space(memory space) is also broken up into fixed size page
frames. Page in virtual address space fits into frame in physical
memory. Each page is stored on a secondary storage (hard
disk) until it is needed. When the page is needed, the operating
system copies it from disk to main memory(RAM), translating
the virtual addresses into physical addresses. This process of
copying the virtual pages from disk to main memory is known
as paging.

To illustrate these, let us consider a computer with 14 bit


address field in its instruction and 4096(4K) words of
memory(RAM). A program on this computer can address 214
= 16384 = 16 K words of memory. Thus the virtual address
space is from 0 to 16383. If the address space and the memory
space is divided into groups having 1K=1024 words each,
then 16K virtual address space will consist of 16 pages [figure

24 Computer Organization and Architecture


3.10(a)] and 4K memory space will consist of 4 page frames
[figure 3.10(b)].

0
Page 0
1024
Page 1
2048
Page 2
3072
0
Page frame 0
1024
Page frame 1
2048
Page frame 2
3072
Page frame 3
Page 15 4095
16383 (b)
(a) 4K Main memory (RAM) is
16K Virtual memory is divided into divided into 4 page frames each
16 pages each of size 1K of size 1K

Fig. 3.10: A possible way to divide up 16K address space and 4K


memory space

Out of these 16 pages, only 4 pages can accommodate in the main


memory at a time. The physical address must be specified with 12
bits (as 212= 4096 = 4K). At any instant of time 4096 words of
memory can be directly accessible but they need not correspond to
address 0 to 4095. For the execution of the program, the 14 bit
virtual address needs to be mapped into 12 bit physical address.

When the program refers to memory in fetching data or


instruction or to store data, it would first generate a 14 bit address
corresponding to a virtual address between 0 and 16383. This 14 bit
addresses are interpreted as follows (figure 3.11) :

0100 0 0 0 0 0 1 0 1 1 0

4 bits 10 bits address


Virtual page no. 4 within the selected page 22

i.e., 22nd word of page number 4 (as decimal equivalent of


0100 and 0000010110 is 4 and 22 respectively)

Fig.3.11

Computer Organization and Architecture


Here, 4 bits are shown as virtual page number and 12 bits as address
within the selected page. The decimal equivalent of 14 bit address
01000000010110 is 4118, which is interpreted as address 22 of page
4. Having discovered that virtual page number 4 is needed, the
operating system must find out where virtual page 4 is located. The
page 4 may reside in any of the four page frame in the main memory
or somewhere in the secondary memory. To find out where it is, the
operating system searches it in the page table which is in the main
memory. A page table is a table stored in main memory or in some
fast memory which has one entry for each of the virtual pages. The
page table contains the list of all the 16 pages of virtual memory and
the page frame number where the page is stored in the main memory.
A presence bit is also there to indicate whether the page is present
in the main memory or not. If the page is present in the main memory
then the presence bit will be 1 otherwise it will be 0. For example,
if the pages 2, 4, 5, 8 are present in the main memory, the the
content of memory page table will be as shown in the figure 3.12.

Let us assume that the virtual page 4 is in main memory. The


first 4 bits of a virtual address will specify the page number where
the word is stored. Similary, the first 2 bits of a physical address will
specify the page frame number of the memory where the word is
stored. The 4 bit page number is taken from the virtual address and
it is compared with the memory page table entry. If the presence bit
against this page number is 1, then the block number (2 bits) is
taken and is written in the place of page number in the address
(figure 3.12). Thus, a 14 bit virtual address is mapped into a 12 bit
physical address. The block number is searched in the main memory
and then the word located at that address is fetched.

When a reference is made to an address on a page not


present in main memory, it is called a page fault. After a page fault
has occured it is necessary for the operating system to read in the
required page from the secondary memory, enter its new physical
location in the page table and then repeat the instruction that cause
page fault.

26 Computer Organization and Architecture


14 bit Virtual address

0100 0 0 0 0 0 1 0 1 1 0

Page Table in Main memory


0000 0

0001 0

0 0 1 0Page 02 0 1

0011 0

0100 01 1

0101 10 1

0110 0

0111 0 01 0 0 0 0 0 1 0 1 1 0
1000 11 1 12 bit Physical address

1001 0

1010 0
00 Page frame 0
1011 0
01 Page frame 1
1100 0
10 Page frame 2
1110 0
11 Page frame 3
1111 0
4K Main memory
Presence bit

Page frame number


Page number

Fig.3.12:Contents of memory page table when pages 2, 4, 5 and 8


are present in the main memory and formulation of main
memory address from virtual address

CHECK YOUR PROGRESS

8. Fill in the blanks :


(i) A page replacement policy is not necessary in __________
mapped cache.
(ii) Paging is a method of achieving ___________.
(iii) Virtual address is also known as ____________ address.
(iv) In paging, memory space is broken up into equal size _____
and address space is broken up into equal size _______.
(v) Set of physical address is known as ___________.
(vi) Set of virtual address is known as _________.

Computer Organization and Architecture


(vii) ________ in virtual address space fits into ________ in
physical memory
(viii) Paging is the most common ______________ technique.

3.12 MAGNETIC DISKS

Magnetic disks are the widely used popular secondary storage


medium.The magnetic disks are used for storing large amounts of
data and programs. A magnetic disk is a circular plate which is
constructed of metal or plastic coated with a magnetizable material
on which electronic data are stored. Data can be stored on both
sides of the disk. Several disks can be stacked on top of the other
on a spindle. These disks are actually rotating platters with a
mechanical arm that moves a read/write head between the inner and
outer edges of the disks surface. A read/write head is available on
each of the disk surface. A magnetic disk works on the principle of
magnetic charge.

The disks rotates at very high speeds. During a read/ write operation,
only the disk rotates and the head is always stationary.

3.12.1 Data Organization in Magnetic Disk

Data on the magnetic disks is organized in a concentric set of


circles, called tracks. The bits of data are stored as magnetic
spots in these tracks. A gap exist between each track to prevent
errors due to interference of magnetic fields. The number of
bits stored in each track is equal. Therefore, the data density
is more in the inner tracks than the outer ones. The more the
number of tracks, the more is the storage capacity of the disk.

Tracks are again divided into sections called sectors. A small


gap also exists between two sectors so as to distinguish
between them. Each sector usually contains 512 bytes of data.

The set of corresponding tracks on all surfaces of a stack of


disks forms a logical cylinder. The disk platters rotates
together at a very high speed.

28 Computer Organization and Architecture


Sect
or

Tracks
Read/Write head

Fig. 3.13: Organization of data on Magnetic Disk

A write head is used to record the data bits as magnetic spots


on the tracks and these recorded bits are detected by a change
in the magnetic field produced by a recorded magnetic spot,
on the disk surface, as it passes through a read head. The
data on the disk surfaces are accessed by specifying the
surface number, track number and sector number.

Some magnetic disk uses a single read/ write head for each
disk surface while others uses separate read/ write heads for
each track on the disk surface. Accordingly, the read/write head
may be movable or fixed. If the magnetic disk uses a single
head for each disk surface then the read/write head must be
able to be positioned above any track in the surface. Therefore,
the head has to be a movable head. In such case, the head
is mounted on an arm and the arm can be extended or retracted
to position the head on any track.

In a fixed-head disk, there is one read/write head per track in


the surface. All the heads are mounted on a rigid arm that
extends across all tracks.

Computer Organization and Architecture


Spindle
Disk arm with
fixed head
Concentric
Tracks

(a)

Disk arm with


movable head

(b)

Fig. 3.14 (a) Fixed Read/Write Head, (b) Movable Read/Write


Head

The read and write operations starts at the sector boundaries.


The bits of data are recorded serially on each track. To read
or write data, the head must be first positioned to that particular
track.

The heads should be always be at very small distance from


the moving disk surfaces so that the high bit densities and
also due to this more reliable read/write operations can be
performed.

Now a days, Winchester technology is used where both the


disks and the read/write heads are placed in sealed enclosures.
This technology has two advantages. First, in such disk units,
the heads operates closer to the tracks as there are no dust
particles, as in disk units which are not sealed. As such data
can be more densely stored along the tracks and the tracks
can also be closer to one another. These Winchester disk
units has a larger capacity for storing data.

30 Computer Organization and Architecture


Secondly, in these disk units, the data integrity is more as they
are not exposed to contaminating elements.

The disk system consists of three key parts. First is the


stack of disk platters, usually referred to as the disk.

Second is the electromechanical mechanism that rotates the


disk and moves the read/write heads, which is called the disk
drive.

Third is the disk controller, which controls the disk system


operation. It also provides an interface between the disk drive
and the bus that connects it to the computer system.

The disks which are attached to the computer units and cannot
be removed by the occasional users are called the hard disk.
Those which can be inserted and removed from the system
easily by the users are called floppy disks.

3.12.2 Disk Access Time

To perform a read or a write operation, the read/write head is


first positioned on the desired track and sector. In fixed-head
systems the head over the desired track is selected
electronically. In a movable head system, the head is positioned
on that particular track. In such systems, the time that is taken
to move the head to the proper track is called the seek time.
It depends on the initial position of the head relative to the
track specified in the address.

In either case, after the read/write head is positioned over the


track, the system waits until the appropriate sector passes
under the read/write head. This delay in time is called the
rotational delay or latency time.

The sum of these two delays, that is the seek time and the
latency time is called the disk access time.

The storage capacity of a disk is a multiple of the number of

Computer Organization and Architecture


recording surfaces, number of tracks per surface, number of
sector per track, and the number of bytes per sector. That is,
Storage capacity of a disk system = Number of recording surfaces
x Number of tracks per surfaces
x Number of sector per track
x Number of bytes per sector

The following Fig. shows a typical disk pack. Always remember


that- the upper surface of the top plate, and the lower
surface of the bottom plate are not used for information
storing.

Read/Write Head
Access arm
Surfac assembly
e5

Surface 4

Surf ace
3

Surface 2

Surf ac
e1

Surface 0

Direction of movement of
access arm assembly

Fig. 3.15: Disk pack

32 Computer Organization and Architecture


CHECK YOUR PROGRESS

9. What are tracks, sectors and cylinders?


10. Fill in the blanks :
a. The density of data is _______ in the inner tracks and
_______ in the outer tracks.
b. The inter-track gap prevents________.
c. Data is recorded and accessed in magnetic disks with
the help of a ______ mechanism.
d. Read/write heads may be _________ or__________ .
e. Data is stored as __________ in the magnetic disks.
f. In case of Winchester disks, the disks and the heads
are ________.
g. The three vital parts of a disk system are ___, ____
and ________.
h. ______ is the time required to position the head to the
desired track.
i. The seek time and the rotational delay together is called
the _____ time.

3.13 RAID

The rate in the increase in the speeds of the processor and the
main memory is much more than that in the improvement of the
secondary storage devices. Of course there has been an increase
in the storage capacities of these devices.

However, it was been recognized that high performance could be


achieved at a reasonable cost by using multiple low-cost devices to
operate in parallel. This lead to the use of arrays of disks that operate
independently and in parallel.

In 1988, researchers at the University of California-Berkeley proposed


a multiple disk storage system, called RAID (Redundant Array of
Inexpensive Disks). There were six different configurations, which

Computer Organization and Architecture


were known as thr RAID levels - RAID 0, RAID 1, RAID 2, RAID 3,
RAID 4 and RAID 5. All of these six levels share three common
characteristics. They are -

1. RAID is a set of physical disk drives which operates as one


logical drive.

2. The data is distributed across the physical drives of an array.

3. In case of a disk failure, the data can be recovered as


identical data is stored on more than one disk in the set of
the disks.

In RAID 0, data stripping is used. This means a single file is stored


in several separate disks by breaking the file into a number of smaller
pieces. Whenever a file is read, all the disks delivers their stored
portion of the file in parallel. So the total transfer time of the file is
equal to the transfer time that would be required in case of a single
disk system divided by the number of disks used in the array.
The disk is divided into strips, which may be physical blocks or
some sectors.

In the RAID 1 scheme identical copies of the same data are stored
on two disks. Data stripping is also used here but the strip is mapped
to both the physical disks. The two disks are mirrors of each other.
If a disk failure occurs, then all the operations on its data can be
done on its mirror disk. The disadvantage of RAID 1 scheme is the
cost involved with it to improve the reliability.

RAID 2, RAID 3, RAID 4 and RAID 5 in all these schemes some


parity calculations are done so as to achieve reliability and recover
the errors. The data are not fully duplicated RAID 2 requires fewer
disks but is still costly. RAID 5 distributes the parity strips across all
disks.

34 Computer Organization and Architecture


RAID offers excellent performance and are generally used in high
performance computers or in systems where higher degree of data
reliability is required.

CHECK YOUR PROGRESS

11. Find true or false :


a. RAID combines two or more physical hard disks into a
single logical unit using special hardware or software.
b. The full form of RAID is Redundant Array of Inexpensive
Disks.
c. The levels of the RAID are hierarchy of one another.
d. All the disks in RAID behave as one logical disk drive.
e. In case of a disk failure, the data cannot be recovered in
RAID.
f. RAID1 level uses parity calculations for error-recovery.

12. What are the three key concepts in RAID?

3.14 OPTICAL MEMORY

In optical memory, the data is stored on an optical medium like CD-


ROM. The stored data can then be read with the help of a laser
beam. Large amounts of data can be stored in optical memory at a
very reasonable cost. The audio CD (Compact Disk) were the first
application of such technology.

In the mid 1980’s Sony and Philips companies developed the first
generation of CDs. The CDs are non-volatile and they could not be
erased.

Optical storage systems consist of a drive unit and a storage me-


dium in a rotating disk form. In general the disks are pre-formatted
using grooves and lands (tracks) to enable the positioning of an
optical pick-up and recording head to access the information on the

Computer Organization and Architecture


subsequently detected by a detector in the optical head. The disk
media and the pick-up head are rotated and positioned through drive
motors and servo systems controlling the position of the head with
respect to data tracks on the disk. Additional peripheral electronics
are used for control and data acquisition and encoding/decoding.
Such a system is illustrated in Fig. 3.16.

Fig. 3.16: Key components of an optical disk system

In the past few years a variety of optical disk systems have been
introduced:
CD (Compact Disk)
CD-ROM (Compact Disk Read Only Memory )
WORM (Write Once Read Many)
Erasable Optical Disk, etc.

36 Computer Organization and Architecture


3.14.1 CD-ROM

CD-ROM disk is a shiny, silver color metal disk usually of 51/


4-inch (12cm) diameter. It is made of polycarbonate plastic and
thin layer of pure aluminum is applied to make the surface
reflective. For some good quality disks, gold layer is used. A
thin layer of lacquer protects it. The surface of an optical disk
consists of pits and land. The information is read from pits and
lands, like 1s and 0s. It is changed into binary so computers
can read it. An optical reader reads the patterns of pits that
stands for bytes. One CD can hold 650MB of data or 300,000
pages of text. Most CDs are read only, which means you cannot
save data to the disk. This device is usually not used as a
primary storage device for data.

An optical disk is mounted on an optical disk drive for reading/


writing of information on it. An optical disk drive contains all the
mechanical, electrical and electronic components for holding
an optical disk and for reading/writing of information on it. That
is, it contains the tray on which the disk is kept, read/write
laser beams assembly, and the motor to rotate the disk. Access
time for optical disks are in the range of 100 to 300 milliseconds.

Advantages of CD-ROM are -

a) Storage capacity is much more in optical disks.


b) Multiple copies of the disk along with its contents can be
made inexpensively.
c) They are transportable from one computer to another very
easily.
Disadvantages are -

a) They are read-only and contents cannot be changed or


updated.

Computer Organization and Architecture


b) The access time in optical disks is more than in case of
magnetic disks.

3.14.2 DVD Disks

The success of CD technology and the continuing quest for


greater storage capability has led to the development of DVD.
DVD, also known as Digital Versatile Disk or Digital Video
Disk, is an optical disk storage media format, and was invented
and developed by Sony, and Philips in 1995. Its main uses
are video and data storage. DVDs are of the same dimensions
as compact disks (CDs), but store more than six times as
much data.

Variations of the term DVD often indicate the way data is stored
on the disks : DVD-ROM (read only memory) has data that
can only be read and not written; DVD-R
and DVD+R (recordable) can record data only once, and then
function as a DVD-ROM; DVD-RW (re-writable), DVD+RW,
and DVD-RAM (random access memory) can all record and
erase data multiple times. The wavelength used by standard
DVD lasers is 650 nm thus, the light has a red color.

A DVD disk consists of two substrates (0.6mm thick) bonded


together. Each side can contain two layers called ‘Layer 0’ and
‘Layer 1’ (the outermost layer). The physical format of a DVD
determines the capacity of the DVD disk. DVD capacity is
determined by pit size, track pit spacing and the number of
layers the disk contains. In the following some list of disks
(current) and their capacities are given :

38 Computer Organization and Architecture


Physical Format Capacity Layers Side(s)

DVD -5 4.7GB 1 1

DVD -9 8.54GB 2 1

DVD -10 9.4 GB 1 2

DVD -14 13.24GB 2 2

DVD -18 17.08GB 2 2

DVD –R 4.7GB 1 1

DVD –R 9.4GB 1 2

DVD –RW 4.7GB 1 1

DVD –RW 9.4GB 1 2

3.15 MAGNETIC TAPE

The magnetic tape is mostly used for off-line storage of large amount
of data. They are the cheapest and the slowest methods for data
storage.

The magnetic tape is a strip of plastic coated with a magnetic film.


The tape is very small and generally is of 0.5 or 0.25 inch wide. The
data recording on the magnetic tape is same as in the case of
magnetic disks. There are a number of parallel tracks on the tape.
Seven or nine bits corresponding to one character are recorded
simultaneously with a parity bit.

Earlier the tapes had nine tracks each but the newer tape systems
use 18 or 36 tracks, corresponding to a word or a double word. A
separate read/write head is mounted one in each track so that data
can be recorded and read in a sequential manner.
Data are organized in the form of records and these records are
separated by gaps referred to as inter-record gaps.

Computer Organization and Architecture


File

RECOR RECORD
D

File Record 7 or 9
Mark bit
Fig. 3.17: Data Organization on a Magnetic Tape

The data on a magnetic tape is recorded and accessed in a sequential


manner. Whenever the tape head reach a record gap, the tape motion
can be stopped. Each record has an identification pattern both at the
beginning and at the end. The starting bit pattern gives the record
number and when the tape head reach the bit pattern at the record
end, it comes to know that there is a gap after it.

A file is a collection of some related records. The starting of a file


is always marked by a file mark as shown in the figure above. The
gap after the file mark can be used as a header or identifier for the
file. There are gaps after each record to distinguish between them.
In addition to the read and write commands, there are a number of
other control commands executed by the tape drive, which includes
the following operations :

a. Rewind tape
b. Erase tape
c. Forward space one record
d. Backspace one record
e Forward space one file
f. Backspace one file

The end of the tape is marked by EOT (End of Tape). The records
in a tape may be of fixed or variable length.

40 Computer Organization and Architecture

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