3 s2.0 B9780128170083000061 Main
3 s2.0 B9780128170083000061 Main
Operational amplifiers
6.1 Introduction
Integrated circuit technology made possible the operational amplifier (op amp) on a chip,
which is a high-gain, multitransistor voltage amplifier, encapsulated in a small chip and
costing less than a dollar. The first popular chip was the 741, a 24-transistor op amp. It
came out in the late 1960s and continues to be popular to this day. Op amps were originally
used in analog computers where, by changing the external circuitry which is connected to
the op amp, they could be used as adders, integrators, and differentiators. Today these ver-
satile amplifiers find applications in all fields, including signal processing, filtering,
switching circuitry, instrumentation, and so forth. Their use is only limited by the ingenu-
ity of the designer.
An op amp is designed to handle two inputs at the same time. The output signal will be
an amplified version of the difference between the two inputs. That is, if υ+ and υ are the
two inputs, υout ¼ A(υ+ υ), where A is the voltage gain of the op amp. If we set one of the
inputs to zero (grounded), υout will then just be an amplified version of the nonzero input
signal, that is, υout ¼ Aυ+ or υout ¼ Aυ. The ability to amplify the difference between two
signals makes the op amp valuable in instrumentation, where unwanted interference sig-
nals common to both inputs are automatically canceled out.
Inverting input iF
– i1 RF
Ro P i≈0
–
ϑd + –
+ Ri –
A
Aϑd R1 ϑd ≈ 0
+ +
+
+ +
ϑ– + +
ϑo ϑi ϑo
ϑ–
Non inverting input
(a) (b)
iF
i1 RF
P
–
R1
ϑd +
–
+ Aϑd
+ +
ϑi
ϑo
(c)
FIG. 6.1 (a) The equivalent circuit (open-loop) of an op amp showing two input terminals, (b) The inverting amplifier
consists of an op amp and external circuitry (closed-loop). For simplicity, power supply connections to the op amp are
not shown, (c) The equivalent circuit of the inverting amplifier, using the ideal representation for the op amp.
where A is the open-loop (no feedback) gain of the op amp (typically 105 or larger). Note
that the polarity of υd is given by the + and signs of the input terminals. For most circuit
calculations the ideal representation of an op amp (shown within the dashed triangle in
Fig. 6.1c) can be used; that is, in Fig. 6.1a the input resistance Ri is replaced by an open
circuit (Ri ¼ ∞) and the output resistance Ro is replaced by a short circuit (Ro ¼ 0).
An op amp, even though almost ideal in the first three characteristics (A, Ri, and Ro), has
a gain that varies substantially as the frequency of the input signal changes, and further-
more its characteristics are not very stable with temperature changes. Therefore, typical
use of an op amp is in a closed-loop configuration in which negative feedback is applied
which “kills” much of the open-loop gain of the op amp, resulting in a lesser but very stable
gain. The loop is closed by using external resistors to feed back some of the output voltage
to the input. An example is provided in the following section.
output to input. The circuit equivalent of this popular amplifier is shown in Fig. 6.1c. Using
Kirchoff’s voltage law we can readily write for the input loop υi ¼ i1 R1 υd, and for the
output loop υo ¼ Aυd ¼ iF RF υd. Note that in the equivalent circuit we show a connec-
tion from the controlled voltage source Aυd to ground that is not present in Fig. 6.1b this
can be confusing. However, in Fig. 6.1b the op amp is represented simplistically by a tri-
angle symbol and such a connection would add little meaning. Besides, when analyzing a
circuit which has op amps, the equivalent circuit for each op amp should always be used.
The voltage gain Ar with feedback is obtained as follows: using the ideal representation
(Ri ¼ ∞, Ro ¼ 0) of the op amp shown in Fig. 6.1c, we conclude that since Ri, ¼ ∞,
i ¼ 0. Therefore all current through R1 passes through RF
i1 ¼ iF (6.2)
υo iF RF RF
Ar ¼ ¼ ¼ (6.3)
υi i1 R1 R1
This is a surprising result, as it says that the gain of the op amp with the external cir-
cuitry is equal to a ratio of the resistances of a feedback resistor and an input resistor. The
gain is thus determined by external resistors only and is independent of A as long as A is
high. Obviously, resistors are much less frequency and temperature sensitive than op
amps. Hence, we have obtained an amplifier whose gain is not as high as A of an op
amp alone, but it is very stable and has a constant value. The minus sign in Eq. (6.3) means
that there is a phase reversal in the output voltage.
Let us elaborate on the result obtained in Eq. (6.3). A consequence of the output voltage
fed back by resistor RF to the inverting terminal is to make that terminal (point P) a virtual
ground (suggested by the dashed ground symbol at P), which means that the voltage at
that terminal, υ, is zero. What makes this result so remarkable is that a real short circuit
between ground and point P does not exist as then a substantial current would flow to
ground. Point P is at ground potential but no current flows as i ¼ 0 for the op amp, and
hence the label virtual ground. Point P, for the inverting configuration, remains a virtual
ground for any variations in the input signal υi.
In addition to being a virtual ground, point P, for the inverting configuration, is also
referred to as summing point. To sum several signals, for example, we can connect several
resistors to point P as shown in Fig. 6.4a. The sum of the signal currents in the input resis-
tors equals the current in RF, since no current to ground exists at point P. Because the addi-
tion appears to take place at point P, it is called a summing point.
1
Note that the output voltage υo is limited by the power supply voltage, which is typically between 5 and
15 V. Hence, the input voltage υd would be on the order of microvolts, given that A > 105.
234 Electronics and communications for scientists and engineers
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Example 6.1
For the inverting amplifier of Fig. 6.1b, find the gain, input resistance, υd, υi, i, and iF. Assume
A ¼ 5 105, Ri ¼ 106 Ω, Ro ¼ 0, RF ¼ 100 kΩ, R1 ¼ 1 kΩ, and the power supply voltage is 5 V. In
order to obtain a better understanding, derive the op amp gain, Eq. (6.3), without initially set-
ting υd ¼ 0.
Since the amplifier input impedance Ri is large, the current i flowing into the op amp is neg-
ligible. Therefore, as in Eq. (6.2), current in R1 equals the current in RF, i.e.,
υi + υd υd υo
¼
R1 RF
Using Eq. (6.1), υd ¼ υo/A in the above expression, we obtain
1 RF RF
υo 1 + + ¼ υi
A AR1 R1
Given that the op amp gain is very large, we can take the limit as A ! ∞ and obtain
RF
υo ¼ υi
R1
which is the desired result of Eq. (6.3).
The gain of the op amp with external circuitry depends only on the external resistors that are
connected to the op amp. Hence, from Eq. (6.3), Ar ¼ RF/R1 ¼ 100/1 ¼ 100. The minus
sign in the gain expression implies that the amplified output signal is 180° out of phase with
the input signal.
The input resistance (it is the resistance that a source would see when connected to the υi
input terminals) is simply R ¼ υi/i1 ¼ R1 ¼ 1 kΩ. This is a rather low input impedance (in prac-
tice the term impedance is used when addressing any kind of input resistance), not suitable
when a high-impedance source is to be connected to the input terminals, as then only a small
portion of the source voltage would be driving the amplifier. In addition, a feeble source might
not be able to provide the large currents which a low input impedance requires. Ideally, a high-
impedance voltage source should work into an infinite-impedance voltage amplifier.
The maximum magnitude of the output voltage υo is limited by the supply or battery voltage
(it usually is less by about 2 V). Any figure displaying a load line such as Fig. 4.13b or Fig. 4.17c
shows that υo,max υpowersupply. Assuming υo ¼ 5 V, we obtain for the differential voltage
υd ¼ 5 V/ A ¼ 5/5 105 ¼ 10 μV, which is a very small voltage and is usually neglected.
From Eq. (6.3), we have that υi ¼ ( R1/RF) υo ¼ (1/100)(5) ¼ 50 mV. The current i flowing
into the op amp input is given by i ¼ υd/Ri ¼ 10 μV/1 MΩ ¼ 0.00001 μA ¼ 10 pA. This current is
so small, that the approximation by zero is valid.
The feedback current iF ¼ i1. Hence, iF ¼ υo/RF ¼ 5 V/100 kΩ ¼ 50 μA.
In summary we state two basic rules for the analysis of op amp circuits. Rule 1 is assume the
two input terminals are at the same voltage, i.e., the differential voltage υd ¼ 0 (or equivalently
υ+ ¼ υ). Rule 2 is assume no current flows into either input terminal (i ¼ 0). Practically any new
op amp configuration with feedback can be analyzed this way.
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Chapter 6 • Operational amplifiers 235
where υd ¼ i Ri. Solving for i in Eq. (6.5), we have for the input impedance
υi υi Ri Ri
R0i ¼ ¼ ¼ ¼∞
i ðυi i1 R1 Þ=Ri 1 i1 R1 =υi 1 1
i=0 i
+ +
υd A ϑd A
– –
RF
i = 0 i1
+ + + +
ϑi ϑo ϑi ϑo
+
ϑ1 i1 R1
(a) (b)
FIG. 6.2 (a) The noninverting op amp configuration, (b) A voltage follower for which υo ¼ υi.
236 Electronics and communications for scientists and engineers
where, using Eq. (6.5), we have approximated i1 R1 υi. A more careful analysis would
show that the input impedance of the noninverting amplifier is R0 i ≫ Ri, and since Ri, is
on the order of several megaohms for op amps, the approximation of R0 i by infinity is very
useful. The noninverting amplifier is thus ideally suited to amplify signals from feeble
(high-impedance) sources.2
υo RF
Ar ¼ ¼1+ ¼1 (6.6)
υi R1
which means that the output voltage follows the input voltage. The input impedance R0 i of
the voltage follower is found by applying Kirchoff’s voltage law to the circuit of Fig. 6.2b. This
results in υi ¼ υd + υo ¼ i Ri + A υd ¼ i Ri(1 + A) i Ri A, where we have used that υd ¼ i Ri
and υo ¼ A υd. As the input impedance is the ratio of input voltage and input current, we
obtain
υi
R0i ¼ ¼ ARi (6.7)
i
2
Furthermore, the output impedance of a noninverting amplifier is much less than Ro, and Ro for most op
amps is about 100 Ω.
3
Of course, a noninverting amplifier provides buffering and amplification. However, there are many instances
when only buffering is required.
Chapter 6 • Operational amplifiers 237
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Example 6.2
A pickup device has an internal impedance of Rs ¼ 10 kΩ and produces a voltage of υs ¼ 2 V. If it
is to drive a chart recorder which can be represented by a load impedance of 500 Ω, find the
voltage and power available to the chart recorder. Repeat when a unity gain buffer is introduced
between source and load.
The load voltage is υL υo ¼ υs0.5/(10 + 0.5) ¼ 0.095 V and power delivered to the load is
PL ¼ υ2L/RL ¼ (0.095)2/500 ¼ 18.14 μW.
Placing a buffer between source and load, as shown in Fig. 6.3a, and approximating the
buffer by an ideal one (Ri ¼ ∞, Ro ¼ 0), which means that the buffer voltage equals the source
voltage (no input current flows because Ri ¼ ∞) and the load voltage equals the buffer
voltage (because Ro ¼ 0), the load voltage is then υL ¼ 2 V and the power delivered is
+
Rs – Rs
+ ϑ +ϑ
+ RL s o RL
ϑo
ϑs ϑs
(a) (b)
FIG. 6.3 (a) A voltage follower is used as a buffer between a weak source and a load, isolating the source from
excessive current demands, (b) The buffer is shown as an ideal buffer which draws no current from the source and has
zero internal voltage drop.
R3
ϑ3
i3
R2 RF
ϑ2
i2 iF
R1
ϑ1 P
– ϑo
i1 A
+
(a)
ϑ3 ϑ2 ϑ1 ϑo
RF 0 0 0 0
ϑ2 0 0 5 1
R1 R 0 5 0 2
0 5 5 3
5 0 0 4
ϑ1 R1 A ϑo 5 0 5 5
R A 5 5 0 6
5 5 5 7
(b) (c)
FIG. 6.4 (a) A summing amplifier, (b) A subtracting amplifier, (c) A table giving 3-bit binary numbers (logic 0 and 1 are
represented by voltages 0 V and 5 V, respectively) and their decimal equivalents.
which equals
RF
υo ¼ ðυ1 + υ2 + υ3 Þ (6.10)
R1
when R1 ¼ R2 ¼ R3. We refer to this as an inverting adder. A noninverting adder, that is, one
giving Eq. (6.10) but without the minus sign, can be designed by connecting an inverter to
output υo. An inverter is an inverting amplifier like that of Fig. 6.1b with RF ¼ R1, resulting
in υo ¼ υi.
A subtracter is shown in Fig. 6.4b. Input υ1 passes through an inverter, which has a gain
of 1 (that is, the output signal is phase-shifted by 180° with respect to the input signal).
The resulting output voltage is thus the difference of the two input voltages, or
RF
υo ¼ ðυ2 υ1 Þ (6.11)
R1
By choosing RF ¼ R1, we would obtain a simple subtracter for which υo ¼ υ1 υ2.
A digital-to-analog converter (DAC) translates a binary number to an analog signal. For
example, the table in Fig. 6.4c gives the 3-bit binary numbers 000–111 and their equivalent
decimal numbers 0–7. The digital input signals are υ1 υ3 and the decimal-equivalent
voltage is υo. The binary digits 0 and 1 are represented by the input voltages 0 V and
5 V, respectively.
We can select the inverting summer, Fig. 6.4a, to perform the conversion. The output
voltage for such a summer, using Eq. (6.9), is
υ1 υ2 υ3
υo ¼ RF + + (6.12)
R1 R2 R3
Chapter 6 • Operational amplifiers 239
If we choose (by trial and error) RF ¼ 8 kΩ, R3 ¼ 10 kΩ, R2 ¼ 20 kΩ, and R1 ¼ 40 kΩ, a
binary input signal 001 (υ3 ¼ 0, υ2 ¼ 0, υ1 ¼ 5 V) applied to the summer would give us
the following output voltage: using Eq. (6.12) we obtain υo ¼ 8(5/40 + 0 + 0) ¼ l.4 Sim-
ilarly, for input 111 (υ3 ¼ 5, υ2 ¼ 5, υ1 ¼ 5), we would obtain υo ¼ 8(5/40 + 5/20
+ 5/10) ¼ 7. Hence, the inverting summer performs a digital to analog conversion. By
adding more inputs υ4, υ5, …, to the summer, we can handle larger binary numbers.
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Example 6.3
A noninverting summer is shown in Fig. 6.5. Analyze the circuit and show that it performs the
mathematical summing operation. As the current into the noninverting terminal of the op amp
is vanishingly small, the node at υp acts as a current summing point for currents flowing in the
two R resistors. Therefore,
R
ϑ2
ϑP
R + + ϑo
ϑd A
ϑ1 –
RF
+ R1
ϑ′1
υ2 υp υ1 υp
+ ¼0 (6.13)
R R
which results in
υ2 + υ1 ¼ 2υp (6.14)
At the output terminal we have that the current through RF and R1 is the same, that is,
(υo υ0 1/RF ¼ υ0 1/R1, because current into the inverting terminal of the op amp is vanishingly
small. Noting that voltage υ0 1 ¼ υp, because υd 0, we have
υo υp υp
¼ (6.15)
RF R1
Substituting into this equation υp from Eq. (6.14) gives us the desired result
R1 + RF
υo ¼ ðυ1 + υ2 Þ (6.16)
2R1
which is that the circuit of Fig. 6.5 performs the mathematical summing operation. A note of
caution though: since the node at υp is not at zero volts, there can be interference (cross talk)
4
For simplicity, we are ignoring the minus sign on υo. This can be rectified by adding an inverter to the summer,
or by using a noninverting summing amplifier.
240 Electronics and communications for scientists and engineers
between the input signals. In that sense, the inverting summer is superior and hence more use-
ful since point P is a virtual ground in the inverting amplifier.
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R RF
+ i1 i1
ϑ1
ϑ– –
A
ϑ+ + +
ϑ2 ϑo
+ i2 i2
R RF
FIG. 6.6 A differential amplifier, showing the external feedback circuitry.
Chapter 6 • Operational amplifiers 241
Hence, the output voltage is proportional to the difference of the input signals ampli-
fied by the closed-loop gain RF/R. The gain is stable as it is independent of any op amp
parameters such as A, which can vary significantly with temperature, frequency, etc.,
and furthermore, A is specified by the manufacturer. On the other hand, the gain RF/R
depends only on the values of two resistors, and is therefore stable and can easily be chan-
ged by the circuit designer.
Adm
CMRR ¼ (6.20)
Acm
where Adm is the differential-mode gain and from Eq. (6.19) is equal to RF/R. Thus, CMRR
for a practical op amp is a measure of quality—the larger the number, the better, as CMRR
for an ideal op amp is infinite.6 Because CMRR is normally a large number, we express it in
decibels as CMRR(dB) ¼ 20 logCMRR (typical values are 50–100 dB).
5
Equivalently, we could short the inputs together and apply a voltage υcm to the shorted input. This would
guarantee that the difference voltage υ2 υ1 equals zero at the input.
6
It should be noted in passing that CMRR for an op amp alone, Fig. 6.1a, is the same as that for the op amp
circuit with feedback, Fig. 6.6. The CMRR for the 741 op amp is given in the manufacturers spec sheet as 90 dB
and thus is also the CMRR of the differential amplifier of Fig. 6.6.
242 Electronics and communications for scientists and engineers
Since for a practical amplifier, the output voltage Eq. (6.19) has an additional compo-
nent due to the common input voltage υcm, we can write the total voltage by linear super-
position as
υ1 + υ2
υo ¼ ðυ2 υ1 ÞAdm + Acm
2 (6.21)
1 ðυ1 + υ2 Þ=2
¼ ðυ2 υ1 ÞAdm 1 +
CMRR υ2 υ1
where the voltage gain7 for the difference-mode signal is Adm and that for the common-
mode signal is Acm. The desired output is (υ2 υ1) Adm but the presence of a common-
mode input adds an error term, which is small if CMRR is large or if the common-mode
input υcm is small. Ideally, the two input signals should be of equal strength and 180° out of
phase. Then, the common-mode signal would be zero, the differential-mode signal a max-
imum, and the output voltage a linear magnification of the input signal, given by the first
term of Eq. (6.21), or by Eq. (6.19). Unfortunately, in most practical situations, it is just the
opposite. Typically in practice, a signal of only a few millivolts rides on a common-mode
signal of several volts as shown in the following example.
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Example 6.4
Find the output voltage υo for a differential amplifier (Fig. 6.6) if the input voltages are υ1 ¼ 9 V
and υ2 ¼ 9.02 V. Use R ¼ 1 kΩ, RF ¼ 120 kΩ, and a 741 op amp for which specifications are given
as a CMRR of 90 dB and an open-loop gain of A ¼ 2 105.
Before proceeding with the solution, we should note that only a small 20 mV signal is riding
on a large common-mode voltage of 9 V. The closed-loop gain is obtained from Eq. (6.19) as
Adm ¼ RF/R ¼ 120. Expressing the 90 dB common-mode rejection ratio as a numerical value
gives CMRR ¼ 1090/20 ¼ 31,623. To obtain the common-mode gain, we use Eq. (6.20), which
gives Acm ¼ Adm/CMRR ¼ 120/31,623 ¼ 0.00379. The output voltage can now be given, using
Eq. (6.21), as
υ1 + υ2
υo ¼ ðυ2 υ1 ÞAdm + Acm
2
9 + 9:02
¼ ð9:02 9Þ120 + 0:00379
2
¼ 2:4 + 0:034 ¼ 2:434V
The deviation from the expected value of 2.4 V caused by the common-mode signal is small
in this case, only 0.034 V or 1.4%. This is due to the high CMRR value of the fine 741 op amp. A
lesser value than 90 dB for CMRR would have substantially increased the percentage deviation.
In some situations, the closed-loop common-mode gain Acm for a differential amplifier is
not known, but the open-loop (no feedback) gain A for the op amp and its CMRR is specified
7
For example, Adm can be measured by setting υ1 ¼ υ2 ¼ 0.5 V, which results in (υ2 υ1) ¼ 1 V and
υcm ¼ (υ1 + υ2)/2 ¼ 0. The measured output voltage would then be υo ¼ Adm, which is the gain for the difference
signal. Likewise, setting υ1 ¼ υi ¼ 1 V results in (υ2 υ1) ¼ 0 and υcm ¼ 1 V; consequently υo ¼ Acm and the output
voltage gives the gain for the common-mode signal.
Chapter 6 • Operational amplifiers 243
by the manufacturer. In these situations it is important to know that the CMRR for an op amp
alone and an op amp with feedback is the same, as can be seen from an examination of
Eq. (6.21). Therefore, CMRR ¼ Adm/Acm ¼ A/Acm,openloop. This should allow calculation of
Acm as Adm can be obtained directly from the relationship Adm ¼ RF/R.
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8
To be strictly correct, Rin should be replaced by Rin k Zs, since Rin is in parallel with Zs in Fig. 6.7a. Also, for
brevity, the phasor expression for the interfering signal is given. However, since a signal must be a real number, we
can obtain its magnitude by multiplying the phasor expression by its complex conjugate and taking the square
root as outlined in Chapter 2 (see Eq. 2.5 or Eq. 2.11).
9
If the magnetic field is sinusoidal with angular frequency ω, then the magnitude of υind ¼ AωB. The induced
voltage is thus proportional to the area looped by the wires, the frequency, and the strength of the magnetic field.
244 Electronics and communications for scientists and engineers
C
ϑnoise magn. field B
+ ϑ Zs Rin + ϑ Zs Rin
– s – s
(a) (b)
FIG. 6.7 (a) Small, stray capacitances exist between noise source and amplifier that couple an interfering field to the
input, (b) Time-varying magnetic fields due to noise sources (mainly power lines) induce a voltage in wires that close
around the magnetic field.
the magnetic pickup sufficiently, the wires should be twisted, which further reduces the loop
area and causes cancelation of induced voltage in successive twists.
In the above two paragraphs, we considered sources of interfering signals and
advanced some procedures to minimize the pickup of such signals on leads that connect
a transducer, probe, or any other signal source to the amplifier. If after all these proce-
dures, we still experience a strong noise at the source, a further decrease of such noise
may be accomplished by a differential amplifier (see the following example).
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Example 6.5
With an electrocardiogram (EKG) amplifier, skin contacts are used to measure brain activity
and heart activity. These high-impedance sources produce faint signals, sometimes in the
microvolt range. It is not unusual to find that even after twisting and shielding the input leads,
a large 60 Hz voltage in addition to the desired, small signal still exists. Fig. 6.8a shows pickup
wires, which at one end are connected by skin contacts (electrodes) to the chest of a patient,
and at the other end to an EKG amplifier (an EKG amplifier is just a differential amplifier as
shown in Fig. 6.6). Since the leads are of equal length and otherwise symmetric, the noise
ϑ2
ϑ1 or ϑ2 ϑ1
+ + AC signal
ϑ2 ϑ1
DC level
0
t ϑcm
EKG signal
ϑ2 – ϑ1
Skin contact
electrodes t
(a) (b)
FIG. 6.8 (a) Leads for EGK signal pickup. The ground is usually a contact point at the lower extremities of a patient,
such as the right leg. (b) Signals υ1 and υ2 generated by the electrodes make up the difference signal. The common-
mode signal is primarily the interfering AC voltage and the interfering DC level.
Chapter 6 • Operational amplifiers 245
pickup, which here is shown as a DC level and an AC voltage, is the same for both leads. Each
lead also picks up the desired EKG signal, which is shown as riding on the noise signal. The EKG
signal has a complicated, almost periodic waveform (it contains frequencies in the range from
0.05 to 100 Hz). For simplicity, let us model the EKG signal by a single spectral component, say,
sin 500t. The total signals, picked up by leads 1 and 2, could then have the form
which states that the output voltage is the integral of the input voltage. Note that for the op
amp integrator, there is no restriction on the input signal as there was for the low-pass
filter integrator. Only the magnitudes of the output signal of the op amp integrator cannot
exceed the power supply voltage for the op amp.
+ +
C
+ P i≈0 + P R
– –
R1 ϑd ≈ 0 A C1 A
+ + + + + +
ϑ1 ϑo ϑ1 ϑo
(a) (b)
FIG. 6.9 (a) An op amp integrator, (b) An op amp differentiator.
10
Inductors are avoided in integrated circuits as they are bulky, heavy, and expensive in comparison to
capacitors.
Chapter 6 • Operational amplifiers 247
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Example 6.6
In situations where several voltages have to be added and their sum integrated we would ordi-
narily use a summing amplifier followed by an integrating amplifier. Show that in such situa-
tions both operations can be performed by a single op amp. The circuit that can combine both
operations in one is shown in Fig. 6.10. Current i is the sum of three currents flowing through
resistors R1, R2, and R3, that is, i ¼ i1 + i2 + i3. Since point P is a summing point, current i con-
tinues as current through the capacitor, or ic. Point P is also a virtual ground which gives for the
output voltage
R3 C
ϑ3
i3 iC
R2 i
ϑ2 P
–
i2 ϑo
+
R1
ϑ1
i1
FIG. 6.10 A summer-integrator which adds voltages υ1, υ2, υ3 and integrates the sum.
ð ð ð
1 1 1 υ1 υ2 υ3
υo ¼ iC dt ¼ i dt ¼ + + dt
C ð C C R1 R2 R3
(6.22a)
1 R1 R1
¼ υ1 + υ2 + υ3 dt
R1 C R2 R3
which is the desired result. For R1 ¼ R2 ¼ R3 we have a simple addition of the voltages in the
integrand. For different resistances we have a weighted addition and the output is the integral
of a weighted sum.
A differentiator is obtained by interchanging the capacitor with the input resistor, as shown
in Fig. 6.9b. Again equating the currents that flow through the resistor and capacitor, we obtain
dυ1 υo
C ¼
dt R
Solving for the output voltage, we obtain the desired result
dυ1
υo ¼ RC 1 (6.23)
dt
which states that output voltage is proportional to the derivative of the input voltage. The op
amp differentiator is not as stable as the integrator.11 It is seldom used in practice because it has
problems with noise and instabilities at high frequencies. The tendency to oscillate with some
signals can be decreased by placing a low-value resistor in series with C1, and by using the fast-
est op amp.
11
The differentiator (unlike the integrator which smoothes noise) magnifies noise spikes, because of the large
slopes that are present in noise voltage systems.
248 Electronics and communications for scientists and engineers
iC
P
–
R A
+ +
ϑi +
ϑo
kT υi
υo ¼ ln (6.25)
e αIo R
which shows that the output voltage is the logarithm of the input voltage.
If we were to place a diode or transistor in the input loop and a resistor R in the feedback loop,
we would obtain an exponential or antilog amplifier. Now that we have a log and an antilog ampli-
fier we can construct a multiplier, that is, a circuit that can multiply two signals. If we sum the
output of two logarithmic amplifiers and then pass the output of the combination through an
antilog amplifier, the resulting signal will be proportional to the product of the two input signals.
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CF
gain Ar
RF
RF = 100
100 R1
–
A 70.7
+ R1 +
+ 50
ϑi ϑo
0
ω (log)
0.1 ωo ωo 10 ωo
(a) (b)
FIG. 6.12 (a) An op amp low-pass filter, (b) Frequency response of a low-pass filter which has a gain of 100 in the
pass-band.
An active, low-pass filter is shown in Fig. 6.12a. The filter elements are placed directly in
the feedback loop of an inverting amplifier. We can express the closed-loop gain as a func-
tion of frequency by simply replacing in Eq. (6.3) the resistances by impedances, that is,
RF
ZF 1 + jωCF RF
Ar ¼ ¼ (6.26)
Z1 R1
where ZF is the parallel combination of RF and CF, and Z1 ¼ R1. Normally we are interested
in plotting the frequency response of the filter, which is obtained by taking the absolute
value of Eq. (6.26),
RF 1
j Ar j ¼ qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi (6.27)
R1
1 + ðωCF RF Þ2
where the cutoff, corner, or half-power frequency is ωo ¼ 1 /RFCF. Note that ωo is the same
as that for the previously considered, low-pass filters of Eqs. (2.14) and (5.22). The above
expression consists of two terms: one is simply the gain of the inverting amplifier RF/R1,
and the other is a low-pass filter function, the same as that for a passive filter as previously
considered in Fig. 2.6. The advantages of an active filter are the ease with which the gain
and the bandwidth can be varied by controlling RF/R and the corner frequency ωo ¼ 1 /
RFCF. The frequency response of such a device for which the DC and low-frequency gain
is RF/R ¼ 100 and for which the low-pass bandwidth is determined by the half-power
frequency 1 /RFCF is plotted in Fig. 6.12b.
n n n
Example 6.7
Design a low-pass filter of the type shown in Fig. 6.12a with a closed-loop gain of 100 and a half-
power frequency of 500 Hz. The input impedance of the device is to be 1 kΩ.
As the negative input terminal of an inverting amplifier is a virtual ground, the input
impedance Zi ¼ R1 ¼ 1 kΩ. The low-frequency gain, which is given by Ar ¼ RF/R1, is specified
to be 100. Therefore, RF ¼ ArR1 ¼ 100 1 kΩ ¼ 100 kΩ. The remaining circuit
element which must be determined is the capacitance. Since the cutoff (half-power,
corner) frequency is specified and is given by fo ¼ ωo/2π ¼ 1/2πRFCF, we can solve for
250 Electronics and communications for scientists and engineers
RF gain Ar
– RF/R1
R1 C1 A
+ +
ϑi +
ϑo
0 ω (log)
0.1 ωo ωo 10 ωo
(a) (b)
FIG. 6.13 (a) An op amp high-pass filter, (b) Frequency response of a high-pass filter.
CF ¼ 1/2πfoRF ¼ l/2π 500 100 ¼ 3.2 μF. The gain-frequency plot is given by Fig. 6.12b with
angular half-power frequency ωo ¼ 2πfo ¼ 6.28 500 ¼ 3.14 krad/s.
An active high-pass filter is shown in Fig. 6.13a. The real gain is given again by Eq. (6.3) as
ZF RF
Ar ¼ ¼ (6.28)
Z1 R1 + 1=jωC1
the absolute value of which is
RF =R1
jAr j ¼ qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi (6.29)
1 + ð1=ωR1 C1 Þ2
This expression is plotted in Fig. 6.13b and shows the typical frequency response of a high-
pass filter with a half-power frequency ωo ¼ 1/R1C1 and a high-frequency gain of RF/R1.
Combining the responses of a low-pass and high-pass filter, we can construct a band-pass
filter. An active band-pass filter is an op amp with a parallel combination of RF and CF in the
feedback loop (same as in Fig. 6.12a) and a series combination of R1 and C1 in the input loop
(same as in Fig. 6.13a). If we choose the cutoff frequency 1/RFCF of the low-pass filter to be
larger than the cutoff frequency 1/R1C1 of the high-pass filter, only a band of frequencies equal
to the difference of cutoff frequencies will be passed.
n n n
12
Typically an op amp needs two power supplies, a positive voltage supply VBB and a negative voltage supply
VBB. If the op amp is to be operated from batteries, this can be a disadvantage as two separate batteries are
needed as shown in Fig. 6.14a.
Chapter 6 • Operational amplifiers 251
ϑo
Ideal op amp
– 10V
VBB
+ Practical op amp
ϑd + A ϑo
– ϑ? (volts)
+ ϑ + – 0 4.999 5 5.001
– ? Vref + VBB RL
–10V VBB = 10V
(a) (b)
FIG. 6.14 (a) A comparator is an op amp in the open-loop mode with υo ¼ Aυd ¼ A(υ? Vref). Two power supplies are
needed, which allows the output voltage υ0 to swing between + VBB and VBB. (b) The unknown input voltage–
output voltage characteristics for a reference voltage of 5 V.
noninverting input, the output of the op amp is zero only when the two signals are equal.
When they are not equal, the output υo is either saturated at the supply voltage of +10 V
when the unknown signal υ? is υ? > Vref, or υo ¼ 10 V when υ? < Vref. Fig. 6.14b shows the
transfer (input–output voltage) characteristics of an op amp when the reference signal is a
5 V battery and the supply voltage is 10 V. It shows that even a fraction of a millivolt in the
unknown signal above or below the 5 V reference signal will give a large indication of +10 V
or 10 V in the output.
When the reference voltage is chosen as Vref ¼ 0 (equivalent to grounding the inverting
input), we have a zero-crossing comparator. A very small input voltage (fraction of a mil-
livolt) will swing the output to 10 V and similarly a small negative voltage will swing the
output to 10 V. It is interesting to observe that the output of such a device is a square
wave for practically any periodic input signal. For example, a sinusoidal input, starting
at 0 V and increasing, will immediately saturate the output at 10 V. The output will stay
saturated at 10 V until the input sinusoid goes negative, at which time the output saturates
at 10 V and stays saturated until the sinusoid goes again positive. This repeats, generat-
ing a square-wave output voltage.
Vref
R
– ϑ3
+ ϑ3 ϑ2 ϑ1 2-bit No.
R 0 0 0 0 0
– ϑ2 0 0 5 0 1
ϑS + 0 5 5 1 0
R 5 5 5 1 1
– ϑ1 (b)
+
(a)
FIG. 6.15 (a) A stack of three comparators can convert a continuous range of values of υs to one of four values.
(b) A table showing the coding of the outputs of υ1 υ3 and a 2-bit number.
and 5 V (computers use 5 V power supplies, i.e., VBB ¼ 5 V). These four values can be inter-
preted by a code converter or decoder (not shown in Fig. 6.15a) as 00, 01, 10, and 11. For an
8-bit digital output, we would need a stack of 255 (28–1) comparators.
ym
m
k D
yr
yr (t) ¼ Y sin ωt which applies an up and down force to the spring k and shock absorber D.
Summing forces on mass m
fm + fD + fk ¼ 0
d 2 ym dy m dy r (6.30)
m +D + k ðym yr Þ ¼ 0
dt 2 dt dt
where the vertical motion of the mass is given by fm ¼ ma ¼ md2ym/dt2, the force on the
mass transmitted by the shock absorber is modeled by a dashpot fD ¼ Ddy/dt (D is a veloc-
ity damping constant), and the force on the mass transmitted by the spring is fk ¼ ky,
where k is a linear spring constant. Let us move all terms which represent forces exerted
by the road on mass m to the right side of the equation
d 2 ym dy m dy
m 2
+D + ky m ¼ D r + ky r (6.31)
dt dt dt
By modeling the road by yr(t) ¼ Y sin ωt, where Y is the height of the ripples in the road
(road roughness), we can finally express the equation which determines the vertical
motion of a car traveling along a rippled road, that is,
d 2 ym dy m
m 2
+D + ky m ¼ DωY cos ωt + kY sinωt (6.32)
dt dt
A solution for ym could be used to design an optimum suspension system which would
give the smoothest ride over a rippled or a washboard road.
Analog computers were widely used to solve differential equations throughout the
1960s until the digital computer largely replaced their use. However, for specialized appli-
cations such as suspension design or vibrational analysis, analog computers accurately
mimic physical systems, can be easily changed for different parameters, and quickly give
answers that are readily displayed on an oscilloscope. In this example, the vertical dis-
placement ym in the suspension system will be represented by a voltage in the electrical
analog computer.
The first step is to solve for the highest-order derivative of the above differential equa-
tion, or
d 2 ym D dy m k DωY kY
2
¼ ym + cos ωt + sinωt (6.33)
dt m dt m m m
which is now in appropriate form for solution by double integration. We observe that the
sum of the four terms on the right represents d2ym/dt2. The next step is to arrange an inte-
grating amplifier which is preceded by a summing amplifier with four inputs to add the
right-side terms, as shown in Fig. 6.17. In Example 6.6 it was shown that the summing and
integrating operation can be combined such that only one op amp is needed (op amp 1 in
Fig. 6.17). The output of the first integrator13 is dym/dt, which must be multiplied by D/m
13
In order to give the indicated integrator outputs, the RC constants must be chosen as unity according to the
integrator Equation (6.22).
254 Electronics and communications for scientists and engineers
kY sinωt R
m 4
DωY R
cosωt –dym
m 3
C dt
R C
2 ym
R –
(1) –
+ R (4) output ym
1 +
D
R
m Assume RC=1
R –
– (2)
(3) +
+ k
dym D dym
–D m dt m
m dt
–
(5)
k y +
–
m m
FIG. 6.17 Analog computer solution to Eq. (6.30), which describes a suspension system for an automobile.
(op amp 2) before it can be routed to the summer (after multiplication we need to change
sign by 1, which op amp 3 does). Another integration by op amp 4 gives us ym, which after
multiplying by k/m is routed as the second input to the summer. The remaining two
terms in Eq. (6.33) are road condition inputs to the summer as the third input (DωY/m
cos ωt) and the fourth input (kY/m sin ωt). These are external inputs and can be changed
as necessary to simulate a variety of roads. The solution to the problem is ym; it is the
desired output which can be directed to a display device such as an oscilloscope. In an
analog computer such as this, the various parameters relating to the suspension system
can be varied and the new performance of the suspension readily evaluated.
n n n
Example 6.8
Design an efficient analog computer program for the solution of the familiar mass–spring–
damper problem in mechanics as shown in Fig. 6.18a. The vibrating mass mo is acted upon
by an external, sinusoidal force f ¼ F sin ωt N (newtons). The solution is obtained when the dis-
placement and velocity of mass mo are known. Assume mo ¼ 500 kg, the damping coefficient
D ¼ 2.5 104 N s/m, and the spring constant k ¼ 106 N/m. Specify all resistor and capacitor
values in the op amp circuitry of the analog computer.
The equation describing the motion of the vibrating mass mo is the same as that for the auto-
mobile suspension given by Eq. (6.31) except for the right side of Eq. (6.31), which is the external
driving force and which in this example is given by f. Therefore, summing forces on mass mo, we
obtain in this case
d2 y dy
mo 2
+D + ky ¼ F sin ωt (6.34)
dt dt
Chapter 6 • Operational amplifiers 255
f
y
mo
k D
(a)
1 μF dy
ϑ3
dt 1 μF
R3 = 20kΩ 1 MΩ
–y
ϑ2 1 MΩ
– 1 MΩ
R2 = 500Ω –
+ –
f + y
mo ϑ1 +
R = 1 MΩ
(b)
FIG. 6.18 (a) Vibrating mass supported by spring k and damper D and acted upon by an external force f. (b) Analog
computer simulation of vibrating mass. The external force input is f.
d2 y dy F
2
¼ 50 2000y sin ωt
dt dt mo
where D/mo ¼ 50 and k/mo ¼ 2000. Integrating once gives
ð
dy F dy
¼ sin ωt + 2000y + 50 dt (6.35)
dt 500 dt
In order to find the resistance values in the summer-integrator op amp, let us refer to
Fig. 6.10 and compare Eqs. (6.35)–(6.22a). If we identify R1C with unity (R1 ¼ 106 Ω ¼ 1 MΩ,
C ¼ 106 F ¼ 1 μF) and identify υ1 with F sin ωt/500, υ2 with y, and υ3 with dy/dt, then
R1/R2 ¼ 2000 and R1/R3 ¼ 50. The values of the remaining resistors are therefore R2 ¼ 500 Ω
and R3 ¼ 20 kΩ. A circuit diagram for the analog computer simulation is given in Fig. 6.18b. Note
that this is a more efficient implementation than that outlined in Fig. 6.17, where for pedagogical14
reasons we have shown the summer-integrator with four identical input resistors R. Using the
same R0 s required two additional op amps (op amp 2 to change the scale and op amp 3 to invert).
As Eq. (6.22a) shows, we can use the input resistors of a summer-integrator to change the scale of
the inputs, which we have done in this example with the result that two op amps were eliminated.
n n n
14
It might be even better to first show the summer-integrator as two separate op amps, one for summing and
one for integrating, and only then proceed to the combined summer-integrator of Fig. 6.17 and finally to the most
efficient implementation shown in Fig. 6.18b.
256 Electronics and communications for scientists and engineers
6.10 Summary
An op amp is a high-gain, direct-coupled integrated circuit amplifier of about 20 transis-
tors on a tiny silicon chip. By itself, it is not particularly stable with a gain that varies with
frequency, dropping off to a negligible level at about a megahertz. However, applying neg-
ative feedback15 to the op amp, we obtain a moderate-gain amplifier that is very stable and
responds to frequencies much higher than a megahertz. Combining that with the charac-
teristics of high input impedance and low output impedance, we almost have an ideal
amplifier that is used by itself or as a building block in numerous applications in many
diverse fields. In analog design, they have surpassed transistors as the basic building
block. The versatility of this amazing chip allows it to be cascaded without loading prob-
lems, to be used as an oscillator, to be used as a differential amplifier that amplifies a dif-
ference signal but attenuates a common-mode (interfering) signal such as hum, and to be
used widely in “operation” applications which we started to explore in this chapter (com-
parators, D/A converters, integrators, etc.). The op amp fundamentals learned in this
chapter should be readily applicable to new situations encountered by designers in many
engineering fields. Because designing with them is so simple, even casual users should be
able to construct simple amplifiers and filters.
● There are two rules that govern the design of op amp circuits. The first is that the two
input terminals of an op amp in any circuit are at the same voltage, and the second is that
no current flows into either of the two input terminals. These were elaborated on in
Section 6.2, where the application of the two rules to the inverting amplifier showed that
point P, for practical purposes, is at ground level—a virtual ground—and also that point P
is a summing point—current flowing into the input resistor continues into the feedback
resistor. A thorough understanding of these rules can expedite the design of op amp
circuitry.
● There are some physical limitations of op amps, some of which are obvious and others
which are more subtle. An obvious one is the limit on the output voltage of an op amp
which cannot be larger than the power supply voltage.
The finite bandwidth is another limitation that can be overcome to some extent by
applying negative feedback—the more feedback, the larger the bandwidth, but the gain
is proportionately reduced. To quantify it, we introduce the gain-bandwidth product,
which is constant for any given op amp circuit. Hence reducing gain increases bandwidth
and vice versa. Initially op amps were limited to a gain-bandwidth product of 1 MHz,
which restricted their use to low-frequency applications, primarily audio. At present, since
the gain-bandwidth product has been pushed to 500 MHz, op amps are suited for video
applications as well.
15
Routing a portion of the output signal back to the input, such that it is 180° out of phase with the input signal,
is called negative feedback. It results in decreased gain but improved frequency characteristics, and reduces
waveform distortion. In positive feedback, a portion of the output signal that is fed back is in phase with the input
signal, usually leading to an unstable situation in which the circuit oscillates.
Chapter 6 • Operational amplifiers 257
Another limitation of op amps is the presence of a small voltage, called the input offset
voltage, which due to imbalances in the internal op amp circuitry is always present. Max-
imum values are quoted in manufacturers’ data sheets. For the same reason, a small input
bias current is present at the inverting and noninverting terminals of an op amp that is
connected in a circuit.
A further limitation is the slowed response of an op amp to a quickly changing
input. If the input changes too quickly, there will be a delay in the output, given by
the slew rate limit. Typically, the vertical part in an ideal step input will be reproduced
slanted.
A final limitation is the common-mode rejection ratio (CMRR) in differential ampli-
fiers, which are amplifiers that provide a high degree of discrimination against common-
mode (interfering) signals while amplifying a differential signal. CMRR is a ratio of
differential gain to common-mode gain and was fully explored in this chapter. A popular,
general-purpose and cheap op amp is the 741. Its specifications are Ri ¼ 2 MΩ, Ro ¼ 75 Ω,
A ¼ 2 105, CMRR ¼ 90 dB, and supply voltage ¼ 15 V.
Problems
1. Explain why a high input resistance and a low output resistance are desirable
characteristics of an amplifier.
2. Calculate the gain of the inverting op amp given in Example 6.1 without initially
assuming that υd ¼ 0. Use the resistance values specified in the example and compare
the gain to the value of 100 obtained by using the gain expression RF/R1.
Ans: Error ¼ 0.02%.
3. In the inverting amplifier of Fig. 6.1b, find the input impedance if R1 ¼ 10 kΩ and
RF ¼ 200 kΩ. Assume the op amp is ideal.
4. A particular microphone which produces an open-circuit voltage of 50 mV can be
modeled by 50 mV source voltage (υs) in series with a 10 kΩ source resistance (Rs). If
the microphone voltage needs to be amplified to a level of 5 V, design an inverting
amplifier to accomplish it.
5. For the microphone case described in Problem 4, design a noninverting amplifier.
Ans: If R1 ¼ 1 kΩ, then RF ¼ 99 kΩ in Fig. 6.2a.
6. A mediocre op amp (see Fig. 6.1a) with A ¼ 104, Ri ¼ 100 kΩ, and Ro ¼ 0.5 kΩ is to be
used as a unit gain buffer (Fig. 6.2a). By writing the circuit equations for Fig. 6.2a, show
that υo υi and show that the input impedance Zi ¼ (1 + A)Ri. Give numerical values.
7. Repeat the calculations in Example 6.2 when the input device is a microphone with
υs ¼ 10 mV (rms) and source impedance Rs ¼ 50 kΩ. Draw a conclusion regarding the
effectiveness of a buffer.
8. An op amp such as the 741 is used in an inverting amplifier (Fig. 6.1b). If the input
impedance to the inverting amplifier is to be 2 kΩ, design the amplifier for a gain of
50, that is, find R1and RF.
Ans: RF ¼ 100 kΩ, R1 ¼ 2 kΩ.
258 Electronics and communications for scientists and engineers
9. An inverting amplifier of the type shown in Fig. 6.1b uses a 741 op amp that is powered
by a 15 V supply. If the input current i1 is not to exceed 20 μA, design the circuit for
a gain of 100, that is, find R1 and RF. Assume that υo,max is limited by the 15 V power
supply voltage.
10. Two voltages υ1 and υ2 are to be added by a summing amplifier to give an output that is
υo ¼ υ1 5υ2. Design a summer of the type shown in Fig. 6.4a. Use RF ¼ 10 kΩ.
Ans: R1 ¼ 10 kΩ, R2 ¼ 2 kΩ.
11. Find the gain Ar ¼ υo/υ1 of the op amp amplifier circuit shown in Fig. 6.19. What
operation does it perform?
RF
–
R1 A
+ ϑo
ϑ1
FIG. 6.19
12. Repeat Problem 10 but change the desired output voltage to υo ¼ υ1 + υ2.
13. A voltage-to-current converter converts a voltage signal to a proportional output
current. Show that for the circuit in Fig. 6.20 we have iL ¼ υs/R1. As the circuit is
basically a noninverting amplifier (Fig. 6.2a), the load current is independent of the
source impedance Rs and load impedance RL. Hence, the amplifier requires very
little current from the signal source due to the very large input resistance of an
op amp.
14. A current-to-voltage converter converts an input current to a proportional output
voltage. Show that for the circuit in Fig. 6.21 we have υo ¼ isRF. Note that due to the
virtual ground at the inverting amplifier input, the current in Rs is zero and it flows
through the feedback resistor RF.
+
A
–
RS iL RL
+
–
ϑS R1
FIG. 6.20
Chapter 6 • Operational amplifiers 259
RF
–
A
+ ϑO
RS
iS
FIG. 6.21
100kΩ
–
A ϑO
+ id +
FIG. 6.22
15. A reverse-biased photodiode in the circuit of Fig. 6.22 generates 0.4 μ A of current (id)
per 1 μW of light power falling on it. Find the voltage υo that a voltmeter would read
when the diode is illuminated with radiant power of 50 μW.
16. Two differential amplifiers, differing only in their CMRRs, are available. If the inputs
are υ1 ¼ 1 mV and υ2 ¼ 0.9 mV, calculate the output voltages for the two amplifiers and
show the effect that a higher CMRR has.
21. An op amp low-pass filter is to have a cutoff frequency of 100 Hz and a gain of
magnitude 50. Determine the remaining parameters if the capacitor is specified as
C ¼ 1 μ F.
22. An op amp low-pass filter (Fig. 6.12a) has R1 ¼ 2 kΩ, RF ¼ 22 kΩ, and CF ¼ 0.1 μ F.
Determine the corner frequency and the DC gain.
Ans: 72.3 Hz, 11.
23. Find the unity-gain bandwidth for the low-pass filter of Problem 22; that is, find the
frequency at which the gain has dropped to unity.
24. Design a high-pass op amp filter with a high-frequency gain of 100 and a cutoff
frequency of 1 kHz. Resistors with values of 1 kΩ, 10 kΩ, and 100 kΩ are available.
Determine the capacitance and resistance values of the filter.
25. A 741 op amp for which A ¼ 2105 has a supply voltage of 15 V. If it is used as a
comparator (Fig. 6.14a with Vref ¼ 5 V), determine the change in υ? which will drive
the output voltage from negative saturation (15 V) to positive saturation.
Ans: 4.999925 V to 5.000075 V.
26. Repeat Problem 25, except for a zero reference voltage.
27. Design a comparator circuit to set off an alarm when the temperature in a boiler
reaches 160 °C. You have available a temperature-to-voltage transducer which
generates a voltage of 5 V at 160 °C and an alarm which activates at 15 V and is off for
larger voltages. Sketch the transfer characteristics.
28. A zero-crossing op amp comparator is powered by two batteries, one with VBB ¼ 15 V
and the other with VBB ¼ 15 V, as shown in Fig. 6.14a. Such an arrangement has an
output voltage υo which is +15 V when υ? > 0 and 15 V when υ? < 0. If the input
voltage is given by υ? ¼ 0.01 sin ωt V, sketch the output voltage.
29. Design an analog computer to determine the current i(t) for t > 0 in the series RL
circuit shown in Fig. 1.26a. The switch is turned on at t ¼ 0 and connects a battery V to
RL. The resulting current is determined by di/dt ¼ V/L Ri/L.
30. A typical solution for Problem 6–29 involves more than one op amp. It is possible, by
combining addition and integration in one op amp (see Fig. 6.10), to design an
efficient, single-op-amp solution to Problem 29. Show the circuit.
31. Determine the differential equation whose analog is shown in Fig. 6.23.
R3
C1
t=0 R3
–
A –
+ R1 A R1C1=1
VB +
R2
FIG. 6.23
Chapter 6 • Operational amplifiers 261
d2 x
32. Design an analog computer to solve dt 2
+ 3x ¼ cos ωt.
Ans:
d2x –dx
C
dt2 dt C
cosωt
R1 R1
–
–
+ x
R1 +
R1C=1
3R
–3x R
–
+
FIG. 6.24
33. Design an analog computer to solve for the current i(t) in the series RLC circuit of
Fig. 2.2a. The current is the solution to Eq. (2.3), which can be restated here as
dυðt Þ diðt Þ
+ L ddtið2t Þ + iðCt Þ
2
dt ¼ R dt