UNIT II LOGIC GATES AND BOOLEAN ALGEBRA 12 M

Implementation of NAND Gate from NOR Gate

The implementation of NAND gate using the NOR gate is shown in Figure-3.

From the logic circuit, it is clear that for the implementation of NAND gate using NOR gates
only, we require 4 NOR gates. The first two NOR gates perform the complement of input
variables A and B, the third NOR gate produce the NAND output of the complemented
inputs, i.e. A' and B'. Finally, the fourth NOR gate again operates as an inverter and produce
the output Y. This output Y is the equivalent to the output of the NAND gate.
Output Equation
The output of the first and second NOR gates is,
Y1=A̅ and Y2=B̅
The output of the third NOR gates is,

The output of the fourth NOR gate is,

Y4=A̅B̅
Hence, this is the output of a NAND Gate. In this way, we can implement a NAND gate
using NOR gates only.
Implementation of NOR Gate from NAND Gate

The implementation of NOR gate using the NAND gate is shown in Figure-3.
From the logic circuit, it is clear that for the implementation of NOR gate using NAND gates
only, we require 4 NAND gates. The first two NAND gates perform the complement of input
variables A and B, the third NAND gate produce the NAND output of the complemented
inputs, i.e. A̅ and B̅ . Finally, the fourth NAND gate again operates as an inverter and
produces the output Y. This output Y is the equivalent to the output of the NOR gate.

Output Equation
The output of the first and second NAND gates is,
Y1=A̅ and Y2=B̅
The output of the third NAND gates is,

The output of the fourth NAND gate is,

Hence, this is the output of a NOR Gate. In this way, we can implement a NOR gate using
NAND gates only.

Implementation of XOR Gate from NAND Gate

Figure-3 shows how you can implement a XOR gate using only NAND gates.

From the logic circuit diagram of the XOR gate using NAND gates only, it is clear that we
require 4 NAND gates.
Now, let us understand how this NAND logic circuit functions to produce an output
equivalent to the XOR gate.
The output of the first NAND gate is,

The outputs of the secondary and third NAND gates are,

Finally, these two outputs (Y2 and Y3) are connected to the fourth NAND gate. This NAND
gate will produce an output which is,

This is the output of the XOR gate. Hence, in this way, we can implement the XOR gate
from NAND gates only.

Implementation of XNOR Gate from NAND Gate

The realization of XNOR gate using NAND gates is shown in Figure-3.

From the logic circuit diagram of the XNOR gate using NAND gates only, it is clear that we require
5 NAND gates.
Now, let us understand how this NAND logic circuit functions to produce an output equivalent to the
XNOR gate −
The output of the first NAND gate is,

The outputs of the secondary and third NAND gates are,

These two outputs (Y2 and Y3) are connected to the fourth NAND gate. This NAND gate will
produce an output which is,

Finally, the output of the fourth NAND gate is input to the fifth NAND gate that functions as an
inverter, and produces an output equivalent to the XNOR gate, i.e.,

This is the output of the XNOR gate. Therefore, in this way, we can implement the XNOR gate from
NAND gates only.
D IGITA L LOGIC F AM ILIES

A group of compatible ICs with the same logic levels and supply voltages for performing various logic functions
have been fabricated using a specific circuit configuration which is referred to as a logic family.

4.1.1 Bipolar Logic Families

The main elements of a bipolar IC are resistors, diodes (which are also capacitors) and transistors. Basically,
there are two types of operations in bipolar ICs:
1 . Sa tura ted, a nd
2 . N on -s a tura ted.

In saturated logic, the transistors in the IC are driven to saturation, whereas in the case of non-saturated logic,
the transistors are not driven into saturation.

The saturated bipolar logic families are:

1. Resistor—transistor logic (RTL),

2. Direct—coupled transistor logic (DCTL),
3. Integrated—injection logic (I 2 L),
4. Diode—transistor logic (DTL),
5. High—threshold logic (HTL), and
6. Transistor—transistor logic (TTL).

The non-saturated bipolar logic families are:

1. Schottk y TTL, and

2. Emitter-coupled logic (ECL).

4.1.2 Unipolar Logic Families

MOS devices are unipolar devices and only MOSFETs are employed in MOS logic circuits. The
MOS logic families are:
1. PMOS,
2. NMOS, and
3. CMOS (5-V and low-voltage CMOS)

While in PMOS only p-channel MOSFETs are used and in NMOS only n-channel MOSFETs are used, in
complementary MOS (CMOS), both p- and n-channel MOSFETs are employed and are fabricated on the same
silicon chip.

4.1.3 BiCMOS Logic Family

BiCMOS logic circuits use CMOS devices for input and logic operations and bipolar devices for output.

4.2 CHARACTERISTICS OF DIGITAL ICs

Digital ICs are classified either according to the complexity of the circuit, as the relative number of individual
basic gates (2-input NAND gates) it would require to build the circuit to accomplish the same logic function or
the number of components fabricated on the chip. The classification of digital ICs is given in Table 4.1.
 The various characteristics of digital ICs used to compare their performances are:

1. Speed of operation,
2. Pow er dissipation,
3. Figure of merit,
4. Fa n -out,
5. Current and voltage parameters,
6. N ois e immunit y,
7. Operating temperature range,
8. Power supply requirements, and
9. Flexibilities available.

4.2.1 Speed of Operation

The speed of a digital circuit is specified in terms of the propagation delay time. The delay times are measured between
the 50 per cent voltage levels of input and output waveforms. There are two delay times: tpHL, when the output goes
from the HIGH state to the LOW state and tpLH, corresponding to the output making a transition from the LOW state
to the HIGH state. The propagation delay time of the logic gate is taken as the average of these two delay times.

4.2.2 Power Dissipation

This is the amount of power dissipated in an IC. It is determined by the current, I cc, that it draws from the Vcc
supply, and is given by Vcc x Icc, Icc is the average value of Icc(0) and Icc(1). This power is specified in
milliwatts It is known as static power dissipation, i.e., the power consumed by the circuit when input signals are
not changing.

4.2.3 Figure of Merit

The figure of merit of a digital IC is defined as the product of speed and power. The speed is specified in terms of
propagation delay time expressed in nanoseconds.

Figure of merit = propagation delay time (ns) x power (mW)

It is specified in pico joules (ns x mW = pJ)

A low value of speed-power product is desirable. In a digital circuit, if it is desired to have high speed, i.e. low
propagation delay, then there is a corresponding increase in the power dissipation and vice-versa.
4.2.4 Fan-Out
This is the number of similar gates which can be driven by a gate. High fan-out is advantageous because it reduces the
need for additional drivers to drive more gates.

4.2.5 Current and Voltage Parameters

The currents and voltages are specified which are very useful in the design of digital systems.

4.2.6 Noise Immunity

Stray electric and magnetic fields may induce unwanted voltages, known as noise. The circuit ability to tolerate noise
signals is referred to as noise immunity.

4.2.7 Operating Temperature

The temperature range in which an IC functions properly must be known. The accepted temperature ranges are: 0 to
+ 70 °C for consumer and industrial applications and —55 °C to +125 °C for military purposes.

4.2.8 Power Supply Requirements

The supply voltage(s) and the amount of power required by an IC are important characteristics required to choose the
proper power supply.

4.2.9 Flexibilities Available

Various flexibilities are available in different IC logic families and these must be considered while selecting a logic
family for a particular job. Some of the flexibilities available are:

1. The breadth of the series: Type of different logic functions available in the series.
2. Popularity of the series: The cost of manufacturing depends upon the number of ICs manufactured. When a large
number of ICs of one type are manufactured, the cost per function will be very small and it will be easily available
because of multiple sources.
3. Wired-logic capability: The outputs can be connected together to perform additional logic without any extra
hardware.
4. Availability of complement outputs: This eliminates the need for additional inverters.
Type of output: Passive pull-up, active pull-up, open-collector/drain, and tristate. These will be explained in
subsequent sections.

Comparison of a Logic Family

The following table presents a comprehensive comparison of popular logic families on various
parameters
Parameters TTL CMOS ECL RTL

Transistors,
Basic Resistor resistor and
diodes, and MOSFETs
element and transistors transistors
resistors

Fan out moderate highest(~50) high low

Propagation
10ns 70ns 2ns 12ns
Delay

Noise
moderate high low poor
margin

Power
10mW 0.1mW 40-50mW 30mW
dissipation

Circuit moderately
complex complex simple
complexity complex

Basic gate NAND gate NAND/NOR OR/NOR NOR gate

battery-powered
practically
Oscilloscopes, circuits due to low high-speed
obsolete due
Application measurement power switching
to poor noise
devices consumption, application
margin
mobile equipments