CHAPTER 4 - BIPOLAR JUNCTION TRANSISTOR

SELF-TEST

Section 4–1 (a) forward-reverse (b)

1. The three terminals of a bipolar junction forward-forward
transistor are called (c) reverse-reverse (d) collector bias
(a) p, n, p
(b) n, p, n Section 4–4
(c) input, output, ground 9. If the output of a transistor amplifier is 5
(d) base, emitter, collector V rms and the input is 100 mV rms, the
voltage gain is
2. In a pnp transistor, the p regions are (a) 5 (b) 500 (c) 50 (d) 100
(a) base and emitter
(b) base and collector 10. When a lowercase is used in relation to a
(c) emitter and collector transistor, it refers to
(a) a low resistance
Section 4–2 (b) a wire resistance
3. For operation as an amplifier, the base of (c) an internal ac resistance
an npn transistor must be (d) a source resistance
(a) positive with respect to the emitter
(b) negative with respect to the emitter 11. In a given transistor amplifier, and the
(c) positive with respect to the collector voltage gain is
(d) 0 V (a) 2.2 (b) 110 (c) 20 (d) 44

4. The emitter current is always Section 4–5

(a) greater than the base current 12. When operated in cutoff and saturation,
(b) less than the collector current the transistor acts like a
(c) greater than the collector current (a) linear amplifier (b) switch
(d) answers (a) and (c) (c) variable capacitor (d) variable resistor

Section 4–3 13. In cutoff, VCE is

5. The bDC of a transistor is its (a) 0 V
(a) current gain (b) voltage gain (b) minimum
(c) power gain (d) internal resistance (c) maximum
(d) equal to VCC
6. If IC is 50 times larger than IB, then is (e) answers (a) and (b)
(a) 0.02 (b) 100 (c) 50 (d) 500 (f) answers (c) and (d)

7. The approximate voltage across the 14. In saturation, VCE is

forward-biased base-emitter junction of a (a) 0.7 V (b) equal to VCC
silicon BJT is (c) minimum (d) maximum
(a) 0 V (b) 0.7 V (c) 0.3 V (d) VBB
15. To saturate a BJT,
8. The bias condition for a transistor to be (a) IB IC(sat)
used as a linear amplifier is called (b) IB IC(sat) / bDC
(c) VCC must be at least 10 V 18. The relationship between the collector
(d) the emitter must be grounded current and a light-generated base current is
(a) IC bDCIl (b) IC aDCIl (c) IC lIl (d)
16. Once in saturation, a further increase in
base current will 19. An optocoupler usually consists of
(a) cause the collector current to increase (a) two LEDs
(b) not affect the collector current (b) an LED and a photodiode
(c) cause the collector current to decrease (c) an LED and a phototransistor
(d) turn the transistor off (d) both (b) and (c)

Section 4–6 Section 4–8

17. In a phototransistor, base current is 20. In a transistor amplifier, if the
(a) set by a bias voltage base-emitter junction is open, the collector
(b) directly proportional to light intensity voltage is
(c) inversely proportional to light intensity (a) VCC (b) 0 V (c) floating (d) 0.2 V
(d) not a factor
21. A DMM measuring on open transistor
junction shows
(a) 0 V (b) 0.7 V (c) OL (d) VCC

CHAPTER 5 - TRANSISTOR BIAS CIRCUITS

Section 5–1 (c) operating nonlinearly

1. The maximum value of collector current (d) answers (a) and (c)
in a biased transistor is (e) answers (b) and (c)
(a) bDCIB (b)
IC(sat) Section 5–2
(c) greater than IE (d) IE - IB 4. The input resistance at the base of a
biased transistor depends mainly on
2. Ideally, a dc load line is a straight line (a) bDC (b) RB (c) RE (d) bDC and RE
drawn on the collector characteristic curves
between 5. In a voltage-divider biased transistor
(a) the Q-point and cutoff circuit such as in Figure 5–13, RIN(BASE)
(b) the Q-point and saturation can generally be neglected in calculations
(c) VCE(cutoff) and IC(sat) when
(d) IB = 0 and IB = IC>bDC (a) RIN(BASE) > R2
(b) R2 > 10RIN(BASE)
3. If a sinusoidal voltage is applied to the (c) RIN(BASE) > 10R2
base of a biased npn transistor and the (d) R1 << R2
resulting sinusoidal collector voltage is
clipped near zero volts, the transistor is 6. In a certain voltage-divider biased npn
(a) being driven into saturation transistor, VB is 2.95 V. The dc emitter
(b) being driven into cutoff voltage is approximately
(a) 2.25 V (b) 2.95 V (c) 3.65 V (d) 0.7 V 12. In a voltage-divider biased npn
transistor, if the upper voltage-divider
7. Voltage-divider bias resistor (the one connected to VCC) opens,
(a) cannot be independent of (a) the transistor goes into cutoff
(b) can be essentially independent of (b) the transistor goes into saturation
(c) is not widely used (c) the transistor burns out
(d) requires fewer components than all the (d) the supply voltage is too high
other methods
13. In a voltage-divider biased npn
Section 5–3 transistor, if the lower voltage-divider
8. Emitter bias is resistor (the one connected to ground)
(a) essentially independent of opens,
(b) very dependent on (a) the transistor is not affected
(c) provides a stable bias point (b) the transistor may be driven into cutoff
(d) answers (a) and (c) (c) the transistor may be driven into
saturation
9. In an emitter bias circuit, The emitter (d) the collector current will decrease
current
(a) is 5.3 mA (b) is 2.7 mA 14. In a voltage-divider biased pnp
(c) is 180 mA (d) cannot be determined transistor, there is no base current, but the
base voltage is approximately correct. The
10. The disadvantage of base bias is that most likely problem(s) is
(a) it is very complex (a) a bias resistor is open
(b) it produces low gain (b) the collector resistor is open
(c) it is too beta dependent (c) the base-emitter junction is open
(d) it produces high leakage current (d) the emitter resistor is open
(e) answers (a) and (c)
11. Collector-feedback bias is (f) answers (c) and (d)
(a) based on the principle of positive
feedback 15. If R1 in Figure 5–25 is open, the base
(b) based on beta multiplication voltage is
(c) based on the principle of negative (a) +10 V (b) 0 V (c) 3.13 V (d) 0.7 V
feedback
(d) not very stable 16. If R1 is open, the collector current in
Figure 5–25 is
Section 5–4 (a) 5.17 mA (b) 10 mA
(c) 4.83 mA (d) 0 mA

CHAPTER 8 - FIELD-EFFECT TRANSISTORS (FETs)

Section 8–1 (b) a voltage-controlled device

1. The JFET is (c) a current-controlled device
(a) a unipolar device (d) answers (a) and (c)
(e) answers (a) and (b)
9. At cutoff, the JFET channel is
2. The channel of a JFET is between the (a) at its widest point
(a) gate and drain. (b) drain and (b) completely closed by the depletion
source region
(c) gate and source (d) input and output (c) extremely narrow
(d) reverse-biased
3. A JFET always operates with
(a) the gate-to-source pn junction 10. A certain JFET datasheet gives The
reverse-biased pinch-off voltage, VP,
(b) the gate-to-source pn junction (a) cannot be determined (b) is -4 V
forward-biased (c) depends on VGS (d) is 4 V
(c) the drain connected to ground
(d) the gate connected to the source 11. The JFET in Question 10
(a) is an n channel (b) is a p channel
Section 8–2 (c) can be either
4. For VGS = 0 V, the drain current becomes
constant when VDS exceeds 12. For a certain JFET, IGSS = 10 nA at
(a) cutoff (b) VDD (c) VP (d) 0 V VGS = 10 V. The input resistance is
(a) 100 MΩ (b) 1 MΩ
5. The constant-current region of a FET lies (c) 1000 MΩ (d) 1000
between mΩ
(a) cutoff and saturation
(b) cutoff and pinch-off Section 8–3
(c) 0 and IDSS 13. For a certain p-channel JFET, VGS(off)
(d) pinch-off and breakdown = 8 V. The value of VGS for an approximate
midpoint bias is
6. IDSS is (a) 4 V (b) 0 V (c) 1.25 V (d) 2.34 V
(a) the drain current with the source shorted
(b) the drain current at cutoff 14. In a self-biased JFET, the gate is at
(c) the maximum possible drain current (a) a positive voltage (b) 0 V
(d) the midpoint drain current (c) a negative voltage (d) ground

7. Drain current in the constant-current Section 8–4

region increases when 15. The drain-to-source resistance in the
(a) the gate-to-source bias voltage ohmic region depends on
decreases (a) VGS
(b) the gate-to-source bias voltage increases (b) the Q-point values
(c) the drain-to-source voltage increases (c) the slope of the curve at the Q-point
(d) the drain-to-source voltage decreases (d) all of these

8. In a certain FET circuit, VGS = 0 V, VDD 16. To be used as a variable resistor, a JFET
= 15 V, IDSS = 15 mA, and RD = 470 Ω. If must be
RD is decreased to 330 Ω, IDSS is (a) an n-channel device
(a) 19.5 mA (b) 10.5 mA (b) a p-channel device
(c) 15 mA (d) 1 mA (c) biased in the ohmic region
(d) biased in saturation (b) electrostatic discharge
(c) excessive voltage
17. When a JFET is biased at the origin, the (d) all of these
ac channel resistance is determined by
(a) the Q-point values Section 8–7
(b) VGS 24. A certain D-MOSFET is biased at VGS
(c) the transconductance = 0 V. Its datasheet specifies IDSS = 20 mA
(d) answers (b) and (c) and VGS(off) = -5 V. The value of the drain
current
Section 8–5 (a) is 0 A
18. A MOSFET differs from a JFET mainly (b) cannot be determined
because (c) is 20 mA
(a) of the power rating
(b) the MOSFET has two gates Section 8–8
(c) the JFET has a pn junction 25. An IGBT is generally used in
(d) MOSFETs do not have a physical (a) low-power applications
channel (b) rf applications
(c) high-voltage applications
19. A D-MOSFET operates in (d) low-current applications
(a) the depletion mode only
(b) the enhancement mode only
(c) the ohmic region only
(d) both the depletion and enhancement
modes

Section 8–6
20. An n-channel D-MOSFET with a
positive VGS is operating in
(a) the depletion mode
(b) the enhancement mode
(c) cutoff
(d) saturation

21. A certain p-channel E-MOSFET has a If

VGS = 0 V, the drain current is
(a) 0 A (b) ID(on) (c) maximum (d)
IDSS

22. In an E-MOSFET, there is no drain

current until VGS
(a) reaches VGS(th) (b) is positive
(c) is negative (d) equals 0 V

23. All MOS devices are subject to damage

from
(a) excessive heat