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ELE222E Spring 2015 MT1

The document outlines the guidelines for a midterm exam in electronics, specifying allowed materials and prohibiting cell phones. It includes detailed problems related to semiconductor physics, diode characteristics, and BJT amplifier circuits, along with hints for solving them. Solutions to the problems are provided, demonstrating calculations for various parameters such as dopant densities, barrier voltage, depletion zone width, and junction capacitances.
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0% found this document useful (0 votes)
9 views3 pages

ELE222E Spring 2015 MT1

The document outlines the guidelines for a midterm exam in electronics, specifying allowed materials and prohibiting cell phones. It includes detailed problems related to semiconductor physics, diode characteristics, and BJT amplifier circuits, along with hints for solving them. Solutions to the problems are provided, demonstrating calculations for various parameters such as dopant densities, barrier voltage, depletion zone width, and junction capacitances.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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IMPORTANT: Besides your calculator and the sheets you use for calculations you are only allowed

to have an A4 sized “copy


sheet” during this exam. Notes, problems and alike are not permitted. Please submit your “copy sheet” along with your
solutions. You may get your “copy sheet” back after your solutions have been graded. Do not forget to write down units and
convert units carefully! Cell phones are not allowed and should be placed on the front desk before the exam.

EHB222E INTRODUCTION TO ELECTRONICS (20727)


Midterm Exam #1  23 March 2015  9.30-11.30
İnci ÇİLESİZ, PhD, Can ZOROĞLU, BS
EEF 2014

1. Assume you are have a diode made of n- and p-typed doped silicon with the
following parameters: μn = 1600 cm2/Vs, μp = 600 cm2/Vs. ni = 1,5 1010 1/cm3,
q = 1,602 10-19 C, r = 12, o = 8,85 10-12 F/m, VT = 25 mV.
a. Find the dopant densities for n- and r-type silicon for specific resistances
of 1 Ωcm and 0,5 Ωcm respectively. (6 points)
b. Find the barrier voltage and saturation current for a junction area of 0,15
mm2. (6 points)
c. Determine the depletion zone width in unbiased state, when the
junction is reverse biased at 2,5 V and when it is forward biased
at 0,25 V. (9 points)
d. Calculate the junction capacitances for the cases in (c). (9 points)

2. For the circuit shown on the right sketch Vout as a function of Vin for Vin: -10 V to
+10 V assuming all three resistors are 10k and the voltage drop across
conducting diodes are constant at 0,6 V. (30 points)
HINT: Analyze the circuit first at Vin = 0V; then at +10 V and –10 V, and finally at
values in between.

3. Study DC characteristics of the 3-stage +VCC = +10V +VCC = +10V


BJT amplifier circuit with |VBE| = 0,6 V,
hFE = 200 for all four transistors. Do I = 0,4 mA
not neglect base currents. RC3

a. Design a current source that will 10k


provide 0,4 mA biasing current to
the differential stage. (10 points) T1 T2 T3 Vo

b. Choose RC3 such that, waveform Vi T4


distortion at the output Vo is
minimum and symmetrical, 4k7
i.e., Vo = 0V? (30 points)
18k 18k

-VEE = -10V -VEE = -10V

GOOD LUCK
ELE222E INTRODUCTION TO ELECTRONICS (21454) Midterm Exam #1 – 30 March 2014 - Çilesiz & Atar Yıldız

SOLUTIONS:
𝑐𝑚2 𝑐𝑚2
1. Using Einstein Equation , i.e., 𝐷𝑝/𝑛 = 𝑉𝑇 𝜇𝑝/𝑛 ⇒ 𝐷𝑝 = 15 ; 𝐷𝑛 = 40
𝑠 𝑠

n 2
 p
a.  p  q    n  N A  p   qN A  p  N A 
i
 2,08  1016 / cm3
 A
N  q p

 ni2  

 n  q   N D n   p   qND  n  N D  n  3,9  1015 / cm3
 ND  q n
N N   D Dn 
b. VB  VT  ln A 2 D   665m V and I o  A  q  ni2   p    625 fA
 ni   L p N D Ln N A 

2   o   r  VB  1 1 
c. unbiased wdep      0,51m
q  NA ND 
2   o   r  VB  Vbias   1 1 
with reverse bias at 2,5 V, wdep      1,13m
q  NA ND 
2   o   r  VB  Vbias   1 1 
with forward bias at 0,25 V, wdep      0,41m
q  A
N N D 

30,74 pF, unbiased



A 
d. Thus, C   o   r  14 pF, reverse@ 2,5V
w 
38,9 pF, forward @ 0,25V

2. Assume there is no Vin. Vout = 0V because of the symmetry of the circuit, and because all diodes are
conducting. This is the same as Vin = 0V. Now assume Vin = 10V. We can
easily see that D1 and D3 are reverse biased because most of the voltage
drop from +10 V to –10 V is over the resistors R1 and R2. In other words,
the anode of D1 is much less than +10V whereas the cathode is at +10V
(reverse bias). Also, D4 is conducting, thus, the cathode of D3 is at 9,4V
wheras the anode of D3 is much less than +9,4V. That means current
flows (a) from +10V over R1, D2 , and R3 to ground (follow blue line), and
(b) from Vin over D4 and R4 to –10V. Since only 0,6V drops on the
conducting diodes 9,4V drops over the two resistors R1 and R3. Since
R1 and R3 have equal values, we divide the voltage drop by 2 and
this is Vout = 4.7V.
Now assume Vin = -10V. Similar to the observations above, D4 and D2 are
reverse biased because most of the voltage drop from +10 V to –10 V is
again over the resistors R1 and R2. In other words, the cathode of D4 is
much higher than -10V whereas the anode is at -10V (reverse bias again).
Also, D1 is conducting, thus, the anode of D2 is at -9,4V whereas the
cathode of D2 is much higher than -9,4V. That means current flows (a)
from the ground over R3, D3 , and R2 to –10V (follow red line), and (b)
from +10V over R1 and D1 to Vin. Since only 0,6V drops on the conducting
diodes 9,4V drops over the two resistors R 2 and R3. Since R2 and R3 have
equal values, we divide the voltage drop by 2 and this is Vout = 4.7V.

2
ELE222E INTRODUCTION TO ELECTRONICS (21454) Midterm Exam #1 – 30 March 2014 - Çilesiz & Atar Yıldız

Finally, we need to consider the output for 0V ≥ V in ≥ -10V and 0V ≤ Vin ≤ +10V. One sees easily that
when all the 4 diodes are conducting, the output V out follows the input Vin because the circuit is
symmetrical. When do all the 4 diodes conduct? See the sketch below….Capito????

3. DC characteristics are to be studied.


a. You do your own design!
b. Without neglecting the base currents of the differential (the very first) stage, for V i = 0 V
hFE I ref 200 0,4mA
I C1  I C 2      I C1  I C 2  0,199mA
hFE  1 2 200  1 2

 ( I C 2  I B3 )18k  VBE3  (hFE  1) I B3 4k 7  0

18k * I C 2  VBE3 18k * 0,199mA 0,6V


I C 3  hFE  200  0,62mA
(hFE  1)4k 7  18k (200  1)4k 7  18k

That the output voltage is in the middle of the power supply range (+10 V and -10 V), Vo = 0 V

(hFE  1) I B3 RE 4  VEB4  ( I C 3  I B 4 ) RC 3  0 , with (hFE  1)I B410k  10V  I E 4  1mA

10V  VEB4
( I C 3  I B 4 ) RC 3  10V  VEB4  RC 3   17k 25
I C3  I B4

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