E0007E
2023-08-24
Written Exam
Course name: Course code:
Electronics E0007E
Examination time: Date of examination:
5h 2023-08-24
Allowed aids:
Graphing calculator, BETA, Physics Handbook, Fysika, Sedra Smith—
Microelectronic Circuits. Notes are allowed in the course literature. Four
single-page A4 of hand-written notes are also allowed as well as any number of
printed pages from the digital parts of Sedra Smith.
On-duty teacher:
Joakim Nilsson, 070-36 36 957
Number of copies: Number of pages: Project number:
18 9 341 980
Grade scale: No. of tasks: Total score:
Grade 5: at least 26 credits 10 30
Grade 4: at least 21 credits
Grade 3: at least 16 credits
Other information:
Tasks 1–7 may be answered on the same page. The remaining tasks should be
answered on separate pages. Use only one side per sheet of paper.
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E0007E
2023-08-24
Part I
This part consists of 7 tasks. Each of these gives a choice of several answers.
Choose only one of the answers for each task. No motivation for your choice
is required.
Task 1 (2 credits)
Consider the circuit in the figure below. The diode can be considered to have
a forward voltage drop of 0.7 V. What is the voltage vout ?
3.0 V 3.0 V
1.0 kΩ 4.0 kΩ
vout
2.0 kΩ 2.0 kΩ
A. 1.0 V
B. 1.2 V
C. 1.3 V
D. 2.0 V
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E0007E
2023-08-24
Task 2 (2 credits)
Consider the circuit in the figure below. The Zener diode has a Zener voltage
of 5.0 V. What is the voltage vout ?
8.0 V
10 kΩ
vout
20 kΩ
A. 0 V
B. 2.0 V
C. 3.0 V
D. 5.0 V
E. 5.3 V
F. 7.0 V
G. 8.0 V
Task 3 (2 credits)
Coupling capacitors connected between amplifier stages are used in order
to...
A. Coupling capacitors are not used for amplifiers.
B. Make it possible to set the DC levels of different amplifier stages
independent of each other.
C. Keep the variation of the supply voltage to a minimum.
D. Filter out high frequencies in the signal fed to the amplifier.
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E0007E
2023-08-24
Task 4 (2 credits)
Consider the four amplifiers in the figures below. Assume the transistors
are biased in active mode with collector currents of IC = 1 mA. All resistors
have resistances of 10 kΩ, all transistors have betas of around 100, and all
capacitors are large. Which amplifier has the lowest input resistance, Rin ?
Rin Rout
Rout
Vout Rin
Vout
Vsig
Vsig
1) 2)
Rout
Rin
Iout
Rin
Rout
Isig
Vout
Vsig
3) 4)
A. No. 1
B. No. 2
C. No. 3
D. No. 4
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E0007E
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Task 5 (2 credits)
Consider the circuit in the figure below. Which of the following contributes
significantly to the high cutoff frequency fH for the gain |Gv | = |Vout /Vsig |?
Rout
Rin
Cout
Cin Vout
Vsig CS
A. The output resistance Rout seen at the amplifier output.
B. Both capacitors Cin and Cout .
C. The capacitor CS .
D. Internal paracitic capacitances of the transistor.
Task 6 (2 credits)
A digital inverter is supplied with a square wave input signal, and drives a
capacitive load. If the capacitance of the load decreases, then which of the
following is true?
A. The propagation delay decreases, but the power consumption increases.
B. The propagation delay increases, but the power consumption decreases.
C. The propagation delay and the power consumption both decrease.
D. The propagation delay and the power consumption both increase.
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E0007E
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Task 7 (2 credits)
A 1 V sinusoid is fed into the input of an operational amplifier in the non-
inverting configuration with a gain of 10 V/V. The input and output voltages
are shown in the plot below. As can be seen from the plot, the output voltage
is not what was desired. What modification to the circuit could be made to
remedy this problem?
10 vin
vout
5
Voltage [V]
−5
−10
0 5 10 15 20
Time [µs]
A. AC-couple the input signal
B. Increase the gain of the circuit
C. Replace the op amp with another op amp that has a higher slew rate
D. Replace the op amp with another op amp that has a higher bandwidth
E. Increase the supply voltage (assuming the op amp is rated for a higher
supply voltage)
F. Add big decoupling capacitors
Page 6 / 9
E0007E
2023-08-24
Part II
This part consists of 3 tasks. For each of these, a full solution is required.
Motivate approximations and assumptions that you make and make sure to
verify said assumptions.
When solving a subtask, if you do not manage to calculate all numerical
values required for a later subtask, assume values of your choice for the
quantities in question, and clearly state that you are doing so.
Task 8 (3 credits)
Using only NMOS and PMOS transistors, design a logic cicuit that realizes
the following logic function:
Y = A or B.
The function is also tabulated in the table below for all possible input values.
A and B are input signal voltages, while Y is the output signal voltage. In
the table, 0 represents the logic low voltage level, while and 1 represents the
logic high voltage level. You are allowed to place several gates in cascade.
AB Y
00 0
01 1
10 1
11 1
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E0007E
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Task 9 (7 credits)
Consider the amplifier below. The following parameters are given for the
transistor:
Vt = 1.2 V
kn0 = 100 µA/V2
W/L = 1000
ro = 50 kΩ
a). Calculate the bias voltages VG , VS and VD as well as the bias current
ID .
b). Draw the full small-signal schematic, including ro . Use this to derive
expressions for the midband gain Gv = vout /vsig , the amplifier input
resistance Rin , and the amplifier output resistance Rout .
c). Calculate numerical values for Gv , Rin , and Rout using your derived
expressions.
d). If you were allowed to change the 100 Ω drain resistor only, what is
the highest possible gain attainable while retaining an output voltage
signal swing of at least ±1.0 V?
15 V 15 V
Rout
Rin 1.0 MΩ 100 Ω
∞
∞ vout
100 kΩ
vsig 1.0 MΩ 560 Ω ∞ 2.0 kΩ
Page 8 / 9
E0007E
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Task 10 (6 credits)
Consider the amplifier below. The transistor has β = 150. You may ignore
the transistor output resistance ro for this task.
a). Choose values for the four resistors in order to meet the following
specification for the amplifier:
• Midband gain |Gv | = |vout /vsig | of at least 3.0 V/V.
• Bias current IC of around 1.5 mA.
b). Calculate the lower cut-off frequency for the amplifier.
Hint: The resistance-reflection rule can be employed to find the resis-
tance seen when looking into the base of the transistor.
15 V 15 V
Rout
Rin
RB1 RC
100 nF
1.0 kΩ 100 nF vout
vsig RB2 RE 20 kΩ
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