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Half Addrer & Full Adder Using NAND

The document outlines an experiment to design and implement half adder and full adder circuits using NAND gates. It details the components required, the theory behind half and full adders, and the procedure for conducting the experiment. The results confirm that the truth tables for both circuits were verified successfully.

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262 views2 pages

Half Addrer & Full Adder Using NAND

The document outlines an experiment to design and implement half adder and full adder circuits using NAND gates. It details the components required, the theory behind half and full adders, and the procedure for conducting the experiment. The results confirm that the truth tables for both circuits were verified successfully.

Uploaded by

Fortnite Pro
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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EXPERIMENT: 1

Design and implementation of half adder and full adder using


NAND gates
AIM: To design and verify Half adder and Full adder using minimum number of NAND
gates
COMPONENTS REQUIRED:
Sl.No Particulars Quantity
1 NAND Gate IC 7400 3
2 Trainer Kit 1
3 Patch cards 1 Bunch
4 Multimeter 1
THEORY:
Half-Adder: A combinational logic circuit that performs the addition of two data bits,
A and B, is called a half-adder. Addition will result in two output bits; one of which
is the sum bit, S, and the other is the carry bit, C. The Boolean functions describing
the half-adder are:
S =A ⊕ B C=AB
Full-Adder: The half-adder does not take the carry bit from its previous stage into
account. Thiscarry bit from its previous stage is called carry-in bit. A combinational
logic circuit that adds two data bits, A and B, and a carry-in bit, Cin, is called a full-
adder. The Boolean functions describing the full-adder are:

S = (A ⊕ B) ⊕ Cin C = AB + B Cin + A Cin


I. TO REALIZE HALF ADDER

A SUM
Half Adder
B Carry
FULL ADDER

TRUTH TABLE BOOLEAN EXPRESSIONS:

A
SUM
B Full Adder
Carry
Cin

PROCEDURE:
• Check the components for their working
• Insert the appropriate IC into the IC base
• Make connections as shown in the circuit diagram.
• Verify the Truth Table and observe the outputs.

RESULT:
Truth Table of half adder and full adder circuits verified.

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