Electronic Devices and Circuits

(EE-1004)
 Lecture Slides
 Week 14
Course Instructor:
Dr. Arslan Ahmed Amin

FAST National University of Computer and Emerging Sciences CFD Campus

 Field Effect Transistor (FET)
• The field-effect transistor (FET) is a transistor that uses
an electric field to control the electrical behavior of the
device
• FETs are also known as unipolar transistors since they
involve single-carrier-type operation
• All FETS have three terminals named as Gate (G),
Source (S) and Drain (D)
• Field effect transistors generally display very high input
impedance at low frequencies
• The conductivity between the drain and source
terminals is controlled by an electric field in the device,
which is generated by the voltage difference between
the source and the gate of the device
 Types of FETs
• FETS can be divided into
• JFETs
– N channel and P channel
• MOSFETs
– N channel and P channel
– Enhancement and depletion mode in each channel
 Why we call it “Unipolar” and “Field”
effect Transistor
• As there are only one type of charge carriers
in FETs so they are called unipolar
• The width of channel is controlled by applying
an electrical field at the gate terminal so these
are called “field” effect
Why we Need FETs in Presence of BJTs
• FETS are preferred over BJTs because FETs
– Consume less power
• Very low leakage current and there is no pn junction in the current
path
– Have fast switching action
– Have high input resistance
• Will be sensitive to very low input voltage changes
– Can be used with analog circuits
– Have negative temperature coefficient, so they can be
used for high voltages and there is no chance of thermal
breakdown
– Have smaller size as compared to BJTs
• Preferred in IC designing over BJTs
 Terminal Comparison of FET and BJT
• In NPN BJT
– Current flows from collector to emitter depending on the
base current and there are two PN junctions in the current
path
• In N channel FET
– Current flow from Drain to Source depending on the
voltage at Gate and there are no PN junctions in the
current path
– The current path is called channel
FET BJT
Gate (G) Base (B)
Drain (D) Collector (C)
Source (S) Emitter (E)
 Construction of JFET
• An n type substrate
• Two p regions are diffused on
the substrate
• It will form two PN junctions
• One side of substrate is called
Drain and the other is called
Source
• The combination of two p type
diffused regions is called Gate
• Depending upon the substrate
JFETs can be n channel or p
channel
 Types of JFET
• N Channel
– The N-channel JFET’s channel is doped with
donor impurities (N type)
– Current flow in channel in the form of electrons
• P Channel
– The P-channel JFET’s channel is doped with
acceptor impurities (P type)
– Current flow in channel in the form of holes
• N-channel JFET’s have a greater channel
conductivity since electrons have a higher mobility
through a conductor compared to holes
• This makes the N-channel JFET’s a more efficient
conductor compared to their P-channel
counterparts
 Biasing of JFET
• VDD provides a drain-to-source voltage and
supplies current from drain to source
• VGG sets the reverse-bias voltage between
the gate and the source
• The JFET is always operated with the gate-
source pn junction reverse-biased
• The channel width and thus the channel
resistance can be controlled by varying
the gate voltage, thereby controlling the
amount of drain current, ID
– When VGG = 0  ID is maximum
– When VGG increases  ID decreases
– When VGG is +ive  current flows from drain
to gate
 Drain Characteristic Curve
• Suppose that VGG = VGS = 0 and
VDD = VDS is a variable source
• When VDS is increasing ID also
increases and it is called ohmic
region
• After the VP the ID becomes
constant and it is called
saturation region
• If we keep on increasing VDS
then JFET will enter in cut-off
region
 VGS Controls ID
• When VGS = 0, ID is
maximum and is
called IDSS
• When VGS is more
negative, ID decreases
• The value of VGS that
makes ID = 0 is called
cut-off voltage and is
indicated by VGS(off)
 Pinch-off Voltage and Cut-off Voltage
• Pinch-off Voltage (VP)
– The value of VDS at which ID is almost constant
– Is always measured at VGS = 0
– Is a positive value
• Cut-off Voltage (VGS(off))
– The value of VGS at which ID = 0
– Is a negative value
– VP and VGS(off) are equal in magnitude and opposite
in sign. If VP = 5V then VGS(off) = -5V
 Regions of Operation in JFET (1/2)
• Ohmic Region
– The only region in which transconductance curve shows linear
response and drain current is opposed by the JFET transistor
resistance is termed as Ohmic region
• Saturation Region
– When ID is not affected by change in VDS
• Cutoff Region
– Also called pinch-off region
– In this cutoff region, there will be no drain current flowing and thus,
the JFET is in OFF condition
• Breakdown Region
– If the VDD voltage applied to the drain terminal exceeds the maximum
necessary voltage, then the transistor fails to resist the current and
thus, the current will flow from drain terminal to source terminal.
Hence, the transistor enters into the breakdown region
Regions of Operation in JFET (2/2)
 MOSFETs
• The MOSFET (metal oxide semiconductor field-effect
transistor) is another category of field-effect transistors
• The MOSFET, different from the JFET, has no pn
junction structure; instead, the gate of the MOSFET is
insulated from the channel by a silicon dioxide (SiO2)
layer
• The two basic types of MOSFETs are enhancement (E)
and depletion (D)
• Of the two types, the enhancement MOSFET is more
widely used
• Because polycrystalline silicon is now used for the gate
material instead of metal, these devices are sometimes
called IGFETs (insulated-gate FETs)
 N Channel E-MOSFET
• A p type substrate
• Two n type regions are diffused on
the substrate
• Between these two diffused regions
there is a insulating SiO2 layer
• Metal contacts are attached to SiO2
layer to form the gate
• Metal contacts are attached to two n
type regions to form Drain and
Source
• For p channel E-MOSFET the
substrate is n type and diffused
regions are p type
 Working of N Channel E-MOSFET
• E-MOSFET acts as normally open switch
• To bias the E-MOSFET a positive voltage
is applied at gate (this voltage must be
greater than a threshold voltage VGS(th))
• This positive voltage will cause a channel
to induce
• More electrons will be pulled towards
the channel from the substrate
• The positive voltage also attracts
electrons from the n+ source and drain
regions into the channel
• Hence a current flows from drain to
source
V-I Curve for N Channel E-MOSFET
 Operating Regions of E-MOSFET
• Cut-off Region
– When VGS < VGS(th)
– “fully-OFF” state
– ID = 0 regardless of value of VDS
• Linear (Ohmic or Triode) Region
– With VGS > VGS(th) and VDS < VOV
– Behaves as a voltage-controlled resistance whose resistive
value is determined by the gate voltage, VGS level
• Saturation Region
– With VGS > VGS(th) and VDS > VOV
– “fully-ON” state
– The Drain current ID = Maximum
Operation of N Channel E-MOSFET
• When applying a small VDS
– When VDS is small MOSFET acts as a
voltage controlled resistor whose
value is given as rDS = 1/gDS
– Where gDS = IDS/VDS
– It is triode region and in this region

nCox is set during the fabrication process. W and L are width

and length of MOSFET respectively
Operation of N Channel E-MOSFET
• When VDS is increased

• When VDS  vOV

– At this point VDS = vOV
 Large Signal Models for N Channel
E-MOSFET (VGS > Vt)
• Depending upon the different values of VDS
different large signal models can be used
 Example 1
Consider a process technology for which Lmin = 0.4 μm,
eox = 3.45 x 10^-11, tox = 8 nm, μn = 450 cm2/V.s, and Vt
= 0.7 V.
a) Find Cox and k’n.
b) For a MOSFET with W/L = 8μm/0.8μm, calculate
the values of VOV, VGS, and VDSmin needed to operate
the transistor in the saturation region with a dc
current ID = 100 μA.
c) For the device in (b), find the values of VOV and VGS
required to cause the device to operate as a 1000
resistor for very small VDS.
 Example 2
Consider an NMOS transistor fabricated with L = 0.18 μm
and W = 2 μm. The process technology is specified to
have Cox = 8.6 fF/μm2, μn = 450 cm2/Vs and Vt = 0.5V.
a) Find VGS and VDS that result in the MOSFET operating
at the edge of saturation with ID = 100 μA.
b) If VGS is kept constant, find VDS that results in ID = 50
μA.
 Finite Output Resistance in Saturation
• In saturation region VDS affects ID slightly. It can be
represented in the form of finite output resistance
• Finite output resistance is denoted by ro and is given as
r0 = |VA|/ID
 DC Analysis of MOSFET Circuits (1/6)
• To analyze MOSFET circuit with D.C. sources,
we must follow these five steps:
1. Assume
2. Enforce
3. Analyze
4. Check
5. Modify
 DC Analysis of MOSFET Circuits (2/6)
• Assume
– Assume one of the operating modes
• Cut-off
• Triode/ohmic/linear
• Saturation
– You can make an “educated guess” here, but
remember, until you CHECK, it’s just a guess
 DC Analysis of MOSFET Circuits (3/6)
• Enforce
– Enforce the equality condition of that mode
• Cut-off
ID = 0
• Triode/ohmic/linear

• Saturation
 DC Analysis of MOSFET Circuits (4/6)
• Analyze
– Analyze the circuit with enforced conditions
• The task in D.C. analysis of a MOSFET circuit is to find
one current and two voltages!
• Find any two voltages (VGS and VDS are easy to find)
• Get the third voltage using KVL
• Some hints
– IG is always 0 and ID is always non-negative in all modes
– Equations sometimes have two solutions! Choose solution
that is consistent with the original ASSUMPTION
 DC Analysis of MOSFET Circuits (5/6)
• Check
– Check the inequality of the assumed mode
• Cut-off
– For NMOS VGS < Vt
– For PMOS VGS > Vt
• Triode/Ohmic/linear
– For NMOS VGS > Vt and VDS < VGS – Vt
– For PMOS VGS < Vt and VDS > VGS – Vt
• Saturation
– For NMOS VGS > Vt and VDS > VGS – Vt
– For PMOS VGS < Vt and VDS < VGS – Vt
 DC Analysis of MOSFET Circuits (6/6)
• Modify
– If the results are not consistent with your
assumptions then modify the assumption and
repeat all steps
 Example 5
For the following MOSFET circuit find ID, VGS and
VDS. Also find its region of operation.

Answers
ID = 1.24 mA
VGS = 3.76 V
VDS = 7.52 V
Saturation Mode
(Ignoring 1000
by assuming Id
is in mA for
simplification.)