A High Density 400 W DC/DC Power Module with
Integrated Planar Transformer and Half Bridge GaN
IC
Bin Li Xiucheng Huang Jason Zhang
Navitas Semiconductor Navitas Semiconductor Navitas Semiconductor
Torrance, U. S. Torrance, U. S. Torrance, U. S.
[email protected] [email protected] [email protected] Abstract— The increasing popularity of gaming laptops, Boost PFC operates at a switching frequency of
portable workstations, all-in-one computers, smart displays, approximately 65 kHz to achieve optimal efficiency and
and large screen OLED TVs has led to a rising demand for
high-efficiency, high-density power supplies in the range of EMI performance, while the LLC resonant converter
300 W-500 W. Especially the all-in-one computer, smart switches at a frequency of 100 kHz-150 kHz due to the
display, and the large screen OLED TVs, they face form factor lower switching loss.
limitations, posing challenges for the overall thickness of the
power supply. In this paper, an LLC resonant converter Clearly the power supply occupies a significant portion
module is designed as the DC/DC stage of the power supply.
By utilizing a highly integrated half bridge GaN power IC, the of the space. Additionally, two large fans are present to
switching frequency of the DC/DC stage is boosted to over 500 dissipate the heat generated by the power supply and the
kHz, enabling the design of a PCB-based transformer with an A13 processor. Worth noting is the slim profile of the studio
integrated resonant inductor. The prototype has a profile of
only 8 mm, attains 21.5 kW/L power density (62.5 x 37.2 x 8 display, measuring only 18 mm in thickness [5]. Together
mm), which is far beyond the state-of-the-art design [1-3], with the board cuts out for the magnetics and capacitors, we
with a peak efficiency of 98.1% and a full load (400 W) can only imagine the requirements of the power supply in
efficiency of 97.4%.
terms of footprint, thickness, and efficiency.
Keywords—power converter module, half bridge GaN IC,
high density, magnetic integration
FAN FAN
I. INTRODUCTION
All-in-one computers and smart displays are gaining DC/DC
increasing popularity due to their space-saving and sleek
PFC
appearance. Meanwhile, advancements in technology have
led to a growing demand for large-sized OLED TVs,
gaming laptops, and portable workstations among people.
All these applications require power conversion from AC
grid to low voltage DC output (20 V or 24 V). This power
conversion usually consists of two stages. The first stage is Fig. 1 Power supply inside Apple’s studio display
a PFC converter, which performs power factor correction
EMI PFC LLC
function and boosts the voltage to 400 VDC. The second
stage is an isolated DC/DC converter, providing galvanic
isolation while regulating the output voltage to the required
level.
When examining the internal structure of Apple’s latest
Fig. 2 A typical two stage architecture of the AC/DC power supply
studio display (Fig. 1) [4], which represents the most
advanced technology available, the two-stage power supply In this paper, a high power density and high efficiency
can be identified: a Boost PFC stage followed by an LLC LLC resonant converter for the second stage is designed,
resonant converter as the DC/DC stage, as shown (Fig. 2). which converts 400 VDC to 24 VDC. With the emerging
In the first stage, power factor correction is per-formed wide bandgap materials, especially GaN, the switching
while transferring the AC utility power to a constant 380 V speed of power converter can be improved significantly due
DC bus voltage. The second stage regulates the voltage and to its much lower parasitic capacitance and zero reverse
provides isolation, converting the 380 V bus voltage to a 20 recovery [5-7]. And it becomes possible to adopt PCB base
V/24 V low voltage output for the subsequent stages. The
planar transformer to shrink the area and thickness of the All this features and functions are integrated into a 6 mm
magnetics [8, 9]. In addition, the resonant inductor can be x 8 mm QFN package (as shown in Fig. 4). This high-level
integrated into the transformer, which makes the system integration and significant reduction in component count
more concise and compact [10, 11]. and footprint make it possible to build a complete DC/DC
converter module in a very compact formfactor.
Furthermore, by integrating two GaN power devices,
their corresponding drivers, current sensing, level shifter
and bootstrap all together in a 6 x 8mm QFN package, the
GaN half bridge can greatly shrink the total footprint of the
semiconductors and simply the system design.
In section II, the system structure design is given.
Section III provides the design of the integrated planar
transformer, including the 3D finite element analysis (FEA).
Preliminary experimental results are in section IV, with
summary and conclusion in section V.
II. SYSTEM STRUCTURE DESIGN USING HALF
BRIDGE GAN POWER IC
A. Half Bridge GaN IC
The half bridge GaN power IC is a highly integrated
power stage consisting of two GaN power devices in a half Fig. 3 Simplified schematic of half bridge GaN power IC.
bridge configuration, along with two corresponding drivers,
a level shifter to eliminate the need for an additional isolator
and a bootstrap circuit to power up the high side [12].
Additional functions are also built into this IC [13].
1) Cycle-by-Cycle over current protection
During the low-side on-time of each switching cycle,
should the peak current exceed the internal OCP threshold
(1.9V, typical), the internal gate drive will turn the GaN
power FET off quickly and truncate the on-time period to
prevent damage from occurring to the IC. The IC will then
turn on again at the next low-side PWM rising edge at the
start of the next on-time period. This OCP feature self- Fig. 4 Package and description of the half bridge GaN power IC.
protects the Gan power IC during each switching cycle
The basic switching waveforms (Fig. 5) during resonant
against fast peak over current events and greatly increase the
ZVS conditions (fsw = 250 kHz, duty-cycle = 50%) include
robustness and reliability of the system. This built-in circuit
INH PWM input signal, VSW half-bridge switched node
can safely turn off the GaN FET in less than 100ns.
output, and output inductor current (IL). The switching
2) Lossless current sensing performance shows excellent on/off control of the
The GaN power IC incorporates a lossless current integrated high- and low-side GaN power FETs.
sensing by outputting a mirrored current through CS pin of
the IC. It helps to obviate the necessity for sensing resistors
in certain applications (Fig. 3), reducing system cost as well
as system loss.
3) Tunable turn-on speed.
The turn on speed of both high side switch and low side
switch can be tuned independently by adjusting the external
resistor, giving designers the freedom to trade-off between
switching speed and EMI performance. Fig. 5 Soft switching waveform of the half-bridge GaN power IC
B. System Structure Design The total loss is then calculated with different number of
The proposed LLC converter structure is shown in Fig. output sets. Consequently, the optimal number of output sets
6. For application with hundreds of watts power, half bridge can be selected to achieve the tradeoff between switching
is commonly used on the primary side to save the cost and and conduction loss, as shown in Fig. 7. In this design, with
simply the system design. While on the secondary side 400 W output power and 500 kHz switching frequency, two
center-type is the most popular due to easier driving of the sets of output is selected due to its lowest total loss.
synchronous rectifier (SR).
2.6
DC/DC Converter Module
Half Bridge GaN Integrated Planar 2.4
Power IC Transformer
Total Loss (W)
Lr Q12 Psr( NN )2.2
S1 Cr * *
S2 T2 *
Q11
2
Q22
*
* *
T3 *
1.8
Q21 1 2 3 4
NN
No. of SR Sets
Fig. 7 Total SR loss vs. No. of SR sets.
Fig. 6 LLC resonant converter with two transformers and two sets
of output.
III. INTEGRATED MAGNETIC DESIGN
To handle the high output current, paralleling output is
The matrix transformer proves to be a promising
required to reduce the conduction loss. To determine the
solution for PCB-based planar transformer. By dividing the
optimal number of output sets, losses need to be evaluated
transformer into smaller parts, the number of turns for each
with different number of output sets.
part is reduced. Additionally, with a carefully arranged flux
cancellation strategy, the core loss is effectively managed.
𝑃𝑑𝑟 = 𝑄𝑔 𝑉𝑔𝑠 𝑓𝑠𝑤 (1)
One challenge of the high frequency magnetic design is
the strong AC effect in the windings, including the skin
2
𝑃𝑐𝑜𝑛𝑑 = 𝑅𝑑𝑠𝑜𝑛 (𝑇) × 𝐼𝑟𝑚𝑠 (2) effect and the proximity effect, which can results to
unevenly distributed current density. To mitigate this issue,
interleaving between the primary and secondary windings
𝑃3𝑟𝑑 = 𝑉𝑓 𝐼𝑓 𝑡3𝑟𝑑 × 𝑓𝑠𝑤 (3) needs to be adopted, to help minimize the high frequency
AC related winding loss.
Eq. (1), Eq. (2) and Eq. (4) represent the driving loss,
conduction loss and the third quadrant conduction loss of A. PCB based Matrix Transformer with Resonant
the SR respectively, where Inductor Integration
Qg is the total gate charge of the SR, Building upon the matrix transformer concept, we
propose a planar transformer structure, depicted in Fig. 8.
Vgs is the gate driving voltage, The blue line and red line denote the primary and secondary
fsw is the switching frequency, windings respectively. Fig. 9 shows the equivalent
reluctance model of the proposed magnetic structure, where
Rdson(T) is the on resistance scaled with temperature
Np11 and Np12 refer to the primary windings on the smaller
Irms is the RMS current flowing through the SR, core posts (Post R), Np21, Np22, Ns1 and Ns2 correspond to the
primary and secondary windings on the larger core posts
Vf, If and t3rd are the forward voltage drop, current
(Post T). Furthermore, Rg1 and Rg2 represent the magnetic
flowing the body diode and the time duration.
reluctance of the air gap on Post T and Post R, and Rc1 – Rc3
From these equations, we can see that driving loss and stand for the magnetic reluctance of the core. In this
third quadrant conduction loss is related to switching proposed design, Np11, Np12, Np21 and Np22 are in series while
frequency while conduction loss is related to output power. Ns1 and Ns2 are in parallel.
show this excellent feature, in which the flux density of core
plate is distributed across the whole plate and therefore
R becomes much lower. As a result, not only is the core loss
significantly reduced, but a much lower profile is achieved
R
by reducing the thickness of the plates.
T
B (mT)
T
Fig. 8 Proposed matrix transformer structure with integrated
resonant inductor.
Rc2 Rc2
Rc3
Rc2 Fig. 10 Flux density distribution using 3D FEA with eddy current
Rc3
solver.
Rc2 Np12ip
Np11ip
Np21ip C. Winding Loss Analysis
Np22ip
The secondary side current distribution in the
Ns1is
Rc1 transformer part is shown in Fig. 11. At one time, only one
Rc1 Ns2is
Rg2 Rg2 set of secondary winding is conducting current due to the
Rg1 Rg1 center-tap configuration, and from the simulation results,
Rc2
we can see that current is distributed relatively evenly in
Rc2 Rc3 Rc2
Rc3 second windings. But still there is some current crowding at
Rc2
the terminations.
Fig. 9 Equivalent reluctance model of the proposed magnetic
structure.
Based on the magnetic reluctance model, we can
calculate the resonant inductance and magnetizing
inductance, as shown in Eq. (4) and Eq. (5). From these
simplified equations, we can see that by adjusting airgap of
Post R and Post T, resonant inductance (leakage inductance
in this proposed integrated magnetic structure) and
magnetizing inductance can be independently changed. It is
clear that Post R contributes to the resonant inductor and
Post T contributes to the magnetizing inductor.
2
2 +19𝑅 𝑅 +4𝑅 2 )
(24𝑅𝑔2 𝑐 𝑔2 𝑐 Fig. 11 Current density distribution in transformer winding
𝐿𝑟 = 𝑁𝑝11 (4) (secondary side) when secondary current at its peak
2𝑅𝑔2 (2𝑅𝑔2 +𝑅𝑐 )(3𝑅𝑔2 +𝑅𝑐 )
The primary side current distribution in the transformer
2
2 +19𝑅 𝑅 +4𝑅 2 )
(24𝑅𝑔1 𝑐 𝑔1 𝑐 and inductor part is shown in Fig. 12. It shows that the
𝐿𝑚 = 𝑁𝑝21 (5)
2𝑅𝑔1 (2𝑅𝑔1 +𝑅𝑐 )(3𝑅𝑔1 +𝑅𝑐 ) current distribution in the transformer part is still good while
in the inductor part, due to the lack of interleaving, there is
B. Core Loss Analysis some current crowding.
Another benefit of this structure is the significantly
lower flux density in the core plate compared to the
conventional matrix transformer [10], as demonstrated in
Fig. 8. The flux not only flows in the center post (Post R and
T), but also to the side posts, effectively redistributing the
flux in the core plate. The 3D FEA results in Fig. 10 also
the secondary side (creepage distance > 7 mm), which
makes sure that the prototype is good for practical
applications.
An aux power supply winding is also built into the
transformer, with the output voltage of 20V, it is efficient to
supply most of the commercial controller ICs.
The footprint of the prototype is 62.5 x 37.2 with a
maximum thickness of only 8 mm.
Half bridge SR
GaN power IC
SR controller
Fig. 12 Current density distribution in transformer and inductor
winding (primary side) when secondary current at its peak
Fig. 13 Hardware prototype of the 400 W high density DC/DC
Winding loss distribution at 400 W is also simulated module with integrated magnetic and GaN power IC.
using 3D FEA with eddy current solver. Totally 8-layer
PCB is used, and the results are presented in Table 1, with The designed transformer parameters of the lab
separated transformer loss and inductor loss in each layer. prototype are shown in Table 2. Magnetizing inductance is
designed to have full ZVS at full load and 400 VDC input.
Table 1 Winding loss distribution using 3D FEA with eddy current
Resonant inductance (integrated as leakage inductance) is
solver. designed with Lm/Lr ratio equals to 13 to have good
Transformer Inductor regulation capability as well as system efficiency. The
L1 (S) 0.273W 0 number of turns is determined by flux density inside the
L2 (S) 0.354W 0 core.
L3 0.218W 0.013W
The prototype is tested at 500 kHz switching frequency
L4 (P) 0.768W 0.349W
L5 (P) 0.774W 0.455W with up to 400 W output power. The key operation
L6 0.236W 0.049W waveforms at full load are shown in Fig. 14. ZVS is
L7 (S) 0.417W 0 achieved and the waveforms are very clean.
L8 (S) 0.576W 0
Sum 3.616W 0.867W
Table 2 Designed magnetic parameters.
From the simulation results, we can see that transformer
loss dominates even at full load condition, due to the large Parameters Value
secondary side current. Np11 = Np12 3
Np21 = Np22 8
Ns 2
IV. EXPERIMENTAL RESULTS Turns Ratio 8:1
Based on the previous designed system structure and Lr 9 uH
proposed integrated magnetic, a 400 VDC to 24 VDC, 400 Lm 128 uH
W DC/DC converter module hardware prototype is built in
the lab, as shown in Fig. 13. Half-bridge GaN power IC
NV6247 [14] is integrated into the module, along with the
resonant capacitor, output SR and output capacitors. As a
result, the module only requires PWM signal and power rail
input to operate.
In addition, all safety requirements are considered,
especially the reinforced isolation between the primary and
SRIC: 98.5°C GaN IC: 81.5°C Core: 81.4°C
Vpwm(10V/div) Vds(100V/div) Ir 2A/div) SR1: 90.4°C SR2: 89.6°C
Fig. 14 steady state working waveform of the DC/DC module full Fig. 16 Thermal performance of the DC/DC converter at 300 W
load (400 W) under national convection and without any thermal management.
The tested efficiency and total system loss are shown in
Fig. 15. A peak efficiency of 98.1% is achieved at around V. CONCLUSIONS AND FUTURE WORK
200 W. In addition, from 180 W to 270 W, the efficiency of This paper presents the design of a 400 VDC to 24 VDC
the DC/DC module stays above 98%. Within 350 W of 400 W DC/DC converter module serving as the second
output power, the total system loss stays below 10 W stage of the power supply in gaming laptop, portable
(including aux power supply loss). workstation, all-in-one computer, smart display, and large
screen OLED TVs. The incorporation of a half-bridge GaN
99.0% 16
power IC enables a significant reduction in the number of
14
98.0% components and footprint required. Moreover, the
12
97.0% implementation of a planar transformer with integrated
Total Efficiency
Total Loss (W)
10
resonant inductor further reduces the converter's size. The
96.0% 8
hardware prototype, with only 8 mm in thickness, achieved
6 a peak efficiency of 98.1%, with a power density of 21.5
95.0%
4 kW/L (62.5 x 37.2 x 8 mm). It worked well under natural
94.0%
2 convection with 300 W output power and can carry 400 W
93.0% 0 load once additional thermal management is implemented.
0 100 200 300 400 500
Output Power (W)
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