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ISSUE: April 2010

Why Struggle with Loop Compensation?

by Michael O’Loughlin, Texas Instruments, Dallas, TX

In the power supply design industry, engineers sometimes have trouble compensating the control loop for their
power supply. They try to get the loop to cross over at a very high switching frequency in an attempt to
improve large-signal transient response, only to end up struggling with stability issues. One of the most popular
control methods in power supply design is peak current-mode control. Even though this method is supposed to
be easier to compensate than voltage-mode control, some power supply designers still struggle with
compensating the voltage loop. The purpose of this article is to give some pointers that will, hopefully, make
compensating the voltage loop in peak current-mode control easier.

Control Blocks In A Power Supply

When we studied control theory back in university, all control systems could be simplified by transfer function
blocks. The voltage control loop in a peak current-mode-controlled power converter is no different. The voltage
loop (TV(f)) can be simplified and represented as the product of two different transfer blocks (Figure 1).

The first transfer block is the power-stage control-to-output transfer function (GCO(f)), which can be described
as the ratio of the change (∆VOUT) in output voltage over the change in control voltage (∆VC). Note that this
block is actually the combination of the pulse width modulation (PWM) modulator gain (K) and the power supply
output filter gain (GF(f)). The second transfer block is generally the output-to-control transfer function (GC(f)),
sometimes referred to as the compensation transfer function, which can be described as ratio ∆VC over the
change in ∆VOUT. If an optoisolator is used, it will have a transfer function block as well GOPTO(f) that would be
found on the line between blocks K and –GC(f) blocks.

VIN

GCO(f)=(K)(GF(f))

VOUT

K GF(f)

TV(f)=(GCO(f))(-GC(f))

Vc
-GC(f)

Fig. 1. Simplified block diagram of power supply voltage loop.

Figure 2 shows the functional schematic of a peak current-mode-control forward converter represented by the
block diagram in Figure 1. The control blocks are separated by dashed lines.

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Figure 2. Simplified block diagram of power supply voltage loop.

Originally, the idea behind peak current-mode control was to control the average current through the inductor
of the power stage, making it look like a current source by removing the double pole that occurs between the
interaction of the output capacitor (COUT) and the power stage’s inductor (LOUT). A control block diagram of this
model is presented in Figure 3.

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Figure 3. Modeling the inductor as a current source in a peak current-mode-controlled converter.

A simplified control-to-output transfer function (GCO(f)) for Figure 2 is presented below. In this equation, a is
the transformer’s turns ratio, RLOAD is the converter’s output load impedance, COUT is the converter’s output filter
capacitance, and RESR is COUT’s equivalent series resistance. Another term, S(f), is the angular velocity as a
function of frequency.

S ( f ) = 2π × j × f

From the control-to-output transfer function (GCO(f)), you will see that there is a zero (fZCO) that occurs between
the interaction of COUT and RESR and a pole (fPCO) that occurs between the interaction of RLOAD and COUT.

ΔVOUT a× R LOAD ( S ( f ) × R ESR × COUT + 1)

G CO ( f ) = =
ΔVC R SENSE ( S ( f ) × R LOAD × COUT + 1)

1
f ZCO =
2π × COUT × RESR

1
f PCO =
2π × COUT × RLOAD

Over time, engineers using peak current-mode control discovered there was a double pole (fPP) in GCO(f) that
occurs at roughly half the switching frequency (fS). The following equations describe the GCO(f) of a peak

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current-mode-controlled forward converter that includes the effects of fPP. Note that if you analyze the forward
converter with a network analyzer, you will find this transfer function does not exactly match what the model
describes.

The zero (FZCO) that occurs because of the interaction of RESR and COUT moves with load. The fPP happens at
slightly more than half the switching frequency. How will you ever compensate the voltage loop without an
accurate model? You can do what engineers have been doing for years: Compensate the voltage loop by using a
network analyzer to measure GCO(f) and then follow a few simple rules for stability that will be presented in this
article.

fS
f PP ≈
2

ΔVOUT a × R LOAD (S(f) × R ESR × COUT + 1) 1

Gco(f) = = ×
ΔVC R SENSE (S(f) × R LOAD × COUT + 1) S(f)  S(f) 
2

1+ + 
2π × f pp  2π × f pp 

Slope Compensation
It was discovered that in a peak current-mode-control converter there could be subharmonic oscillations caused
by sudden changes in duty cycle. This is because changes in duty cycle cause errors in the average output
current (IOUT1, IOUT2) due to the control voltage (VC) not being able to correct for the changes in duty cycle fast
enough. To correct for this error a technique called slope compensation was developed. This technique adds a
triangular voltage waveform to the current-sense signal (V2=VSLOPE+VRSENSE) that forces the average output
current to not change drastically with sudden changes in duty cycle. Refer to Figure 4 for details.

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Figure 4. Slope compensation is needed for stability.

One of the most important steps in setting up the control loop for peak current-mode control is correctly adding
slope compensation to the current-sense signal (VRSENSE). If you do not use slope compensation, you will be
fighting subharmonic oscillation, even though your network analyzer is telling you that the loop should be
stable. If you add too much slope compensation, the converter will operate in voltage-mode control and not
operate correctly, and may be unpredictable.

As a general rule to help ensure stability, the amount of slope compensation (VSLOPE) added to the current-sense
signal should be equal to half the down slope of the output inductor current (dILOUT). The following equations
calculate the slope compensation (VSLOPE) for the peak current-mode-controlled forward converter presented in
Figure 2. In these equations, dILOUT is the change in inductor ripple current and VOUT is the output voltage. LOUT
is the output filter inductance and D is the converter’s duty cycle. Variable fs is the converter’s switching
frequency.

VOUT × dt VOUT (1 − D )
dI LOUT = =
LOUT LOUT × fs

If a transformer is used in your design, the magnetizing current (dILM) in the primary of the transformer caused
by the magnetizing inductance of the primary (LM) will add some slope compensation and needs to be
accounted for when adding slope compensation. To ensure that the converter is not operating in voltage-mode

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control, it is recommended that you choose a transformer for your design with a dILM that is less than half the
reflected down slope (dILOUT) of the output inductor current. The following equations can be used for selecting
the correct amount of slope compensation for the forward converter presented in Figures 1 and 2.

VIN × dt VIN (D )
dI LM = =
LM LM × fs

dILOUT × 0.5
dI LM ≤
a

 dILOUT 
VSLOPE =  − dILm  × RSENSE
 2× a 
General Rules For Stability
In the power supply control loop (TV(f)), when the loop is 180 degrees out of phase, this is equivalent to
swapping the polarities of the inputs of an operational amplifier used in the feedback network (GC(f)). If this
occurs at the voltage-loop crossover when the feedback loop has a gain of one, the loop could become unstable
and break into oscillations. To ensure this does not occur, we generally design TV(f) for 45 degrees of phase
margin (PM) at voltage-loop crossover.

In most switch-mode power supplies, the control loop will eventually approach a 180-degree phase shift. To
ensure this does not cause loop instability, we generally design for greater than 6 dB of gain margin (GM) to
ensure the control signal is attenuated when TV(f) is 180 degrees out of phase. When evaluating the control
loop (TV(f)) the phase margin can be read as the magnitude of phase during crossover. The gain margin is
calculated in the traditional way, 0 dB minus the gain in dB when the loop is 180 degrees out of phase. The gain
and phase margin rule is a staple in good control-loop design. This rule is summarized below.

1. Set PM ≥ 45 degrees at voltage-loop crossover, which is defined as the frequency where the magnitude
of the loop gain (TV(f)) = 1 (i.e. 0 dB).

2. Set GM > 6 dB, where GM is defined as 0 dB – gain@180 DEGREE PHASE SHIFT.

Where Should My Voltage-Loop Crossover Be For TV(f)?

According to Nyquist, for voltage-loop stability, the crossover frequency (fc) needs to be less than half the
converter’s switching frequency (fs).

fS
3. fC <
2
In peak current-mode control, the voltage loop should be crossed over a decade before the double pole that
occurs in GCO(f). Depending on the topology used, this double pole may occur at less than half the switching
frequency. Using a network analyzer allows the designer to know exactly where the double pole occurs.

f PP
4. fC <
10
Measure GCO(f) With A Network Analyzer
Even if you have a good model of your control-to-output transfer function, you will end up modifying the control
loop based on measured results from a network analyzer. It is easier to compensate the voltage by initially
using the voltage amplifier network (GC(f)) as an integrator and measure the actual GCO(f) characteristics. This
can be accomplished by setting capacitor CP in Figures 1 and 2 to 1 µF to measure GCO(f) and not populating RF
and CZ. The loop will not be optimized and the input voltage and load currents should be adjusted slowly to
avoid oscillations.

The following two plots (Figures 5 and 6) show the measured gain and phase of a 600-W peak current-mode
controlled, phase-shifted, full-bridge converter using TI’s UCC28950 secondary-side controller. This controller

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does not require an optoisolator and a standalone voltage feedback amplifier (TL431), making the voltage loop
easier to compensate.

Figure 5. Control-to-output gain GCO(f) in dB.

Figure 6. Control-to-output phase GCO(f) in degrees.

The GCO(f) is more complicated than what is defined above and you could spend hours deriving a transfer
function that closely models the measured results. However, it is not necessary to compensate the loop once
the actual frequency response data is obtained with a network analyzer. From the plots below it can be
observed that the low-frequency pole (fPCO) from the interaction of COUT and RLOAD changes frequency with
changes in output power. The zero in GCO(f) that is caused by the interaction of COUT and RESR also moves with
load. The fPP of GCO(f) for this converter occurs at roughly 60 kHz. Note that GCO(f) should be set up to cross the
voltage loop (TV(f)) a decade before this double pole at roughly 6 kHz.

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f PP 60kHz
fC < = = 6kHz
10 10
To set up GC(f) requires knowing the highest gain of GCO(fC) at crossover. From the measured GCO(f) this occurs
at the 60-W load and is roughly -10 dB.

GCO ( f C ) ≈ −10dB
Setting Up The Voltage Amplifier (GC(f))
One of the more popular compensation techniques for peak current-mode control is a type-two compensator
that is presented in Figures 2 and 3. The following equation describes the transfer function. It has a pole that
occurs at the origin. The type-two amplifier also has a zero (fZ) that can be programmed by selecting RF and CZ
values. Additionally, the type-two compensation network has a pole (fP) that can be programmed by selecting
RF and CP.

ΔVC 1 (S(f) × R F × C Z + 1)
Gc(f) = =
ΔVVOUT S(f )(C Z + C P ) × R I  C × CZ 
 S(f) × R F × P + 1
 CZ + CP 
1
fZ =
2π × R F × C Z
1
fP =
C P × CZ
2π × R F ×
CZ + CP
Resistor RI and RA are selected based on dc output voltage and resistor RF is set at loop crossover to correct for
the gain at GCO(fc). In this power converter, RI was selected to be 9.09 kΩ. To cross over the voltage loop at
roughly 6 kHz required an RF resistor of 28.7 kΩ.

− GCO ( f C ) − ( −10 dB )
R F = RI × 10 20
= 9.09k × 10 20
≈ 28.7 k
Capacitor CZ is set to give added phase margin at crossover and can be set a decade below the crossover
frequency (fC).

1
Cz = = 9.2nF
fc
2π × × Rf
10
For this design a standard capacitor value of 10 nF was used for CZ.

Cz = 10nF
This leaves one pole in the GC(f) feedback that is used to cancel the phase gain caused by the ESR of the output
capacitor in GCO(f) after fC. This helps maintain stability, ensuring the gain continues to roll off after voltage-
loop crossover.

f C > f P < f PP

To ensure the gain roles off before the double-pole frequency, set the pole frequency of the compensator at
twice the crossover frequency. To compensate this voltage loop, a standard 470-pF capacitor for CP is used.

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f P = 2 × f C = 12kHz

1
CP = ≈ 460 pF
2π × Rf × f P

A standard capacitor of 470 pF was used for CP.

C P = 470 pF

After selecting the compensation components for GC(f), double check the voltage loop with a network analyzer
and adjust it if needed. The plots in Figures 7 and 8 were taken with a network analyzer to measure the voltage
loop TV(f) at 60 W and 600 W. These plots show that the voltage loops crossed over (fC) at roughly 3.8 kHz at
600-W load with a phase margin at crossover of 110 degrees. At a 60-W load TV(f) crossed over at roughly 5
kHz with greater than 45 degrees of phase margin at fC.

The voltage loop at 10 percent load crossed over at 1 kHz less than the design target. However, loop
compensation is not an exact science and being within 1 to 2 kHz is quite acceptable. Note that the gain was
less than -30 dB as the phase of TV(f) approached 180 degrees. This yields a gain margin of greater than 6 dB.
The network analyzer always has problems measuring -180 degrees. It cannot determine whether the phase is
±180 degrees.

Figure 7. TV(f) loop gain in dB.

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Figure 8. TV(f) loop phase in degrees.

Misconception
Speeding up the small-signal voltage loop TV(f) reduces the output capacitor bank. Remember there is an
inductance in most switched-mode power supplies somewhere that will resist sudden changes in current. Large-
signal current transients pass through COUT and the COUT’s RESR. To meet large-signal transient specifications
requires selecting COUT and RESR to hold up and suppress large-current load transients.

The following equations should be useful in selecting the output filter capacitance required for the design.
Variable ITRANSIENT is the large-signal instantaneous current load step, and variable dt is the amount of time the
output capacitance is expected to suppress the large-signal transients. Variable IAVERAGE is the average current
after the load step.

Worst case would be stepping from no-load to full-load conditions. These equations place 90 percent of the
load-transient burden on the RESR and 10 percent on COUT.

VTRANSIENT × 0.9 I × dt
RESR = , COUT = AVERAGE
I TRANSIENT VTRANSIENT × 0.1

Conclusion
Over the years I have compensated many peak current-mode control voltage loops in power supplies. In the
beginning, I struggled to get the control loops to cross over at much higher switching frequencies than
necessary, only to have the loop become unstable due to the converter’s double-pole frequency. The techniques
presented in this paper for compensating these voltage loops saved me a lot of time and effort. I hope these
techniques will provide the same benefits to you as well.

Reference:
Unitrode SEM 300, Topic 1, “Current-Mode Control of Switching Power Supplies,” Lloyd H. Dixon, Jr, 1984.

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About the Author

Michael O'Loughlin is an applications engineer with the Power Supply Control
Products group at Texas Instruments. He specializes in offline and isolated power
supply design and has authored numerous articles on power factor correction and
power supply design related topics. Michael received his Bachelor of Science degree
from the University of Massachusetts. Michael can be reached at
[email protected].

For further reading on loop compensation, see the How2Power Design Guide, search the Design Area category
and select Control Methods as the subcategory. To narrow your search, try entering keywords such as “control
loop,” “stability,” or “compensation.”

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