Key Characteristics of Computer Memory
Systems
Table 4.1 Key Characteristics of Computer Memory Systems
Characteristics of Memory Systems
• Location
• Refers to whether memory is internal and external to the computer
• Internal memory is often equated with main memory
• Processor requires its own local memory, in the form of registers
• Cache is another form of internal memory
• External memory consists of peripheral storage devices that are accessible to
the processor via I/O controllers
• Capacity
• Memory is typically expressed in terms of bytes
• Unit of transfer
• For internal memory the unit of transfer is equal to the number of electrical
lines into and out of the memory module
Method of Accessing Units of Data
Sequential Direct Random
Associative
access access access
Each addressable location in
A word is retrieved based on
Memory is organized into Involves a shared read-write memory has a unique,
a portion of its contents
units of data called records mechanism physically wired-in
rather than its address
addressing mechanism
Each location has its own
The time to access a given
Individual blocks or records addressing mechanism and
Access must be made in a location is independent of
have a unique address based retrieval time is constant
specific linear sequence the sequence of prior
on physical location independent of location or
accesses and is constant
prior access patterns
Any location can be selected
Cache memories may
Access time is variable Access time is variable at random and directly
employ associative access
addressed and accessed
Main memory and some
cache systems are random
access
Capacity and Performance:
The two most important characteristics of memory
Three performance parameters are used:
Memory cycle time
Access time (latency) Transfer rate
•Access time plus any additional time
• For random-access memory it is the required before second access can • The rate at which data can be
time it takes to perform a read or commence transferred into or out of a memory
write operation •Additional time may be required for unit
• For non-random-access memory it transients to die out on signal lines or to • For random-access memory it is
is the time it takes to position the regenerate data if they are read equal to 1/(cycle time)
destructively
read-write mechanism at the
desired location •Concerned with the system bus, not the
processor
Memory
• The most common forms are:
• Semiconductor memory
• Magnetic surface memory
• Optical
• Magneto-optical
• Several physical characteristics of data storage are important:
• Volatile memory
• Information decays naturally or is lost when electrical power is switched off
• Nonvolatile memory
• Once recorded, information remains without deterioration until deliberately changed
• No electrical power is needed to retain information
• Magnetic-surface memories
• Are nonvolatile
• Semiconductor memory
• May be either volatile or nonvolatile
• Nonerasable memory
• Cannot be altered, except by destroying the storage unit
• Semiconductor memory of this type is known as read-only memory (ROM)
• For random-access memory the organization is a key design issue
• Organization refers to the physical arrangement of bits to form words
Memory Hierarchy
• Design constraints on a computer’s memory can be summed up
by three questions:
• How much, how fast, how expensive
• There is a trade-off among capacity, access time, and cost
• Faster access time, greater cost per bit
• Greater capacity, smaller cost per bit
• Greater capacity, slower access time
• The way out of the memory dilemma is not to rely on a single
memory component or technology, but to employ a memory
hierarchy
Memory Hierarchy - Diagram
Cache and Main Memory
Cache/Main Memory Structure
Cache Read Operation
Typical Cache Organization
Elements of Cache Design
Table 4.2 Elements of Cache Design
Cache Addresses
Virtual Memory
• Virtual memory
• Facility that allows programs to address memory from a logical point of
view, without regard to the amount of main memory physically available
• When used, the address fields of machine instructions contain virtual
addresses
• For reads to and writes from main memory, a hardware memory
management unit (MMU) translates each virtual address into a physical
address in main memory
Logical
and
Physical
Caches
Table 4.3
Cache Sizes of
Some
Processors
aTwo values
separated by a slash
refer to instruction
and data caches.
b Both caches are
instruction only; no
data caches.
Mapping Function
• Because there are fewer cache lines than main memory blocks, an
algorithm is needed for mapping main memory blocks into cache
lines
• Three techniques can be used:
Direct Associative Set Associative
• The simplest technique • Permits each main memory • A compromise that exhibits
• Maps each block of main block to be loaded into any the strengths of both the
memory into only one line of the cache direct and associative
possible cache line approaches while reducing
• The cache control logic their disadvantages
interprets a memory address
simply as a Tag and a Word
field
• To determine whether a
block is in the cache, the
cache control logic must
simultaneously examine
every line’s Tag for a match
Direct
Mapping
Direct Mapping Cache Organization
Textbook:
Computer Organization and Architecture:
Designing for Performance, Ninth Edition, by
William Stallings, 2013