Module – 2
Basic Electronics
Engineering
By
Venkata Sridhar. T M.Tech, PhD, FIETE
Assistant Professor of ETC.
IIIT-Bhubaneswar.
Overview & Introduction
During the period 1904 to1947, the vacuum tube was the electronic
device of interest and development. In 1904, the vacuum-tube diode was
introduced by J. A. Fleming. Shortly thereafter, in 1906, Lee De Forest
added a third element, called the control grid, to the vacuum diode,
resulting in the first amplifier, the triode.
On December 23, 1947, however, the electronics industry was to
experience the advent of a completely new direction of interest and
development. It was on the afternoon of this day that Dr. S. William
Shockley, Walter H. Brattain, and John Bardeen demonstrated the
amplifying action of the first transistor at the Bell Telephone
Laboratories as shown in Fig. 1. The original transistor (a point-contact
transistor) is shown in Fig. 2.
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Overview & Introduction
A transistor is a fundamental semiconductor device that
amplifies or switches electronic signals and electrical power
or a processing element circuit builder, logic builder in
digital/analog,. It is a crucial building block for modern
electronics, from small-scale applications to large-scale
applications.
A large computer processor is made with a huge arrangement
of the transistors logically. (In computers, TVs, hearing aids, cell phones, and more)
They are : BJTs NPN, PNP
FETs JFET, MoSFET (Enhancement, Depletion
(n-channel/p-ch))
CMOS, BiCMoS, FINFET, Floating Transistors,
etc..
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Syllabus : Module-2
The Transistors:
12 Hrs
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Transistor Construction (Manufacturing)
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BJT: Bipolar Junction Transisor
The transistor is a three-layer semiconductor device consisting of
either two n- and one p-type layers of material or two p- and one
n-type layers of material. The former is called an npn transistor,
and the latter is called a pnp transistor. Both are shown in Fig. 3
with the proper dc biasing.
The dc biasing is necessary to establish the proper region of
operation for ac amplification. The emitter layer is heavily
doped, with the base and collector only lightly doped.
The outer layers have widths much greater than the
sandwiched p- or n-type material.
or the transistors shown in Fig. 2 the ratio of the By
total width ,to
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The doping of the sandwiched layer is also considerably less
than that of the outer layers (typically, 1:10 or less).
This lower doping level decreases the conductivity (increases
the resistance) of this material by limiting the number of “free”
carriers.
For the biasing shown in Fig. 3 the terminals have been indicated by the capital
letters E for emitter, C for collector, and B for base.
An appreciation for this choice of notation will develop when we discuss the
basic operation of the transistor.
The abbreviation BJT, from bipolar junction transistor, is often applied to this
three-terminal device.
The term bipolar reflects the fact that holes and electrons participate in the
injection process into the oppositely polarized material.
If only one carrier is employed (electron or hole), it is considered a unipolar
device. The Schottky diode is such a device (UJT). By T.VenkataSridhar , ETC
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The basic operation of the transistor will now be described using
the pnp transistor of Fig. 3a.
The operation of the npn transistor is exactly the same if the
roles played by the electron and hole are interchanged.
In Fig. 4a the pnp transistor has been redrawn without the base-
to-collector bias.
The depletion region has been reduced in width due to the
applied bias, resulting in a heavy flow of majority carriers from
the p- to the n-type material.
Let us now remove the base-to-emitter bias of the pnp transistor
of Fig. 3a as shown in Fig. 4b.
Consider the similarities between this situation and that of the
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In summary, therefore : In Fig. 5 both biasing potentials have
been applied to a pnp transistor, with the resulting majority-
and minority-carrier flows indicated.
Note in Fig. 5 the widths of the depletion regions, indicating
clearly which junction is forward-biased and which is reverse-
biased.
As indicated in Fig. 5, a large number of majority carriers will
diffuse across the forward biased p–n junction into the n-type
material.
The question then is whether these carriers will contribute
directly to the base current IB or pass directly into the p-type
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The magnitude of the base current is typically on the order of
microamperes, as compared to milliamperes for the emitter
and collector currents.
The larger number of these majority carriers will diffuse across
the reverse-biased junction into the p-type material connected
to the collector terminal as indicated in Fig. 5.
Combining this with the fact that all the minority carriers in the
depletion region will cross the reverse-biased junction of a
diode accounts for the flow indicated in Fig. 5.
Applying Kirchhoff’s current law to the transistor of Fig. 5 as if
it were a single node, we obtain
and find that the emitter current is the sum of the collector and base currents.
The collector current, however, comprises two components—the majority and
the minority carriers as indicated in Fig. 5.
The minority-current component is called the leakage current and is given the
symbol ICO (IC current with emitter terminal Open). The collector current,
therefore, is determined in total by
(For general-purpose transistors, I C is measured in milliamperes and I CO is measured in microamperes or nanoamperes.)
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Transistor as a Switch: On switch: Saturation
region,
EB-Junction FB, CB-Junction
FB
OFF Switch :Cut-off
EB-Junction RB, CB-Junction
RB
as an Amplifier: Active Region.
EB-Junction FB, CB-Junction
RB
As the BJT is a three-terminal device, it can be operated by
making any of the terminal common for both input and output.
Like,
1
Common Base (CB), Base terminal is common E- i/p and C o/p, ETC
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BJT transistor symbols and Device
identification.
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• The notation and symbols used in conjunction with the
transistor in the majority of texts and manuals published today
are indicated in Fig. 6 for the common-base configuration with
pnp and npn transistors.
• The common-base terminology is derived from the fact that the
base is common to both the input and output sides of the
configuration.
• In addition, the base is usually the terminal closest to, or at,
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BJT CB Operation
All the current directions appearing in Fig. 6 are the actual
directions as defined by the choice of conventional flow.
Note in each case that I = I + I . Note also that the applied
E C B
biasing (voltage sources) are such as to establish current in the
direction indicated for each branch.
That is, compare the direction of I to the polarity of V for each
E EE
configuration and the direction of I to the polarity of V .
C CC
BJT VI Characteristics
To fully describe the behavior of a
three-terminal device such as the
common-base amplifiers of Fig. 6
requires two sets of
characteristics—one for the
driving point or input
parameters and the other for the
output side.
The input set for the common-
base amplifier as shown in Fig. 7
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The output set relates an output current (IC) to an output
voltage (VCB) for various levels of input current (IE) as shown in
Fig. 8.
The output or collector set of characteristics has three basic
regions of interest, as indicated in Fig. 8: the active, cutoff,
and saturation regions.
The active region is the region normally employed for linear
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• The active region is defined by the biasing
arrangements of Fig. 6. At the lower end of
the active region the emitter current (I ) is
E
zero, and the collector current is simply that
due to the reverse saturation current I , as
CO
indicated in Fig. 9. The current I is so small
CO
(microamperes) in magnitude compared to
the vertical scale of I (milliamperes) that it
C
• appears
The circuitonconditions
virtually the
that same horizontal
exist when E I = 0 for the common-
line
baseasconfiguration
CI = 0. are shown in Fig. 9. The notation most
frequently used for I on data and specification sheets is, as
CO
indicated in Fig. 9, I (the collector-to-base current with the
CBO
• emitter
Note inleg
Fig.open).
8 that as the emitter current increases above zero,
the collector current increases to a magnitude essentially
equal to that of the emitter current as determined by the basic
transistor-current relations. Note also the almost negligible
effect of V on the collector current for the active region. The
CB
curves clearly indicate that a first approximation to the
relationship between I and I in the active region is given by
E C
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In the cutoff region the base–emitter and collector–base
junctions of a transistor are both reverse-biased.
In the saturation region the base–emitter and collector–
base junctions are forward-biased.
Once a transistor is in the “on” state, the base-to-emitter voltage will be
assumed to be the following: and the equivalent models are in fig. 10.
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The most frequently encountered transistor configuration
appears in Fig. 12 for the pnp and npn transistors.
It is called the common-emitter configuration because the
emitter is common to both the input and output terminals (in
this case common to both the base and collector terminals).
FIG 12:
Notation and symbols
used with the common-
emitter configuration:
(a) npn transistor;
(b) pnp transistor.
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Two sets of characteristics are again necessary to describe fully
the behavior of the common-emitter configuration: one for the
input or base–emitter circuit and one for the output or
collector–emitter circuit. Both are shown in Fig. 13.
In the active region of a common-emitter amplifier, the base–emitter junction is
forward-biased, whereas the collector–base junction is reverse-biased.
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The cutoff region for the common-
emitter configuration is not as well
defined as for the common-base
configuration. Note on the collector
characteristics of Fig. 14 that I is not
C
equal to zero when I is zero.
For the common-base configuration, when the input current I
B
E
was equal to zero, the collector current was equal only to the
reverse saturation current I , so that the curve I = 0 and the
CO E
voltage axis were, for all practical purposes, one.
The reason for this difference in collector characteristics can be
derived through the proper manipulation of Eqs. (3) and (6).
That is,
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The third and final transistor configuration is the common-
collector configuration, shown in Fig. 20 with the proper current
directions and voltage notation.
The common-collector configuration is used primarily for
impedance-matching purposes since it has a high input
impedance and low output impedance, opposite to that of the
common-base and commonemitter configurations.
Fig. 20
Notation and symbols
used with the common-
collector configuration:
(a) pnp transistor;
(b) npn transistor.
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A common-collector circuit configuration is provided in Fig. 21
with the load resistor connected from emitter to ground.
Note that the collector is tied to ground even though the
transistor is connected in a manner similar to the common-
emitter configuration.
From a design viewpoint, there is no need for a set of common-
collector characteristics to choose the parameters of the circuit
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Transistor Biasing
Transistor
Modeling
What is
Modeling
?
re model <
&
Hybrid model <
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Once the ac equivalent circuit is determined, the schematic
symbol for the device can be replaced by this equivalent circuit
and the basic methods of circuit analysis applied to determine
the desired quantities of the network.
In the formative years of transistor network analysis, the hybrid
equivalent network was employed the most frequently.
Specification sheets included the parameters in their listing,
and analysis was simply a matter of inserting the equivalent
circuit with the listed values.
The drawback to using this equivalent circuit, however, is that
it is defined for a set of operating conditions that might not
match the actual operating conditions. In most cases, this is not
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The field-effect transistor (FET) is a three-terminal device
used for a variety of applications that match, to a large
extent, those of the BJT transistor.
Although there are important differences between the two
types of devices, there are also many similarities, like,
The primary difference between the two types of transistors is
the fact that:
The BJT transistor is a current-controlled device as
depicted in Fig. 1a, whereas the JFET transistor is a
FET Classifications
voltage-controlled device, as shown in Fig. 1b.
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In other words, the current I in Fig. 1a is a direct function of
C
the level of I . For the FET, the current I will be a function of
B D
the voltage V applied to the input circuit, as shown in Fig. 1b.
GS
In each case, the current of the output circuit is controlled by a
parameter of the input circuit—in one case, a current level and
in the other, an applied voltage.
Just as there are npn and pnp bipolar transistors, there are n-
channel and p-channel field-effect transistors.
However, it is important to keep in mind that the BJT
transistor is a bipolar device—the prefix bi indicates that the
conduction level is a function of two charge carriers, electrons
and holes.
The FET is a unipolar device depending solely on either
electron (n-channel) or hole (p-channel) conduction.
The term field effect in the name deserves some explanation.
We are all familiar with the ability of a permanent magnet to
draw metal filings to itself without the need for actual contact.
The magnetic field of the permanent magnet envelopes the
filings and attracts them to the magnet along the shortest
path provided by the magnetic flux lines.
For the FET an electric field is established by the charges
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One of the most important characteristics of the FET is its high
input impedance.
At a level of 1 MΩ to several hundred megohms, it far exceeds
the typical input resistance levels of the BJT transistor
configurations—a very important characteristic in the design of
linear ac amplifier systems.
On the other hand, the BJT transistor has a much higher
sensitivity to changes in the applied signal.
Further, the variation in output current is typically a great deal
more for BJTs than for FETs for the same change in the applied
voltage.
For this reason:
Typical ac voltage gains for BJT amplifiers are a great deal
more than for FETs.
However, FETs are more temperature-stable than BJTs, and
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Construction:
The JFET is a three-terminal device with one terminal capable
of controlling the current between the other two.
For the JFET transistor, the n-channel device will be the
prominent one.
The basic construction of the n-channel JFET is shown in Fig. 3.
Note that the major part of the structure is the n-type material,
which forms the channel between the embedded layers of p-
type material.
The top of the n-type channel is connected through an ohmic
contact to a terminal referred to as the drain (D), whereas the
lower end of the same material is connected through an ohmic
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Operation:
In Fig. 5, a positive voltage VDS is applied across the channel, and the
gate is connected directly to the source to establish the condition V GS
= 0 V.
The result is a gate and a source terminal at the same potential and a
depletion region in the low end of each p-material similar to the
distribution of the no-bias conditions of Fig. 3.
The instant the voltage VDD (=VDS) is applied, the electrons are drawn
to the drain terminal, establishing the conventional current I D with the
defined direction of Fig. 5.
The path of charge flow clearly reveals that the drain and source
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The reason for the change in the width of the region is best described
through the help of Fig. 6. Assuming a uniform resistance in the n-
channel, we can break down.
The resistance of the channel into the divisions appears in Fig. 6. The
current ID will establish the voltage levels through the channel, as
indicated on the same figure.
The result is that the upper region of the p-type material will be
reverse-biased by about 1.5 V, with the lower region only reverse-
biased by 0.5 V.
As the voltage VDS is increased from 0 V to a few volts, the current will
increase as determined by Ohm’s law and the plot of ID versus VDS will
appear as shown in Fig. 7.
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The relative straightness of the plot reveals that for the region of low
values of VDS, the resistance is essentially constant.
As VDS increases and approaches a level referred to as VP in Fig. 7, the
depletion regions of Fig. 5 will widen, causing a noticeable reduction in
the channel width. The reduced path of conduction causes the
resistance to increase and the curve in the graph of Fig. 7 to occur.
If VDS is increased to a level where it appears that the two depletion
regions would “touch” as shown in Fig. 8, a condition referred to as
pinch-off will result.
The level of VDS that establishes this condition
is referred to as the pinch-off voltage and is
denoted by VP, as shown in Fig. 7. In actuality,
the term pinch-off is a misnomer in that it
suggests the current ID is pinched off and drops
to 0 A.
As shown in Fig. 7, however, this is hardly the
case— ID maintains a saturation level defined
as IDSS in Fig. 7. In reality, a very small channel
still exists, with a current of very high density.
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Example:
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The squared term in the
equation results in a nonlinear
relationship between I and V ,
D GS
producing a curve that grows
exponentially with a
decreasing magnitude of V . GS
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Other FETS (TBS)
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Fig. BiCMoS: Metal contacts are made through the cuts, and terminals
are named.
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End of Module-2 (As per the syllabus)
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Further Refer
Electronic Devices and Circuit Theory.
By
Robert L. Boylstad, Louis Nashelsky.
Electronic Devices and Circuits or
Integrated Electronics.
By
Jacob Millman, Christos C Halkias.
88
UP
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