Dr.

Ahmad Shabani Logic Design

BOOLEAN ALGEBRA AND LOGIC

GATES
Digital Logic Design
Ahmad Shabani
ah.shabani@ut.ac.ir
 Dr. Ahmad Shabani Digital Design 2

Main Book:

• Morris Mano, Digital Design With an

Introduction to the Verilog HDL, 5 Edition,
2011.
Overview
• Part 1 – Gate Circuits and Boolean Equations
• Binary Logic and Gates
• Boolean Algebra
• Standard Forms
• Part 2 – Circuit Optimization
• Two-Level Optimization
• Map Manipulation
• Multi-Level Circuit Optimization
• Part 3 – Additional Gates and Circuits
• Other Gate Types
• Exclusive-OR Operator and Gates
• High-Impedance Outputs

Chapter 2 - Part 1 3
Binary Logic and Gates
• Binary variables take on one of two values.
• Logical operators operate on binary values and binary
variables.
• Basic logical operators are the logic functions AND, OR
and NOT.
• Logic gates implement logic functions.
• Boolean Algebra: a useful mathematical system for
specifying and transforming logic functions.
• We study Boolean algebra as foundation for designing
and analyzing digital systems!

Chapter 2 - Part 1 4
Binary Variables
• Recall that the two binary values have different names:
• True/False
• On/Off
• Yes/No
• 1/0
• We use 1 and 0 to denote the two values.
• Variable identifier examples:
• A, B, y, z, or X1 for now
• RESET, START_IT, or ADD1 later

Chapter 2 - Part 1 5
Logical Operations
• The three basic logical operations are:

• AND

• OR

• NOT

• AND is denoted by a dot (·).

• OR is denoted by a plus (+).

• NOT is denoted by an overbar ( ¯ ), a single quote mark (') after,

or (~) before the variable.

Chapter 2 - Part 1 6
Switching Circuits

AND OR
Logic Function Implementation
• Using Switches Switches in parallel => OR
• For inputs:
• logic 1 is switch closed
• logic 0 is switch open
• For outputs:
• logic 1 is light on
• logic 0 is light off.
• NOT uses a switch such
that:
Switches in series => AND
• logic 1 is switch open
• logic 0 is switch closed

Normally-closed switch => NOT

C

Chapter 2 - Part 1 8
 Logic Function Implementation (Continued)

• Example: Logic Using Switches

B C
A

• Light is on (L = 1) for
L(A, B, C, D) =
and off (L = 0), otherwise.

• Useful model for relay circuits and for CMOS gate circuits, the
foundation of current digital logic technology

Chapter 2 - Part 1 9
Notation Examples

Y = A  B • Examples:
z = x+ y •
•
is read “Y is equal to A AND B.”
is read “z is equal to x OR y.”
X=A • is read “X is equal to NOT A.”

▪ Note: The statement:

1 + 1 = 2 (read “one plus one equals two”)
is not the same as
1 + 1 = 1 (read “1 or 1 equals 1”).

Chapter 2 - Part 1 10
Binary Logic
• Truth Tables, Boolean Expressions, and Logic Gates

AND OR NOT
x y z x y z x z
0 0 0 0 0 0 0 1
0 1 0 0 1 1 1 0
1 0 0 1 0 1
1 1 1 1 1 1

z=x•y=xy z=x+y z = x = x’

x x x
y z y z z
Binary Logic
 Logic gates
• Graphic Symbols and Input-Output Signals for Logic gates:

This is not what you see in

a real world when you
used oscilloscope. Why??

Input-Output signals for gates

Operator Definitions
▪ Operations are defined on the values "0" and "1"
for each operator:

AND OR NOT
0·0=0 0+0=0 0=1
0·1=0 0+1=1 1= 0
1·0=0 1+0=1
1·1=1 1+1=1

Chapter 2 - Part 1 13
Logic Gates

• In the earliest computers, switches were opened

and closed by magnetic fields produced by
energizing coils in relays. The switches in turn
opened and closed the current paths.

• Today, transistors are used as electronic switches

that open and close current paths.

Chapter 2 - Part 1 14
 15

BUILDING BLOCKS OF
MODERN COMPUTERS
 16

TRANSISTORS
 17

Transistors
◼ Computers are built from very large numbers of very
small (and relatively simple) structures: transistors
• Intel 4004, in 1971, had 2300 MOS transistors
Problem
• Intel’s Pentium IV microprocessor, 2000, was made up
of more than 42 Million MOS transistors Algorithm
• Apple’s M2 Max, offered for sale in 2022, is made up of Program/Language
more than 67 Billion MOS transistors Runtime System
(VM, OS, MM)
• This lecture ISA (Architecture)
• How the MOS transistor works (as a logic element) Microarchitecture
• How these transistors are connected to form logic gates Logic
Devices
Electrons
❑ How logic gates are interconnected to form larger units that
are needed to construct a computer
 18

MOS Transistor
• By combining
• Conductors (Metal)
• Insulators (Oxide) Gate
• Semiconductors Source Drain

• We get a Transistor (MOS)

• Why is this useful?

• We can combine many of these to realize simple logic gates
• The electrical properties of metal-oxide semiconductors are
well beyond the scope of what we want to understand in this
course
• They are below our lowest level of abstraction
 19

Different Types of MOS Transistors

• There are two types of MOS transistors: n-type and p-type

n-type p-type

• They both operate “logically,” very similar to the way wall switches work
 20

How Does a Transistor Work?

Wall Switch

Power Supply

• In order for the lamp to glow, electrons must flow

• In order for electrons to flow, there must be a closed circuit from the
power supply to the lamp and back to the power supply
• The lamp can be turned on and off by simply manipulating the wall
switch to make or break the closed circuit
 21

How Does a Transistor Work?

• Instead of the wall switch, we could use an n-type or a p-type MOS
transistor to make or break the closed circuit
Drain
If the gate of an n-type transistor is
supplied with a high voltage, the
Gate
connection from source to drain acts
like a piece of wire (i.e., the circuit is
Source closed)
Depending on the technology,
Schematic of an n-type high voltage can range from 0.3V to
MOS transistor
3V

If the gate of the n-type transistor is

supplied with zero voltage, the
connection between the source and
drain is broken (i.e., the circuit is
open)
How Does a Transistor Work?
• The n-type transistor in a circuit with a battery and a bulb

3
0 Volt
Gate

Power Supply
Shorthand notation
• The p-type transistor works in exactly the opposite fashion
from the n-type transistor
Drain Drain
The circuit is The circuit is
closed when the closed when the
Gate Gate gate is supplied
gate is supplied
with 3V p-type with 0V
n-type
Source Source 22
 23

LOGIC GATES
 24

One Level Higher in the Abstraction

• Now, we know how a MOS transistor works
• How do we build logic structures out of MOS transistors?
Problem
◼ We construct basic logical units out of Algorithm
individual MOS transistors Program/Language
Runtime System
(VM, OS, MM)
◼ These logical units are called logic gates
ISA (Architecture)
❑ They implement simple Boolean functions
Microarchitecture
Logic
Devices
Electrons

George Boole, “The Mathematical Analysis of Logic,” 1847.

Ahmad Shabani Computer 25
Architecture 25

Making Logic Blocks Using CMOS Technology

• Modern computers use both n-type and p-type transistors, i.e.

Complementary MOS (CMOS) technology
nMOS + pMOS = CMOS

• The simplest logic structure that exists in a modern computer

3V

p-type

In (A) Out (Y) What does this circuit do?

n-type

0V
Ahmad Shabani Computer 26
Architecture 26

Functionality of Our CMOS Circuit

What happens when the input is connected to 0V?

3V 3V
p-type transistor
pulls the output
0V Out (Y) Y = 3V up

0V 0V

p-type transistors are good at pulling up the voltage

 27

Functionality of Our CMOS Circuit

What happens when the input is connected to 3V?
3V 3V

A= 3V Out (Y) Y = 0V

n-type transistor
pulls the output
down
0V 0V

n-type transistors are good at pulling down the voltage

 28

CMOS NOT Gate (Inverter)

3V
• This is actually the CMOS NOT Gate
• Why do we call it NOT? P
• If A = 0V then Y = 3V
In (A) Out (Y)
• If A = 3V then Y = 0V
N
• Digital circuit: one possible interpretation
• Interpret 0V as logical (binary) 0 value
• Interpret 3V as logical (binary) 1 value 0V

A P N Y
0 ON OFF 1 𝑌 = 𝐴ҧ
1 OFF ON 0
 29

CMOS NOT Gate (Inverter)

3V
• This is actually the CMOS NOT Gate
• Why do we call it NOT? P
• If A = 0V then Y = 3V In (A) Out (Y)
• If A = 3V then Y = 0V N
• Digital circuit: one possible interpretation
• Interpret 0V as logical (binary) 0 value
NOT 0V
• Interpret 3V as logical (binary) 1 value

A
𝑌 =Y 𝐴ҧ
Truth table: shows what is the logical
A Y output of the circuit
Y = Afor each possible
input
We call this a NOT gate A Y
or an inverter 0 1
(bubble indicates 1 0
inversion)
Logic Diagrams and Expressions
Truth Table Equation
XYZ F = X + Y Z
000 0 F = X +Y Z
001 1
010 0 Logic Diagram
011 0 X
100 1
101 1 Y F
110 1 Z
111 1

• Boolean equations, truth tables and logic diagrams describe the same
function!

• Truth tables are unique; expressions and logic diagrams are not. This gives
flexibility in implementing functions.
Chapter 2 - Part 1 30
 31

BOOLEAN LOGIC EQUATIONS

Simple Equations: NOT / AND / OR
𝑨 𝑨
𝑨 (reads “not A”) is 1 iff A is 0
0 1
A 𝑨
1 0

A • B (reads “A and B”) is 1 iff A and B are both 1 𝑨 𝑩 𝑨•𝑩

0 0 0
A 0 1 0
A•B
B
1 0 0
1 1 1

A + B (reads “A or B”) is 1 iff either A or B is 1 𝑨 𝑩 𝑨+𝑩

0 0 0
A 0 1 1
A+B
B 1 0 1
1 1 1
32
 33

Boolean Algebra
Formal version English version
1. B contains at least two elements,
0 and 1, such that 0 ≠ 1 Math formality...

2. Closure a,b ∈ B, Result of AND, OR stays

(i) a + b ∈ B in set you start with
(ii) a • b ∈ B

3. Commutative Laws: a,b ∈ B, For primitive AND, OR of

(i) a + b = b + a 2 inputs, order doesn’t matter
(ii) a • b = b • a

4. Identities: 0, 1 ∈ B There are identity elements

(i) a + 0 = a for AND, OR, that give you back
(ii) a • 1 = a what you started with
5. Distributive Laws: • distributes over +, just like algebra
(i) a + (b • c) = (a + b) • (a + c)
…but + distributes over •, also (!!)
(ii) a • (b + c) = a • b + a • c

6. Complement:
(i) 𝐚 + 𝒂ഥ= 1 There is a complement element;
(ii) 𝐚 • 𝒂
ഥ=0 AND/ORing with it gives the identity elm.
 34

Boolean Algebra: Duality

• Observation
• All the axioms come in “dual” form
• Anything true for an expression also true for its dual
• So any derivation you could make that is true, can be flipped into dual form, and it
stays true

• Duality — More formally

• A dual of a Boolean expression is derived by replacing
• Every AND operation with... an OR operation
• Every OR operation with... an AND
• Every constant 1 with... a constant 0
• Every constant 0 with... a constant 1
• But don’t change any of the literals or play with the complements!
Example

a • (b + c) = (a • b) + (a • c)
➙ a + (b • c) = (a + b) • (a + c)
Dr. Ahmad Shabani Logic Design 35

Duality
• The principle of duality is an important concept. This says that if an
expression is valid in Boolean algebra, the dual of that expression
is also valid.
• To form the dual of an expression, replace all + operators with .
operators, all . operators with + operators, all ones with zeros, and
all zeros with ones.
• Form the dual of the expression
a + (bc) = (a + b)(a + c)
• Following the replacement rules…
a(b + c) = ab + ac
• Take care not to alter the location of the parentheses if they are
present.

February 11, 2024 35

 36

Boolean Algebra: Useful Laws

Dual
Operations with 0 and 1: AND, OR with identities
1. X + 0 = X 1D. X • 1 = X gives you back the original
2. X + 1 = 1 2D. X • 0 = 0 variable or the identity
Idempotent Law:
3. X + X = X 3D. X • X = X AND, OR with self = self
Involution Law:
ഥ) = X
4. (𝑿 double complement =
no complement
Laws of Complementarity: AND, OR with complement
ഥ= 1
5. X + 𝐗 ഥ= 0
5D. X • 𝐗 gives you an identity

Commutative Law:
6. X + Y = Y + X 6D. X • Y = Y • X Just an axiom…
 37

Useful Laws (continued)

Associative Laws:
7. (X + Y) + Z = X + (Y + Z) 7D. (X • Y) • Z = X • (Y • Z) Parenthesis order
=X+Y+Z =X•Y•Z does not matter

Distributive Laws:
8. X • (Y+ Z) = (X • Y) + (X • Z) 8D. X + (Y• Z) = (X + Y) • (X + Z) Axiom

Simplification Theorems:
ഥ= X
9. X • Y + X • 𝒀 ഥ) = X
9D. (X + Y) • (X + 𝒀
Useful for
10. X + X • Y = X 10D. X • (X + Y) = X simplifying
expressions
ഥ) • Y = X • Y
11. (X + 𝒀 11D. (X • 𝒀
ഥ) + Y = X + Y

Actually worth remembering — they show up a lot in real designs…

 38

Boolean Algebra: Proving Things

Proving theorems via axioms of Boolean Algebra:

EX: Prove the theorem: X • Y + X • 𝒀ഥ=X

ത) = X
X • ( Y +𝐘 Distributive (5)
X•1 =X Complement (6)
X =X Identity (4)

EX2: Prove the theorem: X + X•Y = X

X•1+X•Y =X Identity (4)
X•(1+Y) =X Distributive (5)
X•1 =X Identity (2)
X =X Identity (4)
 39

DeMorgan’s Law: Enabling Transformations

DeMorgan's Law:
12. (𝑿 + 𝒀 + 𝒁 + ⋯ ) = 𝑿 ഥ. 𝒀
ഥ. 𝒁
ഥ. …
ഥ +𝒀
12D. (𝑿 . 𝒀. 𝒁. … ) = 𝑿 ഥ+𝒁 ഥ+ …

 Think of this as a transformation

▪ Let’s say we have:

F=A+B+C

▪ Applying DeMorgan’s Law (12), gives us

ഥ. 𝑩
𝑭 = (𝑨 + 𝑩 + 𝑪) = (𝑨 ഥ)
ഥ. 𝑪

At least one of A, B, C is TRUE --> It is not the case that A, B, C are all false
 40

DeMorgan’s Law (Continued)

These are conversions between different types of logic functions
They can prove useful if you do not have every type of gate…
Or, if some types of gates are more desirable to use than others…

ഥ𝒀ഥ 𝑿 𝑿 𝒀 𝑿+𝒀 ഥ 𝒀
𝑿 ഥ ഥ𝒀
𝑿 ഥ
𝑨 = (𝑿 + 𝒀) = 𝑿 𝒀 𝑨
0 0 1 1 1 1
0 1 0 1 0 0
NOR is equivalent to AND 𝑿 1 0 0 0 1 0
with inputs complemented 𝑨
𝒀 1 1 0 0 0 0

ഥ+𝒀
𝑩 = (𝑿𝒀) = 𝑿 ഥ 𝑿 𝑩 𝑿 𝒀 𝑿𝒀 ഥ 𝒀
𝑿 ഥ ഥ+𝒀
𝑿 ഥ
𝒀 0 0 1 1 1 1
0 1 1 1 0 1

NAND is equivalent to OR 𝑿
1 0 1 0 1 1
with inputs complemented 𝑩 1 1 0 0 0 0
𝒀
Dr. Ahmad Shabani Digital Logic 41

Consensus Theorem
1. xy + x’z + yz = xy + x’z
2. (x+y)•(x’+z)•(y+z) = (x+y)•(x’+z) -- (dual)

Proof:
xy + x’z + yz = xy + x’z + (x+x’)yz
= xy + x’z + xyz + x’yz
= (xy + xyz) + (x’z + x’zy)
= xy + x’z

February 11, 2024 41

Dr. Ahmad Shabani Digital Logic 42

Boolean Algebra
• Terminology:
• Literal: A variable or its complement
• Product term: literals connected by •
• Sum term: literals connected by +
• Represent the function of a logic block
• Functional Specification
• Methodically transform the function into simpler functions
• which lead to different hardware realizations
• Logic Minimization or Logic Simplification
• We can automate this process → Computer-Aided Design or Electronic
Design Automation
• Different Boolean expressions lead to different logic gate
implementations
→ Different hardware area, cost, latency, energy properties

February 11, 2024 42

February 11, 2024 43

Boolean Functions
• Implementation with logic gates
• F4 is more economical

F2 = x + y'z

F3 = x' y' z + x' y z + x y'

F3 = x' y' z + x' y z + x y' = x y' + x' z

F4 = x y' + x' z
February 11, 2024 44

Algebraic Manipulation & Simplification

• To minimize Boolean expressions
• The minimization of the number of literals and the number of terms → a circuit with
less equipment
• It is a hard problem (no specific rules to follow)
• Example 2.1
February 11, 2024 45

Complement of a Function
• An interchange of 0's for 1's and 1's for 0's in the value of F
• By DeMorgan's theorem
• (A+B+C)' = (A+X)' let B+C = X
= A'X' by theorem 5(a) (DeMorgan's)
= A'(B+C)' substitute B+C = X
= A'(B'C') by theorem 5(a) (DeMorgan's)
= A'B'C' by theorem 4(b) (associative)
• Generalizations: a function is obtained by interchanging AND and OR
operators and complementing each literal.
• (A+B+C+D+ ... +F)' = A'B'C'D'... F'
• (ABCD ... F)' = A'+ B'+C'+D' ... +F'
February 11, 2024 46

Examples
 47

USING BOOLEAN EQUATIONS

TO REPRESENT A LOGIC CIRCUIT
 48

Standardized Function Representations

• Enable a single, universally-agreed-on way of representing a Boolean
function starting from its truth table
• Also called “canonical form”

• Sum of Products (SOP) form

• Product of Sums (POS) form

 49

Sum of Products Form: Key Idea

• Assume we have the truth table of Boolean Function F

• How do we express the function in terms of the inputs in a

standard manner?

• Idea: Sum of Products form

• Express the truth table as a two-level Boolean expression
• that contains all input variable combinations that result in a 1 output
• If ANY of the combinations of input variables that results in a 1 is
TRUE, then the output is 1
• F = OR of all input variable combinations that result in a 1
 50

Some Definitions (for a 3-Input Function)

 Complement: variable with a bar over it
𝑨,𝑩,𝑪

 Literal: variable or its complement

𝑨, 𝑨,𝑩,𝑩,𝑪,𝑪

 Implicant: product (AND) of literals

(𝑨 ∙ 𝑩 ∙ 𝑪) , (𝑨 ∙ 𝑪) , (𝑩 ∙ 𝑪)

 Minterm: product (AND) that includes all input variables

(𝑨 ∙ 𝑩 ∙ 𝑪) , (𝑨 ∙ 𝑩 ∙ 𝑪) , (𝑨 ∙ 𝑩 ∙ 𝑪)

 Maxterm: sum (OR) that includes all input variables

(𝑨 + 𝑩 + 𝑪) , (𝑨 + 𝑩 + 𝑪) , (𝑨 + 𝑩 + 𝑪)
 51

Two-Level Canonical (Standard) Forms

• Truth table is the unique signature of a Boolean function …
• But, it is an expensive representation

• A Boolean function can have many alternative Boolean expressions

• i.e., many alternative Boolean expressions (and gate realizations) may have the
same truth table (and function)
• If they all specify the same thing, why do we care?
• Different Boolean expressions lead to different logic gate implementations → Different cost,
latency, energy properties

• Canonical form: standard form for a Boolean expression

• Provides a unique algebraic signature
• Boolean functions expressed as a sum of minterms or product of maxterms are said
to be in canonical form.
Dr. Ahmad Shabani Logic Design 52

Minterm & Maxterm for Three Variables

Chapter 2 - Part 1 53

Minterm and Maxterm Relationship

Two-Level Canonical Forms: SOP
Sum of Products Form (SOP)
Also known as minterm expansion

𝐀 𝐁 𝐂 𝐅 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1
0 0 0 0 ഥ 𝐁𝐂 + 𝐀𝑩
𝑭=𝑨 ഥ𝑪ഥ + 𝐀𝑩 ഥ + 𝐀𝐁𝐂
ഥ 𝐂 + 𝐀𝐁𝑪
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1

• Each row in a truth table has a minterm

• A minterm is a product (AND) of literals
• Each minterm is TRUE for that row (and only that row)
All Boolean equations can be written in SOP form
A Boolean function can be expressed algebraically from a given truth table
by forming a minterm for each combination of the variables that produces
a 1 in the function and then taking the OR of all those terms.
 55

Standard Notation for SOP Form

◼ Standard “shorthand” notation
❑ If we agree on the order of the variables in the rows of truth
table…
◼ then we can enumerate each row with the decimal number that
corresponds to the binary number created by the input pattern

𝐀 𝐁 𝐂 𝐅
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 1 100 = decimal 4 so this is minterm #4, or m4
1 0 1 1
1 1 0 1
1 1 1 1 111 = decimal 7 so this is minterm #7, or m7

f = m3 + m4 + m5 + m6 + m7 We can write this as a sum of products

= ∑m(3,4,5,6,7) Or, we can use a summation notation

 56

Canonical SOP Form

𝐀 𝐁 𝐂 minterms F in canonical form:
0 0 0 ഥ𝑩
𝑨 ഥ𝑪ഥ = m0
0 0 1 ഥ𝑩
𝑨 ഥ 𝑪 = m1 F(A,B,C) = ∑m(3,4,5,6,7)
0 1 0 ഥ 𝑩𝑪
𝑨 ഥ = m2 = m3 + m4 + m5 + m6 + m7
0 1 1 ഥ 𝑩𝑪 = m3
𝑨
1 0 0 𝑨𝑩ഥ𝑪ഥ = m4 𝑭=𝑨ഥ 𝐁𝐂 + 𝐀𝑩 ഥ
ഥ𝑪
1 0 1 𝑨𝑩ഥ 𝑪 = m5 + 𝐀𝑩 ഥ + 𝐀𝐁𝐂
ഥ 𝐂 + 𝐀𝐁𝑪
1 1 0 𝑨𝑩𝑪 ഥ = m6
1 1 1 𝑨𝑩𝑪 = m7
canonical form ≠ minimal form
Shorthand Notation for
Minterms of 3 Variables 𝑭 = 𝐀𝑩 ഥ + 𝑨
ഥ 𝑪+𝑪 ഥ)
ഥ 𝐁𝐂 + 𝐀𝐁(𝑪 + 𝑪
ഥ+ 𝑨
= 𝐀𝑩 ഥ 𝐁𝐂 + 𝐀𝐁
ഥ + 𝑩) + 𝑨
= 𝐀(𝑩 ഥ 𝐁𝐂
ഥ 𝐁𝐂
=𝐀+ 𝑨
2-Level AND/OR = 𝐀 + 𝐁𝐂
Realization
 57

From SOP to Gates

 SOP (sum-of-products) leads to two-level logic circuit

 Example: 𝒀 = 𝑨 ∙ 𝑩 ∙ 𝑪 + 𝑨 ∙ 𝑩 ∙ 𝑪 + 𝑨 ∙ 𝑩 ∙ 𝑪
A B C

A B C
minterm: ABC

minterm: ABC

minterm: ABC

SOP form does NOT directly lead to

minimal logic
Dr. Ahmad Shabani Logic Design 58

More Example on SOP

• EX1: Express the Boolean function F = A + B’C as a sum of minterms.

• Solution #1: Expand the function to include all variables i.e., sum of
minterms.
Dr. Ahmad Shabani Logic Design 59

More Example on SOP

• EX1: Express the Boolean function F = A + B’C as a sum of minterms.

• Solution #2: Using Truth Table

Dr. Ahmad Shabani Logic Design 60

More Example on SOP

• EX2: Write Standard Boolean Function (Canonical Form) for the below
truth table using SOP form (sum of minterms).
 61

Alternative Canonical Form: POS

Find all the input combinations (maxterms) for which the output of the
function is FALSE.

product
Product of Sums (POS) ഥ )(𝑨 + 𝑩
𝑭 = (𝑨 + 𝑩 + 𝑪)(𝑨 + 𝑩 + 𝑪 ഥ + 𝑪)
Each sum term represents one of the
“zeros” of the function sums
0 0 0 0 0 1 0 1 0
𝐀 𝐁 𝐂 𝐅 𝑭= 𝑨+𝑩+𝑪 ഥ (𝑨 + 𝑩
𝑨+𝑩+𝑪 ഥ + 𝑪)
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1

The function evaluates to FALSE (i.e., output is 0)

if any of the Sums (maxterms) causes the output to be 0
 62

Consider A=0, B=1, C=0

Input
𝐀 𝐁 𝐂 𝐅 0 1 0 ഥ )(𝑨 + 𝑩
𝑭 = (𝑨 + 𝑩 + 𝑪)(𝑨 + 𝑩 + 𝑪 ഥ + 𝑪)
0 0 0 0
0 0 1 0 ഥ ഥ
0 1 0 0
𝟎 𝟏 𝟎 𝟎 𝟏 𝟎 𝟎 𝟏 𝟎
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1 1 1 0

𝑭
=𝟎
Only one of the products will be 0, anything ANDed with 0 is 0

Therefore, the output is F = 0

 63

POS: How to Write It

𝐀 𝐁 𝐂 𝐅 ഥ )(𝑨 + 𝑩
𝑭 = (𝑨 + 𝑩 + 𝑪)(𝑨 + 𝑩 + 𝑪 ഥ + 𝑪)
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1 𝑨 ഥ
𝑩 𝑪
1 0 0 1 𝑨 + 𝑩ഥ + 𝑪
1 0 1 1
1 1 0 1
1 1 1 1
Maxterm form:
1. Find truth table rows where F is 0

2. 0 in input col ➙ true literal

3. 1 in input col ➙ complemented literal

4. OR the literals to get a Maxterm

5. AND together all the Maxterms

ഥ
Or just remember” POS of 𝑭 is the same as the DeMorgan of SOP of 𝑭
 64

Notation for the Canonical POS Form

Product of Sums / Conjunctive Normal Form / Maxterm Expansion

ഥ )(𝑨 + 𝑩
𝐅 = (𝑨 + 𝑩 + 𝑪)(𝑨 + 𝑩 + 𝑪 ഥ + 𝑪)

𝐀 𝐁 𝐂 Maxterms ෑ 𝑴(𝟎, 𝟏, 𝟐)
0 0 0 𝑨 + 𝑩 + 𝑪 = M0
0 0 1 𝑨+𝑩+𝑪 ഥ = M1
0 1 0 𝑨+𝑩 ഥ + 𝑪 = M2 𝐀 𝐁 𝐂 𝐅 Note that you form
0 1 1 𝑨+𝑩 ഥ +𝑪ഥ = M3 0 0 0 0 the maxterms
around the “zeros”
ഥ + 𝑩 + 𝑪 = M4
1 0 0 𝑨 0 0 1 0
of the function
ഥ+𝑩+𝑪
1 0 1 𝑨 ഥ = M5 0 1 0 0
ഥ+𝑩
1 1 0 𝑨 ഥ + 𝐂 = M6 0 1 1 1
ഥ+𝑩
1 1 1 𝑨 ഥ +𝑪ഥ = M7 1 0 0 1 This is not the
1 0 1 1 complement of the
Maxterm shorthand notation function!
1 1 0 1
for a function of three variables 1 1 1 1
Dr. Ahmad Shabani Digital Logic 65

Example on POS form:

▪ Example: Convert to product of maxterms:
f ( x, y , z ) = x + x y
Apply the distributive law:

x + x y = (x + x )(x + y ) = 1  (x + y ) = x + y
Add missing variable z:
x + y + z  z = ( x + y + z ) (x + y + z )
Express as POM: f = M2 · M3
Dr. Ahmad Shabani Digital Logic 66

Example on POS form:

Dr. Ahmad Shabani Digital Logic 67

Example on POS form:

Useful Conversions
1. Minterm to Maxterm conversion:
rewrite minterm shorthand using maxterm shorthand
replace minterm indices with the indices not already used
E.g., 𝐅 𝑨, 𝑩, 𝑪 = σ 𝒎 𝟑, 𝟒, 𝟓, 𝟔, 𝟕 = ς 𝑴(𝟎, 𝟏, 𝟐)
2. Maxterm to Minterm conversion:
rewrite maxterm shorthand using minterm shorthand
replace maxterm indices with the indices not already used
E.g., 𝐅 𝑨, 𝑩, 𝑪 = ς 𝑴(𝟎, 𝟏, 𝟐) = σ 𝒎 𝟑, 𝟒, 𝟓, 𝟔, 𝟕
3. Expansion of 𝐅 to expansion of 𝑭 ഥ:
ഥ 𝑨, 𝑩, 𝑪
𝑭
𝐄. 𝐠. , 𝐅 𝑨, 𝑩, 𝑪
= ෍ 𝒎(𝟎, 𝟏, 𝟐)
= ෍ 𝒎 𝟑, 𝟒, 𝟓, 𝟔, 𝟕
= ෑ 𝑴(𝟎, 𝟏, 𝟐) = ෑ 𝑴 𝟑, 𝟒, 𝟓, 𝟔, 𝟕
4. Minterm expansion of 𝐅 to Maxterm expansion of 𝑭ഥ:
rewrite in Maxterm form, using the same indices as 𝐅
𝐄. 𝐠. , 𝐅 𝑨, 𝑩, 𝑪 ഥ 𝑨, 𝑩, 𝑪 = ς 𝑴 𝟑, 𝟒, 𝟓, 𝟔, 𝟕
𝑭
= ෍ 𝒎 𝟑, 𝟒, 𝟓, 𝟔, 𝟕

= ෑ 𝑴(𝟎, 𝟏, 𝟐) = ෍ 𝒎(𝟎, 𝟏, 𝟐) 68
February 11, 2024 69

• Example
• F = xy + xz
• F(x, y, z) = S(1, 3, 6, 7)
• F(x, y, z) = P (0, 2, 4, 6)
 70

Logic Simplification (or Minimization)

• Using Boolean Algebra, we can simplify the SOP or POS form of any
function in a methodical way

• Starting with the canonical SOP or POS form enables convenience and
automation
• Truth table → SOP/POS form → Boolean Simplification Rules
 71

Logic Simplification Example: SOP Form

 SOP (sum-of-products) form of function Y

 Example: 𝒀 = 𝑨 ∙ 𝑩 ∙ 𝑪 + 𝑨 ∙ 𝑩 ∙ 𝑪 + 𝑨 ∙ 𝑩 ∙ 𝑪
A B C

A B C
minterm: ABC

minterm: ABC

minterm: ABC

SOP form does NOT directly lead to

minimal logic
 72

Logic Simplification Example: Simplified

 SOP (sum-of-products) form of function Y

 Example: 𝒀 = 𝑩 ∙ 𝑪 + 𝑨 ∙ 𝑩

Logic simplification : minimal logic

Dr. Ahmad Shabani Logic Design 73

EX2: Manual Simplification

Dr. Ahmad Shabani Logic Design 74

EX2: Logic Circuit Schematic

A
B
C
A
B
C A
F
A
B F B
C C
A
B
C
A
B
C
February 11, 2024 75

Logic Implementation
• Two-level implementation

F1 = y' + xy+ x'yz' F2 = x(y'+z)(x'+y+z')

• Multi-level implementation
February 11, 2024 76

Summary of Logic Gates

Figure 2.5 Digital logic gates

February 11, 2024 77

New Logic Gates

February 11, 2024 78

Multiple Inputs
• Extension to multiple inputs
• A gate can be extended to multiple inputs.
• If its binary operation is commutative and associative.
• AND and OR are commutative and associative.
• OR
• x+y = y+x
• (x+y)+z = x+(y+z) = x+y+z
• AND
• xy = yx
• (x y)z = x(y z) = x y z
February 11, 2024 79

Multiple Inputs
• NAND and NOR are commutative but not associative → they are not extendable.
February 11, 2024 80

NAND/NOR: Multiple Inputs

• Multiple NOR = a complement of OR gate, Multiple NAND = a complement of AND.
• The cascaded NAND operations = sum of products.
• The cascaded NOR operations = product of sums.

Figure 2.7 Multiple-input and cascated NOR and NAND gates

February 11, 2024 81

XOR Gates: Multiple Inputs

• The XOR and XNOR gates are commutative and associative.
• Multiple-input XOR gates are uncommon?
• XOR is an odd function: it is equal to 1 if the inputs variables have an odd number of
1's.

Figure 2.8 3-input XOR gate

February 11, 2024 82

Positive and Negative Logic

• Positive and Negative Logic
• Two signal values <=> two logic values
• Positive logic: H=1; L=0
• Negative logic: H=0; L=1
• Consider a TTL gate
• A positive logic AND gate
• A negative logic OR gate
• The positive logic is used in this book

Figure 2.9 Signal assignment and logic polarity

February 11, 2024 83

Digital Logic Families

• The characteristics of digital logic families

• Fan-out: the number of standard loads that the output of a typical gate can

drive.

• Power dissipation.

• Propagation delay: the average transition delay time for the signal to

propagate from input to output.

• Noise margin: the minimum of external noise voltage that caused an

undesirable change in the circuit output.

February 11, 2024 84

CAD
• CAD – Computer-Aided Design
• Millions of transistors
• Computer-based representation and aid
• Automatic the design process
• Design entry
• Schematic capture
• HDL – Hardware Description Language
• Verilog, VHDL
• Simulation
• Physical realization
• ASIC, FPGA, PLD
February 11, 2024 85

Chip Design
• Why is it better to have more gates on a single chip?
• Easier to build systems
• Lower power consumption
• Higher clock frequencies

• What are the drawbacks of large circuits?

• Complex to design
• Chips have design constraints
• Hard to test

• Need tools to help develop integrated circuits

• Computer Aided Design (CAD) tools
• Automate tedious steps of design process
• Hardware description language (HDL) describe circuits
• VHDL is one such system
Dr. Ahmad Shabani Digital Logic 86