MICROPROCESSOR

SE-SEM IV

UNIT VI
Interrupts, Exceptions and
Introduction to Microcontrollers

Q1. Explain how 80386 identifies interrupts?

ANS-
• The external asynchronous input applied to the microprocessor is termed as an
Interrupt.p
• Interrupt is a mechanism by which an I/O device (hardware interrupt) or an instruction
(software interrupt) can suspend the normal processor program execution and get itself
serviced.
• The interrupts may be generated by internal chip operations or they may be provided
by external sources.
• An interrupt causes the microprocessor to enter an interrupt handling routine.
• The interrupt handling routine is located at a predetermined absolute address in the
program memory.
Sources of interrupt
1. Hardware interrupt
A) Non maskable interrupt
B) Interrupt
2. Software interrupt (INT 0-255)
Hardware interrupt:
• In this type of interrupt, physical pins are provided in the chip. These interrupts are
generated by changing the logic levels on the 80386 interrupt pins.
• In 80386 we have two interrupt pins:
• 1. NMI ( Non Maskable Interrupt) 2. INTR
• To interrupt the 80386 processor we have to apply signal to these pins.
A) Non maskable interrupt
• NMI is non maskable interrupt i.e. Microprocessor has to service this interrupt, it
cannot avoid. It can be edge triggered.
• This interrupt cannot be disabled.
• This interrupt is mainly used in critical situations.
• This interrupt always causes an interrupt sequence to be executed.
 B) Interrupt:
• The INTR is a maskable interrupt.
• This interrupt can be enabled and disabled using the CLI and STI instruction.
• This interrupt is level sensitive.
• If we want more number of interrupt to be processed then we assign priority to the
interrupts.
Software interrupt
• Software interrupts are generated directly by executing the program.
• The INT instruction of the 80386 can be used to do one of the 256 interrupts. (Type
0-255).
• The interrupt type is specified by the number as a part of the instruction.
Q2. Explain the procedure of handling interrupts in protected mode.
OR
Explain what happens when an interrupt calls a procedure as an interrupt handler.
ANS-
A task gate in the IDT points indirectly to a task. The selector of the gate points to a TSS
descriptor in the GDT.

Fig. Interrupt Task

• Just as with a control transfer due to a CALL instruction, a control transfer to an interrupt or
exception handling procedure uses the stack to store the information needed for returning to
the original procedure.

• Interrupt pushes the EFLAGS register onto the stack before the pointer to the interrupted
instruction.

• If any error code is generated, it is also pushed on the stack.

• An exception handler can use the error code to help diagnose the exception.
 • When interrupt tasks are used in an operating system for the 80386, there are actually
two schedulers:
• 1. The software scheduler (part of the operating system)
• 2. The hardware scheduler (part of processor’s interrupt mechanism).
• The design of the software scheduler should account for the fact that the hardware
scheduler may dispatch an interrupt task whenever interrupts are enabled.

Fig. Interrupt Vectoring for Procedures

Q3. Explain the different exception conditions-faults, traps and aborts.

ANS-
• Exceptions are classified as faults, traps, or aborts depending on the way they are
reported and whether restart of the instruction that caused the exception is supported.
• Faults:
• Faults are exceptions that are reported “ before” the instruction causing the exception.
• Faults are either detected before the instruction begin to execute, or during execution
of the instruction.
• If detected during the instruction, the fault is reported with the machine restored to a
state that permits the instruction to be restarted.
• Traps :
• A trap is an exception that is reported at the instruction boundary immediately after
the instruction in which the exception was detected.
• Aborts :
• An abort is an exception that permits neither precise location of the instruction causing
the exception nor restart of the program that caused the exception.
 • Aborts are used to report severe errors, such as hardware errors and inconsistent or
illegal values in system tables.
Q4. List different sources of interrupts and explain different ways by which 80386 can
enable and disable interrupts.
ANS-
• The processor services interrupts and exceptions only between the end of one
instruction and the beginning of the next.
• When the repeat prefix is used to repeat a string instruction, interrupts and exceptions
may occur between repetitions. Thus , operations on long strings do not delay
interrupt response.
• Certain conditions and flag setting cause the processor to inhibit certain interrupts and
exceptions at instruction boundaries.
A) NMI masks further NMIs
• While an NMI handler is executing, the processor ignores further interrupt signals at
the NMI pin until the next IRET instruction is executed.
B) IF Masks INTR
• The IF (Inerrupt –enable flag) controls the acceptance of external interrupts signaled
via the INTR pin. When IF=0, INTR interrupts are inhibited; When IF =1, INTR
interrupts are enabled.
As with the other flag bits, the processor clears IF in response to a RESET signal.
• The instructions CLI and STI alter the setting of IF.
• CLI(Clear interrupt Enable Flag) and STI (Set interrupt- Enable flag) explicitly alter
IF ( bit 9 in the flag register).
• These instructions may be executed only if CPL<=IOPL.
• A protection exception occurs if they are executed when CPL> IOPL.
C) RF Masks Debug Faults
The RF bit in EFLAGS controls the recognition of debug faults. This permits debug faults to
be raised for a given instruction at most once, no matter how many times the instruction is
restarted.
D) MOV or POP to SS Masks some interrupts and Exceptions
• Software that needs to change stack segments often uses a pair of instructions; for
example:
MOV SS,AX
MOV ESP, StackTop
• If an interrupt or exception is processed after SS has been changed but before ESP has
received the corresponding change, the two parts of the stack pointer SS:ESP are
inconsistent for the duration of the interrupt handler or exception handler.
 • To prevent this situation, the 80386, after both a MOV to SS and a POP to SS
instruction, inhibits NMI, INTR, debug exceptions and single step trap as the
instruction boundry following the instruction that changes SS.
Q5. What is IDT and how to locate IDT?
OR
With the help of the necessary diagram, explain the structure of IDT in 80386.
ANS-
• The interrupt descriptor table (IDT) associates each interrupt or exception identifier
with a descriptor for the instructions that service the associated event.
• Like the GDT and LDT ,the IDT is an array of 8-byte descriptors.
• Unlike the GDT and LDT, the first entry of the IDT may contain a descriptor.
• To form an index into the IDT, the processor multiplies the interrupt or exception
identifier by eight.
• Because there are only 256 identifiers, the IDT need not contain more than 256
descriptors.
• It can contain fewer than 256 entries; entries are required only for interrupt identifiers
that are actually used.
• The IDT may reside anywhere in physical memory.
• The instructions LIDT and SIDT operate on the IDTR.
• Both instructions have one explicit operand: the address in memory of a 6 byte area.
• LIDT (Load IDT register) loads the IDT register with the linear base address and limit
values contained in the memory operand.
• This instruction can be executed only when the CPL is zero.
• It is normally used by the initialization logic of an operating system when creating an
IDT.
• An operating system may also use it to change from one IDT to another.
• SIDT (Store IDT register) copies the base and limit value stored in IDTR to a memory
location. This instruction can be executed at any privilege level.
 Fig. IDT Register & Table

Fig. Pseudo-Descriptor Format for LIDT and SIDT

Q6. Draw the format of interrupt gate and trap gate descriptor.
ANS- The IDT may contain any of three kinds of descriptor:
1. Task gate 2. Interrupt gate 3. Trap gate
Q7. Write short note on “general Detect Fault”.
ANS-
• This exception occurs when an attempt is made to use the debug registers at the same
time that ICE -386 is using them.
• This additional protection features are provided to guarantees that ICE-386 can have
full control over the debug register resources when required.
• ICE -386 uses the debug-registers; therefore, a software debugger that also uses these
registers cannot run while ICE-386 is in use.
• The exception handler can detect this condition by examining the BD bit of DR6
Q8. Explain interrupt Int 0 and Int 4.
ANS-
INT 0:
• The divide –error fault occurs during a DIV or an IDIV instruction when the divisor is
zero.
INT 4:
• This trap occurs when the processor encounters an INTO (Interrupt on Overflow)
instruction and OF (overflow) flag is set.
• Since signed arithmetic and unsigned arithmetic both use the same arithmetic
instructions, the procedure cannot determine which is intended and therefore does not
cause overflow exceptions automatically.
• Instead it merely sets OF when the result, if interpreted as signed numbers would be
out of range.
• When doing arithmetic on signed operand , careful programmers and compilers either
test OF directly or use the INTO instruction.
Q9. When does a page fault occur?
ANS-
• This exception occurs when paging is enabled (PG=1) and the processor detect one of
the following conditions while translating a linear address to physical address:
• - The page directory or page table entry needed for the address translation has zero in
its present bit.
• - The current procedure does not have sufficient privilege to access the indicated page.
• An error code on the stack. The error code for a page fault has a format different from
that for other exceptions. The error code tells the exception handler three things-
1. Whether the exception was due to a not present page or to an access rights violation.
2. Whether the processor was executing at user or supervisor level at the time of the
exception.
3. Whether the memory access that caused the exception was a read or write.
Q 10. Differentiate between Microprocessor and Microcontroller.
ANS-

Sr Microprocessor Microcontroller
No.
1. It is the heart of computer system. It is the heart of embedded system.
2. It is just processor, therefore other Microcontroller has inbuilt processor
components like memory, IO components with memory and IO components,
have to connect externally, which makes which makes low component count.
high component count as well.

3. Circuit becomes large because of high Circuit is small because of low

component count. component count.
4. Size become large and inefficient in terms Size is small and mostly efficient in
of power terms of power
5. High processing power. Low processing power.
6. Versatile and general purpose Single and limited purpose
7. Mainly used in computer or high end Used mainly in function specific system
machines which are designed to pe rform like remote, music player, basic
multiple task. speakers etc.
8. Used where high performance is critical. Used in application where cost, power
and space is critical
9. Power consumption is high, because of Low power consumption because of low
high components count. Also do not components count. Most of
support power saving feature, therefore microcontroller have different mode for
most microprocessor-based system will power saving like idle mode,sleep
have either continuous power supply or mode, deep sleep mode etc . Which
rechargeable battery-based system. make it feasible for both chargeable and
non-rechargeable battery – based
applications.
 10. Cost of entire system increases because Cost of above system decrease because
of all above reasons of all above reasons.

Q 11. Draw and Explain the Architecture of a Typical Microcontroller.

ANS-

• CPU : Consist the ALU, general purpose registers, and many more which are
essentials to run the progam.
• OSC: This section used to get the external clock using either crystal or oscillator and
convert that clock to usable clock and distribute to all blocks of controller.
• Bus Control: It control the BUS and its activity.
• 4 I/O ports: There are 4 I/O ports available to general user to connect external device
like sensors, actuators etc.
• Serial Port: This is to communicate with controller using UART.
 • Interrupt Control : Interrupt is a critical part in embedded system . This block control
the activity of interrupt.
• Memory : This store the program and data , which is needed to perform the task. So
you just download the program in this memory, and give the power to it. Now
microcontroller will keep running the program stored in it.
• On-chip RAM : RAM provides temporary storage while executing program.
• Timers: Timers can be categorized into two main types. A timer which counts upwards
from zero for measuring elapsed time is often called a stopwatch, while a device
which counts down from a specified time interval is more usually called a timer.

Q 12. List and elaborate on different applications of microcontrollers.

ANS-

Application of Microcontrollers
1. Fire alarm: It will sense only smoke and communicate or giving alarm.
2. Almost every electronic gadget around us is an microcontroller,few
examples are Radio,Smart wrist bands, digital/smart watch,oven,fridge,
washing machine, remote control, traffic lights, advance streetlights, printer,
scanner, ATM, elevator etc.
3. Due to the advancement in technology, specially IOT coming to picture,
more embedded devices will be used.
4. In home application system, medical, smart city, agriculture,
transport,supply chain management, fleet management, industry- based
system.
5. Any production plant may have smart attendance system,worker safety
system, visitor vehicle management system, storage bins management
system, machine monitoring, asset monitoring etc.
6. Smart city have multiple solutions like smart transport, smart parking,smart
hospitals, smart road, smart garbage collection system, smart street light,
smart traffic management system, water treatment system. Advance metering
infrastructure for electricity meters, water meter and gas meters etc.
7. Uses or role of controllers are virtually limitless because every day new
products are introduced to the market which utilize embedded computers in
number of ways.
List of applications where controller is being used:
• Consumer Electronics products: Toys, cameras, robots, washing machine,
microwave ovens etc.
 • Instrumentation and Process control: Oscilloscopes, multimeter, leakage
current tester, data acquisition and control etc.
• Medical Instruments
• Communication
• Office equipment
• Multimedia Application
• Automobile

Q13. Explain various features of the 8051 Microcontroller.

ANS-

Features
−– 4KB bytes on-chip program memory (ROM)
– 128 bytes on-chip data memory (RAM).
– Four register banks.
– 128 user defined software flags.
– 8-bit bidirectional data bus.
– 16-bit unidirectional address bus.
– 32 general purpose registers each of 8 bit.

Q 14. Explain the following exceptions in brief.

i) Divide error

ii) Invalid Opcode

iii) Overflow.

ANS-

Divide Error (INT 0)-

• The divide-error fault occurs during a DIV or an IDIV instruction when the Divisor is
zero.
Overflow (INT 4) -
• This trap occurs when the processor encounters an INTO instruction and the OF
(overflow) flag is set. {INTO − Used to interrupt the program during execution if OF =
1}
• Since signed arithmetic and unsigned arithmetic both use the same arithmetic
instructions, the processor cannot determine which is intended and therefore does
not cause overflow exceptions automatically. Instead it merely sets OF when the
results.
Invalid op-code (INT 6) -
• The Invalid Opcode exception occurs when the processor tries to execute an invalid
or undefined opcode, or an instruction with invalid prefixes.
• This exception also occurs when the type of operand is invalid for the given opcode.
Example include an intersegment JMP referencing a register operand.

Interrupt and Exception ID Assignments