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Machine Language

The document provides an overview of a hypothetical algorithmic machine architecture, focusing on its microprocessor's instruction set, which includes basic arithmetic, data transfer, and control instructions. It details the program execution process, highlighting the fetch-decode-execute cycle managed by the control unit and the arithmetic unit. Additionally, it discusses the structure of machine instructions and includes examples of program execution and logical operations.

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Mohamed Ayman
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0% found this document useful (0 votes)
8 views

Machine Language

The document provides an overview of a hypothetical algorithmic machine architecture, focusing on its microprocessor's instruction set, which includes basic arithmetic, data transfer, and control instructions. It details the program execution process, highlighting the fetch-decode-execute cycle managed by the control unit and the arithmetic unit. Additionally, it discusses the structure of machine instructions and includes examples of program execution and logical operations.

Uploaded by

Mohamed Ayman
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Introduction To Computer Science

CS500
Hypothetical Algorithmic Machine Architecture
Microprocessor: instruction set

• The microprocessor has a finite set of instructions (instruction set) that can be
performed

• The instruction set include:


1. Basic arithmetic and logic instructions
2. Data transfer instructions
3. Control instructions
The instructions set of a processor can be grouped into 3 categories as:


Machine Instructions as Bit Patterns
Both data and programs are stored in main memory in the same way as a stream of bits
The Instruction Set of the Hypothetical Algorithmic Machine
The Instruction Set of the Hypothetical Algorithmic Machine...
The Instruction Set of the Hypothetical Algorithmic Machine...
The Instruction Set of the Hypothetical Algorithmic
Machine...
Instruction: 156C

1 5 6 C

op-code
operands

Bit Pattern 0001 0101 0110 1100

LOAD R5 M[6C]

Symbolic Form R5 M[6C]


The Instruction Set of the Hypothetical Algorithmic
Machine...
The Instruction Set of the Hypothetical Algorithmic
Machine...
The Instruction Set of the Hypothetical Algorithmic
Machine...
Instruction Execution Cycle
Program Execution
Responsibility of

1 Operatng System (OS) PC register A1


A1 5056
IR register 5056

My Program
CU: Machine Cycle A2 1526
2 1- Fetching A3 2061
PC register A2
A4 3504
A5 C000
CU: Machine Cycle
3 2- Decoding
5 0 5 6

CU: Machine Cycle


4 3- Executing through calling ALU: Arithmatic Unit is activated
appropriate ALU function
Program Execution...
Responsibility of R5 0001 0111
5 ALU: Arithmatic Unit R0 R5+R6 +
R6 1110 0101

R0 1111 1100

6 CU: Repeat step 2 Untill Halt (C000)


IR register 1526

My Program
PC register A3 A1 5056
A2 1526
A3 2061
A4 3504
A5 C000
Program Execution...
• To execute a program stored in main memory, the control unit of the CPU uses the
special-purpose registers to do the job.

• The first step is that the start address of the program, such as 156C in the main memory
should be placed in the “program counter” register by the operating system.

• Once the address of the first instruction to be executed is put in the “program
counter” register, the control unit starts a “repeating algorithm” called
“machine cycle”.
Program Execution: Machine Cycle
The machine cycle consists of 3 steps:
1. Fetch: which is fetching the instruction from the memory cell whose address is in the
program counter, and putting it in the instruction register. At the end of fetch step, the
program counter register is incremented to the next program instruction.

2. Decode: which is decoding the instruction contained in the instruction register and
analyzing its op-code field , and operand field.

3. Execute: after decoding the instruction, the control unit activates the required circuity to
perform the needed operation.

The fetch-decode-execute cycle continues until the “HALT” instruction is decoded in the instruction
register, then before completing its execution the machine is informed that the program is completed and
the machine cycle stops.
Program Execution: Machine Cycle...

Since the instruction in the hypothetical CPU is 16 bits, and the size of
each memory cell is 8 bits, then each instruction of the
program occupies two consecutive memory cells.

• The format of the machine instruction is as follows:


Program Execution: Example
Program Execution: Example: Instruction1
Program Execution: Example: Instruction2
Program Execution: Example: Instruction3
Program Execution: Example: Instruction4
Program Execution: Example: Instruction5
Program Execution: Example2
Program Execution: Example2: Solution
Program Execution: Example3
Program Execution: Example3: Solution

The program halts at address F8 and this program is self-


modifying because it modifies itself during execution.
Program Execution: Example4
Program Execution: Example4...
Program Execution: Example4: Solution
Program Execution: Example4: Solution
Logical Operations
Logical Operations: Example (AND-OR)
Logical Operations: Example (XOR)

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