CR-1

8 7 6 5 4 3 2 1
P72 OASIS P72 OASIS P73 OASIS P72 MIRAGE P72 MIRAGE P73 MIRAGE
BOMOPTION GOOD BETTER BEST GOOD BETTER BEST

DD1X
DD2X
X X X X X X
P72/73 (JUN 04 /2002)
600MHZ X X
700MHZ X X X X D
D
OASIS X X X PAGE 1 : COVER PAGE (CONTENTS) PAGE 35 : POWER SUPPLY LOAD FET SWITCHES
PAGE 2 : BLOCK DIAGRAM PAGE 36 : CORE SWITCHERS & SUPER CAP CIRCUIT
MIRAGE X X X PAGE 3 : PROCESSOR PAGE 37 : ATI_CORE AND 2.5V_MAIN SWITCHERS
MID OR HIGH RANGE NO PWRSTEP X X X X X X PAGE 4 : CPU PLL CONFIGURATION PAGE 38 : CPU_VCORE(1.2/1.4V) SWITCHERS
HIGH_PLL_RANGE_NO_PWRSTEP PAGE 5 : PANGEA PROCESSOR I/F PAGE 39 : TOOLING HOLES
MID OR HIGH RANGE PWRSTEP PAGE 6 : PANGEA SDRAM & SO-DIMMS I/F & SS CLK GEN PAGE 40 : CONSTRAINTS -- POWER
HIGH PLL PANGE PWRSTEP PAGE 7 : SDRAM ON-BOARD BANKS PAGE 41 : CONSTRAINTS -- CPU BUS
LOW PLL RANGE PAGE 8 : SO-DIMM CONNECTOR PAGE 42 : CONSTRAINTS -- MEMORY BUS (1)
PAGE 9 : PANGEA AGP IF PAGE 43 : CONSTRAINTS -- MEMORY BUS (2)
LOW OR MID PLL RANGE X X X X X X PAGE 44 : CONSTRAINTS -- AGP & FIREWIRE
PAGE 10 : PANGEA ETHERNET, FIREWIRE, PWR/GNDS
FIREWIRE X X X X X X PAGE 11 : PANGEA BYPASS PAGE 45 : CONSTRAINTS -- MISCELLANEOUS
NO FIREWIRE PAGE 12 : PANGEA ATA, & I/O BUS PAGE 46 : NET ATTRIBUTES
PWRSTEP PAGE 13 : PANGEA SER/AUD/USB, BOOTSTRAPS PAGE 47 : REVISION HISTORY (1)
C X X
PAGE 48 : REVISION HISTORY (2) C
NO PWRSTEP X X X X PAGE 14 : PULL-UP/PULL-DOWN (1)
PAGE 49 : REFERENCE DESIGNATOR LOCATION INDEX (1)
100MHZ X X X X X X PAGE 15 : PULL-UP/PULL-DOWN (2) PAGE 50 : REFERENCE DESIGNATOR LOCATION INDEX (2)
PAGE 16 : MODEM & HD/CD-ROM CONNECTORS PAGE 51 : REFERENCE DESIGNATOR LOCATION INDEX (3)
66MHZ
PAGE 17 : USB PORT PAGE 52 : REFERENCE DESIGNATOR LOCATION INDEX (4)
3SBAT X X X X PAGE 18 : 10/100M ETHERNET PHY PAGE 53 : REFERENCE DESIGNATOR LOCATION INDEX (5)
4SBAT X X PAGE 19 : FIREWIRE PHYSICAL LOGIC
PAGE 20 : CARDSLOT (WIRELESS) INTERFACE & BOOTROM
SWCHG
PAGE 21 : PMU (POWER MANAGEMENT UNIT)
HWCHG X X X X X X PAGE 22 : GRAPHICS CONTROLLER
OASIS_600 X PAGE 23 : GRAPHICS CONTROLLER POWER
PAGE 24 : LCD I/F
OASIS_700 X X
PAGE 25 : VIDEO CONNECTOR
MIRAGE_600 X PAGE 26 : IRDA/BT USB CONNECTOR
MIRAGE_700 X X PAGE 27 : SNAPPER,CONTROL & D/A
B PAGE 28 : SNAPPER AUDIO, HEADPHONE DRIVER
B
INTUSB X X X X X X
PAGE 29 : SNAPPER AUDIO, MICROPHONE PREAMP
NON PRODUCTION PAGE 30 : POWER SYSTEM ARCHITECTURE
P. LEADER APPROVED BY CHECKED BY PREPARED BY
SLOW_CHRG X X X X PAGE 31 : DC POWER JACK
X PAGE 32 : BATTERY CHARGER
FAST_CHRG X
PAGE 33 : BATTERY INTERFACE
128M X X X X X X PAGE 34 : POWER SUPPLY 3V/5V MAIN SWITCHERS
256M
TBEN
PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
COVER PAGE (CONTENTS)
REV 1.C 1.0 1.B 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.B 1.B 1.0 1.0 1.0 1.C 1.0 1.0 1.0 1.0 1.0 1.0 1.0
DESCRIPTION:

iBook MLB & SCHEMATIC

DATE 0604 0312 0522 0312 0312 0312 0312 0312 0312 0312 0312 0312 0312 0522 0522 0312 0312 0312 0604 0312 0312 0312 0312 0312 0312 0312
A NOTICE OF PROPRIETARY PROPERTY
A
27 28 29 30 31 32 33 34 35 36 37 38 39 39 41 42 43 44 45 46 47 48 49 50 51 52 53
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
1.0 1.B 1.0 1.0 1.0 1.0 1.A 1.0 1.B 1.0 1.0 1.B 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.C 1.0 1.0 1.0 1.0 1.0
P/N:820-1320 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT

RFA # 222273 0312 0502 0312 0312 0312 0312 0402 0312 0522 0312 0312 0522 0312 0312 0312 0312 0312 0312 0312 0312 0312 0604 0312 0312 0312 0312 0312 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

ATC P/N:KK0U22701110U02 APPLE COMPUTER INC.

D 051-6130-C
ACI:C
ECS:1.C

ATC DRAWING NO.: U227-1-3-08 SCALE

NONE
SHT
1
OF
53

8 7 6 5 4 3 2 1
 CR-2

8 7 6 5 4 3 2 1

CORE SCHEMATIC PAGES

SDRAM ON BOARD P. 7
SPREAD SPECTRUM PANGEA
BYPASS D
D
SO-DIMM 0 P. 8 P. 11
USB PORT1
(2 PORTS)
P. 17
RESERVED
INTERNAL USB
CPU PLL CONFIGURATION
P. 26
USB PORT2
(2 PORTS)
P. 4 P. 17
USBVD1
SDRAM IF SER
CPU P. 6 MODEM
USBVD2 CONN
SAHARA P. 16
CPU IF P. 13 USBVD3

P. 3 PANGEA
C P. 5 USBVD4 A/V C
AUDIO CONN
P. 10 P. 9 P. 12
AUD P. 28
FW IF ENET IF AGP UATA CARDSLOT TI

P. 27 MIC AMPS

P. 28
PULL-UPS ROM
1M X 8
P. 14
P. 20 FILTERS
& INT
PULL-UPS PMU SPKR CONN

P. 15 P. 21 P. 29

B B

POWER SUPPLY TOUCHPAD KEYBOARD FW PHY ENET PHY

P.30-37
10/100 MHZ
LOCAL SCHEMATIC PAGES
P.21 P.21 P.19 P. 18
UATA
GRAPHICS CONN CARDSLOT
BLOCK DIAGRAM
VIDEO CHIP HD/CD-ROM WIRELESS DESCRIPTION:
ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
A P. 22 CONN
NOTICE OF PROPRIETARY PROPERTY
A
RGB LVDS P. 16 P. 20
A/V THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

CONN CONN CONN GRAPHICS AGREES TO THE FOLLOWING

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

P. 25 P. 25 P. 28 POWER II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

P. 23 SIZE

D
DRAWING NUMBER

051-6130-C
REV.
ACI:C
ECS:1.0
APPLE COMPUTER INC.
SCALE SHT OF
NONE 2 53

8 7 6 5 4 3 2 1
 CR-3

8 7 6 5 4 3 2 1
CRITICAL 14D6 14D8 15B1 15D2 46B7 40C6 38C1 38B3 +VCORE_SLEEP
R800 13D1 14A6
41D1 14C8 5D7 CPU_BR* Y3 BR*
BVSEL W9 BVSEL 1
4.7K 2 OVDD0 C4 +VIO_CPU_SLEEP 3C4 4B4
VDD0 C10
1
C1544 1
C1545 1 C803 1 C804 1 C805 1 C770 1 C806 1 C807 1 C808
41A1 14C6 5D7 CPU_BG* W4 BG* OVDD1 C7 4D5 5C2 220UF 220UF 10UF 10UF 10UF 0.1UF 0.1UF 0.1UF
1% 14A7 14C6 VDD1 C11 20% 20% 20% 20% 20% 0.1UF 20% 20% 20%
OVDD2 20%
1/16W C14
35C3 36B4 2 4V 2 4V 2 6.3V 2 6.3V 2 6.3V
10V
2 10V 2 10V
41D1 14C8 5D7 TS* B15 TS* MF VDD2 E8 POSCAP POSCAP CERM CERM CERM 2 10V
CERM
2 CERM
CERM CERM
603
CPU_TDI 15B3
OVDD3 C17 46B7 SMD SMD 805 805 805 402 402 402 402
41C1 5D7 3D8 0 CPU_ADDR<0> E20
TDI V2 15D2 OVDD4 D3
VDD3 E13
A0 TDO W5 CPU_TDO 15C2 VDD4 F6
41C1 5D7 3D8 1 CPU_ADDR<1> E19 A1 OVDD5 D18
41C1 5D7 3D8 2 CPU_ADDR<2> D20 A2
TMS V1 CPU_TMS 15B3 15D2 OVDD6 E10
VDD5 F9 1 C809 1 C810 1 C811 1 C812 1 C813 1 C814 1 C815 1 C816 1 C817
41C1 5D7 3D8 3 TCK T2 CPU_TCK 15B3 15C2 VDD6 F12 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
CPU_ADDR<3> C20 A3 U1 CPU_TRST*
OVDD7 E11 20% 20% 20% 20% 20% 20% 20% 20% 20%
41C1 5D7 3D8 4 CPU_ADDR<4> D19 TRST* 15A3 15C2
OVDD8 G3 VDD7 F15 2 10V
CERM 2 10V 2 10V 2 10V
CERM 2 10V 2 10V 2 10V 2 10V 2 10V
A4 LSSD_MODE* U13 LSSD_MODE* 14C7 VDD8 J8 402
CERM
402
CERM
402 402
CERM
402
CERM
402
CERM
402
CERM
402
CERM
402
41C1 5D7 3D8 5 CPU_ADDR<5> C19 A5 OVDD9 G7
L1_TSTCLK Y13 L1_TSTCLK 14C7 VDD9 J9
41C1 5D7 5C7 3D8 6 CPU_ADDR<6> A20 A6 OVDD10 G14

D 41C1 5D7 5C7 3D8 7

41C1 5D7 5C7 3D8 8
CPU_ADDR<7> E16 A7
L2_TSTCLK W13 L2_TSTCLK 14C7
OVDD11 G18 VDD10 J13
VDD11 K3
1 C818
0.047UF
1 C819
0.047UF
1 C820
0.01UF
1 C821
0.01UF
1 C822
0.01UF
1 C823
0.01UF
1 C824
0.001UF
1 C825
0.001UF
1 C826
0.001UF
D
CPU_ADDR<8> B20 A8 OVDD12 H5 10% 10% 20%
41C1 5D7 5C7 3D8 9 VDD12 K8 10V 10V 20% 20% 20% 20% 20% 20%
CPU_ADDR<9> E17 A9 OVDD13 H16 2 CERM 2 CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V 2 50V
CERM 2 50V
CERM
41C1 5D7 5C7 3D8 10 CPU_ADDR<10> ABB* OVDD14 VDD13 K11 402 402 402 402 402 402
CERM
402 402
B18 A10 ABB* Y6 14B8 K5 402
41C1 5D7 5C7 3D8 11 VDD14 K13
CPU_ADDR<11> A18 A11 OVDD15 K16
41B1 5D7 5C7 3D8 12 CPU_ADDR<12> AP0 D16 NC
OVDD16 VDD15 K18
A17 A12 L5
41B1 5D7 5C7 3D8 13 CPU_ADDR<13> A19 A13 AP1 D13 NC
OVDD17 L16
VDD16 L3 1 C827 1 C828 1 C829 1 C830 1 C831 1 C832 1 C833 1 C834 1 C835
AP2 A13 NC VDD17 L8 0.001UF 0.001UF 0.001UF 0.001UF 0.001UF 220PF 220PF 220PF 220PF
CPU_ADDR<14> A16 A14 OVDD18 N5 20% 20% 20% 20% 20% 5% 5% 5% 5%
41B1 5D7 14 50V 50V 50V 50V 50V 25V 25V
5C7 3D8 15 AP3 B8 NC VDD18 L11 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 25V 2 25V 2 CERM 2 CERM
5D7 CPU_ADDR<0..31> CPU_ADDR<15> B16 A15 OVDD19 N16
402 402 402 402 402
CERM CERM
402 402 402
3D8 CPU_ADDR<16> B10 DBB* U7 DBB* OVDD20 P3 VDD19 L13 402
16 A16 14B8
5C7 5C7 3D8 46B7 3B1 +A1VDD_CPU_F_SLEEP Y15 A1VDD VDD20 L18
41B1 41B1 5D7 17 CPU_ADDR<17> B9 A17 OVDD21 P7
5C7 3D8 18 CPU_ADDR<18> A9 A18
DP0 T20 NC 46B7 3A1 +A2VDD_CPU_F_SLEEP Y16 A2VDD
OVDD22 P14 VDD21 M8 1 C898 1 C899 1 C883 1 C886 1 C897 1 C887 1 C895 1 C771 1 C980
5D7 DP1 N19 NC VDD22 M9 0.1UF 0.1UF 0.1UF 0.1UF 0.01UF 0.01UF 0.01UF 0.1UF 10UF
41B1 41B1 5D7 19 CPU_ADDR<19> B7 A19 OVDD23 P18 20% 20% 20% 20% 20% 20% 20% 20% 20%
5C7 3D8 20 DP2 J20 NC VDD23 M13 2 10V 10V 2 10V
10V 2 50V
CERM
50V
2 CERM 2 50V 2 10V
6.3V
2 CERM
CPU_ADDR<20> A7 A20 G19 NC
OVDD24 T10 CERM 2 CERM CERM 2 CERM
402
CERM
402
CERM
41B1 5D7 5C7 3D8 21 CPU_ADDR<21> D8 DP3 OVDD25 T11 VDD24 R6 402 402 402 402 402 402 805
A21 B1
41B1 5D7 5C7 3D8 22 CPU_ADDR<22> A5 DP4 NC
OVDD26 U3 VDD25 R9 NOSTUFF NOSTUFF
A22
DP5 G4 NC VDD26 R12 C776 1 C774 1 C800 1 C801 C981
41B1 5D7 5C7 3D8 23 CPU_ADDR<23> B6 A23
DP6 H1
OVDD27 U18
VDD27 R15
1 C772 1
0.01UF
1 C775 1 C777 1
C836 100UF 100UF
1
41B1 5D7 5C7 3D8 24 CPU_ADDR<24> D7 A24 NC
OVDD28 V4 0.1UF 0.1UF 20% 0.01UF 0.01UF 220UF 20% 20%
10UF
20% 20% 20% 20% 20%
41B1 5D7 5C7 3D8 25 DP7 M1 NC VDD28 T8 36B4 10V 2 50V
20%
50V 2 6.3V 2 6.3V 6.3V
CPU_ADDR<25> D5 A25 OVDD29 V7
15B1 2 10V
CERM 2 CERM CERM 2 50V 2 CERM 2 4V
POSCAP CERM CERM 2 CERM
VDD29 T13 402 CERM 1812 1812 805
41B1 5D7 5C7 3D8 26 CPU_ADDR<26> B5 A26 DBDIS* A10 DBDIS* 14A7 OVDD30 V14 14C6 402 402 402 402 SMD
41B1 5D7 5C7 3D8 27 CPU_ADDR<27> OVDD31 VDD30 V10 13D1
B4 A27 V17
3D5 +VIO_CPU_SLEEP
41B1 5D7 5C7 3D8 28 CPU_ADDR<28> A4 VDD31 V11 4B4
A28 5C2 4D5
41A1 5D7 5C7 3D8 29 CPU_ADDR<29> A3 A29 14A7 14A6 1
C837 1 C838 1 C839 1 C840 1 C841 1 C842 1 C843 1 C844
41A1 5D7 5C7 3D8 30 CPU_ADDR<30> B3 A30 14D8 14D6 100UF 1.0UF 1.0UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
35C3 15D2 20% N20P80% N20P80% 20% 20% 20% 20% 20%
41A1 5D7 5C7 3D8 31 CPU_ADDR<31> E5 A31 U100 46B7 2 10V
TANT
2 16V
CERM
805
2 16V
CERM
805
2 10V
CERM
402
2 10V
CERM
402
2 10V
CERM
402
2 10V
CERM
402
2 10V
CERM
402
41D1 5B7 TT<0> D14 TT0
SAHARA SMD-1
600MHZ
C 41D1
41C1
5B7
5B7
TT<1>
TT<2>
B17
B14
TT1
TT2
BGA
1 C845 1 C846 1 C847 1 C848 1 C849 1 C850 1 C851 1 C852 1 C853
C
41C1 5B7 TT<3> A15 TT3 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
20% 20% 20% 20% 20% 20% 20% 20% 20%
10V 10V 10V 10V 10V 10V 10V 10V
41C1 5B7 TT<4> B13 TT4 2 CERM 2 10V
CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
402 402 402 402 402 402 402 402 402
41D1 14C8 5B7 TBST* A11 TBST* 41B5
3B8 3B6 DL0 A2 CPU_DATA<32> 32
NC
Y1 BLANK0
TSIZ<0> TSIZ0 5D3 5C4 DL1 A1 CPU_DATA<33> BLANK1
41C1 5B7 A14 33
NC
Y2 1 C854 1 C855 1 C856 1 C857 1 C858 1 C859 1 C860 1 C861 1 C862
41C1 5B7 TSIZ<1> B12 TSIZ1 41B5 DL2 C2 CPU_DATA<34> 34 0.1UF 0.1UF 0.047UF 0.047UF 0.047UF 0.047UF 0.01UF 0.01UF 0.01UF
20% 20% 10% 10% 10% 20% 20% 20%
41C1 5B7 TSIZ<2> B11 TSIZ2 3B8 3B6 DL3 E4 CPU_DATA<35> 35 10V 10V 2 10V 2 10V 10V
10%
50V 50V 2 50V
2 CERM 2 CERM 2 CERM 2 10V 2 CERM 2 CERM
41B5 5D3 5C4 3B8 3B6 5D3 5C4 DL4 C1 CPU_DATA<36> 36 402 402
CERM
402
CERM
402 402
CERM
402 402 402
CERM
402
41A1 14C8 5B7 GBL* W1 GBL*
5C4 3B8 3B6 DL5 E2 CPU_DATA<37> 37
41A1 14B6 5B7 WT* U5 WT* 41B5 5D3 DL6 D2 CPU_DATA<38> 38
41A1 14B6 5B7 CI* T4
CI* 1 C863 1 C864 1 C865 1 C866 1 C867 1 C868 1 C869 1 C870 1 C871
41D1 14B6 5B7 AACK* A8 41B5 5D3 DL7 E1 CPU_DATA<39> 39
0.01UF 0.001UF 0.001UF 0.001UF 0.001UF 0.001UF 0.001UF 0.001UF 0.001UF
AACK* 3B8 3B6 DL8 D1 CPU_DATA<40> 40
5D4 41A5 41B5 41C5
CPU_DATA<0..63> 3A8 3B7 3B8 3C7 20% 20% 20% 20% 20% 20% 20% 20% 20%
41D1 14A8 5B7 ARTRY* W7 ARTRY* 5B4 2 50V 2 50V 2 50V 2 50V 2 50V 2 50V 2 50V 2 50V 2 50V
14A6 DRTRY* W3 DRTRY* 41B5 DL9 F1 CPU_DATA<41> 41 5B3 5B4 5C4 5D3 CERM
402
CERM
402
CERM
402
CERM
402
CERM
402
CERM
402
CERM
402
CERM
402
CERM
402
3B8 3B6 DL10 G2 CPU_DATA<42> 42 41D5
41A1 14A8 5A4 CPU_DBG* Y5 DBG* 5D3 5B4 CPU_DATA<43>
41B5 5D3 DL11
F2 43
41D1 14D6 5A4 DBWO* A6 DBWO*
CPU_DATA<44>
5B4 3B8 DL12 H2 44
1 C884 C892 1 C894 1 C885
41D5 3B6 DL13 H4 CPU_DATA<45> 45
0.1UF
1 C888 1 C890 1 C891 1
0.1UF
1 C889 1 C893 0.001UF
5D4 5D3 3B8 3B6 0 CPU_DATA<0> W18 DH0 41B5 20% 0.1UF 0.1UF 0.1UF 0.1UF 20% 0.01UF 0.01UF 20%
5D4 5D3 3B8 3B6 1 CPU_DATA<1> T17 DH1 5D3 5B4 3B8 DL14
G1 CPU_DATA<46> 46 Y14 AGND 20% 20% 20% 20%
2 10V
20% 20%
10V
2 CERM 2 10V 10V 2 10V 2 50V 2 50V 2 50V
2 10V CERM
41A5 3B6 DL15 K2 CPU_DATA<47> 2 CERM CERM CERM CERM
41D5 3B6 2 CPU_DATA<2> Y20 DH2 47
402 CERM
402
CERM
402 402 402 402 CERM
402 402 402
41D5 5D4 5D3 3B8 3 CPU_DATA<3> Y19 DH3 5B4 3B8 3B6 DL16 J2 CPU_DATA<48> 48
5D3 CPU_DATA<49>
CPU_DATA<4> W20 DH4 41A5 DL17 K1 49
41D5 4
5B4 3B8 3B6 DL18 J1 GND59 W19 C783
5D4 5D3 3B8 3B6 5 CPU_DATA<5> V19 DH5 5D3
CPU_DATA<50> 50
GND58 W2
1 C778 1 C779 1 C780 1 C781 1 C782 1

41A5 5D3 DL19 L2 CPU_DATA<51> 51 0.1UF 0.1UF 0.1UF 0.1UF 0.01UF 0.01UF
5D4 5D3 3B8 3B6 6 CPU_DATA<6> U19 DH6 GND57 V16 20% 20% 20% 20% 20% 20%
41D5 3B6 7 CPU_DATA<7> T16 DH7 41A5 3B6 DL20 M2 CPU_DATA<52> 52 10V
2 CERM
10V
2 CERM 10V
2 CERM 2 10V 2 50V 2 50V
CERM
5B4 3B8 GND56 V13 CERM CERM
41D5 5D4 5D3 3B8 8 CPU_DATA<8> T19 DH8 5D3 402 402 402
B 5B4
3B8
DL21 L1
DL22 N2
CPU_DATA<53>
CPU_DATA<54>
53

54
GND55 V8
402 402 402

L800
B
41D5 5D4 5D3 3B8 9 CPU_DATA<9> U20 DH9 3B6 41A5 5D3 DL23 N4 CPU_DATA<55> GND54 V5
41D5 3B6 10 CPU_DATA<10> V20 DH10 41A5
5B4 3B8
3B6 DL24 N1
55
GND53 U11 40C4 37C1 36B7
U103
LTC1761ES5-SD
R801 100-OHM-EMI
5D4 5D3 3B8 3B6 11 CPU_DATA<11> R19 DH11 5D3
CPU_DATA<56> 56
+2_5V_MAIN SOT-23
46C7 +AVDD_CPU_SLEEP 2 PLACE CLOSE TO SAHARA +A1VDD_CPU_SLEEP 1 2 +A1VDD_CPU_F_SLEEP
CPU_DATA<57> GND52 U10 23A8 18D7 11D8 10D3 1
IN OUT
5 1 2
5D4 5D3 3B8 3B6 12 CPU_DATA<12> N17 DH12 5B4 41A5 5D3 DL25 P1 57
B2 GND0 GND51 T18 23D8 23D6 23D1 23B7 5% SM
41D5 13 CPU_DATA<13> P17 DH13
3B8 3B8 3B6 DL26 P4 CPU_DATA<58> 58
B19 GND50 T14
1
R1113 1/16W 1 C872 1
C873 1 C874 1 C875 PLACE CLOSE TO SAHARA
41C5 3B6 41A5 5B4 DL27 P2 GND1 MF
3 4

5D3 5C4 3B8 3B6 14 CPU_DATA<14> R20 DH14

CPU_DATA<59> 59
C5
SHDN ADJ 15K 603 0.1UF 10UF 0.1UF 0.01UF
3B8 3B6 CPU_DATA<60> GND2 GND49 T7 C784 1 1% 20% 20% 20% 20%
5D3 5C4 3B8 3B6 15 CPU_DATA<15> P20 DH15 5B4 5D3 5B4 DL28
R2 60 1/16W 2 10V 2 6.3V 2 10V 50V
C8 2 CERM
GND3 GND48 T3 MF CERM TANT CERM
41C5 3B6 16 CPU_DATA<16> N20 DH16 3B6 41A5 5D3 DL29 R1 CPU_DATA<61> 61
C13
0.1UF 2 603
1 C786 402 SMA 402 402
3B8 CPU_DATA<62> GND4 GND47 R11 20%
0.1UF
41C5 5D3 5C4 3B8 17 CPU_DATA<17> P19 DH17 5D3 5B4 5B3 DL30 U2 62
C16 16V 2
GND5 GND46 R10

2
20%
CPU_DATA<0..63> 41A5 3B6 DL31 T1 CPU_DATA<63> 63 41D1 CERM
1 2 16V
L801
18 CPU_DATA<18> M20 DH18 3B8 14C8
D10 GND6 GND45 P16 603 R1114 CERM
603 R802 100-OHM-EMI
41C5 5D3 5C4 3B8 19 CPU_DATA<19> L20 DH19 QREQ* U8 QREQ* 5B7 D11 GND7 GND44 P13 68.1K 1
2 2
PLACE CLOSE TO SAHARA
+A2VDD_CPU_SLEEP 1 2 +A2VDD_CPU_F_SLEEP
1%
41C5 3B6 20 CPU_DATA<20> M19 DH20 QACK* Y8 QACK* 3A3 E3 GND8 GND43 P8 38B8 35B8 19D3 18A6 SLEEP_L_LS 1/16W
MF 5% SM
5D3 5C4 3B8 3B6 21 CPU_DATA<21> L19 DH21 41D1 E7 GND42 P5 1/16W 1 C876 1 1 C878 1 C879
5D3 5C4 3B8 3B6 22 CPU_DATA<22> K20 DH22 CKSTP_IN* Y10 CHKSTP_IN* 14A8
GND9 2 603 MF
0.1UF
C877 0.1UF 0.01UF
PLACE CLOSE TO SAHARA
E14 GND10 GND41 N18 603 10UF
41C5 CKSTP_OUT* Y12 CHKSTP_OUT* 14A8 OMIT
20% 20% 20% 20%
23 CPU_DATA<23> J19 DH23 THT E18 GND11 GND40 N13 PLACE CLOSE TO PANGEA 2 10V 2 6.3V 2 10V 2 50V
15D2 R803 CERM TANT CERM CERM
41C5 24 CPU_DATA<24> K19 DH24 CLKOUT T5 NC TP105 LAYOUT ADD GND POINT NEAR BY TP105 F10 GND12 GND39 N12 100
402 SMA 402 402
PAN_QACK* QACK* 3A6
5D3 5C4 3B8 3B6 25 CPU_DATA<25> G20 DH25 TBEN W8 A TBEN F11 GND13 GND38 N9 41D1 14B6 5B7 1 2
5D3 5C4 3B8 3B6 26 CPU_DATA<26> H20 DH26 RSRV* Y4 5% 41D1
NC G5 GND14 GND37 N8 1/16W
3 DD1X
41C5 3B6 27 CPU_DATA<27> H17 DH27 SMI* W10 SMI* G8 DD1X MF
14B8 GND15 GND36 N3 603 D Q800
41C5 5D3 5C4 3B8 28 CPU_DATA<28> H19 DH28 R804
TLBISYNC* W11 TLBISYNC* 14B8 G13 GND16 GND35 M12 2N7002
+3V_MAIN 100K 2 POS_HRESET SM
41C5 29 CPU_DATA<29> F19 DH29 TA* A12 TA* 5A4 41D1 G16 GND17 GND34 L17 1 1 G S
5D3 5C4 3B8 3B6 30 CPU_DATA<30> G17 DH30 TEA* W6 TEA* 14C85A4
41D114B8
H3 GND18 GND33 L14 5%
1/16W 2
PROCESSOR
5D3 5C4 3B8 3B6 31 CPU_DATA<31> F20 DH31 H8 GND19 GND32 L10 MF DESCRIPTION:
41B5 INT* Y9 CPU_INT* 13D1 603 DD1X
H9 GND20 GND31 L7
43C4 6C6 3A4 CPU_CLK W16 SYSCLK 3 QACK* HIGH IS 32-BIT BUS MODE ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
MCP* W12 14B8 MCP* H12 GND21 GND30 L4 R805 DD1X
A 4D4 CPU_PLL_CFG<0> Y18 PLL_CFG0
4D3 CPU_PLL_CFG<1> W17 PLL_CFG1
SRESET* Y7 SRESET*
14A815B2 H13 GND22 GND29 K17 14A6 3A6 CPU_HRESET* 1
4.7K 2 1 Q801
QACK* LOW IS 64-BIT BUS MODE
SAMPLED AT CPU_HRESET* NOTICE OF PROPRIETARY PROPERTY
A
HRESET* Y11 CPU_HRESET* 15D2 3A4 H18 GND23 GND28 K14 15D2 15B2 5% 2N3904
4D2 CPU_PLL_CFG<2> Y17 PLL_CFG2 14A6 1/16W SM
J12 GND24 GND27 K10 MF 2 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
4D1 CPU_PLL_CFG<3> U16 PLL_CFG3 PLL_RANGE0 W15 PLL_RNG<0> 4B4 15D2 603 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
K4 GND25 GND26 K7 KEEP STUB SHORT! AGREES TO THE FOLLOWING
4D1 CPU_PLL_CFG<4> W14 PLL_CFG4 PLL_RANGE1 U14 PLL_RNG<1> 4B2
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
TABLE_5_HEAD
43C4 6C6 3A8 CPU_CLK
II NOT TO REPRODUCE OR COPY IT
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION NOSTUFF PLACE AFTER
1 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
TABLE_5_ITEM
R806 1 C880 PROCESSOR
337S2514 1 IC,SAHARA,1.2,700MHZ,1.5V CORE,85C,292 CBGA U2 OASIS_700MHZ TABLE_5_HEAD

47 20pF SIZE DRAWING NUMBER REV.

TABLE_5_ITEM
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION 1% 10%
ACI: C
337S2509 1 IC,SAHARA,1.2,600MHZ,1.5V CORE,85C,292 CBGA U2 OASIS_600MHZ
TABLE_5_ITEM
113S1102 1 RES,FF,100 OHM 5%,1/16W,0603,SMD R803 DD1X
TABLE_5_ITEM

KEEP ROUTE ON INTERNAL LAYER 1/16W

MF
2 603
2 50V
CERM
603
CLOCK INPUT
APPLE COMPUTER INC.
D 051-6130-C ECS:1.B
337S2589 1 IC,SAHARA,1.2,700MHZ,1.5V CORE,85C,SFTO
U2 MIRAGE_700MHZ TABLE_5_ITEM

SCALE SHT OF
113S1000 1 R803 DD2X
337S2588 1 IC,SAHARA,1.2,600MHZ,1.5V CORE,85C,SFTO
U2 MIRAGE_600MHZ
TABLE_5_ITEM
RES,FF,0 OHM 5%,1/16W,0603,SMD
NONE 3 53

8 7 6 5 4 3 2 1
 CR-4

8 7 6 5 4 3 2 1

STATE ENCODING CPU_VCORE_HI_OC CPU_PLL_STOP_OC

15B1 14D8 14D6 14C6 14A7 14A6 13D1 5C2 4B4 3D5 3C4 +VIO_CPU_SLEEP
46B7 36B4 35C3 15D2
1
HIGH SPEED 1 0 R807 1
R811 1
R815 1
R819 1
R823
4.7K
5% 4.7K 4.7K 4.7K 4.7K
1/16W 5% 5% 5% 5%
MF 1/16W 1/16W 1/16W 1/16W
LOW SPEED 0 0 2 603 MF
2 603
MF MF
2 603
MF
2 603 2 603
CPU_PLL_CFG<0> 3A8
PLL OFF X 1 CPU_PLL_CFG<1> 3A8
D CPU_PLL_CFG<2> 3A8
D
CPU_PLL_CFG<3> 3A8
BUS SPEED 66 100 CPU_PLL_CFG<4>

CPU_PLL_CFG[0:4] CORE:BUS RATIO

NOSTUFF NOSTUFF NOSTUFF NOSTUFF NOSTUFF NOSTUFF NOSTUFF NOSTUFF NOSTUFF 600MHZ NOSTUFF NOSTUFF NOSTUFF
1 1 1 1
1
R808 R809 1R810
1 1
R812 1 1
R813 R814 R816 R817 R818 1
R820 R821 1R822
1
R824 1
R825 1R826
00000 OFF 0
5%
0
5%
0
5%
0
5%
0
5%
0
5%
0
5%
0
5%
0
5%
0
5%
0
5%
0
5%
0
5% 5%
0
5%
0
1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W
MF MF MF MF MF MF MF MF MF MF MF MF MF MF MF
2 603 2 603 2 603 2 603 2 603 2 603 2 603 2 603 2 603 2 603 2 603 2 603 2 603 2 603 2 603
00001 OFF
46B7 40D4
25B5 25A6 22C1
00010 PLL BYPASS 15C7 15C5 15B7
9D4 6C5 6B5 +3V_SLEEP
15B5 15A5 13B3 PWRSTEP
00011 PLL BYPASS 22B5
35D2
20D6
27C6
20C8
25D4 1
PWRSTEP
1 1
PWRSTEP
R827 R828 R830 CPU_PLL_01
47K 10K 10K
5% 5% 5%
00100 2.0:1 N/A N/A 1/16W
MF
1/16W
MF
1/16W
MF
3 PWRSTEP

2 603 2 603 2 603 D Q802

00101 2.5:1 N/A N/A 2N7002
1 SM
NO PWRSTEP G S
R829
00110 3.0:1 N/A N/A 1
0 2
2
CPU_PLL_00
5%
1/16W 3 PWRSTEP
00111 3.5:1 C
C N/A N/A MF
603 D
Q803
2N7002
01000 4.0:1 N/A N/A 1 G S
SM

3 PWRSTEP PWRSTEP 2
01001 4.5:1 N/A N/A 1
R852
D
Q805 100K
2N7002 5%
CPU_PLL_10
SM
01010 5.0:1 N/A 500 21B6 CPU_PLL_STOP_OC 1 G S 1/16W
MF
2 603 3
PWRSTEP
2
01011 5.5:1 N/A 550 1 Q804
2N3904
SM
2
01100 6.0:1 N/A 600 38B4 38A4 21D3 6C5 6B8 4A4 CPU_VCORE_HI_OC

01101 6.5:1 N/A 650

01110 7.0:1 N/A 700

01111 7.5:1 500 750

10000 8.0:1 533 800

PLL_RNG[0:1] PLL FREQUENCY RANGE 46B7
14A7 14A6 13D1 5C2 4D5 3D5 3C4 +VIO_CPU_SLEEP
10001 8.5:1 567 850 36B4 35C3 15D2 15B1 14D8 14D6 14C6
B 00 500-750 MHZ
1
LOW PLL RANGE B
10010 9.0:1 600 900 R853 3
HIGH_PLL_RANGE_NO_PWRSTEP
4.7K 1
R1123
5%
01 750-1200 MHZ 1/16W HIGH PLL RANGE PWRSTEP
D Q807 4.7K
10011 9.5:1 633 950 MF
2 603
2N7002
SM
5%
1/16W
1 G S MF
2 603
10100 10.0:1 667 1000 10 UP TO 500 MHZ 3A6 PLL_RNG<0>
2

10101 11.0:1 733 N/A 11 RESERVED 3 MID OR HIGH RANGE NO PWRSTEP 3A6 PLL_RNG<1>
MID OR HIGH RANGE PWRSTEP 1
D Q806 R1122
2N7002 10K LOW OR MID PLL RANGE
10110 12.0:1 800 N/A
38B4 38A4 21D3 6C5 6B8 4B6 CPU_VCORE_HI_OC
1
G S
SM 5%
1/16W
1
R831
MF
2 603
10K
2 5%
10111 13.0:1 867 N/A SYSTEM LOW SPEED HIGH SPEED 1/16W
MF
PLL_RNG[0:1] PLL_RNG[0:1] 2 603

11000 14.0:1 933 N/A LOW RANGE ONLY 10 10

11001 15.0:1 1000 N/A
LOW TO MID RANGE 10 00
11010 16.0:1 N/A N/A
LOW TO HIGH RANGE 10 01 CPU PLL CONFIGURATION
DESCRIPTION:
11011 17.0:1 N/A N/A
ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
A 11100 18.0:1 N/A N/A NOTICE OF PROPRIETARY PROPERTY
A
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
11101 19.0:1 N/A N/A
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
11110 20.0:1 N/A N/A
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

11111 OFF ACI: C
APPLE COMPUTER INC.
D 051-6130-C ECS:1.0
SCALE SHT OF
NONE 4 53

8 7 6 5 4 3 2 1
 CR-5

8 7 6 5 4 3 2 1
22B1 16D4 15D7 15D3 15C2 14D2 14C3 14B3 13D6 13C8 13C3
R296
+3V_MAIN 10 40C6 +3V_AVDD5_PANGEA_MAIN
8D6 8D4 8B6
13B8 13A8
7D4
11C8
7D2
11B8
7C7
11A5
7B4
10D7
7B2
10D4
6D4
9D3
6B5
9D2
3A4
8D7
1
5%
MA=34MA 1/16W
2
PANGEA CORE
21D7 21C7 21C3 20C3 20C2 20B3 19C3 18C7 18B6 18A4
MF
1 A15 1 C308
46B7 40D6 36C6 35D4 35B5 35B3 34B2 28C5 26D6 25B4 603 4.7UF 0.01UF
N20P80% 20%
10V 50V
2 CERM 2 CERM
805 603

AJ5
AVDD5

CPU_DATA<0..63> 3A8 3B6 3B7 3B8 3C7 5B3 5B4 5C4 5D4 41A5 41B5 41C5
D_0 AJ15 3B8 3B6 CPU_DATA<0> 0 41D5
41D5 5D3
D 41D1 14C8 3D8 CPU_BR* AP16
AH19
BR CRITICAL
41D5 5D3 3B8 3B6 D_1
D_2
AK6
AJ9
CPU_DATA<1>
CPU_DATA<2>
1

2
D
41A1 14C6 3D8 CPU_BG* BG PROJECT AK14 3B8 3B6 CPU_DATA<3>
D_3 3
41D5 5D3
U4 41D5 5D3 3B8 3B6 D_4 AM6 CPU_DATA<4> 4

AN14 PANGEA D_5 AH12 3B8 3B6 CPU_DATA<5> 5

41D1 14C8 3D8 TS* TS (1 OF 6) 41D5 5D3 3B8 3B6 D_6 AM11 41D5 5D3 CPU_DATA<6> 6
41A1 5D7 5C7 3D8 3C8 41C1 5D7 CPU_ADDR<0..31>
41C1 41B1 3D8 0 CPU_ADDR<0> AK23
A_0 PBGA D_7 AN18 CPU_DATA<7> 7

41C1 5D7 3D8 1 CPU_ADDR<1> AP27

A_1 D_8 AM18 3B8 3B6 CPU_DATA<8> 8

41C1 5D7 3D8 2 CPU_ADDR<2> AP28

A_2 41D5 5D3 3B8 3B6 D_9 AJ16 41D5 5D3 CPU_DATA<9> 9

41C1 5D7 3D8 3 CPU_ADDR<3> AN26

A_3 D_10 AK8 3B8 3B6 CPU_DATA<10> 10

41C1 5D7 3D8 4 CPU_ADDR<4> AK24

A_4 41D5 5D3 3B8 3B6 D_11 AH16 41D5 5D3 CPU_DATA<11> 11

41C1 5D7 3D8 5 CPU_ADDR<5> AN24

A_5 D_12 AH8 CPU_DATA<12> 12

41C1 5D7 3D8 6 CPU_ADDR<6> AM26

A_6 D_13 AM14 3B8 3B6 CPU_DATA<13> 13

41C1 5D7 3D8 7 CPU_ADDR<7> AJ23

A_7 41C5 5D3 3B8 3B6 D_14 AP3 41C5 5D3 CPU_DATA<14> 14

41C1 5D7 3D8 8 CPU_ADDR<8> AM24

A_8 D_15 AJ10 3B8 3B6 CPU_DATA<15> 15

41C1 5D7 3D8 9 CPU_ADDR<9> AH23

A_9 41C5 5D3 3B8 3B6 D_16 AN4 41C5 5D3 CPU_DATA<16> 16

41C1 5D7 3D8 10 CPU_ADDR<10> AM23

A_10 D_17 AJ12 CPU_DATA<17> 17

41C1 5D7 3D8 11 CPU_ADDR<11> AN23

A_11 D_18 AM9 3B8 3B6 CPU_DATA<18> 18

41B1 5D7 3D8 12 CPU_ADDR<12> AJ22

A_12
MAXBUS 41C5 5D3 3B8 3B6 3A8 D_19 AN13 41C5 5D3 CPU_DATA<19> 19

41B1 5D7 3D8 CPU_ADDR<13> AN22 INTERFACE AK12 CPU_DATA<20>

13 A_13 D_20 20

41B1 5D7 3D8 14 CPU_ADDR<14> AP26

A_14 D_21 AK15 CPU_DATA<21> 21

41B1 5D7 3D8 15 CPU_ADDR<15> AP21

A_15 D_22 AM12 CPU_DATA<22> 22

41B1 5D7 3D8 16 CPU_ADDR<16> AH22

A_16 D_23 AP4 CPU_DATA<23> 23

41B1 5D7 3D8 17 CPU_ADDR<17> AM21

A_17 D_24 AH13 CPU_DATA<24> 24

41B1 5D7 3D8 3C8 18 CPU_ADDR<18> AJ21

A_18 D_25 AP5 CPU_DATA<25> 25

41B1 5D7 3D8 3C8 19 CPU_ADDR<19> AK20

A_19 D_26 AH15 CPU_DATA<26> 26

41B1 5D7 3D8 3C8 20 CPU_ADDR<20> AK21

A_20 D_27 AN5 CPU_DATA<27> 27

C 41B1
41B1
5D7
5D7
3D8
3D8
3C8
3C8
21 CPU_ADDR<21>
CPU_ADDR<22>
AN25
AP24
A_21 D_28 AN6
AP6
CPU_DATA<28>
CPU_DATA<29>
28 C
22 A_22 D_29 29

41B1 5D7 3D8 3C8 23 CPU_ADDR<23> AP25

A_23 D_30 AJ13 CPU_DATA<30> 30

41B1 5D7 3D8 3C8 24 CPU_ADDR<24> AH20

A_24 D_31 AM15 CPU_DATA<31> 31

41B1 5D7 3D8 3C8 25 CPU_ADDR<25> AH21

A_25 D_32 AJ17 CPU_DATA<32> 32

41B1 5D7 3D8 3C8 26 CPU_ADDR<26> AP23

A_26 D_33 AN12 CPU_DATA<33> 33

41B1 5D7 3D8 3C8 27 CPU_ADDR<27> AM20

A_27 D_34 AN19 CPU_DATA<34> 34 +VIO_CPU_SLEEP 3C4 3D5 4B4 4D5 13D1 14A6 14A7 14C6 14D6 14D8 15B1 15D2
41B1 5D7 3D8 3C8 28 CPU_ADDR<28> AJ20
A_28 D_35 AN17 CPU_DATA<35> 35 35C3 36B4 46B7
41A1 5D7 3D8 3C8 29 CPU_ADDR<29> AN21
A_29 D_36 AN11 CPU_DATA<36> 36
1
41A1 5D7 3D8 3C8 30 CPU_ADDR<30> AJ19
A_30 D_37 AH17 CPU_DATA<37> 37 R75
41A1 5D7 3D8 3C8 CPU_ADDR<31> AP22 AN10 CPU_DATA<38>
4.7K
31 A_31 D_38 38 5%
1/16W
AJ25 D_39 AK17 CPU_DATA<39> 39 5D3 MF
41A1 14B6 3B8 CI* CI AN9 CPU_DATA<40> 3B8 2 603
AP29 D_40 40
3B6
41A1 14C8 3C8 GBL* GBL AP19 CPU_DATA<41>
63 CPU_DATA<63>
41D1 14C8 3C8 TBST* AN28
TBST
D_41 41 3B7 1
NOSTUFF

41C1 3C8 TSIZ<0> AP30 D_42 AM17 CPU_DATA<42> 42 5B4 R293

TSIZ_0 AM8 CPU_DATA<43>
41A5 4.7K
AN29 D_43 43
5%
41C1 3C8 TSIZ<1> TSIZ_1 AJ11 CPU_DATA<44> 1/16W
AH25 D_44 44
MF
41C1 3C8 TSIZ<2> TSIZ_2
AK27 D_45 AK18 CPU_DATA<45> 45 2 603
41D1 3C8 TT<0> TT_0 AH14 CPU_DATA<46>
AP31 D_46 46
NOTE: USE 10 MILS 40OHM TRACE
41D1 3C8 TT<1> TT_1 AM5 CPU_DATA<47>
NOSTUFF
AN30 D_47 47
41C1 3C8 TT<2> TT_2 AH11 CPU_DATA<48> R65 R287 R70 R292
D_48 48 SHORT STUBS SHORT STUBS
41C1 3C8 TT<3> AM29
TT_3 AK9 43C4
0 SHORT STUBS 0 43C4 CPUFB2 0 0 SHORT STUBS
AH26 D_49 CPU_DATA<49> 49 CPUFB4 1 2 CPUFB3 1 2 1 2 CPUFB1 1 2 CPUFBIN 5B8 43C4
41C1 3C8 TT<4> TT_4 AJ8 CPU_DATA<50> 5% 5% 5% 5%
AK26 D_50 50
41A1 14B6 3B8 WT* WT AJ14 CPU_DATA<51>
1/16W
MF
1/16W
MF
1/16W
MF
1/16W
MF
D_51 51
603 603 603 603
41D1 14B6 3B8 AACK* AN20 AK11 CPU_DATA<52>
AACK D_52 52 NOSTUFF NOSTUFF NOSTUFF
AP14 AH9 1
41D1 14A8 3B8 ARTRY* ARTRY D_53 CPU_DATA<53> 53 NOSTUFF NOSTUFF R290
B 14A8 HIT*
NOT USED BY CPU
AN16
HIT D_54
D_55
AH10
AP10
CPU_DATA<54>
CPU_DATA<55>
54

55
1
R67
0
1
R288
0
1
R76
0
5%
1/16W
B
AP12 CPU_DATA<56>
5% 5% 0 MF
AN15 D_56 56 1/16W 1/16W 5% 2 603
41D1 14C8 3A6 QREQ* QREQ AP8 CPU_DATA<57>
MF MF 1/16W
D_57 57
2 603 2 603 MF
AP9 NOSTUFF 2 603
R302 41D1 14B6 3A4 PAN_QACK* AJ26
QACK
D_58 CPU_DATA<58> 58
R66 R286 R71 R289
0 D_59 AP13 CPU_DATA<59> 59
PANGEA_SUSP_REQ* 1 2 PANGEA_SUS_REQ_IN* AJ32
SUSPENDREQ 0 2 43C4
0 0 0
AJ33 D_60 AP11 CPU_DATA<60> 60 1 CPUFB5 1 2 CPUFB6 1 2 43C4 CPUFB7 1 2 TCPUFBOUT 6C5 43C4
5%
1/16W
21B5 PANGEA_SUSP_ACK* SUSPENDACK AN7 CPU_DATA<61> 5% 5% 5% 5%
MF 5B1 CPUFBIN
D_61 61
1/16W
SHORT STUBS
1/16W
SHORT STUBS
1/16W
SHORT STUBS
1/16W
SHORT STUBS
603 AN8 CPU_DATA<62> MF MF MF MF
43C4 D_62 62
603 603 603 603
R613 AK5 D_63 AP7 3B7 3B6 CPU_DATA<63> 63 NOSTUFF NOSTUFF
33 CPU_FB_IN 5D3 5B3 3B8 2" longer 1" longer MAX-BUS" 2" shorter
43B4 6D8 FBOUT_CLK 1 2 AL2
CPU_FB_OUT DBG AJ18 41A5 CPU_DBG* 3B8 14A8 41A1 1" shorter
5%
NOSTUFF (0.5 ns longer) (0.2 ns longer) (zero delay) (0.2ns faster) (0.5 ns faster)
1/16W 1 C305 AP15 DRDY* 14A8
MF
603 20pF
10% AM34
DRDY
DRDRY NOT USED BY CPU DELAY LENGTHS:
50V STOPCPUCLK
2 CERM AH24
603 DTI_0 DBWO* 3B8 14D6 41D1
AM30
ACS_REF DTI_1 AM27 DTI<1>
DTI<1..2> NOT USED BY CPU
ROUTE DELAY NETWORK ON INTERNAL LAYER
AN27 DTI<2>
DTI_2
43C4 TP20 1 PANGEA_CPU_CLK AM1
CPU_CLK
DTI<1..2> CAN BE OPEN FOR A G3
A TA AJ24 TA* 3A6 14C8 41D1
AP20 TEA* 3A6 14B8 41D1
TEA

AVSS5

40C4 PANGEA_ACS_REF
AG7 Pangea Processor IF
Series R on CPU_CLK work with shunt DESCRIPTION:

R to drop voltage to 1.8V/2.5V ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC

A 1
A
R73 R298 NOTICE OF PROPRIETARY PROPERTY
0 1K
21C3 CPU_STOP_CLK* 1 2 PANGEA_STOPCPUCLK 1% (2.4MA)
TABLE_5_HEAD

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1/16W PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
5% MF AGREES TO THE FOLLOWING
1/16W
2 603
TABLE_5_ITEM

MF 343S0557 1 RFA-127675,PANGEA,PBGA-34X34-700 U4 PROJECT I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

603
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

ACI: C
APPLE COMPUTER INC.
D 051-6130-C
ECS:1.0
SCALE SHT OF
NONE 5 53

8 7 6 5 4 3 2 1
 CR-6

8 7 6 5 4 3 2 1
SPREAD SPECTRUM CLOCK GENERATOR R847 MCLK<1> 42D1
0
1 2 8B4
5%
TO SODIMM BANKA CLOCK 40C6 +3V_AVDD4_PANGEA_MAIN

6B4
46B7
6C4
+3V_CLKGEN_AVDD_SLEEP

+3V_CLKGEN_SLEEP
1/16W
MF
603 1
R848
4.7K
35B5
15D3
8D4
35B3
15C2
8B6
34B2
14D2
7D4
28C5
14C3
7D2
26D6
14B3
7C7
25B4
13D6
7B4
22B1
13C8
7B2
21D7
13C3
6B5
21C7
13B8
5D6 3A4
+3V_MAIN
1
R308
10 2 1 A59
1 C324
0.01UF
PANGEA CORE
6C8 5% 13A8 11C8 11B8 11A5 10D7 10D4 9D3 9D2 8D7 8D6 5% 1uF 20%
6D4
1/16W 21C3 20C3 20C2 20B3 19C3 18C7 18B6 18A4 16D4 15D7 MA=TBD 1/16W 20% 2 50V
MF
46B7 40D6 36C6 35D4 MF 2 10V
CERM
CERM
603
46B7 2 603 603
805
42D5 42C5 42B5 42A5 8D5 8D4
8C4 8B5 8C5 AG2
M_ADDR<12..0> 6A8 6B8 6C2 6D2
8A4 7D5 7D1 7C3 7C1 7B1 7A3 7A1
6C3 6B3 6D3 MDATA<63..0> 42C1
AVDD4 42C1
CHANGE LAYOUT FOR CLOCK GENERATOR U40 8B4 8A5 6D1 6B8 RAD_0 AB2 M_ADDR<0> 0
7C3 6D4 8D5 7D5 MDATA<0> AG1

D 42D5 6D4
0 RAMDATA_0 42C1 6D1 6B8
42C1 6D1 RAD_1 AA2 M_ADDR<1> 1
D

11
AF3
R843 R1118 1 MDATA<1> RAMDATA_1
CRITICAL 42C1 6A8 RAD_2

2
Y3

3
42D5 8D5 7D5 7C3 M_ADDR<2> 2
0 MCLK<0> 10K 2 MDATA<2> AF1
RAMDATA_2
2 +3V_CLKGEN_SLEEP 6C4
VDD VDDL AVDD 1
5%
2 7A2 7A4 7C2 7C4 42D1
NOSTUFF
1
6D8 46B7
6C8 3 MDATA<3> AE2
RAMDATA_3 U4 6D1 6B8 RAD_3 Y7
W6
M_ADDR<3>
M_ADDR<4>
3

1/16W TO ON BOARD SDRAM CLOCK

5%
1/16W 8D5 7D5 7C3 6D4 4 MDATA<4> AE1
RAMDATA_4 PANGEA 42C1 6D1 RAD_4 4

CY28507 43B4 7 28507_CLK5

MF
603
1
R844 R207 MF 42D5
603 42D5 8D5 7D5 7C3 6D4 5 MDATA<5> AD2
RAMDATA_5
(2 OF 6) 42C1 6B8 RAD_5
Y5 M_ADDR<5> 5

5A8 FBOUT_CLK 1 CLKA

4.7K BANK0 21B3 15C8 PMU_IIC_CLK 1 4.7K 2 OEDE
6D8 8D5 7D5 7C3 6D4 MDATA<6> AD1
PBGA 6D1 6A8 RAD_6 L1 M_ADDR<6> 6
XIN 5% 6 RAMDATA_6 42C1 6D1 6A8 RAD_7 N6
43B4 1/16W 5% 42D5 6D4 MDATA<7> AC2
M_ADDR<7> 7
TSSOP MF 1/16W
7 RAMDATA_7 42C1 6D1 6A8 RAD_8 L2 M_ADDR<8>
603
6D4 42D5 8D5 7D5 7C3
8
6C4 CLKSEL 4 CLKSEL
43B4 8 28507_CLK3 2 MF 42D5 8C5 7D5 7C3 8 MDATA<8> Y1
RAMDATA_8
CLKB 402 42C1 6D1 6A8 RAD_9 K1 M_ADDR<9> 9
NOSTUFF 8C5 7D5 7C3 6D4 42D5 8C5 7D5 7C3 9 MDATA<9> Y2
RAMDATA_9 42C1 6D1 6A8 RAD_10 K2 M_ADDR<10>
U801 R1119 42D5
10
10 43B4 9 28507_CLK4 R204 42D5 6D4 10 MDATA<10> W1
RAMDATA_10
6D4 OEDE OEDE CLKC 100MHZ 4.7K 2 10K 2 +3V_CLKGEN_SLEEP 7C3 6D4 11 MDATA<11> W2
RAMDATA_11
42C1 6D1 6A8 RAD_11 M7 M_ADDR<11> 11

21B3 15B8 PMU_IIC_DAT 1 1

8C5 7D5 42C1 6D1 6A8 RAD_12 T6 M_ADDR<12> 12
R845 574_CLK 5% 5%
7C3 6D4 12 MDATA<12> V2
RAMDATA_12 N7 M_BA0 6A5 43C1
13A8 STOPXTAL* 15 43B4 12 28507_CLK2 27 1/16W 1/16W 42D5 8C5 7D5 13 MDATA<13> U2
RAMDATA_13
BA_0
OE CLKD 1 2 7B8 43B4 MF MF BA_1 M6 M_BA1 6A5 43B1
21C3 5%
603 603 42C5 8C5 7D5 7C3 6D4 14 MDATA<14> T1
RAMDATA_14
TBEN
16 43B4 14 28507_CLK1
1/16W TO LVT574 CLOCK 42C5 8C5 7D5 7C3 6D4 15 MDATA<15> T2
RAMDATA_15 SDCS_0 M3 CS0* 6A4 43C1
XOUT CLKE
MF
603 R835 42C5 8B5 7D5 7D1 6D4 MDATA<16> R1 M5 CS1* 6A4 43C1
CPU_VCORE_HI_OC 0 2 CLKSEL 6D8
16 RAMDATA_16 SDCS_1
NOSTUFF 38A4 21D3 6B8 4B6 4A4 1
17 MDATA<17> R2
RAMDATA_17 SDCS_2 R3 CS2* 6A4 43C1
R846 38B4 5% 42C5 P3 P7
MDATA<18> RAMDATA_18 SDCS_3 CS3* 6A4 43C1
PLACE CLOSE TO U40 8B5 7D5 42C5
1/16W 18
10 2 LACLK MF 7D1 6D4 P2
AVSS VSSL VSS 1 20B6 603 PMU NOT RATED STRONG ENOUGH FOR 1K 8B5 7D5 19 MDATA<19> RAMDATA_19
7C1 6D4 MDATA<20> N1
RAMDATA_20 MEMORY
5

20
13

5%
6

1/16W TO J9 (LA I/F) CLOCK 42C5 8B5 7D5 7C1 6D4 MDATA<21> N2 INTERFACE
MF 21 RAMDATA_21
603
42C5 8B5 7D5 7C1 6D4 22 MDATA<22> M1
RAMDATA_22
TO SODIMM BANKB CLOCK
R841 42C5 8B5 7D5 7C1 6D4 23 MDATA<23> M2
RAMDATA_23
0 MCLK<3> L80 42C5 8B5 7D5 7C1 6D4 42C5 8B5 24 MDATA<24> J2
RAMDATA_24
SDDQM_0 AA1 DQM0* 7C4 8C5 43D1
1 2 8C5 42D1 +3V_SLEEP 400-OHM-EMI 46B7 6D8
7D5 7C1 6D4 H2 SDDQM_1 AB1 DQM1* 7C4 8C5 43D1
1
6D4 6C8 2
6C4 +3V_CLKGEN_SLEEP 25 MDATA<25> RAMDATA_25 J1
5%
1/16W
9D4 6B5 4C6 7D5 7C1 6D4 MDATA<26> G1 SDDQM_2 DQM2* 7C2 8B5 43D1
1 15A5 13B3 26 RAMDATA_26
MF R842 SM-1 42C5 8A5 SDDQM_3 H1 DQM3* 7C2 8B5 43D1
C 603 4.7K
5%
15B7 15B5
20C8 15C7 15C5
1/16W 22C1 22B5 20D6
1 C650
0.1UF
1 C651
2.2UF
1 C652
0.001UF
42C5
8A5 7D5 7C1
27

28
MDATA<27>
MDATA<28>
G2
F1
RAMDATA_27
RAMDATA_28
SDDQM_4 Y6
AA3
DQM4* 7A4 8C4 43D1 C
TBEN DIVIDE 3 CIRCUIT R837 20% N20P80% 20% SDDQM_5 DQM5* 7A4 8C4 43D1
22.1 1 CPU_CLK 3A4 3A8 43C4 2 603 40D4 35D2 27C6
MF
25D4 25B5 25A6 2
10V
CERM
16V
2 CERM 50V
2 CERM 42B5 6D4 29 MDATA<29> F2
RAMDATA_29
SDDQM_6 L3 DQM6* 7A2 8B4 43D1
+3V_CLKGEN_SLEEP 2 402 805 402 8A5 7D5 7C1 6D4 30 MDATA<30> E1
RAMDATA_30 L5
46B7 42B5 8A5 7D5 7C1 6D4 MDATA<31> H3 SDDQM_7 DQM7* 7A2 8B4 43D1
1% 31 RAMDATA_31
1/16W TO CPU CLOCK
MF 42B5 8D4 7D5 7A3 6D4 32 MDATA<32> AD3
RAMDATA_32 SDRAS P1 SDRAS* 6A5 43B1
1 C1100
603 R839 42B5 8D4 7D5 7A3 6D4 33 MDATA<33> AD5
RAMDATA_33 SDCAS T7 SDCAS* 6A5 43B1
10 1 TCPUFBOUT
0.1UF CPU HAS A BUILT IN PULLDOWN. 2 5B1 43C4 42B5 8D4 7D5 7A3 6D4 34 MDATA<34> AC3
RAMDATA_34 SDWE H5 MEMWE* 6A5 43B1
20% 1 C654 1 C653
10V 5% 1 C656 1 C655 AC5 D1 RAM_CKE0 7B8
MDATA<35> RAMDATA_35 SDCKE0 43C1
0.001UF 8D4
2 CERM 35
402 R838 TBENDIVCLK 1/16W
MF
1
R840 TO PANGEA FEEDBACK CLOCK 0.1UF 0.1UF 0.1UF
20% 20% 6D4 36 MDATA<36> AC6
RAMDATA_36 SDCKE1 R5 RAM_CKE1 7B8 43C1
10 2 603 4.7K 20% 20%
16

TBEN 1 6B8 10V 10V 10V 2 50V 7D5 7A3 AC7

16

5% 2 CERM 2 CERM 2 CERM CERM 37 MDATA<37> RAMDATA_37

TBEN 402 42B5 AA34 6A5
5% TBEN 43B4 1/16W 402 402 402 AB6 ROMCS ROMCS*
/PR VCC
5 MF 42B5 8D4 7D5 38 MDATA<38> RAMDATA_38
1/10W KEEP CLOCK
/PR VCC
11 Y32 ROMOE* 6A5 20B6
74LVC109 FF TO TBEN DIVIDE BY 3 2 603 7A3 6D4 MDATA<39> AB7 ROMOE
6B8 J_TO_Q* 2 74LVC109 805 39 RAMDATA_39 Y30 ROMRW* 6A5 ROUTES ON
J Q 6 14
J Q 10 42B5 8C4 7D5 7A3 6D4 40 MDATA<40> AA5
RAMDATA_40
ROMRW
INTERNAL
TBENDIVCLK 4 TSSOP TSSOP 42B5 8C4 7D5 7A3 6D4 AA6
CLK TBENDIVCLK 12 TBEN L81 41 MDATA<41> RAMDATA_41 42D1 MCLK_0 AK1 PANGEAMCLK<0> 1
LAYERS
U802 7 CLK
R850 46B7 400-OHM-EMI 42B5 8C4 7D5 7A3 6D4 42 MDATA<42> AA7
RAMDATA_42 42D1 MCLK_1 AJ3
A TP21
3
/K /Q
J_TO_Q* 13
/K
U802 22 TBEN 20D6 20C8 15C7 15C5 15B7 +3V_SLEEP 1 2 46B7 6D8 +3V_CLKGEN_AVDD_SLEEP 42B5 8C4 43 MDATA<43> AC1
RAMDATA_43
PANGEAMCLK<1> 1
A TP22
CPU_VCORE_HI_OC /Q 9 1 2 3A6 14B8 43B4 9D4 6C5 4C6 7A3 6D4 V3
42D1 MCLK_2 AG5 PANGEAMCLK<2> 1
TP23
1 /CLR 15B5 15A5 13B3 SM-1 44 MDATA<44> RAMDATA_44 42D1 MCLK_3 AH2
A
CPU_VCORE_HI_OC 15 5%
40D4 35D2 27C6 25D4 25B5 25A6 22C1 22B5 1 C662 1 C661 1 C660 1 C657 1 C658 7D5 PANGEAMCLK<3> 1
TP24
GND /CLR 1/16W
MF
45 MDATA<45> V5
RAMDATA_45 AF5
A
GND 603 1 R849 0.1UF 2.2UF 0.001UF 0.1UF 0.1UF MDATA<46> V6 MCLK_4
7D5 46 RAMDATA_46
8

20% N20P80% 20% 20% 20% AE6

8

2 10V 16V 10V MCLK_5

47 CERM 2 CERM 50V
2 CERM 2 10V
CERM
2 CERM 6D4 47 MDATA<47> W7
RAMDATA_47 AJ1
5% 402 805 402 402 402 7A3 MDATA<48> U3
RAMDATA_48
MCLK_6 PANGEAMCLK<6> 1
A TP25
1/16W 42A5 42B5 8C4 48
MCLK_7 AK3
2 MF 7B1 6D4 49 MDATA<49> U5
RAMDATA_49
603 8B4 7D5 MDATA<50> U6
A BYPASS CAPACITOR 0.1UF SHOULD BE PLACED AS CLOSE AS 50 RAMDATA_50 40C4 SD_REF F3
TBEN MDATA<51> U7
PANGEA_SD_REF NO TEST POINT ON
PLACE NEAR SAHARA POSSIBLE TO EACH VDD/AVDD PIN. 51 RAMDATA_51 PANGEAMCLK<4.5.7>
42A5 8B4 7D5 7B1 6D4 52 MDATA<52> R6
RAMDATA_52
RP7 25B4 26D6 28C5 34B2 35B3 35B5 35D4 42A5 8B4 7D5 7B1 6D4 MDATA<53> R7
B 42C1 6D2 6D1 M_ADDR<0> 8
22 1 TERM_M_ADDR<0> 7B2 7B4 7D2 7D4 7D5 8C5 42B1
15D3
10D4
15D7
10D7
16D4
11A5
18A4
11B8
18B6
11C8
18C7
13A8
19C3
13B8
42A5 8B4 7D5 7B1 6D4
53

54 MDATA<54> P5
RAMDATA_53
RAMDATA_54
1
R347
1K B
+3V_MAIN
3A4 5D6 6D4 7B2 7B4 7C7 7D2 42A5 8B4 7D5 7B1 6D4 55 MDATA<55> P6
RAMDATA_55 1%
RP7 5% 7D4 8B6 8D4 8D6 8D7 9D2 9D3 42A5 8B4 7D5 7B1 6D4 56 MDATA<56> L6
RAMDATA_56
1/16W
MF (8.1MA)
22 1/16W
SM 13C3 13C8 13D6 14B3 14C3 14D2 15C2 2 603
42C1 6D2 6D1 M_ADDR<1> 7 2 TERM_M_ADDR<1> 7B2 7B4 7C4 7D2 7D5 8C5 42B1 20B3 20C2 20C3 21C3 21C7 21D7 22B1 42A5 8B4 7D5 7B1 6D4 57 MDATA<57> L7
RAMDATA_57
5% RP7 36C6 40D6 46B7 42A5 8A4 7D5 7B1 6D4 58 MDATA<58> K6
RAMDATA_58
1 1
R318 R313 R88
1/16W 22 42A5 8A4 7D5 7A1 6D4 MDATA<59> K7
SM 6 3
1 59 RAMDATA_59
42C1 6D2 6D1 M_ADDR<3> TERM_M_ADDR<3> 7A4 7B2 7C4 7D2 7D5 8C4 42B1 10K 10K 42A5 8A4 7D5 7A1 6D4 60 MDATA<60> J3
RAMDATA_60
RP7 5%
10K 5% 5%
1/16W
5% 1/16W 1/16W 42A5 8A4 7D5 7A1 6D4 61 MDATA<61> J5
RAMDATA_61
22 SM
1/16W
MF
MF MF
42A5 8A4 7D5 7A1 6D4 J6
42C1 6D2 6D1 M_ADDR<5> 5 4 TERM_M_ADDR<5> 7A4 7B2 7C4 7D2 7D5 8C4 42B1 2 603 2 603 62 MDATA<62> RAMDATA_62
2 603
5% RP9 42A5 8A4 7D5 7A1 6D4 63 MDATA<63> J7
RAMDATA_63
1/16W
22 7C4 7D2 7D5 8B5 42B1 R321 AVSS4
42C1 6D2 6D1
SM 8 1 7A4 22
M_ADDR<6> TERM_M_ADDR<6>
7B2
20B6 20B3 T_ROMWE* 1 2 ROMRW* 6B2 RP22 AG3
RP9 5%
1/16W R310 5%
1/16W 7C4
43C1
7C2 7A4 7A2 T1CS0* 100 2
10 7 CS0* 6C2 43C1
22 SM 7D5 8B5 42B1 22 MF
42C1 6D2 6D1 7 2 7A4 7B2 20B3 T_ROMOE*
M_ADDR<10> TERM_M_ADDR<10>
7C2 7C4
1 2 603 ROMOE* 6B2 20B6 RP22 5%
1/16W
5%
1/16W
RP20 5%
1/16W R89 43C1 T1CS1* 100 1
10 8 SM
CS1* 6C2 43C1
SM 22 7C4 7D2 7D5 8C4 42B1 MF
42C1 6D2 6D1 M_ADDR<4> 8 1 TERM_M_ADDR<4> 7A4 603 22 5% RP22
7B2 20D7 20B6 T_ROMCS* 1 2 ROMCS* 6C2 1/16W
RP9 5%
1/16W 5%
8C5 T1CS2* 100 SM 4
10 5 CS2* 6C2 43C1
6
22 3 SM 1/16W
42C1 6D2 6D1 7A4 7B2 7C2 7C4 7D5 8B5 42B1 MF
M_ADDR<9> TERM_M_ADDR<9>
603 RP22 5%
1/16W
5%
1/16W
RP20 8C5 T1CS3* 100 3
10 6 SM
CS3* 6C2 43C1
SM 22 8B5 42B1 RP23
42C1 6D2 6D1 M_ADDR<8> 7 2 7A4 7B2 7C2 7C4
TERM_M_ADDR<8> 7D5 22 5%
RP20 5%
1/16W
43D5 8B4 7C4
7C2 7A4 7A2 T_M_BA1 100 1 8 M_BA1 6C2 43B1 1/16W
SM DO NOT REPIN PANGEA SDRAM & SO-DIMMS I/F
22 3 42B1
42C1 6D2 6D1 M_ADDR<11> 6 SM
TERM_M_ADDR<11> 7A4 7B2 7C2 7C4 7D5 8B4
5%
1/16W
SM
RP23
22
CS R-PACKS DESCRIPTION:
5%
1/16W
RP2043D5 8B4 7C4 7C2 7B2 7A4 T_M_BA0 100 2 7 M_BA0 6C2 43C1 CS0-3 ARE CRITICAL TIMING NETS ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
A 42C1 6D2 6D1 M_ADDR<2>
SM 5
22 4 TERM_M_ADDR<2> 7B2 7B4 7C4 7D2
8C5 42B1
7D5 RP23 5%
1/16W MAKE AS SHORT AS POSSIBLE NOTICE OF PROPRIETARY PROPERTY
A
RP9 1/16W 5%
100 3
22 6
SM

5
22 4 SM 43D5 8C5 7C4 7C2 7A4 7A2 T_SDRAS* SDRAS* 6C2 43B1
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
42C1 6D2 6D1 M_ADDR<7> TERM_M_ADDR<7> 7A4 7B2 7C2 7C4 7D5 8B4
42B1
5%
1/16W RP23 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
5%
1/16W R330 43D5
100
SM
4
22 5 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
SM 22 2 TERM_M_ADDR<12> 7C2 7A4 7A2 T_SDCAS* SDCAS* 6C2 43B1
42C1 6D1 6C2 M_ADDR<12> 1
5%
8C4 7C4
R349 5%
1/16W TERMINATIONS: SPLIT NETS AT BGA, 10-OHM II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
1/16W 22
MF 43D5
603
8C5 7C4 7C2 7A4 7A2 T_MEMWE* 100 1 2 SM
MEMWE* 6C2 43B1 SERIES TERM, ROUTE ON SIDE
5%
1/16W
20-OHM TO FIRST DIMM OPPOSITE PANGEA FOR LOWEST
SIZE DRAWING NUMBER REV.
ACI: C
MF
603
(PLACE NEAR PANGEA) D 051-6130-C ECS:1.0
RP’S CAN BE RE-PINNED IMPEDANCE PATH. APPLE COMPUTER INC.
RP’S CAN BE RE-PINNED WITHIN GROUP SCALE SHT
6
OF
53
NONE

8 7 6 5 4 3 2 1
 CR-7

8 7 6 5 4 3 2 1
42D5 MDATA<63..0>
8A4 7D1 7C3 7C1 7B1 7A3 7A1 6D4 6D3 6C3 6B3
42C5 42B5 42A5 8D5 8D4 8C5 8C4 8B5 8B4 8A5
+3V_MAIN
TERM_M_ADDR<12..0>
8B5 8B4 7D4 7D2 7C4 7C2 7B4 7B2 7A4 6B7 6A7
42B1 8C5 8C4
DISTRIBUTE CAPS EVENLY 1 C335 1 C334 1 C299 1 C224
AMONG THE SDRAM PADS 0.1UF 0.01UF 0.01UF 0.001UF
N20P80% 20% 20% 20%
2 16V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM
603 603 603 603
+3V_MAIN

1 C270 1 C268 1 C300 1 C267 D

D 0.1UF
N20P80%
16V
20%
50V
0.01UF
20%
50V
0.001UF 0.1UF
N20P80%
16V
42B1
8C5
1 14 27 3 9 43 49
2 CERM 2 CERM 2 CERM 2 CERM 7D5
603 603 603 603 7D4
7B4
7B2 OMIT
0 6B7 TERM_M_ADDR<0> 23 A0 U20 42C5
1 TERM_M_ADDR<1> 24 A1 SDRAM-2MX16X4 8B5
100MHZ 7D5
2 TERM_M_ADDR<2> 25 A2 6D4
42B1 TSOP 2
8C5 1 14 27 3 9 43 49 3 TERM_M_ADDR<3> 26 A3 CRITICAL DQ0 6C3 MDATA<16> 16
7D5 4 TERM_M_ADDR<4> 29 A4
4
MDATA<17> 17
7D2 DQ1 5
7B4 OMIT 5 TERM_M_ADDR<5> 30 A5 MDATA<18> 18
DQ2 7
0 6B7 TERM_M_ADDR<0> 23 A0 U16 6 TERM_M_ADDR<6> 31 A6 DQ3 MDATA<19> 19

42B1 8C5 7D5 7D2 7B4 7B2 6B7 1

7B2 TERM_M_ADDR<1> 24 A1 SDRAM-2MX16X4 42D5 7 TERM_M_ADDR<7> 32 A7
8
MDATA<20> 20
66MHZ
100MHZ 8D5 DQ4 10
2 TERM_M_ADDR<2> 25 A2 7D5 8 TERM_M_ADDR<8> 33 A8 MDATA<21> 21
R575 TSOP 2 DQ5 11
22 3 TERM_M_ADDR<3> 26 A3 CRITICAL DQ0 6D3 MDATA<0> 0 9 TERM_M_ADDR<9> 34 A9 DQ6 MDATA<22> 22
1 2 TERM_M_ADDR<4> 29 A4
4 6D4 22 13
4
DQ1 MDATA<1> 1 10 TERM_M_ADDR<10> A10 DQ7 MDATA<23> 23
5% 5 42
5 TERM_M_ADDR<5> 30 A5 MDATA<2> 2 11 TERM_M_ADDR<11> 35 A11 MDATA<24> 24
1/16W
MF
DQ2 7 DQ8 44
6 TERM_M_ADDR<6> 31 A6 MDATA<3> 3 12 TERM_M_ADDR<12> 36 A12 MDATA<25> 25
603 DQ3 8 8B4 DQ9 45
66MHZ 7 TERM_M_ADDR<7> 32 A7 MDATA<4> 4 7A4 6A6 T_M_BA0 21 BA0 MDATA<26> 26
DQ4 10 7C4 7B2 DQ10 47
R562 8 TERM_M_ADDR<8> 33 A8 DQ5 11
MDATA<5> 5
43D5
T_M_BA1 20 BA1 DQ11 48
MDATA<27> 27
22 9 TERM_M_ADDR<9> 34 A9 MDATA<6> 6 T1CS0* 19 CS MDATA<28> 28
1 2 DQ6 13 DQ12 50
10 TERM_M_ADDR<10> 22 A10 MDATA<7> 7 T_SDRAS* 18 MDATA<29> 29
5% 100MHZ DQ7 42 43D5 RAS DQ13 51
46B7 40D6 36C6 35D4 35B5 35B3 1/16W 11 TERM_M_ADDR<11> 35 A11 MDATA<8> 8 T_SDCAS* 17 MDATA<30> 30
MF
L70 DQ8 44 8C5 CAS DQ14 53
28C5 26D6 25B4 22B1 21D7 21C7 21C3 603 12 TERM_M_ADDR<12> 36 A12 MDATA<9> 9 7A2 6A643D1 T_MEMWE* 16 MDATA<31> 31
20C2 20B3 19C3 18C7 18B6 18A4 16D4 13B8 400-OHM-EMI DQ9 45 7C4 7A46C2 WE DQ15
43D5 8B4 7C2 7B2 7A4 6A6 T_M_BA0 21 BA0 MDATA<10> 10 DQM2* 15
15D3 15C2 14D2 14C3 14B3 13D6 13C8 11C8 43C1 DQ10 47 LDQM
8B6 7D4 7D2 7B4 7B2 6D4 6B5 5D6 3A4 +3V_MAIN 1 2 43D5 8B4 7C2 7A4 7A2 6A6 7A4 T_M_BA1 20 BA1 DQ11 MDATA<11> 11 8B5 6C28B5 DQM3* 39
UDQM
11B8 11A5 10D7 10D4 9D3 9D2 8D7 8D6 8D4 SM-1
100MHZ 100MHZ 100MHZ 66MHZ 6A5 T1CS0* 19 CS
48
MDATA<12> 12 43D1 MCLK<0> 38
13A8 66MHZ DQ12 CLK
C 13C3
15D7
1 C604
0.1UF
1 C618
0.01UF
1 C619
1000PF
1
R564
0
1
R573
0
43D5 8C5
43D5 8C4
7C2
7C2
7A4
7A4
7A2
7A2
6A6
6A6
7A2
7C2
T_SDRAS*
T_SDCAS*
18
17
RAS DQ13
50
51
MDATA<13>
MDATA<14>
13

14
7A4 7A2
7C5 7C4
T_RAM_CKE0_MLB 37
CKE C
20C3 N20P80% 20% 5% 5% 5% CAS DQ14 53
16V
2 CERM 2 50V
CERM 2 25V
CERM
1/16W 1/16W 43D5 8C5 7C2 7A4 7A2 6A6 T_MEMWE* 16 6C3 MDATA<15> 15 VSS VSSQ
34B2 603 603
MF MF 43D1 WE DQ15 6D4
603
2 603 2 603 6C2 DQM0* 15
LDQM
8C5 7D5 28 41 54 6 12 46 52
43D1 8C5 6C2 DQM1* 39 8C5
100MHZ UDQM
R355 MCLK<0> 38 42C5
ON BOARD MEMORY CLK
22 7C2 7A4 7A2 T_RAM_CKE0_MLB 37
CKE
1 2 T_RAM_CKE0_MLB 7A2 7A4 7C2 7C4 7C5
5% 100MHZ
1 46B7 40D6
100MHZ 20
1/16W
MF R604 VSS VSSQ 36C6 35D4 35B5
603 100K 35B3 34B2 28C5
5%
VCC 1/16W 28 41 54 6 12 46 52 26D6 25B4 22B1
100MHZ MF
U35 21D7 21C7 21C3
R560 74LVT574 100MHZ
2 603
20C3 20C2 20B3 1 C315 1 C314 1 C312
22 T_RAM_CKE0_L 2 19 T_RAM_CKE0_MLB_R R354 18C7 18B6 18A4 0.01UF 0.01UF 0.1UF
6C2 RAM_CKE0 1 2
D1TSSOP Q1 15D7 15D3 15C2
43C1 3 18
22 20%
50V
20%
50V
N20P80%
16V
5%
1/16W D2 Q2 T_RAM_CKE0_R 1 2 T_RAM_CKE0
TO SODIMM 8C4 14C3 14B3 13D6 2 CERM 2 CERM 2 CERM
MF T_RAM_CKE1_L 4
D3 Q3
17 T_RAM_CKE1_R 5% 1 100MHZ 13C3 13B8 13A8 603 603 603
603
5 16
1/16W
MF R605 11B8 11A5 10D7
100MHZ R561 6
D4 Q4
15
603 100K 8D7 8D6 8D4 8B6
+3V_MAIN
22 D5 Q5 5%
1/16W
6D4 6B5 5D6 3A4
6C2 RAM_CKE1 1 2 7 14 MF 7D4 7D2 7C7 7B4
43C1 5% D6 Q6 2 603 10D4 9D3 9D2
8 13 +3V_MAIN
1/16W
MF D7 Q7 42B1 11C8
9 12 100MHZ 13C8 1 14 27 3 9 43 49
603 D8 Q8 8C5
R334 7D5 14D2
43B4 6C6 574_CLK 11
CLK 22 1 C269 1 C298 1 C313 7D4 16D4
1 2 T_RAM_CKE1 TO SODIMM 8C4 0.001UF 0.01UF 7D2 19C3 OMIT
21B6 SLEEP 1
OE 0.1UF
5% 66MHZ 1 100MHZ N20P80% 20% 20% 0 6B7 23 A0
27C8
GND
1/16W 1
R574 R606 2 16V 2 50V
CERM 2 50V
CERM
TERM_M_ADDR<0>
U19
7B4 TERM_M_ADDR<1> 24 A1 SDRAM-2MX16X4 42A5
34A8 MF
603 100K
CERM
603 603 603 1
35C4 10 0 5% 25 A2 100MHZ 8B4
5% 2 TERM_M_ADDR<2> 7D5
35D4 1/16W
1/16W
MF TSOP 2
38B8 MF 3 TERM_M_ADDR<3> 26 A3 6B3 MDATA<48> 48

B 66MHZ 2 603
2 603
4 TERM_M_ADDR<4> 29 A4
30 A5
CRITICAL DQ0 4
DQ1 5
6D4 MDATA<49> 49 B
R563 5 TERM_M_ADDR<5>
DQ2 7 MDATA<50> 50

1
22 2
6 TERM_M_ADDR<6> 31 A6 DQ3 8 MDATA<51> 51

7 TERM_M_ADDR<7> 32 A7 MDATA<52> 52
5% 42B1 DQ4 10
1/16W 8C5 1 14 27 3 9 43 49 8 TERM_M_ADDR<8> 33 A8 MDATA<53> 53
MF
7D5 DQ5 11
603 9 TERM_M_ADDR<9> 34 A9 MDATA<54> 54
7D4 DQ6 13
7D2 OMIT 10 TERM_M_ADDR<10> 22 A10 MDATA<55> 55
DQ7 42
0 6B7 TERM_M_ADDR<0> 23 A0 U17 11 TERM_M_ADDR<11> 35 A11
DQ8 44 MDATA<56> 56

42B1 8C5 7D5 7D2 7C4 7B2 6B7 1

7B2 TERM_M_ADDR<1> 24 A1 SDRAM-2MX16X4 42B5 12 TERM_M_ADDR<12> 36 A12 MDATA<57> 57
100MHZ 8D4 DQ9 45
TERM_M_ADDR<2> 25 A2 8B4 7C4 7C2 7A4 6A6 T_M_BA021 BA0 MDATA<58>
2
TSOP
7D5 DQ10 58

3 TERM_M_ADDR<3> 26 A3
2
6C3 MDATA<32> 32 43D5 T_M_BA120 BA1
47
MDATA<59> 59
CRITICAL DQ0 4 6D4 MDATA<33> 33 DQ11 48
4 TERM_M_ADDR<4> 29 A4 7C2 7A4 6A5 T1CS0* 19 CS MDATA<60> 60
DQ1 5 43C1 7C4 T_SDRAS* DQ12 50
5 TERM_M_ADDR<5> 30 A5 MDATA<34> 34 18 MDATA<61> 61
DQ2 7 RAS DQ13 51
TABLE_5_HEAD

6 TERM_M_ADDR<6> 31 A6 MDATA<35> 35 7C2 7A4 6A6 T_SDCAS* 17 MDATA<62> 62

PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION DQ3 8 43D5 8C4 7C4 T_MEMWE* CAS DQ14 53
7 TERM_M_ADDR<7> 32 A7 DQ4 MDATA<36> 36 16
WE DQ15 6B3 MDATA<63> 63
6D4
TABLE_5_ITEM

33 10 15
333S0007(ATC) 4 16MX16-1H PC100/CL2 TSOPII54 U16,U17,U19,U20 128M 8 TERM_M_ADDR<8> A8 DQ5 MDATA<37> 37 43D1 8B4 6C2 DQM6* LDQM 7D5
34 11 39
TABLE_5_ITEM

9 TERM_M_ADDR<9> A9 DQ6 MDATA<38> 38 43D1 8B4 6C2 DQM7* UDQM 8A4

333S0210(ATC) 4 32MX16-1H PC100/CL2 TSOPII54 U16,U17,U19,U20 256M 13
10 TERM_M_ADDR<10> 22 A10 MDATA<39> 39 MCLK<0> 38 42A5
DQ7 42 CLK
11 TERM_M_ADDR<11> 35 A11 MDATA<40> 40 7C4 7C2 7A4 T_RAM_CKE0_MLB 37
DQ8 44 7C5 CKE
42B1 8C4 7D5 7C4 7C2 7B2 6A7 12 TERM_M_ADDR<12> 36 A12 DQ9 MDATA<41> 41
21 45
43D5 8B4 7C4 7C2 7B2 6A6 T_M_BA0 BA0 DQ10 MDATA<42> 42 VSS VSSQ
20 47
43D5 8B4 7C4 7C2 7A2 6A6 T_M_BA1 BA1 DQ11 MDATA<43> 43
19 48 28 41 54 6 12 46 52
43C1 7C4 7C2 7A2 6A5 T1CS0* CS DQ12 MDATA<44> 44
18 50 SDRAM ON-BOARD BANKS.
43D5 8C5 7C4 7C2 7A2 6A6 T_SDRAS*
RAS DQ13 MDATA<45> 45
17 51
43D5 8C4 7C4 7C2 7A2 6A6 T_SDCAS*
CAS DQ14 MDATA<46> 46
DESCRIPTION:
53
43D5 8C5 7C4 7C2 7A2 6A6 T_MEMWE* 16 6B3 MDATA<47>
A 43D1 8C4 6C2 DQM4* 15
WE
LDQM
DQ15 6D4
7D5
47 ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
NOTICE OF PROPRIETARY PROPERTY
A
43D1 8C4 6C2 DQM5* 39 8C4
UDQM
42D1 7C4 7C2 7A2 6D6 MCLK<0> 38 42B5 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
CLK PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
7C5 7C4 7C2 7A2 T_RAM_CKE0_MLB 37 AGREES TO THE FOLLOWING
CKE
BANK 0 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
VSS VSSQ II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
28 41 54 6 12 46 52
SIZE DRAWING NUMBER REV.
ACI: C
APPLE COMPUTER INC.
D 051-6130-C ECS:1.0
SCALE SHT OF
NONE 7 53

8 7 6 5 4 3 2 1
 CR-8

8 7 6 5 4 3 2 1
PUT EACH 10UF CAP AT EACH END
20C2 20C3 21C3 21C7 21D7 22B1 25B4 26D6 28C5 34B2 35B3 AND HIGHSPEED BYPASS DISTRIBUTED
11B8 11C8 13A8 13B8 13C3 13C8 13D6 14B3 14C3 14D2 15C234B2 35B3 35B5 35D4 36C6 40D6 46B7 ALONG SODIMM
+3V_MAIN 3A4 5D6 6B5 6D4 7B2 7B4 7C7 7D2 7D4 13D6 14B3 14C3 14D2 15C2 15D3 15D7 16D4 18A4 18B6 18C7
+3V_MAIN 3A4 5D6 6B5 6D4 7B2 7B4 7C7 7D2 7D4 8B6 8D4 8D7
8B6 8D4 8D6 9D2 9D3 10D4 10D7 11A5
15D3 15D7 16D4 18A4 18B6 18C7 19C3 20B3 9D2 9D3 10D4 10D7 11A5 11B8 11C8 13A8 13B8 13C3 13C8
19C3 20B3 20C2 20C3 21C3 21C7 21D7 22B1 25B4 26D6 28C5 22B1 25B4 26D6 28C5 34B2 35B3 35B5 35D4 36C6 40D6 46B7
C320 35B5 35D4 36C6 40D6 46B7
C319 +3V_MAIN
13C8 13D6 14B3 14C3 14D2 15C2 15D3 15D7 16D4 18A4 18B6
0.001UF 3A4 5D6 6B5 6D4 7B2 7B4 7C7 7D2 7D4 8B6 8D6 8D7
1 2 0.001UF 9D2 9D3 10D4 10D7 11A5 11B8 11C8 13A8 13B8 13C3
1 2 1
C245 J8 CRITICAL 18C7 19C3 20B3 20C2 20C3 21C3 21C7 21D7
20%
50V 20%
10UF SM
20%
CERM 50V 2 6.3V 147
603 CERM TANT
603 SMA

D C330
1
3
2
4
D
C331 42D5 7D5 7C3 6D4 6D3 MDATA<0> MDATA<32> 6C3 6D4 7A3 7D5 42B5
0.01UF 5 6
1 2 0.01UF 42D5 7D5 7C3 6D4 6D3 MDATA<1> MDATA<33> 6C3 6D4 7A3 7D5 42B5
1 2 42D5 7D5 7C3 6D4 6D3 MDATA<2> 7 8 MDATA<34> 6C3 6D4 7A3 7D5 42B5
20% 42D5 7D5 7C3 6D4 6D3 MDATA<3> 9 10 MDATA<35> 6C3 6D4 7A3 7D5 42B5
50V 20%
CERM 50V 11 12
603 CERM
603 42D5 7D5 7C3 6D4 6D3 MDATA<4> 13 14 MDATA<36> 6C3 6D4 7A3 7D5 42B5
42D5 7D5 7C3 6D4 6D3 MDATA<5> 15 16 MDATA<37> 6C3 6D4 7A3 7D5 42B5
42D5 7D5 7C3 6D4 6D3 17 18 6B3 6D4 7A3 7D5 42B5
C310 C311
MDATA<6>
19 20
MDATA<38>
0.1UF 42D5 7D5 7C3 6D4 6D3 MDATA<7> MDATA<39> 6B3 6D4 7A3 7D5 42B5
1 2 0.1UF 21 22
1 2
43D1 7C4 6C2 DQM0* 23 24 DQM4* 6C2 7A4 43D1
N20P80%
16V N20P80% 43D1 7C4 6C2 DQM1* 25 26 DQM5* 6C2 7A4 43D1
CERM 16V
603 CERM 27 28
603
42B1 7D5 7D4 7D2 7B4 7B2 6B7 TERM_M_ADDR<0> 29 30 TERM_M_ADDR<3> 6B7 7A4 7B2 7C4 7D2 7D5 42B1
42B1 7D5 7D2 7C4 7B4 7B2 6B7 TERM_M_ADDR<1> 31 32 TERM_M_ADDR<4> 6A7 7A4 7B2 7C4 7D2 7D5 42B1
C306 C295 42B1 7D5 7D2 7C4 7B4 7B2 6A7 TERM_M_ADDR<2> 33 34 TERM_M_ADDR<5> 6B7 7A4 7B2 7C4 7D2 7D5 42B1
0.001UF 35 36
1 2 0.001UF
1 2 42D5 7D5 7C3 6D4 6D3 MDATA<8> 37 38 MDATA<40> 6B3 6D4 7A3 7D5 42B5
20% 42D5 7D5 7C3 6D4 6D3 MDATA<9> 39 40 MDATA<41> 6B3 6D4 7A3 7D5 42B5
50V 20%
CERM 50V 42D5 7D5 7C3 6D4 6D3 MDATA<10> 41 42 MDATA<42> 6B3 6D4 7A3 7D5 42B5
603 CERM
603 42D5 7D5 7C3 6D4 6D3 MDATA<11> 43 44 MDATA<43> 6B3 6D4 7A3 7D5 42B5
45 46

42D5 7D5 7C3 6D4 6C3 47 48 6B3 6D4 7A3 7D5 42B5
C297 C307
MDATA<12>
49 50
MDATA<44>
0.01UF 42C5 7D5 7C3 6D4 6C3 MDATA<13> MDATA<45> 6B3 6D4 7A3 7D5 42B5
1 2 0.01UF 51 52
1 2 42C5 7D5 7C3 6D4 6C3 MDATA<14> MDATA<46> 6B3 6D4 7A3 7D5 42B5
42C5 7D5 7C3 6D4 6C3 53 54 MDATA<47> 6B3 6D4 7A3 7D5 42B5
C 20%
50V
CERM
20%
50V
MDATA<15>
55 56 C
603 CERM 8B7 FPAR_AR<0> 57 58 FPAR_AR<4> 8A7
603
8B7 FPAR_AR<1> 59 60 FPAR_AR<5> 8A7
C336 C337 CONFIRM THIS IS SODIMM BANKA AS IN IBOOK __ 6C5 MCLK<3> 61 62 T_RAM_CKE1 __ CONFIRM THIS IS SODIMM BANKA AS IN IBOOK
0.1UF 42D1 63 64
1 2 0.1UF
1 2 43D5 7C4 7C2 7A4 7A2 6A6 T_SDRAS* 65 66 T_SDCAS* 6A6 7A2 7A4 7C2 7C4 43D5
N20P80% 43D5 7C4 7C2 7A4 7A2 6A6 T_MEMWE* 67 68 T_RAM_CKE0 __ CONFIRM THIS IS SODIMM BANKB AS IN IBOOK
16V N20P80%
CERM 16V 6A5 T1CS2* 69 70 TERM_M_ADDR<12> 6A7 7A4 7B2 7C2 7C4 7D5 42B1
603 CERM
603 6A5 T1CS3* 71 72
73 74 MCLK<1> 6D6 __ CONFIRM THIS IS SODIMM BANKB AS IN IBOOK
36C6 40D6 46B7 75 76 42D1
21C7 21D7 22B1 25B4 26D6 28C5 34B2 8B7 FPAR_AR<2> 77 78 FPAR_AR<6> 8A7
15D7 16D4 18A4 18B6 18C7 19C3 20B3 79 80
13A8 13B8 13C3 13C8 13D6 14B3 14C3 8B7 FPAR_AR<3> FPAR_AR<7> 8A7
7C7 7D2 7D4 8D4 8D6 8D7 9D2 9D3 10D4 10D7 81 82
+3V_MAIN 3A4 5D6 6B5 83 84
PULL-DOWN UNUSED PARITY BITS 6D4 7B2 7B4 42C5 7D5 7D1 6D4 6C3 MDATA<16> MDATA<48> 6B3 6D4 7B1 7D5 42A5
11A5 11B8 11C8 42C5 7D5 7D1 6D4 6C3 MDATA<17> 85 86 MDATA<49> 6B3 6D4 7B1 7D5 42A5
14D2 15C2 15D3 42C5 7D5 7D1 6D4 6C3 MDATA<18> 87 88 MDATA<50> 6B3 6D4 7B1 7D5 42A5
C237 20C2 20C3 21C3
RP18 0.001UF 35B3 35B5 35D4 42C5 7D5 7D1 6D4 6C3 MDATA<19> 89 90 MDATA<51> 6B3 6D4 7B1 7D5 42A5
1
10K 8
1 2 91 92
FPAR_AR<0> 8C5 93 94
20% 42C5 7D5 7C1 6D4 6C3 MDATA<20> MDATA<52> 6B3 6D4 7B1 7D5 42A5
5% 50V 95 96
1/16W CERM 42C5 7D5 7C1 6D4 6C3 MDATA<21> MDATA<53> 6B3 6D4 7B1 7D5 42A5
SM 603 97 98
42C5 7D5 7C1 6D4 6C3 MDATA<22> MDATA<54> 6B3 6D4 7B1 7D5 42A5
RP18 42C5 7D5 7C1 6D4 6C3 MDATA<23> 99 100 MDATA<55> 6B3 6D4 7B1 7D5 42A5
10K 101 102
RP’S CAN BE RE-PINED 2 7 FPAR_AR<1> 8C5 C256 103 104
42B1 7D5 7D2 7C4 7B2 7A4 6A7 TERM_M_ADDR<6> TERM_M_ADDR<7> 6A7 7A4 7B2 7C2 7C4 7D5 42B1
B OR TURNED INTO DISCRETES
5%
1/16W
SM
0.01UF
1 2 42B1 7D5 7C4 7C2 7B2 7A4 6A7 TERM_M_ADDR<8> 105
107
106
108
T_M_BA0 6A6 7A4 7B2 7C2 7C4 43D5 B
BY PCB DESIGNS. RP18 20% 42B1 7D5 7C4 7C2 7B2 7A4 6A7 TERM_M_ADDR<9> 109 110 T_M_BA1 6A6 7A2 7A4 7C2 7C4 43D5
50V
3
10K 6 FPAR_AR<2>
CERM
603 42B1 7D5 7C4 7C2 7B2 7A4 6A7 TERM_M_ADDR<10> 111 112 TERM_M_ADDR<11> 6A7 7A4 7B2 7C2 7C4 7D5 42B1
8B5 113 114
5% 115 116
1/16W 43D1 7C2 6C2 DQM2* DQM6* 6C2 7A2 43D1
SM 117 118
C271 43D1 7C2 6C2 DQM3* DQM7* 6C2 7A2 43D1
RP18 0.1UF 119 120

4
10K 5
1 2 42C5 7D5 7C1 6D4 6C3 MDATA<24> 121 122 MDATA<56> 6B3 6D4 7B1 7D5 42A5
FPAR_AR<3> 8B5 123 124
N20P80% 42C5 7D5 7C1 6D4 6C3 MDATA<25> MDATA<57> 6B3 6D4 7B1 7D5 42A5
5% 16V 125 126
1/16W CERM 42C5 7D5 7C1 6D4 6C3 MDATA<26> MDATA<58> 6B3 6D4 7B1 7D5 42A5
SM 603 127 128
42C5 7D5 7C1 6D4 6C3 MDATA<27> MDATA<59> 6B3 6D4 7A1 7D5 42A5
RP17 129 130

1
10K 8 42C5 7D5 7C1 6D4 6C3 MDATA<28> 131 132 MDATA<60> 6B3 6D4 7A1 7D5 42A5
FPAR_AR<4> 8C4 C228 133 134
42C5 7D5 7C1 6D4 6C3 MDATA<29> MDATA<61> 6B3 6D4 7A1 7D5 42A5
5% 0.001UF 135 136
1/16W 1 2 42B5 7D5 7C1 6D4 6C3 MDATA<30> MDATA<62> 6B3 6D4 7A1 7D5 42A5
SM 137 138
42B5 7D5 7C1 6D4 6C3 MDATA<31> MDATA<63> 6B3 6D4 7A1 7D5 42A5
RP17 20%
50V
139 140

2
10K 7 FPAR_AR<5>
CERM
603
141 142
8C4 143 144
5%
1/16W
SM 1
C257 148 C325 SO-DIMM CONNECTOR
RP17 0.01UF 10UF
20%
3
10K 6
1 2 2 6.3V DESCRIPTION:
FPAR_AR<6> 8B4 TANT
SMA
5% 20% ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
50V
A 1/16W
SM
CERM
603
NOTICE OF PROPRIETARY PROPERTY
A
RP17
4
10K 5 IIC ALSO USED FOR 15D8 10B7 UNI_IIC_DAT THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
FPAR_AR<7> 8B4 C281 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
5% 0.1UF SODIMM DEBUG PORT 15D8 10B7 UNI_IIC_CLK
1/16W 1 2 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
SM
II NOT TO REPRODUCE OR COPY IT
N20P80% III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
16V
CERM
603 SIZE DRAWING NUMBER REV.

APPLE COMPUTER INC.

D 051-6130-C ACI: C
ECS:1.0
SCALE SHT OF
NONE 8 53

8 7 6 5 4 3 2 1
 CR-9

8 7 6 5 4 3 2 1
34B2 35B3 35B5 35D4 36C6 40D6 46B7
13D6 14B3 14C3 14D2 15C2 15D3 15D7 16D4 18A4 18B6 18C7
+3V_MAIN 3A4 5D6 6B5 6D4 7B2 7B4 7C7 7D2 7D4 8B6 8D4 8D6
8D7 9D2 10D4 10D7 11A5 11B8 11C8 13A8 13B8 13C3 13C8
19C3 20B3 20C2 20C3 21C3 21C7 21D7 22B1 25B4 26D6 28C5 40D6 46B7
15D3 15D7 16D4 18A4 18B6 18C7 19C3 20B3 20C2 20C3 21C3
8D7 9D3 10D4 10D7 11A5

1
R348
10 2
PLACE CLOSE TO EACH AGPVDD PIN
40C4 +3V_AGPVDD_MAIN
+3V_MAIN 3A4 5D6 6B5 6D4 7B2
7C7 7D2 7D4 8B6 8D4
7B4
8D6
PANGEA CORE
11B8 11C8 13A8 13B8 13C3 13C8 13D6 14B3 14C3 14D2 15C2
MA=13A 5%
1/16W 1 A127 1 A126 R352 21C7 21D7 22B1 25B4 26D6 28C5 34B2 35B3 35B5 35D4 36C6
MF
0.01UF 0.01UF 10 40C6 +3V_AVDD6_PANGEA_MAIN GND RETURN TO BALL E3
603 1 2
20% 20%
2 50V
CERM 2 50V
CERM
5% 1/16W
MF 603
402 402
MA=25MA
1 A130 1 C348
1uF 0.01UF
D 25A6 25B5 25D4 27C6 35D2 40D4 46B7
20%
2 10V
CERM
20%
50V
2 CERM
D
+3V_SLEEP 4C6 805 402
6B5 6C5 13B3 15A5 15B5 15B7 15C5 15C7 20C8 20D6
22B5 22C1 STPAGP*, AGPPVT, AGPBUSY* will be supported H7 H6 F5
in future AGP graphics controllers.
1 AVDD6
R342 R385 AGPVDD
CRITICAL
4.99K 0
1% 22C7 22A6 14C5 AGPSTOP* 1 2
U4
1/16W G18 A5
MF 5%
1/16W
PAN_AGPSTOP* STP_AGP PANGEA AGPREQ AGPREQ* 14C5 24D5
2 603 MF E6 F17 AGPGNT* 14C5 24D5 44C5 44D5
603
AGPPVT (3 OF 6) AGPGNT
40C6 AGPVREF G15 PBGA
AGPAD<31..0> 9B2 9C2 9D2
AGPVREF1 22C6 9D1 PCI0AD0 E15 AGPAD<0> 0 22C6 22D6 22D7
G12
AGPVREF2 44C5 22D7
PCI0AD1 A14 AGPAD<1> 1
1 G9
C347 1 C346 1 C342 1 R343 R384 AGPVREF3 44C5 22D7 22C6 9D1
PCI0AD2 A13 AGPAD<2> 2
0.01UF 0.01UF 0.01UF 3.32K 0 14B5
20% 20% 1% 22B6 AGPBUSY* 1 2 PAN_AGPBUSY* B18 AGP_BUSY 44C5 22D7 22C6 9D1
PCI0AD3 A11 AGPAD<3> 3
50V 50V 603 2 1/16W
CERM 2 CERM 2 MF 5%
1/16W
C1
AGP_CLK 44C5 22D7 22C6 9D1
PCI0AD4 F16 AGPAD<4> 4
603 603 2 603 MF
603
E2
AGP_FB_IN 44C5 22D7 22C6 9D1
PCI0AD5 B14 AGPAD<5> 5

PLEASE CAPS NEAR PANGEA BALLS

D2
AGP_FB_OUT 22D7 22C6 9D1
PCI0AD6 C15 AGPAD<6> 6
44C5
PCI0AD7 B13 AGPAD<7> 7
VREF FOR AGP BUS = 1.32V
44C5 22D7 9D1 PCI0AD8
22C6 B12 AGPAD<8>

AGP_FB_OUT
8

44C5 22D7 9D1 PCI0AD9

22C6 A12 AGPAD<9> 9

AGP_FB_IN
KEEP CLOCKS ON INTERNAL LAYERS PCI/AGP PCI0AD10 F13 AGPAD<10> 10
INTERFACES C14
R360 44D5
PCI0AD11 AGPAD<11> 11

22 44C5 22D7 22C6 9D1 PCI0AD12 F15 AGPAD<12> 12

44D5 22C6 AGP_CLK 1 2 44D5 PANGEA_AGP_CLK 44D5 44C5 22D7 22D6 9D1 PCI0AD13 C12 AGPAD<13> 13
5%
1/16W
2 603
44C5 22D7 22D6 9D1 PCI0AD14 F14 AGPAD<14> 14
MF
402 MF 44C5 22D7 22D6 9D1 PCI0AD15 E14 AGPAD<15> 15
1/16W
5% 44C5 22D7 22D6 9D1 PCI0AD16 A7 AGPAD<16> 16
22 44C5 22D7 22D6 9D1 PCI0AD17 C11 AGPAD<17>
R96 17

C 1 44C5 22D7 22D6 9D1 PCI0AD18

44C5 22D7 22D6 9D1 PCI0AD19
C8
E12
AGPAD<18>
AGPAD<19>
18

19
C
NOSTUFF
44C5 22D7 22D6 9D1 PCI0AD20 B8 AGPAD<20> 20

R105 R98 44C5 22D7 22D6 9D1 PCI0AD21 B9 AGPAD<21> 21

SHORT STUBS SHORT STUBS SHORT STUBS
0 0 44C5 22D7 22D6 9D1 PCI0AD22 A10 AGPAD<22> 22
1 2 43C4 AGPFB3 1 2
44D5 22D7 22D6 9D1 PCI0AD23 B10 AGPAD<23> 23
5% 5%
1/16W 1/16W 44D5 22D7 22D6 9D1 PCI0AD24 G11 AGPAD<24> 24
MF MF
603 603 44D5 22D7 22D6 9D1 PCI0AD25 A8 AGPAD<25> 25

1
NOSTUFF 44D5 22D7 22D6 9D1 PCI0AD26 F11 AGPAD<26> 26
R97 44D5 22D7 22D6 9D1 PCI0AD27 A9 AGPAD<27> 27
1
0 44D5 22D7 22D6 9D1 PCI0AD28 C9
R103 5%
1/16W
AGPAD<28> 28

0 MF 44D5 22D7 22D6 9D1 PCI0AD29 F12 AGPAD<29> 29

5% 2 603
1/16W 44D5 22D7 22D6 9D1 PCI0AD30 E11 AGPAD<30> 30
MF
2 603
44D5 22D7 22D6 9D1 PCI0AD31 B11 AGPAD<31> 31
AGPCBE<3..0> 9B2 22C6 22C7
R106 R99 44B5 22C7 22C6 9B1 PCI0BE_0 F10 AGPCBE<0> 0 44B5
43C4 AGPFB2 1
0 2 43C4 AGPFB1 1
0 2 AGPFB0 44B5 22C7 22C6 9B1 A6 AGPCBE<1>
PCI0BE_1 1

SHORT STUBS 5% SHORT STUBS 5% SHORT STUBS 44B5 22C7 22C6 9B1 PCI0BE_2 F9 AGPCBE<2> 2
1/16W 1/16W
MF MF 44B5 22C7 22C6 9B1 PCI0BE_3 E9 AGPCBE<3> 3
603 603
NOSTUFF
PCI0PAR A16 AGPPAR22C6 44B5
NOTE: KEEP 40 OHM TRACE PCI0FRAME B17 AGPFRAME* 14C5 24D6 44B5
PCI0TRDY B16 AGPTRDY* 14C5 24D6 44B5
PCI0IRDY C17 AGPIRDY* 14C5 24D6 44B5
PCI0STOP E17 PCISTOP* 14B5 24D5 44B5
PCI0DEVSEL B7 AGPDEVSEL* 14C5 24C6 44B5
SBA0 B4 AGPSBA<0> 22A6 22B7 44B5
B SBA1
SBA2
E8
A4
AGPSBA<1> 22A6 22B7 44B5 B
AGPSBA<2> 22A6 22B7 44B5
SBA3 C5 AGPSBA<3> 22A6 22B7 44B5
SBA4 F8 AGPSBA<4> 22A6 22B7 44B5
SBA5 C6 AGPSBA<5> 22A6 22B7 44B5
SBA6 G8 AGPSBA<6> 22A6 22B7 44B5
SBA7 A3 AGPSBA<7> 22B6 22B7 44C5
SB_STB G10 AGPSBSTB 14C5 22A7 44B5
ST0 B15 AGPST<0> 22B6 22B7 44B5
ST1 G16 AGPST<1> 22B6 22B7 44B5
ST2 A15 AGPST<2> 22B6 SERIES TERM THE STROBES?
22B7 44B5
AD_STB0 G14 AGPADSTB<0> 14C5 22B7 44C5
AD_STB1 G13 AGPADSTB<1> 14C5 22B7 44C5
B5 AGPPIPE* 14B5 44B5
PIPE
B6 AGPRBF* 14B5 22A6 44B5
RBF

AVSS6
E3

PANGEA AGP IF
DESCRIPTION:

ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC

A 1. WHAT IS THE PURPOSE OF SINGNAL AGPPVT? NOTICE OF PROPRIETARY PROPERTY
A
2. CHECK WITH BILL C. FOR AGPVREF DIVIDERS - SCALE FOR LESS LEAKAGE. THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

051-6130-C ACI: C
APPLE COMPUTER INC.
D ECS:1.0
SCALE SHT OF
NONE 9 53

8 7 6 5 4 3 2 1
 CR-10

8 7 6 5 4 3 2 1
34B2 35B3 35B5 35D4 36C6 40D6 46B7
13D6 14B3 14C3 14D2 15C2 15D3 15D7 16D4 18A4 18B6 18C7
+3V_MAIN
3A4
8D7
19C3
5D6
9D2
20B3
6B5
9D3
20C2
6D4
10D7
20C3
7B2
11A5
21C3
7B4
11B8
21C7
7C7
11C8
21D7
7D2
13A8
22B1
7D4
13B8
25B4
8B6
13C3
26D6
8D4 8D6
13C8
28C5
PANGEA CORE

AC31

AF31

AJ31

AM33

AN34
U34
U28

G17

A33

B32
B34

C33

D11
D14
D17
D20
D23
D26
D29
E31

H31

L31

P31

U31

Y31
AA4

AD4

A17

AD6
AF2

F29
V7
V1

F6

A2

B1
B3

C2

D5
D8

F4

J4

M4

R4

V4
36B5 35C4 11D8 +VIO_CPUBUS_MAIN AL6 N16 +2_5V_MAIN 3B4 11D8 18D7 23A8 23B7 23D1 23D6 23D8 36B7 37C1 40C4
AL9 VDD N17
AL12 N18
AL15 N19
AL18 P16

D AL21
AL24 CRITICAL
P17
P18
D
AL27 P19 ETH_RXD_PD 10B7 40C6
AL30
U4 T13
VDD 1.8V PANGEA GBE_REFCLK
AN3 T14 10B7 40C6
(4 OF 6)
AN32 PBGA T21
AP2 T22
35D4 35B5 35B3 34B2 28C5 26D6 25B4 L25 AP33 U13 1 1
19C3
13B8
18C7
13A8
18B6
11C8
18A4
11B8
16D4
11A5
15D7 15D3
10D4 9D3
100-OHM-EMI R344 R345
+3V_MAIN 1 2
AH18 U14 10K 10K
7C7 7B4 7B2 6D4 6B5 5D6 3A4 AJ29 U21 5% 5%
9D2 8D7 8D6 8D4 8B6 7D4 7D2 1/16W 1/16W
SM MF MF
15C2 14D2 14C3 14B3 13D6 13C8 13C3 AJ6 VDD 2.5V U22
2 402 2 402
22B1 21D7 21C7 21C3 20C3 20C2 20B3 +3V_AMVDD_PANGEA_MAIN
AP18 V13
46B7 40D6 36C6 40C6 11A8 V14
AK2
V21
AK4
V22
AM2
W13
AE7
W14
AF7 AMVDD
18D6 MII_TX_EN
W21
AJ2
W22
AG6
18D6 MII_TX_ER AA16
AG4
AA17
AN1
AA18
AA19

KEEP CLOCK ON INTERNAL LAYER AB16

18D8 MII_TXD<0> 18D7 MII_TX_CLK A23

TX_CLK AB17 R386
45B4 F24 AB18 47
TX_EN 1 2 UNI_RESET* 20B3 21B1 21C3
E24 AB19
C 18C8 MII_TXD<1>
C27
TX_ER 5%
1/16W
MF
603 R303
C
TXD_0
B27 47
TXD_1 1 2 UNI_PU_RESET* 21B1 21C3
18C8 MII_TXD<2> A28
TXD_2 RESET E29 URESET* 5%
MISC 1/16W
C26 MF
TXD_3 AK32 UPURESET* 603
A27 PURESET
TXD_4
18C8 MII_TXD<3>
F23
TXD_5 B20
B25 PHY_DATA0 FW_LINK_D<0> 19A8 44C1
TXD_6 G19
G22 PHY_DATA1 FW_LINK_D<1> 19A8 44C1
TXD_7 F19
KEEP CLOCK ON INTERNAL LAYER PHY_DATA2 FW_LINK_D<2> 19A8 44C1
45B4 18C7 MII_RX_CLK F22 C20 FW_LINK_D<3> 19A7 44C1
RX_CLK PHY_DATA3
B24 GB ETHERNET A21
18C6 MII_RX_DV RX_DV PHY_DATA4 FW_LINK_D<4> 19A7 44C1
18C6 MII_RX_ER C23 E20 FW_LINK_D<5> 19A7 44D1
RX_ER PHY_DATA5
B21 FW_LINK_D<6> 19A7 44D1
A25 PHY_DATA6
18C6 MII_RXD<0> RXD_0 F20
A24 PHY_DATA7 FW_LINK_D<7> 19A7 44D1
18C6 MII_RXD<1> RXD_1
18C6 MII_RXD<2> B23 A19 FW_LINK_LPS 19B8
RXD_2 PHY_LPS
18C6 MII_RXD<3> F21 F18 FW_LINK_CNTL0 19A8 44C1
RXD_3 PHY_CTL0
E21 FIREWIRE A20 FW_LINK_CNTL1
RXD_4 PHY_CTL1 19A8 44C1
B22 B19 FW_LINK_LREQ 19B8 44C1
RXD_5 PHY_LREQ
G20
RXD_6 KEEP CLOCK ON INTERNAL LAYER
C21 FW_LINK_SCLK
40C6 10D2 ETH_RXD_PD RXD_7 PHY_SCLK C18 19A8 44D1
40C6 10D2 GBE_REFCLK G21
GBE_REFCLK
G23 THT
NC GTX_CLK FW_GPIO_0 E18 FW_C_LKON 13C8
18C6 MII_CRS C24 CRS FW_GPIO_1 A22 FW_LINK_GPIO1 19B6 TP2
E23 VIEW PLL 5/6 A
18C6 MII_COL COL
A26
MDIO VSS_SPARE F30 NO FIREWIRE
B R125 15D3 15C3 ASIC_TDI
B26
AA32
MDC
TDI
AH1
AK30
1
R358 B
22 AB34 10K
18C6 MII_MDIO 1 2 15D3 PANGEA_TDO TDO AL1 5%
AC34 1/16W
5% 15C3 ASIC_TCK TCK AP17 MF
R126 1/16W
MF 15D3 15C3 ASIC_TMS AA30
TMS E30
2 402
22 603
AB33
18C6 MII_MDC 1 2 15C3 15B3 ASIC_TRST* TRSTN E5 STUFF ONLY IF FW PHY NOT STUFFED
5% 40C6 PANGEA_TEI Y28
TEI TEST U1
1/16W
MF 15D8
603 8A5 UNI_IIC_CLK AE34 V34
IICCLK0
8A5 UNI_IIC_DAT AD32 AL20
1 IICDATA0
35B3 15C8 R317 15D8 UNI_IIC_CLK1 AB29
IICCLK1 AL17
10K AD33 AL14
5% 15C8 UNI_IIC_DAT1 IICDATA1
1/16W 35B3 AL11
MF
402 2 AL8
AL5
AK31
AJ4
AG31
AF4
AD31
AF6 AC4
AD7 AB22
A18 AB21
AP34 AB14 Pangea Ethernet, Firewire, Pwr/GNDs
AP1 AB13
DESCRIPTION:
AN33 AA31
AN2 AA22 ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
A AM32 AA21
NOTICE OF PROPRIETARY PROPERTY
A
AM3 AA14
AL29 AA13 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
AL26 Y4 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
AL23 VSS W19 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
A1
A34
B2
B33
C3
C32
D6
D9
D12
D15
D18
D21
D24
D27
D30
E4
F31
H4
J31
L4
M31
N13
N14
N21
N22
P4
P13
P14
P21
P22
R31
T16
T17
T18
T19
U4
U16
U17
U18
U19
V16
V17
V18
V19
V31
W16
W17
W18

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

D 051-6130-C ACI: C
ECS:1.0
TEI ASSERTED IF > 2V APPLE COMPUTER INC.
. SCALE SHT OF
NONE 10 53

8 7 6 5 4 3 2 1
 CR-11

8 7 6 5 4 3 2 1

PANGEA CORE 1 C345 1 C327 1

CRITICAL

C341
4.7UF 4.7UF 10UF
N20P80% N20P80% N20P80%
10V 10V 16V
2 CERM 2 CERM 2 CERM

+2_5V_MAIN
Pangea Core Bypass -- 16 0.01uF across each pair, 8 0.001uF on corners 805 805 1210

CRITICAL

D 1 A85 1 A105 1 A68 1 A97 1 A112 1 A79 1 A104 1 A67 1 A84 1 A96 1 A113 1 A80 1 A70 1 A82 1 A100 1 A110 1 A78 1 A103 1 A69 1 A81 1 A99 1 A111 1 A77 1 A102
1
CRITICAL
A76
2.2uF
1 A101
2.2uF
D
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.1UF 0.01UF N20P80%
16V
N20P80%
16V
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 2 CERM 2 CERM
10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 50V 50V 50V 50V 50V 50V 50V 50V 50V 50V 50V 10V 50V
2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 805 805
402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402

PLACE AS NEAR AS CORE CENTER AS POSSIBLE

Pangea Processor I/F Bypass -- two per power/ground pair 1 C333 1 C343 1 C332 1 C329
+VIO_CPUBUS_MAIN
0.1UF 0.01UF 0.1UF 0.01UF
20% 20% 20% 20%
10V 50V 10V 50V
2 CERM 2 CERM 2 CERM 2 CERM
402 402 402 402
1 A4 1 A22 1 A31 1 A30 1 A29 1 A28 1 A27 1 A26 1 A25 1 A24 1 A3 1 A7 1 A32 1 A41 1 A40 1 A39 1 A38 1 A37 1 A36 1 A35 1 A34 1 A6
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 50V 50V 50V 50V 50V 50V 50V 50V 50V 50V 50V
2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402

Pangea I/O Ring Bypass -- two per power/ground pair

+3V_MAIN
1 A20 1 A5 1 A57 1 A9
0.01UF 0.1UF 0.1UF 0.01UF
1 A98 1 A121 1 A17 1 A87 1 A157 1 A165 1 A164 1 A166 1 A158 1 A89 1 A132 1 A54 1 A64 1 A75 1 A94 1 A109 1 A117 1 A125 1 A45 20%
50V
20%
10V
20%
10V
20%
50V
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 2 CERM 2 CERM 2 CERM 2 CERM
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 402 402 402 402
2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM
C 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402
C
1 A56 1 A49 1 A23 1 A18
0.01UF 0.01UF 0.01UF 0.1UF
20% 20% 20% 20%
+3V_MAIN 2 50V
CERM 2 50V
CERM 2 50V 2 10V
402 402 CERM CERM
402 402
1 A149 1 A148 1 A147 1 A146 1 A145 1 A144 1 A143 1 A142 1 A151 1 A128 1 A61 1 A72 1 A91 1 A106 1 A114 1 A122 1 A95 1 A152 1 A159
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.01UF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
50V
2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM
2 CERM
402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402

1 A13 1 A10 1 A12 1 A11

2.2uF 2.2uF 2.2uF 2.2uF
N20P80% N20P80% N20P80% N20P80%
16V 16V 16V 16V
2 CERM 2 CERM 2 CERM 2 CERM
805 805 805 805
+3V_MAIN

1 A86 1 A156 1 A162 1 A150 1 A154 1 A21 1 A131 1 A53 1 A63 1 A74 1 A93 1 A108 1 A116 1 A124 1 A140 1 A139 1 A138 1 A137 1 A136
0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF PLACE AT EDGES OF PROC I/F PLANE
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM
402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402

B +3V_MAIN B
1 A135 1 A134 1 A133 1 A141 1 A129 1 A62 1 A73 1 A92 1 A107 1 A115 1 A123 1 A120 1 A83 1 A90 1 A44 1 A161 1 A16 1 A153 1 A163 1 A88
0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM
402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402 402

Pangea AMVDD Bypass (one pair per pin)

40C6 10C7 +3V_AMVDD_PANGEA_MAIN

36C6 35D4 35B5 35B3 34B2 28C5 26D6

1 A50 1 A60 1 A51 1 A42 1 A46 1 A19 19C3 18C7 18B6 18A4 16D4 15D7 15D3
0.1UF 0.1UF 0.1UF 0.1UF 0.01UF 0.01UF 13B8 13A8 11C8 11B8 10D7 10D4 9D3 +3V_MAIN
20% 20% 20% 20% 20% 20% 7C7 7B4 7B2 6D4 6B5 5D6 3A4
10V 10V 10V 10V 50V 50V
2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 9D2 8D7 8D6 8D4 8B6 7D4 7D2 CRITICAL
402 402 402 402 402 402 15C2 14D2 14C3 14B3 13D6 13C8 13C3
25B4 22B1 21D7 21C7 21C3 20C3 20C2 20B3 1 A66 1 A118 1 A160 1 A155 1 A119 1 A71
46B7 40D6 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF 2.2uF
N20P80%
16V
2 CERM
805
N20P80%
16V
2 CERM
805
N20P80%
16V
2 CERM
805
N20P80%
16V
2 CERM
805
N20P80%
16V
2 CERM
805
N20P80%
16V
2 CERM
805
Pangea Bypass
1 A58 1 A65 1 A52 1 A43 1 A200 1 A14
0.01UF 0.01UF 0.01UF 0.01UF 2.2UF 0.1UF PLACE ALONG OUTSIDE OF BALL GRID ALONG 3 NON-MAXBUS MAXBUS SIDES (2 PER)
DESCRIPTION:
20% 20% 20% 20% N20P80% 20%
2 50V 2 50V 2 50V 2 50V 2 16V
CERM 2 10V ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
A CERM
402
CERM
402
CERM
402
CERM
402 805
CERM
402
NOTICE OF PROPRIETARY PROPERTY
A
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

ACI: C
APPLE COMPUTER INC.
D 051-6130-C
ECS:1.0
SCALE SHT OF
NONE 11 53

8 7 6 5 4 3 2 1
 CR-12

8 7 6 5 4 3 2 1

PANGEA CORE

IODATA<7..0> 12D7 13B3 13B4 20B2 20B8 20C1 20C2 20C8 45C3

D 45C3 20C1 20B8 20B2 13B4

CRITICAL 13B3 IOD0 P34 IODATA<0> 0
IODATA<15..8> 12C7 12D7 13B4 20B6 20C6
D
12D6 IOD1 R32 IODATA<1> 1
U4 45C3 T29 IODATA<2>
PLACE 82 OHMS R’S NEAR ATA CONNECTOR
20C8 20C1 IOD2
2
45C3 PANGEA
20B2 13B4 IOD3 T28 IODATA<3> 3 R530
20C8 (5 OF 6) 82
20C1 20B2 PBGA 13B3 12D6 IOD4 R33 IODATA<4> 4 45D4 12A6 UIDE_DMAREQ 1 2 T_UIDE_DMAREQ 16B6 16B8
13B4 13B3 12D6 45C3 20C8 IOD5 R34 IODATA<5> 5 5%
20C1 20B2 13B4 13B3 12D6 IOD6 U29 IODATA<6> 6 R526 1/16W
MF
82 603
20C1 20B2 13B4 13B3 12D6 IOD7 T33 IODATA<7> 7 45D4 12A6 UIDE_IRQ 1 2 T_UIDE_IRQ_L 16A8 16B6
45C3 20C8 20B6 13B4 12D6 IOD8 T34 IODATA<8> 8 5%
1/16W
20B6 12D6 IOD9 U30 IODATA<9> 9 MF
603
20B6 12D6 IOD10 U32 IODATA<10> 10

20C6 12D6 IOD11 U33 IODATA<11> 11

20C6 12D6 IOD12 V28 IODATA<12> 12

20C6 12D6 IOD13 V33 IODATA<13> 13 R524

20C6 12D6 IOD14 V32 33
IODATA<14> 14 45D4 12B6 UIDE_DA<0> 1 2 T_UIDE_DA<0> 16A6
20C6 12D6 IOD15 V30 IODATA<15> 15 5%

N28
R525 1/16W
MF
IOA0 IOADDR<0> 20B8 20C3 45B3 33 603
J34 45D4 12B6 UIDE_DA<1> 1 2 T_UIDE_DA<1> 16A6
IOA1 IOADDR<1> 20B3 20B8 45B3 5%
M30 20B3 20B8 45B3
IOA2 IOADDR<2> 1/16W
MF R523
IOA3 L32 IOADDR<3> 20B3 20B8 45B3 603 33
K34 45D4 12A6 UIDE_DA<2> 1 2 T_UIDE_DA<2> 16A6
IOA4 IOADDR<4> 20B3 20B8 45B3 5%
R522 1/16W
MF
33 603
CSLOT_OE Y33 CSOE* 15C6 20C8 45B1 45D4 12A6 UIDE_CS0_L 1 2 T_UIDE_CS0_L 16A6
CSLOT_WE V29 CSWE* 15C6 20B8 45B1 5%
1/16W
MF R521
33
C 45D4 12A6 UIDE_CS1_L
PLACE R’S NEAR CONNECTOR
603
1
5%
2 T_UIDE_CS1_L 16A6 C
R531 1/16W
MF
33 603
45D4 12A6 UIDE_RESET_L 1 2 T_UIDE_RESET_L 16B6 16C7 45C4
5%
1/16W
MF R516
603 22
45D4 12A6 UIDE_DIOW_L 1 2 T_UIDE_DIOW_L 16B6
5% 45A4
R529 1/16W
MF
22 603
45D4 12A6 UIDE_DIOR_L 1 2 T_UIDE_DIOR_L 16B6 CLOSE TO HOST
5% 45A4
1/16W
MF R515
603 22
45D4 12A6 UIDE_DMAACK_L 1 2 T_UIDE_DMAACK_L 16B6
CSCE1 W29 CB_CE1* 15C6 20C8 45C1
5% 16C7
1/16W
MF
603
CSCE2 W28 CB_CE2* 15C6 20C6 45C1

UIDE_D<15..0>
45C4 12B6 12B5 UD_IDEDD0
45C4 12B6 12B5 UD_IDEDD1
H30
J28
UIDE_D<0>
UIDE_D<1>
0

1
RP’S CAN BE RE-PINNED T_UIDE_D<15..0> 12A5 12B5 16A8 16B3 16B6 16B7
45C4 12B6 12B5 UD_IDEDD2 F33 UIDE_D<2> 2
RP28
33
45C4 12B6 12B5 UD_IDEDD3 E34 UIDE_D<3> 3 45C4 12B7 12B6 0 UIDE_D<0> 2 7 16B6 12B4 T_UIDE_D<0> 0

45C4 12B6 12B5 UD_IDEDD4 16B7

K28 UIDE_D<4> 4 5%
1/16W
RP25
45C4 12B6 12B5 UD_IDEDD5 G33 UIDE_D<5> 5 SM 33
45C4 12B7 12B6 1 UIDE_D<1> 12B4 4 5 T_UIDE_D<1> 1
45C4 12B6 12A5 UD_IDEDD6 J29 UIDE_D<6> 6 16B6
45C4 12B6 12A5 UD_IDEDD7 J30 UIDE_D<7> 7
RP27
16B7 5%
1/16W16B7
33
B 45C4 12B6 12A5 UD_IDEDD8 F34 UIDE_D<8> 8 45C4 12B7 12B6 2 UIDE_D<2> 2 7 SM
16B6
12B4 T_UIDE_D<2> 2 B
45C4 12B6 12A5 UD_IDEDD9 K29 UIDE_D<9> 9 5%
1/16W
RP26
45C4 12B6 12A5 UD_IDEDD10 L28 UIDE_D<10> 10 SM 33
45C4 12B7 12B6 3 UIDE_D<3> 12B4 4 5 T_UIDE_D<3> 3
45C4 12B6 12A5 UD_IDEDD11 H32 UIDE_D<11> 11 16B6
45C4 12B6 12A5 UD_IDEDD12 H33 UIDE_D<12> 12
RP26
16B7 5%
1/16W16B7
33 SM
45C4 12B6 12A5 UD_IDEDD13 L29 UIDE_D<13> 13 45C4 12B7 12B6 4 UIDE_D<4> 2 7 12B4 T_UIDE_D<4> 4

45C4 12B6 12A5 UD_IDEDD14 16B6

G34 UIDE_D<14> 14 5%
1/16W
RP27
45C4 12B6 12A5 UD_IDEDD15 J32 UIDE_D<15> 15 SM 33
45C4 12B7 12B6 5 UIDE_D<5> 12B4 4 5 T_UIDE_D<5> 5
16B6
UD_IDEDA0 E33 UIDE_DA<0> 12C5 45D4 RP25
16B7 5%
1/16W16B7
UD_IDEDA1 F32 UIDE_DA<1> 12C5 45D4 33 SM
45C4 12B7 12B6 6 UIDE_D<6> 2 7 12B4 T_UIDE_D<6> 6
UD_IDEDA2 D34 UIDE_DA<2> 12C5 45D4 16B6
5%
1/16W
RP28
UD_IDECHRDY H29 UIDE_IORDY 16B8 45D4 SM 33
45C4 12B7 12B6 7 UIDE_D<7> 4 5 T_UIDE_D<7> 7
UD_IDECS1FX H34 UIDE_CS0_L 12C5 45D4
RP28 5%
PLACE RP’S NEAR CONNECTOR
UD_IDECS3FX J33 UIDE_CS1_L 12C5 45D4
33 1/16W16B7
SM
45C4 12B7 12B6 8 UIDE_D<8> 3 6 12B4 T_UIDE_D<8> 8
UD_IDERST L30 UIDE_RESET_L 12C5 45D4 16B3
UD_IDEWR K33 UIDE_DIOW_L 12C5 45D4
5%
1/16W
RP28
SM 33
UD_IDERD M28 UIDE_DIOR_L 12C5 45D4 45C4 12B7 12B6 9 UIDE_D<9> 12B4 1 8 T_UIDE_D<9> 9
16B3
UD_IDEDMACK M29 UIDE_DMAACK_L 12B5 45D4 RP27
16B7 5%
1/16W16B7
UD_IDEDMARQ D33 UIDE_DMAREQ 12D5 45D4 33 SM
45C4 12B7 12B6 10 UIDE_D<10> 3 6 12B4 T_UIDE_D<10> 10
UD_IDEINTRQ E32 UIDE_IRQ 12D5 45D4 16B3
5% RP27
45C4 12B7 12B6 11 UIDE_D<11>
1/16W
SM
12B4 1
33 8 T_UIDE_D<11> 11
PANGEA ATA BUS
16B3
RP26
16B7 5%
1/16W16B7
DESCRIPTION:
33 SM ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
45C4 12B7 12B6 UIDE_D<12> 3 6 12B4 T_UIDE_D<12>
A 12

5%
1/16W
16B3
RP26
12

NOTICE OF PROPRIETARY PROPERTY

A
SM 33
45C4 12B7 12B6 13 UIDE_D<13> 12B4 1 8 T_UIDE_D<13> 13
16B3 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
RP25
16B7 5%
1/16W16B7
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
33 SM
45C4 12B7 12B6 14 UIDE_D<14> 3 6 12B4 T_UIDE_D<14> 14 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
16B3
5%
1/16W
RP25 II NOT TO REPRODUCE OR COPY IT
SM 33 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
45C4 12B7 12B6 15 UIDE_D<15> 12B4 1 8 T_UIDE_D<15> 15
16B7 16B3 5% SIZE DRAWING NUMBER REV.
1/16W
SM
APPLE COMPUTER INC.
D 051-6130-C ACI: C
ECS:1.0
SCALE SHT OF
NONE 12 53

8 7 6 5 4 3 2 1
 CR-13

8 7 6 5 4 3 2 1
40D6 36C6 35D4 35B5 35B3 34B2 28C5 26D6 25B4 22B1
8D4
16D4
8B6
13A8
21D7
15D7
7D4
11C8
21C7
15D3
7D2
11B8
21C3
15C2
7C7
11A5
20C3
14D2
7B4
10D7
20C2
14C3
7B2
10D4
20B3
14B3
6D4
9D3
19C3
13C8
6B5
9D2
18C7
13C3
5D6
8D7
18B6
13B8
3A4
8D6
18A4
+3V_MAIN

1
R295 1
R311 1
R305
PANGEA CORE
46B7 4.7 4.7 4.7
5% 5% 5%
1/16W 1/16W 1/16W
MF MF MF
2 603 2 603 2 603
40C4 +3V_VDDA1_PANGEA_MAIN

40C4 +3V_VDDA2_PANGEA_MAIN
15B1 15D2 35C3 36B4 46B7
40D4 +3V_VDDA3_PANGEA_MAIN USBVD1 USBVD2 USBVD3 USBVD4 +VIO_CPU_SLEEP 3C4 3D5 4B4 4D5 5C2
14A6 14A7 14C6 14D6 14D8
D USB PORT1 IRDA/BT USB PORT2 INTERAL MODEM
1
D
A47 1 A55 1 A8 1 R282
1uF 1uF 1uF 2K
20% 20% 20% 5%
10V 10V 10V 1/16W
CERM 2 CERM 2 CERM 2 MF
805 805 805
2 603
AP32 AJ30 AL33
VDDA_1 VDDA_2 VDDA_3 R297
CPU_INTR*
0 CPU_INT*
CRITICAL 13B8 1 2 3A6
19B8 FW_PHY_PD AC30
GPIO0 U4 SCCTXDA AK34 SCC_TXDA* 16C1 25A4 5%
1/16W
AA33 PANGEA MF
38B4 14D3 VCORE_CTL GPIO1 (6 OF 6) SCCRTSA AE28 SCC_RTSA* 16D2 25B4 603
Y29
16D3 14B3 MODEM_SDOWN GPIO2 PBGA SCCDTRA AH33 SCC_DTRA 16D2
AF34
16D2 14B3 MODEM_RESET* GPIO3 SCCRXDA AJ34 SCC_RXDA 16D4 25B4 28C3
SCCGPIOA AF30 SCC_GPIOA* 14B3 16C3
SCCTRXCA AF29 SCC_TRXCA 14B3 16C2
GENERAL
PURPOSE SCCTXDB AD29 PMU_MISO OUT 21C3
I/O’S
SCCRTSB AG33 PMU_REQ* OUT 14C3 21C3
OPTION ADD PARALLEL R TO
AUDIO_HP_MUTE_L AB28 SCCRXDB AG32 PMU_MOSI IN 21C3
28C8 27B6 GPIO9 RESOLVE RESONANT NOISE CONCERN
SCCGPIOB AD28 PMU_ACK* IN 21C1
SCCTRXCB AE29 PMU_SCK 21C3
L35 34B2 35B3 35B5 35D4 36C6 40D6 46B7
IN 100-OHM-EMI
+3V_MAIN
13D6 14B3 14C3 14D2 15C2 15D3 15D7 16D4 18A4 18B6 18C7
VDD_USB B28 40D4 VDD_USB 1 2 3A4 5D6 6B5 6D4 7B2 7B4 7C7 7D2 7D4 8B6 8D4 8D6
VSS_USB C30 SM 8D7 9D2 9D3 10D4 10D7 11A5 11B8 11C8 13A8 13B8 13C8
C353 1 19C3 20B3 20C2 20C3 21C3 21C7 21D7 22B1 25B4 26D6 28C5
USB_VD1_P B30 USB_DAP 0.01uF 17B8 45D1
20B6 15A6 CB_RESET AE33
GPIO15 C29 USB_DAM 603 2
45C1 AC29 USB_VD1_N
18C6 ETHPHYRESETL GPIO16
R590 USB USB_VD2_P A31 USB_DBP 26B6
FW_C_LKON 1 0 21C5 16C3 14B3 RING_DETECT* AC28
EXTINT0 USB_VD2_N E27 USB_DBM 26C6
19B6 10B3 2
C 22B6 14D3
5%
1/16W THT
14C3
21B5
PMU_INT
AGP_INTA*
AD30
AG34
EXTINT1
USB_PRTPWR0 F25 USB_PWR_A 17A7 40D4 C
EXTINT2
MF
603 TP1 KW_EXTINT3 AF33
EXTINT3
USB_PWRFLT0 E26 USB_PWRFLT_A 17A7
A AF32 G26
VIEW PLL 1-4 AUDIO_AMP_MUTE_L EXTINT4 USB_VD3_P USB_DCP 17D8 45D1 16C1 13C5 USB_DDP 13C5 USB_DDM
+3V_MAIN AH34 B29
18C4 14C2 ENET_ENRGYDET_IRQ_H EXTINT5 USB_VD3_N USB_DCM 17D8 45D1 16C1
DIFFERENT USAGE A30 USB_DDP 13C4 16C1
USB_VD4_P 1
INTERRUPTS
USB_VD4_N G25 USB_DDM 13C4 16C1
1
R109 R110
1 15K 15K
R390 5% 5%
10K F27 USB_PRTPWR1 A29 USB_PWR_B 17A7 40C4 1/16W 1/16W
MF
5% 21C3 14C3 PMU_NMI_IRQ* EXTINT9 F26 MF
1/16W B31 USB_PWRFLT1 USB_PWRFLT_B 17A7 2 603 2 603
MF 45C1 20B6 15B6 CB_REG* EXTINT10
2 603 45C1 20B8 15B6 CB_IREQ* A32 L33 IOADDR<5> 20B3 20B8 45B3
EXTINT11 IOA5
28C4 AUDIO_HP_SENSE_L G27 N29 IOADDR<6> 20B3 20B8 45B3
EXTINT12 IOA6
13D2 CPU_INTR* M32 IOADDR<7> 20B3 20B8 45B3
IOA7
L34 IOADDR<8> 20B3 20B8 45B3
R387 IOA8
P28
0 IOA9 IOADDR<9> 20B3 20B8 45B3
25B2 21B3 PME* 1 2
M33 IOADDR<10> 20B3 20C8 45B3
IOA10

NOSTUFF
+3V_MAIN IOA11
IOA12
P29
M34
IOADDR<11> 20B3 20C8 45B3
IOADDR<12> 20B3 20B8 45B3
Pangea BootStrap Pins
J200 CARDSLOT IOA13 P30 IOADDR<13> 20B3 20B8 45B3 46B7 40D4
U.FL-R_SMT 1
R72 MPIC N33 IOADDR<14> 20B3 20B8 45B3 15C7 15C5 15B7 15B5 15A5 9D4 6C5 6B5 4C6 +3V_SLEEP
F-ST-SM
NOSTUFF
IOA14 35D2 27C6 25D4 25B5 25A6 22C1 22B5 20D6 20C8
3 10K IOA15 R28 IOADDR<15> 20B3 20B7 45B3 66MHZ NOSTUFF NOSTUFF NOSTUFF NOSTUFF
AF28
R1300 5%
1/16W CPUINT0 P32 IOADDR<16> 20B3 20B8 45B3 1
R341 1
R92 1 1
R333 1
R337 1
R324 1
NOSTUFF NOSTUFF
1 1
0 2
MF
G24
IOA16
N34 4.7K 4.7K
R323 4.7K 4.7K 4.7K
R326 1
R596
2 603 KW_PME* PCIPME IOA17 IOADDR<17> 20B3 20B6 45B3 4.7K 4.7K 4.7K
IODATA<8..0> 5% 5% 5% 5% 5% 5%
5% IN IOA18 R29 IOADDR<18> 20B3 20B6 45A3 20C1 20B8 20B6 20B2 13B3 12D7 12D6 1/16W 1/16W 1/16W 1/16W 1/16W 1/16W 5%
1/16W 5%
1/16W 21B3 KW_PROC_SLEEP_REQ* 45C3 20C8 20C2 MF MF MF MF MF 1/16W
2 MF AK33 P33 IOADDR<19> 20B3 20B6 45A3 MF MF MF
402 PROCSLEEPREQ IN IOA19 2 603 2 603 2 603 2 603 2 603 2 603 2 603
AL34 R30 45C3 20C2 20C1 20B8 13B4 12D7 12D6 IODATA<0> 2 603
21B3 KW_PEND_PROC_INT PENDPROCINT OUT IOA20 IOADDR<20> 20B3 20B6 45A3 0
45C3 20C1 20B8 20B2 13B4 12D7 12D6 1 IODATA<1>
B 45A4 PAN_XIB AK29
XTAL_IN
CARDSLOT_IOWR
CARDSLOT_IORD
W34
W33
CB_IOWR* 15C6 20B6 45C1
CB_IORD* 15C6 20C6 45C1 R314 45C3 20C1 20B8 20B2 13B4 12D7 12D6
45C3 20C8 20C1 20B2 13B4 12D7 12D6
2
3
IODATA<2>
IODATA<3>
B
NOSTUFF 45A4 PAN_XO AH27
XTAL_OUT 10
Y34 1 2 SCR_SYNC 27B1 20B2 13B4 12D7 12D6 4 IODATA<4>
1 PANGEA_STOPXTAL* AG28
STOPXTAL
IOWAIT CB_WAIT*
R85 45C3 20C8 20C1 5 IODATA<5>
R548 1
R549
CLOCKS
AUD_DTO AD34 KW_AUD_DTO 1
10 2 SCR_DATAIN 27C3 6 IODATA<6>
100K 0 1
KW_AUD_DTI 27C1 20B2 13B4 12D7 12D6
PLACE ON TOP SIDE 5% 5%
R291 AG30
WATCHDOG AUD_DTI AC32
45C3 20C8 20C1
7 IODATA<7>
REESE RESERVE FOR TEST
1/16W 0 AA29 100MHZ NOSTUFF 1
R325
MF
1/16W
MF 5% AUDIO/I2S AUD_SYNC KW_AUD_SYNC
R87 1 1
R328 1
R332
1
R336 1
R329
2
402 2 402 CRITICAL 1/16W
MF AUD_BITCLK AC33 KW_AUD_BITCLK
1
10 2 SCR_SCLK 27B1
R340 1
R93 33K 33K 33K 1
R595
33K 33K 33K 33K 5% 5%
Y5 2 402 AUD_CLKOUT AA28
5% 5% 5% 5%
1/16W
1/16W
5%
1/16W
1/16W
MF 5%
33K
18.4320M 1/16W
MF 1/16W 1/16W
MF MF
MF MF
2 603 1/16W
PAN_XIA 1 2
R3161 1
R84 MF 2 603 2 603 MF
45A4 PAN_XT IICCLK_2 H28 KW_IIC_CLK 15A8 16C3 2 603 2 603 2 603 2 603
2 603
SM IIC
IICDATA_2 C34 KW_IIC_DAT 27B115A8 16C2 10K5% 5%
10K
1/16W 1/16W
1 A2 1 A1 27B1 MF MF 1 = 66M 1 = SS ON 1 = Desktop 1 = PCI2 Debug 11 = 33M AGP 1 = 33M
15pF 15pF 603 2 2 603 0 = 100M 0 = SS OFF 0 = Portable 0 = No PCI2 10 = 50M AGP 0 = 66M
5% 5% 01 = 40M AGP
50V
2 CERM 2 50V
CERM R309 1 = PCI1 Debug
0 = No PCI1 00 = 66M AGP
603 603 10 PANAUDCLKOUT
21C5 KW_WATCHDOG*
1 2 27B3
VSSA_1 VSSA_2 VSSA_3
AN31 AJ27 AG29
CRYSTAL bias circuitry DEFAULT FOR P72: 00100000
needs to be looked at
to determine proper values DEFAULT FOR P73: 00100000
+3V_MAIN
NOSTUFF
1 PANGEA SER/AUD/USB, BOOTSTRAPS
R301 DESCRIPTION:
10K
5%
1/16W ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
A R304
0
MF
2 603
NOTICE OF PROPRIETARY PROPERTY
A
21C3 6C8 STOPXTAL* 1 2
5% THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1/16W PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
MF 603 AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

ACI: C
APPLE COMPUTER INC.
D 051-6130-C
ECS:1.0
SCALE SHT OF
NONE 13 53

8 7 6 5 4 3 2 1
 CR-14

8 7 6 5 4 3 2 1

PANGEA PULLUPS/PULLDOWNS
TO LOCATE UNUSED RPAK PINS REFERE TO COMPONENT LOCATIO CREF TABLE ON PAGE 49

MAXBUS PULLS AGP PULLS GPIO PULLS

D EMMO* PULLUP HAS BEEN DELETED DUE TO FW NEW INTRPT PINOUT

36C4 25D2 25C2 24C2 23C8 23C1 23B8 22D8 22C5 22A4 14D4 +3V_VGA_MAIN
D
46C7 46B7

46B7 36B4 35C3 46B7 36B4 35C3 R954

13D1 5C2 4D5 4B4 3D5 3C4 +VIO_CPU_SLEEP 13D1 5C2 4D5 4B4 3D5 3C4 +VIO_CPU_SLEEP 10K
15D2 15B1 14D6 14C6 14A7 14A6 22B6 13C7 AGP_INTA* 1 2
15D2 15B1 14D8 14C6 14A7 14A6 5%
1/16W
MF
R553 R262 603

4.7K 2 DBWO* 4.7K 2

1 41D1 5A4 3B8 1
+3V_VGA_MAIN R1030 34B2 35B3 35B5 35D4 36C6 40D6 46B7
5% 36C4 25D2 25C2 24C2 23C8 23C1 23B8 22D8 22C5 22A4 14D3 10K 13C8 13D6 14B3 14C3 15C2 15D3 15D7 16D4 18A4 18B6 18C7
5%
1/16W
1/16W 46C7 46B7 38B4 13D7 VCORE_CTL 1 2 +3V_MAIN 3A4 5D6 6B5 6D4 7B2 7B4 7C7 7D2 7D4 8B6 8D4 8D6
MF
MF
603
NOSTUFF 603 R372 5% 8D7
19C3
9D2
20B3
9D3
20C2
10D4
20C3
10D7
21C3
11A5
21C7
11B8
21D7
11C8
22B1
13A8
25B4
13B8
26D6
13C3
28C5
R38 10K 1/16W
1K
R597 44B5 22A7 9B1 AGPSBSTB 1 2 MF
603
5B7 3A6 QREQ* 1 2 CPU_BG*
4.7K 2 5%
41A1 5D7 3D8 1
41D1 5% 5%
1/16W
MF R371
1/16W 1/16W SAHARA V2.0 402 10K
RP101
MF
603 RP100
4.7K
MF
603
BVSEL L1_TSTCLK I/O VOLTAGE
24D5 9D1 AGPGNT*

R113
1
5%
2

PMU PULLS
3
4.7K
5%
1/16W
6 3D6 LSSD_MODE* 2

5%
1/16W
SM
7

RP100
B’0’
B’0’
B’1’
B’0’
B’1’
B’0’
N/A
1.2, 1.5, OR 1.8
3.3
24D5 9D1 AGPREQ* 1
10K
5%
1/16W
2
1/16W
MF
603

R119
21C7
13C8
7D2
46B7
21C3
13C3
7C7
40D6
20C3
13B8
7B4
36C6
20C2
13A8
7B2
35D4
20B3 19C3 18C7 18B6
11C8 11B8 11A5 10D7
6D4 6B5 5D6 3A4 +3V_MAIN
ENET PULLS
RESISTOR 3,6 NOT IN USE SM 4.7K MF 10K 10D4 9D3 9D2 8D7 8D6 8D4 8B6 7D4
3D6 L1_TSTCLK 1 8 B’1’ B’1’ 2.5 24D6 9B1 AGPFRAME* 603 1 2
18A4 16D4 15D7 15D3 15C2 14D2 14B3 13D6
RP4 5% NOTE:
44B5
R118 5% 35B5 35B3 34B2 28C5 26D6 25B4 22B1 21D7 R22
1/16W 10K
5B7 3C8 TBST* 2
4.7K 7
1/16W
SM
FOR SAHARA V1.1, L1_TSTCLK
MUST BE TIED TO A LOGICAL ’1’ 44B5 24D6 9B1 AGPTRDY* 1
10K 2
MF
603
21C3 13C5 PMU_REQ* 1 2 R12
R856 5% 100K 2
41D1 18C4 13C7 ENET_ENRGYDET_IRQ_H 1
5%
1/16W
RP14 3D6 L2_TSTCLK 1
4.7K 2 5%
1/16W R117 1/16W
MF R389 5%
SM MF 10K 603
10K 1/16W
4.7K 5% 44B5 24D6 9B1 AGPIRDY* 603 1 2
21C3 13C7 PMU_NMI_IRQ* 1 2 MF
C 5D7 3D8
41D1
CPU_BR* 1 8 1/16W
MF
603
R133 5%
1/16W 5%
1/16W
603
C
RP14 5%
1/16W 22C7 22A6 9D4 1
10K 2
MF RP19 MF
2
4.7K 7
SM R866 NOSTUFF
AGPSTOP* 603
4
10K 5
603
5B7 3C8 GBL* 4.7K 2 5% 21B5 13C7 PMU_INT
41A1 5%
1 1/16W
MF R111 5%
1/16W R251 5% 603 10K 1/16W
SM 1/16W 44B5 24C6 9B1 AGPDEVSEL* 1 2 SM
4.7K 2 MF
5D7 3D8 TS* 1 603
R366 5%
1/16W
41D1 5% 14D8 14D6 14A7 14A6 13D1 5C2 4D5 4B4 3D5 3C4 +VIO_CPU_SLEEP 10K MF
1/16W
46B7 36B4 35C3 15D2 15B1 44C5 22B7 9A1 AGPADSTB<0> 1 2 603
RP4 MF
4.7K 603 5%
1/16W R373
5A4 3A6 TA* 1 8 RP4 44C5 22B7 9A1 AGPADSTB<1>
MF
402 1
10K 2
41D1 4.7K

5A4 3A6 TEA*

5%
1/16W
SM RP16
3
4.7K 6
41D1 5B7 3B8 AACK* 3

5%
1/16W
SM
6

44B5 22A6 9A1 AGPRBF*

R453
1
10K 2
5%
1/16W
MF
402
46B7
21C7
40D6
21C3
36C6
20C3
35D4
20C2
MODEM PULLS
20B3 19C3 18C7 18B6
41D1 5%
5% 13C8 13C3 13B8 13A8 11C8 11B8 11A5 10D7
R266 1/16W RP15 1/16W
MF R112 7D2 7C7 7B4 7B2 6D4 6B5 5D6 3A4 +3V_MAIN

10K
SM 4.7K 603 10K 10D4 9D3 9D2 8D7 8D6 8D4 8B6 7D4
3A6 MCP* 1 2 41A1 5B7 3B8 WT* 1 8 44B5 9A1 AGPPIPE* 1 2
18A4 16D4 15D7 15D3 15C2 14D2 14C3 13D6
5% 5% 35B5 35B3 34B2 28C5 26D6 25B4 22B1 21D7 RP19
5%
1/16W 1/16W R370 1/16W 10K
MF
603
RP16 SM
44B5 24D5 9B1 PCISTOP* 1
10K 2
MF
603 16D3 13D7 MODEM_SDOWN 3 6
4.7K RP15 5%
3D6 ABB* 2 7
4.7K 5%
1/16W R104 RP19 1/16W
5% 41A1 5B7 3B8 CI* 2 7 MF 10K SM
1/16W 603 1 10K 21C5 16C3 13C7 RING_DETECT* 1 8
RP101 SM 5%
1/16W
9C3 PAN_AGPBUSY* 2
5%
4.7K 5%
3D7 DBB* 4 5 SM 1/16W
MF
1/16W
SM R955
R260 402 10K
5% 16D2 13C7 MODEM_RESET* 1 2
1/16W 4.7K 2
SM
RP100 41D1 5B7 3A4 PAN_QACK* 1 5%
1/16W
4.7K 5% MF

B 3A6 TLBISYNC* 4

5%
5 1/16W
MF
603 1 C279
603
B
RP101 1/16W
SM 0.001UF
4.7K (R260) WHY NEED A PULLU[? PANGEA ALWAYS DRIVES EXEPT IN SLEEP.
20%
RP5
3A6 SMI* 2 7 2 50V
CERM
603 4
100K 5
5% 16C3 13C5 SCC_GPIOA*
1/16W
SM 5%
RP101 RP5 1/16W
SM
4.7K 3
100K 6
6B6 3A6 TBEN 1 8 16C2 13C5 SCC_TRXCA
43B4 5%
5%
1/16W
1/16W SM
R39 SM
2K
15D2 3A6 SRESET* 1 2
5% 15D2 15B1 14D8 14D6 46B7 36B4 35C3 15D2 15B1 14D8 14D6
1/16W 4D5 4B4 3D5 3C4 +VIO_CPU_SLEEP 4D5 4B4 3D5 3C4 +VIO_CPU_SLEEP
MF
603
R34 14C6 14A6 13D1 5C2 14C6 14A7 13D1 5C2
1K 46B7 36B4 35C3 NOSTUFF
15D2 3A6 CHKSTP_OUT* 1 2 1 1
5%
R862 R863
1/16W 4.7K 0
R294 MF 5%
1/16W
5%
1/16W
10K 603
MF MF
5B7 HIT* 1
5%
1/16W
MF
2

R74
3C6 DBDIS*
2 603 2 603
NEW 4.7K RESISTORS CAN BE
603 10K 3B8
5A4 DRDY* 1
5%
2
DRTRY*
CHANGED INTO R-PACKS
RP16 1/16W
MF PULL-UP/PULL-DOWN(1)
4
4.7K 5
603 R864
5A4 3B8 CPU_DBG*
47 DESCRIPTION:
41A1 5% MIRAGE 15D2 15B2 3A6 3A4 CPU_HRESET* 1 2
1/16W ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
A R268 5%

21C3 15B3 CPU_HRST

SM
1
2.2K 2 1/16W
MF
603 NOTICE OF PROPRIETARY PROPERTY
A
5%
1/16W
RP100 MF THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
4.7K 603 AGREES TO THE FOLLOWING
3A6 CHKSTP_IN* 3 6
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
5%
1/16W II NOT TO REPRODUCE OR COPY IT
SM III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
R1032
1K SIZE DRAWING NUMBER REV.
5B7 3B8 ARTRY* 1 2
41D1 5%
1/16W
R-PACKS CAN BE RE-PINNED APPLE COMPUTER INC.
D 051-6130-C ACI: C
ECS:1.B
MF
603 SCALE SHT OF
NONE 14 53

8 7 6 5 4 3 2 1
 CR-15

8 7 6 5 4 3 2 1

TO LOCATE UNUSED RPAK PINS REFERE TO COMPONENT LOCATIO CREF TABLLE ON PAGE49

JTAG PULLS
IIC BUS PULLUPS CARDSLOT BUS PULLS
JTAG TEST PORT

D 40D6 36C6 35D4 MAIN RAIL, TO PREVENT LEAKAGE INTO UNPOWERED DEVICES
CONFIRM PULLUP VOLTAGE
OMIT
D
I21
21C7 21C3 20C3 20C2 20B3 19C3 18C7 18B6
13C8 13C3 13B8 13A8 11C8 11B8 11A5 10D7 J19
7D2 7C7 7B4 7B2 6D4 6B5 5D6 3A4 +3V_MAIN 40D6 36C6 35D4 35B5 35B3 34B2 28C5 26D6 25B4 22B1 SM-1
10D4 9D3 9D2 8D7 8D6 8D4 8B6 7D4 16D4 15D7 15C2 14D2 14C3 14B3 13D6 13C8 13C3 13B8
8D4 8B6 7D4 7D2 7C7 7B4 7B2 6D4 6B5 5D6 3A4 +3V_MAIN 1 2 +VIO_CPU_SLEEP 3C4 3D5 4B4 4D5 5C2 13D1 14A6 14A7 14C6
18A4 16D4 15D3 15C2 14D2 14C3 14B3 13D6 R1202
35B5 35B3 34B2 28C5 26D6 25B4 22B1 21D7 1K 13A8 11C8 11B8 11A5 10D7 10D4 9D3 9D2 8D7 8D6 NC 3 4 CHKSTP_OUT* 3A6 14A8 14D6 14D8 15B1 35C3 36B4 46B7
46B7 10B7 8A5 UNI_IIC_CLK 1 2 21D7 21C7 21C3 20C3 20C2 20B3 19C3 18C7 18B6 18A4 5 6
46B7 NC CPU_HRESET* 3A4 3A6 14A6 15B2
5% 7 8 SRESET*
1/16W NC 3A6 14A8
R1203 MF
15C3 10B7 ASIC_TMS 9 10 NC
1K 603
10B7 8A5 UNI_IIC_DAT 1 2
15C3 10B7 ASIC_TDI 11 12 CPU_TMS 3D6 15B3
5% 13 14
10B7 PANGEA_TDO CPU_TDI 3D6 15B3
1/16W
MF R312 20D6 20C8 15C7 15B7 15B5 15A5 13B3 9D4 6C5 6B5 4C6 +3V_SLEEP
15C3 10B7 ASIC_TCK 15 16 CPU_TDO 3D6
603 2.2K 2
35B3 10B7 UNI_IIC_CLK1 1 46B7 40D4 35D2 27C6 25D4 25B5 25A6 22C1 22B5 15B3 10B7 ASIC_TRST* 17 18 CPU_TCK 3D6 15B3
5% 19 20 CPU_TRST* 3D6 15A3
R82 1/16W
MF
2.2K 2 603
35B3 10A7 UNI_IIC_DAT1 1
5%
1/16W
MF
603 RP8
2
10K 7
45C1 20C6 13B5 CB_IORD*
PMU NOT RATED STRONG ENOUGH FOR 1K 5%
1/16W
SM RP8 R53
1
10K 8 10K
45C1 20B6 13B5 CB_IOWR*
15D3 10B7 ASIC_TDI 1 2
5% 5%
RP21 1/16W
SM
1/16W
2
10K 7
MF
603
46B7 40D4 35D2 27C6 +3V_SLEEP 45C1 20C8 12B6 CB_CE1*

C 15B7 15B5 15A5 13B3 9D4 6C5 6B5 4C6

25D4 25B5 25A6 22C1 22B5 20D6 20C8 15C5
5%
1/16W RP21 R52
35D4
18B6
10D7
36C6
18C7
11A5
40D6
19C3
11B8
46B7
20B3
11C8
20C2
13A8
20C3
13B8
21C3
13C3
21C7
13C8
C
SM 10K 10K +3V_MAIN
45C1 20C6 12B6 CB_CE2* 1 8 15D3 10B7 ASIC_TMS 1 2 3A4 5D6 6B5 6D4 7B2 7B4 7C7 7D2
5% 7D4 8B6 8D4 8D6 8D7 9D2 9D3 10D4
5% 1/16W 13D6 14B3 14C3 14D2 15D3 15D7 16D4 18A4
RP8 1/16W
SM
MF 21D7 22B1 25B4 26D6 28C5 34B2 35B3 35B5
10K 603
R1120 45B1 20C8 12C6 CSOE* 4 5
R58
PMU_IIC_CLK 10K 5%
21B3 6D5 1 2
1/16W ASIC_TCK
10K
5% SM RP21 15C3 10B7 1 2
1/16W
MF 4
10K 5
5%
1/16W
603 45B1 20B8 12C6 CSWE* MF
603
5%
1/16W
SM R60
1K
R1121 15C3 10B7 ASIC_TRST* 1 2
PMU_IIC_DAT 10K 5%
21B3 6C5 1 2 1/16W
MF
5% 603
1/16W
MF
603

PMU PULL UP RP14

4.7K 35C3 36B4 46B7
15D2 3D6 CPU_TDI 4 5 +VIO_CPU_SLEEP 3C4 3D5 4B4 4D5 5C2 13D1
5% 14A6 14A7 14C6 14D6 14D8 15D2
1/16W
SM

RP14
3
4.7K 6
20D6 20C8 15C7 15C5 15B7 15A5 13B3 9D4 6C5 6B5 4C6 +3V_SLEEP 15D2 3D6 CPU_TMS
46B7 40D4 35D2 27C6 25D4 25B5 25A6 22C1 22B5 5%
1/16W

B R59
SM
B
45C1 20B6 13C7 CB_REG* 1
4.7K 2 RP15
4
4.7K 5
5% 15C2 3D6 CPU_TCK
1/16W
MF 5%
1/16W
46B7 40D4 35D2 27C6
603
R64 SM
4.7K 2
15C5 15B5 15A5 13B3 9D4 6C5 6B5 4C6 +3V_SLEEP 45C1 20B8 13C7 CB_IREQ* 1
25D4 25B5 25A6 22C1 22B5 20D6 20C8 15C7 5%
1/16W
MF MIRAGE
RP8 603
R274
10K
45C1 20B6 13B5 CB_WAIT* 3 6 0
21C3 14A8 CPU_HRST 1 2 CPU_HRESET* 3A4 3A6 14A6 15D2
5%
R339 1/16W 5%
1/16W
1K SM MF
27B1 16C3 13B5 KW_IIC_CLK 1 2 R83 603
5% 20K
1/16W 45C1 20B6 13C8 CB_RESET 1 2 +3V_SLEEP 4C6 6B5 6C5 9D4 13B3 15B5 15B7 15C5 15C7 20C8 20D6 22B5
MF
603 5% 22C1 25A6 25B5 25D4 27C6 35D2 40D4 46B7
1/16W
MF RP15
R359 603
3
4.7K 6
1K 15C2 3D6 CPU_TRST*
27B1 16C2 13A5 KW_IIC_DAT 1 2 5%
1/16W
5% SM
1/16W
MF TABLE_5_HEAD

603
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION

630-3999 1 PCBA,BOOTBANGER,P72 J19 OASIS

TABLE_5_ITEM

PULL-UP/PULL DOWN(2)
TABLE_5_ITEM

511S0018 1 CONN,POPT,STR 20-P .8MM PITCH J19 NONPRODUCTION DESCRIPTION:

ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC

A NOTICE OF PROPRIETARY PROPERTY
A
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

ACI: C
APPLE COMPUTER INC.
D 051-6130-C ECS:1.B
SCALE SHT OF
NONE 15 53

8 7 6 5 4 3 2 1
 CR-16

8 7 6 5 4 3 2 1

MICRO DASH AND MINI-SPRING MODEM BOARD CONNECTOR

40D6 36C6 35D4 35B5 35B3 34B2 28C5 26D6 25B4 22B1
D 8D4
15D7
8B6
15D3
7D4
15C2
7D2
14D2
7C7
14C3
7B4
14B3
7B2
13D6
6D4
13C8
6B5
13C3
5D6
13B8
3A4 +3V_MAIN D
13A8 11C8 11B8 11A5 10D7 10D4 9D3 9D2 8D7 8D6
21D7 21C7 21C3 20C3 20C2 20B3 19C3 18C7 18B6 18A4 1 C194 C39 1
46B7 10UF
N20P80% 0.1UF
N20P80%
16V 16V
2 CERM
CERM 2
1210_1 603 J2
F-ST-5047
SM CLOSE TO PANGEA
1 2 NOSTUFF
CLOSE TO PANGEA NOSTUFF 3 4 MODEM_RESET* R965
13C7 14B3
R964 14B3 13D7 MODEM_SDOWN 5 6 0 SCC_RTSA*
0
1 2 13D5 25B4
28C3 25B4 13C5 SCC_RXDA 1 2 7 8 SCC_DTRA 5% NOSTUFF
+5V_HD_SLEEP 16A5 16B8 35C5
5% 9 10
1/16W
MF R963CLOSE TO PANGEA
1/16W
11 12
603 0 SCC_TXDA* 13D5
MF
603
14B3 13C5 SCC_GPIOA* 1 2 25A4
13 14 SCC_TRXCA 13C5 5%
21C5 14B3 13C7 RING_DETECT* 15 16 14B3 1/16W
MF R576 CLOSE TO U4
17 18
603 24 USB_DDM
DAA_OUT_1/MODEM_HOOK_RELAY USB_DDM_T 1 2 13C4 13C5
19 20 USB_DDP_T 5%
R532 27B1 15A8 13B5 KW_IIC_CLK 21 22
1/16W
MF
CLOSE TO U4
100K 2 T_UIDE_RESET_L 603 R577
1 12C4 16B6 45C4 23 24 KW_IIC_DAT 13A5 15A8 27B1 24 USB_DDP
5%
1/16W I2C_ADDR_S0 25 26 I2C_ADDR_S1
1 2 13C4 13C5
MF 27 28 5%
603 (COMM_ANALOG_SND_RET) 34C2 1/16W
MF
29 30 +5V_MAIN 17B7 19D4 603
1 24D2 28C4
R527 R227 35D8 36B3 37B4 37D4 38B3 38B8 38C5 40D6 46C7
100K 2 10K
1 T_UIDE_DMAACK_L 12B4 16B6 5%
1/16W C196 1 1 C191
5%
MF 0.1UF 10UF
1/16W 2 603 N20P80%
16V
N20P80%
16V
C MF
603
CERM 2
603
2 CERM
1210_1 C

RJ-11 SHIELD
16B6 16B3 16A8 12B5 12B4 12A5 T_UIDE_D<15..0>

35C5 16D7 16A5 +5V_HD_SLEEP

1
R528
HDD/CD
1K
5%
1/16W J18
SM
MF 45C4
R353 2 603 12C4 T_UIDE_RESET_L 1
RESET GND
2
82 T_UIDE_IORDY_L 16B6 12B4 12A5 16C7 3 4 16B7 12B4 12A5
45D4 12A6 UIDE_IORDY 1 2 7 T_UIDE_D<7>
D7 D8
T_UIDE_D<8> 8

5%
NOSTUFF 16B7 16A8 6 T_UIDE_D<6> 5 6 16B7 12B4 12A5 T_UIDE_D<9> 9
1/16W
MF
1 C350 5 T_UIDE_D<5> 7
D6 D9
8 16B7 12B4 12A5 T_UIDE_D<10> 10
603 10PF D5 D10
5%
50V 4 T_UIDE_D<4> 9
D4 D11
10 16B7 12B4 12A5 T_UIDE_D<11> 11
2 CERM
B 603
CLOSE TO PANGEA
3

2
T_UIDE_D<3>
T_UIDE_D<2>
11
13
D3
D2
D12
D13
12
14
16B7
16B7
12B4
12B4
12A5
12A5
T_UIDE_D<12>
T_UIDE_D<13>
12

13
B
1 T_UIDE_D<1> 15
D1 D14
16 16B7 12B4 12A5 T_UIDE_D<14> 14

0 12B4 T_UIDE_D<0> 17
D0 D15
18 16B7 12B4 12A5 T_UIDE_D<15> 15
16B7 12B5 19 20
GND KEY
16B8 12D4 T_UIDE_DMAREQ 21 22 +5V_CD_SLEEP
DMARQ GND 35C5 16A6 16A3
45A4 12C4 T_UIDE_DIOW_L 23 24
IOW GND
25 26 NOSTUFF
45A4 12C4 T_UIDE_DIOR_L
IOR GND
16B7 T_UIDE_IORDY_L 27 28
1
C478 1
C471 1 C466 1 C462
IORDY CSEL 10UF 10UF 0.1UF 470PF
R586 16C7 12B4 T_UIDE_DMAACK_L 29
DMACK GND
30 20% 20% N20P80%
16V
10%
50V
T_UIDE_DMAREQ
10K 16A8 12D4 T_UIDE_IRQ_L 31 32 2 10V
TANT
2 10V
TANT
2 CERM 2 CERM
16B6 12D4 1 2 INTRQ IOCS16 SMB SMB 603 603
12C4 T_UIDE_DA<1> 33 34
5% A1 DIAG
1/16W 35 36
MF 12C4 T_UIDE_DA<0> A0 A2
603 37 38
12C4 T_UIDE_CS0_L CS0 CS1
12C4 T_UIDE_CS1_L N.C 39 40
DAS GND
R587 12C4 T_UIDE_DA<2> 41
POWER POWER
42

T_UIDE_IRQ_L 10K 43 44
16B6 12D4 1 2
45
POWER POWER
46
5% N.C N.C. POWER
1/16W 47 48
MF GND POWER
603 +5V_CD_SLEEP 49 50
35C5 16B2 16A3 POWER POWER
+5V_CD_SLEEP 16A6 16B2 35C5
INTERNAL HD AND CD-ROM CONNECTORS
R588 MICRO DASH AND MINI SPRING MODEM BOARD CONNECTOR
T_UIDE_D<7> 10K
16B7 16B6 12B4 12A5 1 2
5% DESCRIPTION:
1/16W
MF
603
1 C465 1 C460 1
C470 ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
A 16V
0.1UF
N20P80%
2 CERM
0.1UF
N20P80%
16V
2 CERM
10UF
20%
2 10V NOTICE OF PROPRIETARY PROPERTY
A
TANT
603 603 SMB
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
1
C476 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
10UF II NOT TO REPRODUCE OR COPY IT
20%
35C5 16D7 16B8 +5V_HD_SLEEP 2 10V
TANT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SMB
SIZE DRAWING NUMBER REV.

D 051-6130-C ACI: C
ECS:1.0
APPLE COMPUTER INC.
SCALE SHT OF
NONE 16 53

8 7 6 5 4 3 2 1
 CR-17

8 7 6 5 4 3 2 1

REAR
R141
+6V_AUDIO 100K 2 J7
46C7 34D3 29D5 29C3 27C8 17C7 1
TH-2MT-1
5% 5
1/16W
MF
MUST CLOSE TO PANGEA 1
603
Q20 L21 1
G 2N7002
R383 SM 30-OHM-EMI USB_DCM_OUT 2
USB_DCP 24 2 S D 3 1 2 USB_DCP_OUT 3
13C5 1 2

D 45D1 5%
1/16W
R140
USB_DCP_R
SM-1 USB_GND 4 D
MF 1
100K 2
603
6
5%
1/16W
1 C301 1 C294
MF 1 33PF 33PF
MUST CLOSE TO PANGEA 603 Q19 L22 5% 5%
1 C292 1 C304
G 2N7002 2 50V 50V 2200PF 0.001UF
R123 SM 30-OHM-EMI
19B2 18C1
CERM
603
2 CERM
603
5% 20%
USB_DCM 24 2 50V
CERM 50V
13C5 1 2 2 S D 3 45D1 USB_DCM_R 1 2 17D2 17B2 CHGND2 603
2 CERM
45D1 18B3 18B1 603
5% SM-1
1/16W
1 1
39D5 19C1
MF
603 R283 R280 CHGND2
15K 15K LAYOUT NOTE: C292,C304 ARE EMC BY-PASS CAPS FOR J7
5% 5%
1/16W 1/16W
MF MF
2 603 2 603

+5V_USB_B_F_SW

PLACE NEAR PANGEA

C C
PLACE NEAR PANGEA
FRONT
R368
46C7 34D3 29D5 29C3 27C8 17D7 +6V_AUDIO 1
100K 2 J10
TH-2MT-1
5% 5
1/16W
MF 1
MUST CLOSE TO PANGEA 603 Q53 L29 1
G 2N7002
R367 SM 30-OHM-EMI 45C1 USB_DAM_OUT 2
USB_DAP 24 2 S D 3 45D1 1 2 45C1 3
13C5 1 2 USB_DAP_R USB_DAP_OUT
45D1 SM-1 17D2 17A3 4
5%
1/16W R374 USB_GND
MF
603 1
100K 2
6
5%
1/16W
MF
603
1
Q52
1 C316 1 C321 1 C309 1 C328
MUST CLOSE TO PANGEA
G 2N7002 L27 5%
33PF 33PF 2200PF 0.001UF
R361 SM 30-OHM-EMI 50V
2 CERM
5%
50V
5%
2 50V
20%
USB_DAM 24 603
2 CERM CERM 2 50V
CERM
13C5 1 2 2 S D 3 45D1 USB_DAM_R 1 2 603 603 603
45D1 SM-1
18B3 18B1 17D3 17D2 17B2 CHGND2
5% 39D5 19C1 19B2 18C1
1/16W 1
MF
603
1
R363 R307
15K 15K LAYOUT NOTE: C309,C328 ARE EMC BY-PASS CAPS FOR J10
5% 5%
1/16W 1/16W
MF MF
2 603 2 603 39D5 19C1 19B2 18C1 18B3 18B1 17D3 17D2 17B2
B CHGND2
B
36B3 35D8 34C2 28C4 24D2 19D4 16C2 +5V_MAIN
46C7 40D6 38C5 38B8 38B3 37D4 37B4
1 C349
1.0UF
N20P80%
2 16V
CERM
805
S3
RYC8220_2M L24
7 SOI
IN FERRITE-500MA
40D4 13C5 USB_PWR_A 1 ENA 8 +5V_USB_A_SW 1 2 +5V_USB_A_F_SW
OUTA SM
13C5 USB_PWRFLT_A 2 FLGA
13C5 USB_PWRFLT_B 3 FLGB 5
1 C77 L23
OUTB 0.1UF FERRITE-500MA
N20P80%
40C4 13C5 USB_PWR_B 4
ENB 2 16V
CERM
1 2
603
GND SM
C67
6
150UF
1 20%
C483 10V
ELEC
150UF SM
20%
2 10V USB PORT
L26 ELEC
SM
FERRITE-1.5A 17D2
+5V_USB_B_SW DESCRIPTION:
1 2 17B1 USB_GND
SM ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
A 1 C482 NOTICE OF PROPRIETARY PROPERTY
A
0.1UF
N20P80%
2 16V
CERM
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
603 AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

D 051-6130-C ACI: C
ECS:1.0
APPLE COMPUTER INC.
SCALE SHT OF
NONE 17 53

8 7 6 5 4 3 2 1
 CR-18

8 7 6 5 4 3 2 1

L2
FERRITE-500MA
40C4 37C1 36B7 23D8 23D6 23D1 23B7 23A8 11D8 10D3 3B4 +2_5V_MAIN 1 2 +2_5V_ENET_MAIN 18B4 18B7 18C3 18C4 18D3
+2_5V_ENET_MAIN 18B4 18B7 18C3 18C4 18D3 18D6
SM
1
C17 1 C18 1
R4 1
R7
10UF 1000PF PLACE R4, R7, C18
20%
5%
49.9 49.9 CLOSE TO THE PHY
2 10V 1% 1%
TANT 2 25V
CERM 1/16W 1/16W
SMB MF MF

D
603
2 603 2 603 18D3 18C4 18C3 18B7 18B4
18D6
+2_5V_ENET_MAIN D
1 C195 RJ45_TREF
1000PF
5%
25V
2 CERM RJ45_TXP 45B4
603
RJ45_TXN 45B4
PLACE R191 AND R192 CLOSE TO PHY U12 T2 XFR-ENET IS FOR PHY AND XFRM
R192 BCM5221 AT THE DIFFERENT SIDE OF PCB
33 45B4
FLAS-P1
45B4 MII_TPTDP WILL P/N CHANGE IF PHY AND
R195 45B4 10C7 MII_TX_CLK 1 2 MII_TX_CLK_F 53 TXC CRITICAL TD+ 31 RJ45_RXP 45B4
33 5% 10C8 MII_TX_EN 56 TXEN TD- 30 45B4 MII_TPTDN XFRM ON SAME SIDE OF PCB?
10C8 MII_TXD<0> 1 2 1/16W RJ45_RREF
MF 10C8 MII_TX_ER 52 TXER
RD+ 26 45B4 MII_TPRDP J3
5%
1/16W R197 603
MII_TXD0_F 57 TXD0 T1 RJ45_RXN 45B4
TH
MF 33 RD- 25 45B4 MII_TPRDN XFR-100BT
10
10C8 MII_TXD<1> 603 1 2 MII_TXD1_F 58 TXD1 THT

TP5 MDIX
5%
R201 MII_TXD2_F 59 TXD2 F100/TCK 37 THT
AUTO_MDIX_ENABLE_L
1 SM 16 1
1/16W A TP3 1 1
MF 33 MII_TXD3_F 60 TXD3 ANEN/TRST* 38
R9 R8 PLACE R8, R9, C13 2
10C8 MII_TXD<2> 603 1 2 A CLOSE TO THE PHY
5%
R205 10B7 MII_CRS 62 CRS
THT

TP4 R1841 1%
49.9
1%
49.9 2 15 3
1/16W LNKLED/TDI 35 THT
4.7K 1/16W 1/16W 4
MF 33 10B7
R191 MII_COL 61 COL/RXEN A TP7 5% MF MF
10C8 MII_TXD<3> 603 1 2
33 SPDLED/TMS 36
A TP6
THT
1/16W 2 603 2 603 3 14 5
MF 18D6
45B4 10C7 5% 45B4 MII_RX_CLK 1 2 MII_RX_CLK_F 50 RXC XMTLED/TDO 34 603 2 4 TX 13 6
1/16W A +2_5V_ENET_MAIN 18B4 18B7 NC1 NC4
MF 10B7 5% MII_RX_DV 49 RXDV MD_DI/RLED/TDO 33
18C4 18D3 5 12 7
603 1/16W NC2 NC3
MF 10B7 MII_RX_ER 51 RXER 6 11 8
TXD(N), NEED BUS CONSTRAINTS ADDED SO 33 OHMS ARE CLOSE TO PANGEA. 603 ENGY_DET 17 ENET_ENRGYDET_IRQ_H 13C7
10B7 MII_RXD<0> 48 RXD0 14C2
1 C13
10B7 MII_RXD<1> 47 RXD1 0.1UF
TESTEN 15 NC N20P80% 7 10 9
10B7 44 RXD2 16V
MII_RXD<2> 2 CERM 19C1 39D5
10B7 MII_RXD<3> 43 RXD3 REGDVDD 3 REGDVDD AND REGAVDD 603 18B1 18B3
LEFT FLOATING AS WE DO 8 9 CHGND2 17B2 17D2
REGAVDD 20 NOT USE INTERNAL REGULATOR
RX 17D3
NC 10 PHYAD0
C 34B2 28C5 26D6 25B4 22B1 21D7 21C7 21C3 20C3
PHY ADDRESS 00000
NC 11 PHYAD1 SD- 19 NC (HAS INTERNAL P/U)
1 C198
CHGND1 18B2
19B2 C
14D2 14C3 14B3 13D6 13C8 13C3 13B8 13A8 11C8 NC 12 PHYAD2 18D6 18D3 18C4 18C3 18B7 18B4
8B6 7D4 7D2 7C7 7B4 7B2 6D4 6B5 5D6 3A4 +3V_MAIN
D_VDD 2 +2_5V_ENET_MAIN 1000PF 1
R221 1
R229 RJ45_4_5
NC 13 PHYAD3 +2_5V_ENET_MAIN 5%
11B8 11A5 10D7 10D4 9D3 9D2 8D7 8D6 8D4 25V
2 CERM 49.9 49.9 RJ45_7_8
20C2 20B3 19C3 18B6 18A4 16D4 15D7 15D3 15C2 1 NC 14 PHYAD4 603 1% 1%
46B7 40D6 36C6 35D4 35B5 35B3 R183 D_VDD 55
1 C22 1 C19 1 C10 1 C14 1/16W
MF
1/16W
MF 1
R228 1
R230
1.5K NC 39 FDX O_GND 45
0.1UF 1000PF 0.1UF 1000PF 2 603 2 603
1% 20% 5% 20% 5% 75 75
1/16W 18B8 18A6 MII_PWR_EN_L 16 LOWPWR D_GND 54
16V 1% 1%
MF 2 16V
CERM 2 25V
CERM 2 CERM 2 25V
CERM NOSTUFF 1/16W 1/16W
2 603 10B8 MII_MDC 42 MDC D_GND 63
603 603 603 603 MF MF
10B8 MII_MDIO 41 MDIO C50 2 603 2 603
100PF RJ45_FILTER
13C7 ETHPHYRESETL 9 RESET MII_EN 18
NC (HAS INTERNAL P/U)
1 2
U11 PIN2 GETS C22 AND C19 18D6
MII_XTALIN 6 XTALI U11 PIN55 GETS C10 AND C14 18D3 18C4 5%
50V
NOSTUFF 18C3 18B7 +2_5V_ENET_MAIN
1 C184 MII_XTALOUT 5 XTALO BIASVDD 22 CERM
603
1 C208 1 C187
CRITICAL 46 O_VDD A_VDD 27 100PF 100PF
0.1UF Y1 10% 10%
N20P80%
16V
2 CERM 25MHZ +3V_MAIN 8 O_VDD/NC A_VDD 28 1 C9 1 C5 1 C25 1 C28 C46 3KV
2 CERM
3KV
2 CERM
603
1 2 1 O_VDD RDAC 23 0.1UF 1000PF 0.1UF 1000PF 0.1UF 1808 1808
20% 5% 20% 5%
25V 16V 25V 1 2
SM
4 REFCLK SD+ 21
NC (HAS INTERNAL P/D) 2 16V
CERM
2 CERM 2 CERM 2 CERM

3
1 C183 1 C182 7 O_GND BIASGND 24 603 603 603 603
N20P80% CHGND1 18C1 CHGND2 17B2 17D2 17D3 18B3
27PF 27PF 40 O_GND A_GND 29 16V
5% 5% CERM 18C1 19B2 19C1 39D5
D Q36 2 50V
CERM 2 50V
CERM
64 JTAG_EN A_GND 32
1
R194 603
2N7002 603 603 1.27K 39D5 19C1 19B2 18C1 18B1 17D3 17D2 17B2 CHGND2 NOSTUFF
MII_PWR_EN_L SM 1% R208 FOR EMC EXPERIMENT. STUFF?
18C6 18A6 1 G S U11 PIN22 GETS C25 AND C28
THT 1/16W

2
TP8 MF
2 603
U11 PINS 27,28 GETS C5 AND C9
A
HOW CAN WE USE THIS IN SCAN CHAIN? NOTE: 1.5MM SPACE FROM TRACE TO GND

B B

+2_5V_ENET_MAIN 18B4 18C3 18C4 18D3 18D6

1
R10
10K
5%
1/16W
MF
2 603 40D6 36C6 35D4 35B5 35B3 34B2 28C5 26D6 25B4 22B1
18C6 18B8 MII_PWR_EN_L 15D7 15D3 15C2 14D2 14C3 14B3 13D6 13C8 13C3 13B8 BYPASS CLOSE TO U12 OVDD PINS
8D4 8B6 7D4 7D2 7C7 7B4 7B2 6D4 6B5 5D6 3A4 +3V_MAIN
3 3 13A8 11C8 11B8 11A5 10D7 10D4 9D3 9D2 8D7 8D6
21D7 21C7 21C3 20C3 20C2 20B3 19C3 18C7 18B6 16D4
R198
D
Q35 D
Q7 46B7 1 C27 1 C29 1 C26 1 C21
2N7002 2N7002 1000PF 0.1UF 1000PF 0.1UF
470K 2 1 SM 1 SM 5% N20P80% 5% N20P80%
31C5 31B5 AC_VOLT 1 G S SLEEP_L_LS G S
2 25V 2 16V 2 25V 2 16V
CERM CERM CERM CERM
5% 603 603 603 603
1/16W
MF
1 C176 2 1 C15 2
603 0.1UF 1UF
20% 10%
16V 10V
2 CERM 2 CERM
603 805
NOSTUFF U12 PIN1 GETS C27 AND C29 10/100M ETHERNET PHY
U12 PIN8 GETS C21 AND C26
DESCRIPTION:
U12 PIN46 GETS C167 AND C168
ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
1 C167 1 C168
A 5%
1000PF 0.1UF
N20P80% NOTICE OF PROPRIETARY PROPERTY
A
25V 16V
2 CERM 2 CERM
603 603
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

D 051-6130-C ACI: C
ECS:1.0
APPLE COMPUTER INC.
SCALE SHT OF
NONE 18 53

8 7 6 5 4 3 2 1
 CR-19

8 7 6 5 4 3 2 1
FIREWIRE
FIREWIRE
Q37 FIREWIRE
NDS9407 D13 F1 L18
SOI SM 0.9AMP-33V 400-OHM-EMI
40C6 19C8 40C6 8
+PBUS_FW_SW
1 2 +FW_VP_FUSE_SW 1 2
+VP_SW
1 2
39C3 38D6 38C4 38C3 37D8 34D8 34D5 34B4 32D5 24A4 +PBUS 3
7 SM-1
43A4 39C6 2 SM FIREWIRE
1
6 10BQ040
FIREWIRE FIREWIRE 5 L71
400-OHM-EMI
1
R220 1 C190
330K 0.01UF 4
1 2
5% 20%
SM-1
1/16W
MF
2 50V
CERM D1506 FIREWIRE

D 40C6 19B7 19B5 +3V_PHY_AVDD_MAIN

FIREWIRE
2 603
603

D4
FIREWIRE 1
FIREWIRE

R219
2
SM
1 CHGR_OUT 32B2 THICK TRACE
D
FIREWIRE FIREWIRE FIREWIRE FIREWIRE FIREWIRE
1N914 470K 10BQ040
1
C197 1 C48 1 C47 1 C53 1 C205 1 C219 3 1 1%
1/16W
10UF 0.001UF 0.1UF 0.01UF 0.001UF 0.1UF MF
20% 20% N20P80% 20% 20% N20P80% FIREWIRE
2 6.3V
50V
2 CERM
16V
2 CERM
50V
2 CERM
50V
2 CERM
16V
2 CERM 40D6 SOT23 2 603
TANT
603 603 603 603 603
38C5 R29
SMA 37B4 36B3 470K 2
24D2 17B7 16C2 +5V_MAIN 1
35D8 34C2 28C4 3 FIREWIRE
FIREWIRE 5%
38B8 38B3 37D4 1/16W
1
R37 46C7 MF
603
FIREWIRE
D Q9
D16 2N7002
0 1 G
SM 40C6 +VP_CONN_SW
5%
1/16W
1N914 S
MF 38B8 35B8 18A6 3A4 SLEEP_L_LS 3 1 FIREWIRE
2 603 FIREWIRE
2 NOSTUFF
L3 SOT23 26D6
15D7
28C5
16D4
C249 1 1 C248
40C6 19D3 +PBUS_FW_SW FERRITE-500MA 0.01UF 0.001UF
10D4 10D7 11A5 11B8 20%
50V
20%
50V
40C6 19B7 19B5 19B3 +3V_FW_MAIN 1 2 +3V_MAIN 3A4 5D6 6B5 6D4 CERM 2 2 CERM
FIREWIRE FIREWIRE FIREWIRE FIREWIRE FIREWIRE SM 7B2 7B4 7C7 7D2 7D4 8B6 8D4 8D6 8D7 9D2 9D3 603 603 19B2
11C8 13A8 13B8 13C3 13C8 13D6 14B3 14C3 14D2 15C2 15D3 18B3
FIREWIRE
1
C49 1 C51 1 C52 1 C254 1 C253 18A4 18B6 18C7 20B3 20C2 20C3 21C3 21C7 21D7 22B1 25B4 FIREWIRE 17D3
10UF 0.001UF 0.1UF 0.1UF 0.01UF 34B2 35B3 35B5 35D4 36C6 40D6 46B7 CHGND2 17B2
1 20% N20P80% N20P80% 20%
R259 20%
2 6.3V
50V
2 CERM
16V
2 CERM
16V
2 CERM
50V
2 CERM
FIREWIRE J5
TH-2MT
17D2
402K TANT 18B1
1%
1/16W
SMA 603 603 603 603 FL1
SM
8
18C1
MF 44B1 19B6 19B2 PHYTPA0T 1 8 39D5
2 603 1
2 GNDRET_FW
44B1 19B6 19B1 PHYTPA0C 2 7 44B1 PHYTPB0C_FL 3
4
44B1 PHYTPA0C_FL 5
44B1 19B6 19A2 PHYTPB0T 3 6 6
CRITICAL
40C6 19C7 +VP_CPS

FIREWIRE
19B6 PHYTPBIAS0
19B6 19A1 PHYTPB0C 4 5 7
Y4 C
C 24.576M
1 2 SOFTWARE TO SET LPS =0
FIREWIRE
44B1
44B1 PHYTPA0T_FL
DURING RUN FOR MAX FW_R0 1 C227 L19 44B1 PHYTPB0T_FL
SM-2 POWER SAVINGS FIREWIRE 1UF 400-OHM-EMI
FIREWIRE 10%
FIREWIRE FIREWIRE FIREWIRE 1 10V
1 C44 1 C45 R238 2 CERM 1 2 40C6 19C1 GNDRET_FW
22PF 22PF
1 C193 U15 1%
6.34K 805
SM-1
THICK TRACE FOR GNDRET_FW
5% 5% 0.1UF TSB41AB1 1/16W FIREWIRE
2 50V 2 50V 20% FLAS MF NOSTUFF
CERM CERM 2 16V
603 603 CERM 38 FILTER0 R0 33 2 603 L72 FIREWIRE
603
39 FILTER1 R1 34 FW_R1
400-OHM-EMI 1 C258 1 C259
1 2
0.01UF 0.001UF
PLACE C44,C45 CRITICAL 20% 20%
CLOSE TO PIN 42, U15 FIREWIRE
+VP_CPS 20 CPS SM-1 2 50V
CERM 2 50V
CERM
44D1 FW_XI 42 XI TPBIAS 31 19C5 PHYTPBIAS0 FIREWIRE 603 603
R250 44D1 FW_XO 43 XO 44B1
30 19B2 PHYTPA0T
FIREWIRE 1K 12 TPA+
1 2 PHY_PD PD 29 19C3 PHYTPA0C 17D3 17D2 17B2
R257 5%
TPA- CHGND2
FW_LINK_LPS 22 1/16W 23 SE TPB+ 28 PHYTPB0T
FIREWIRE FIREWIRE 39D5 19C1 18C1 18B3 18B1
1 1
1 2 PHY_LPS MF
603 24 SM TPB- 27 19A1 PHYTPB0C R241 R243
5%
37 19C3 56.2 56.2
1/16W
MF
FW_PHY_RST* RESET 44B1 1% 1%
19 1/16W 1/16W
603 +3V_FW_MAIN ISO 15 10B3 FW_C_LKON MF MF
FIREWIRE C_LKON FIREWIRE 2 603 2 603
19B7 19B8 13 LPS 13C8
R255 PHY_PD
FIREWIRE
PHY_LPS
1
R258
22 PHYLREQ 48 LREQ
FW_PHY_PD 1 2 1
R256 40 41
10K
5% 10K 44D1 +3V_PHY_AVDD_MAIN PLLVDD PLLGND 5%
1 19D6 1/16W
1/16W 5% FIREWIRE 19A7 FIREWIRE PHYSCLK SYSCLK 25 MF
MF 1/16W 1 2 AVDD1 +3V_PHY_AVDD_MAIN 19B5
2 60340C6 19C6
603 MF 19A7 C199 1 R232 PHYCNTL0 CTL0 35 +3V_PHY_AVDD_MAIN 19B7 19B5 +3V_FW_MAIN
FIREWIRE2 603 44C1 0.1UF 1K 3 AVDD2 40C6
19B5 19B7
PHYCNTL1 CTL1 19D6 19B7
20% 5% FIREWIRE FIREWIRE
1
R254 16V 1/16W 19A7 PHYD0 4 D0 DVDD1 21 +3V_FW_MAIN 19B3 19B5
1 1
40C6 2 5
10K 44C1 19A7
CERM
603
2 MF
2 603
44C1 PHYD1 5 D1 DVDD2 44 +3V_FW_MAIN 19B7 19C6 19B3 19B5 19B7 19C6 40C6 R245 R247 DZ8 DZ8
B 5%
1/16W
MF
44C1 19A7 PHYD2 6
7
D2 DVDD3 45 +3V_FW_MAIN
40C6
1%
56.2
1/16W
1%
56.2
1/16W
SOT363
75V
6 PHYTPA0T 19B6 19C3 SOT363
44B1 75V
3 PHYTPA0C 19B6 19C3
44B1
B
2 603 44C1 19A7 PHYD3 D3 26 MF MF
8 AGND1 2 603 2 603
44C1 19A7 PHYD4 D4 32
9 AGND2 1 4
44C1 19A7 PHYD5 D5 36
10 AGND3
44C1 19A7 PHYD6 D6
FIREWIRE 44C1 19A7 PHYD7 11 D7
DGND1 14
FW_LINK_LREQ R231 40C6 19C6 19B7 19B5 19B3 +3V_FW_MAIN 22 TESTM DGND2 46 PLACE DZ8 AND DZ9 NEAR PHY
22 47 FIREWIRE FIREWIRE
44C1 10B3 1 2 PHYLREQ 19B7 44C1 DGND3
5%
16 PC0 1 C240 1
R248
1/16W 17 PC1 220PF 4.99K
MFFIREWIRE 5% 1%
603 18 PC2 2 25V
CERM 1/16W 2 5
FW_LINK_SCLK R233 603 MF
2 603
DZ9 DZ9
22 FIREWIRE SOT363 6 PHYTPB0T 19B6 19C3 SOT363 PHYTPB0C
44D1 10B3 1 2 PHYSCLK 19B7 44D1 SET DEFAULT POWER CLASS ZERO (000) 75V 75V
3 19B6 19C3
R36 44B1 44B1
5%
1/16W FW_LINK_D<3> 22
MFFIREWIRE
603
44C1 10C3 1 2 PHYD3 19B7 44C1 1 4
FW_LINK_CNTL0 R234 5%
1/16W
22 MFFIREWIRE
44C1 10B3 1 2 PHYCNTL0 19B7 44C1 603
5% R244
1/16W FW_LINK_D<4> 22
MFFIREWIRE
603
44C1 10B3 1 2 PHYD4 19B7 44C1
R235 5%
1/16W
FW_LINK_CNTL1 22 MFFIREWIRE
44C1 10B3 1 2 PHYCNTL1 19B7 44C1 603
5% R246 FIREWIRE PHYSICAL LOGIC
1/16W FW_LINK_D<5> 22
MFFIREWIRE
603
44D1 10B3 1 2 PHYD5 19B7 44C1
DESCRIPTION:
FW_LINK_D<0> R237 5%
1/16W ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
22 MFFIREWIRE
A 44C1 10C3 1
5%
2 PHYD0 19B7 44C1 603
R249 NOTICE OF PROPRIETARY PROPERTY
A
1/16W FW_LINK_D<6> 22
MFFIREWIRE
603
44D1 10B3 1 2 PHYD6 19B7 44C1
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
FW_LINK_D<1>
R240 5%
1/16W
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
22 MFFIREWIRE
44C1 10C3 1 2 PHYD1 19B7 44C1 603 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
5% R253 II NOT TO REPRODUCE OR COPY IT
1/16W FW_LINK_D<7> 22
MFFIREWIRE
603
44D1 10B3 1 2 PHYD7 19B7 44C1 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

FW_LINK_D<2> R242 5%
1/16W SIZE DRAWING NUMBER REV.
22 MF
44C1 10C3 1 2 PHYD2 19B7 44C1 603
051-6130-C ACI: C
5%
APPLE COMPUTER INC.
D ECS:1.C
1/16W
MF SCALE SHT OF
603
NONE 19 53

8 7 6 5 4 3 2 1
 CR-20

8 7 6 5 4 3 2 1

+3V_SLEEP
20C8 15C7 15C5 15B7 15B5 15A5 13B3 9D4 6C5 6B5 4C6
46B7 40D4 35D2 27C6 25D4 25B5 25A6 22C1 22B5
CARDSLOT (WIRELESS) INTERFACE
D 1
C64
10UF
1 C61
0.01UF
1 C60
0.1UF
1 C63
0.01UF
1 C65
0.1UF
D
20% 20% N20P80% 20% N20P80%
2 6.3V 50V
2 CERM 2 16V
CERM
50V
2 CERM 2 16V
CERM
TANT 603
SMA 603 603 603

R61
1K
20B6 6A6 T_ROMCS* 1 2 ROM_ONBOARD_CS* 20B3 20B6 C64 AND C61 SHOULD BE PLACED CLOSE TO J9 PIN 24 AND 27
5%
1/16W C60 AND C63 SHOULD BE PLACED CLOSE TO J9 PIN 74 AND 77
MF
603

TABLE_5_HEAD

PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION

TABLE_5_ITEM

341S1036 1 IC,ROM,CORE2001,IBOOK U18 PROJECT

35D2 27C6 25D4 25B5 25A6 22C1 TABLE_5_ITEM

15A5 13B3 9D4 6C5 6B5 4C6 +3V_SLEEP 335S0350 1 BOOT ROM, BLANK U18 PROJECT OMIT
22B5 20D6 15C7 15C5 15B7 15B5
46B7 40D4
8
7
6
5
RP24
1/16W
10K
5%
SM

46B7
40D6 36C6 35D4 35B5 35B3 34B2 28C5
26D6 25B4 22B1 21D7 21C7 21C3 20C3
1
2
3
4

J9 20B3 19C3 18C7 18B6 18A4 16D4 15D7 15D3 FLASH ROM
SM 15C2 14D2 14C3 14B3 13D6 13C8 13C3 13B8 13A8 11C8
I227 11B8 11A5 10D7 10D4 9D3 9D2 8D7
40D6 36C6 35D4 35B5 35B3 34B2 28C5 26D6 25B4 22B1 7C7 7B4
C WHY DO WE NEED TO PULLUP IOADDR13-15? 1
2 36 8D4
15D7
8B6
15D3
7D4
15C2
7D2
14D2
7C7
14C3
7B4
14B3
7B2
13D6 13C8 13C3 13B8
6D4 6B5 5D6 3A4 +3V_MAIN
7B2
8D6
6D4
8D4
6B5
8B6
5D6
7D4
3A4 +3V_MAIN
7D2 C
20C1 20B2 13B4 13B3 12D7 12D6 IODATA<3> 3 37 NC_CB_DETECT1* 13A8 11C8 11B8 11A5 10D7 10D4 9D3 9D2 8D7 8D6
20B2 13B4 13B3 12D7 12D645C3 IODATA<4> 4 38 IODATA<11> 12C7 12D6
21D7 21C7 21C3 20C2 20B3 19C3 18C7 18B6 18A4 16D4 1 C58
1 C66
46B7 0.1uF
45C3 20C112D6 IODATA<5> 5 39 IODATA<12> 12C7 12D6 0.01UF N20P80%
16V
20% 2
45C3 20C1 20B2 13B4 13B3 12D7 IODATA<6> 6 40 IODATA<13> 12C7 12D6 2 603
CERM
CERM
603
7 41 50V 11 30 31
20C1 20B2 13B4 13B3 12D7 12D6 IODATA<7> IODATA<14> 12C7 12D6
45C3 45C1 15C6 12B6 CB_CE1* 8 42 IODATA<15> 12C7 12D6 45C3
VPP VCC IODATA<7..0>
12D6 12D7 13B3 13B4
9 43
45B3 20B3 13B5 IOADDR<10>
10 44
CB_CE2* 12B6 15C6 45C1 U18
FEPR-1MX8
20B2 20B8 20C2 20C8
45B1 15C6 12C6 CSOE* NC_VSENSE1* 45C3 20C1 20B8 13B4 13B3 110
45B3 20B3 13B5 IOADDR<11> 11 45 CB_IORD* 13B5 15C6 45C1 45B3 20B8 12C6 IOADDR<0> 12D7 12D6 21 25 IODATA<0> 0
A0 TSOP DQ0
45B3 20B3 13B5 IOADDR<9> 12 46 CB_IOWR* 13B5 15C6 45C1 45B3 20B8 12C6 IOADDR<1> 20 26 IODATA<1>
A1 OMIT DQ1 1

45B3 20B3 13B5 IOADDR<8> 13 47 IOADDR<17> 13B5 20B3 45B3 45B3 20B8 12C6 IOADDR<2> 19 CRITICAL 27 IODATA<2> 2
A2 DQ2
45B3 20B3 13B5 IOADDR<13> 14 48 IOADDR<18> 13B5 20B3 45A3 45B3 20B8 12C6 IOADDR<3> 18 28 IODATA<3> 3
A3 DQ3
45B3 20B3 13B5 IOADDR<14> 15 49 IOADDR<19> 13B5 20B3 45A3 45B3 20B8 12C6 IOADDR<4> 17 32 IODATA<4> 4
A4 45C3 DQ4
45B1 15C6 12C6 CSWE* 16 50 IOADDR<20> 13B5 20B3 45A3 45B3 20B8 13C5 IOADDR<5> 16 33 IODATA<5> 5
A5 20C1 DQ5
45C1 15B6 13C7 CB_IREQ* 17 51 LACLK 6C6 45B3 20B8 13B5 IOADDR<6> 15 34 IODATA<6>
A6 13B3 DQ6 6

18 52 45B3 20B8 13B5 IOADDR<7> 14 12D6 35 IODATA<7> 7

A7 12D7 DQ7
19 53 45B3 20B8 13B5 IOADDR<8> 8
A8 13B4
45B3 20B3 13B5 IOADDR<16> 20 54 ROM_ONBOARD_CS* 20B3 20D7 45B3 20B8 13B5 IOADDR<9> 7
A9 20C8
45B3 20B3 13B5 IOADDR<15> 21 55 T_ROMWE* 6A6 20B3 45B3 20C8 13B5 IOADDR<10> 36
A10
45B3 20B3 13B5 IOADDR<12> 22 56 ROMOE* 6A5 6B2 45B3 20C8 13B5 IOADDR<11> 6
A11
45B3 20B3 13B5 IOADDR<7> 23 57 T_ROMCS* 6A6 20D7 45B3 20B8 13B5 IOADDR<12> 5
A12
45B3 20B3 13B5 IOADDR<6> 24 58 NC_VSENSE2* 45B3 20B8 13B5 IOADDR<13> 4
A13
45B3 20B3 13C5 IOADDR<5> 25 59 CB_RESET 13C8 15A6 45C1 45B3 20B8 13B5 IOADDR<14> 3
A14
45B3 20B3 12C6 IOADDR<4> 26 60 CB_WAIT* 13B5 15B6 45C1 45B3 20B7 13B5 IOADDR<15> 2
A15
45B3
45B3 20B3 12C6 IOADDR<3> 27 61 NC_INP_ACK 45B3 20B8 13B520B6 IOADDR<16> 1
B 45B3 20B3 12C6 IOADDR<2> 28 62 CB_REG* 13C7 15B6 45C1
ENABLE WRITES TO BOOT BLOCK
13B5 IOADDR<17> 40
A16
A17
B
45B3 20B3 12C6 IOADDR<1> 29 63 IO_RESET_L 21B1 21B5 22B8 45A3 20B6 13B5 IOADDR<18> 13
A18
+3V_MAIN
45C3 45B3 20C3 12C6
IOADDR<0> 30 64 NC_STAT_CHG 45A3 20B6 13B5 IOADDR<19> 37
A19
20C2 20C1 13B4 13B3 12D7 12D6 IODATA<0> 31 65 IODATA<8> 12D6 12D7 13B4 1 45A3 20B6 13B5 IOADDR<20> 38
A20
20C1 20B2 13B4 13B3 12D7 12D6 IODATA<1> 32 66 IODATA<9> 12D6 12D7 R68
1K
20B2 13B4 13B3 12D7 12D645C3 IODATA<2> 33 67 IODATA<10> 12D6 12D7 5%
1/16W
20D7 20B6 ROM_ONBOARD_CS* 22
CE
45C3 20C1 NC_CB_CS16* 34 68 5V_TOL MF 6A6 T_ROMOE* 24
2 603
OE
35 69 20B6 6A6 T_ROMWE* 9
WE
BOOTWP* 12
10
WP
NOSTUFF 21C3 21B1 10C3 UNI_RESET*
PWD
1
R69 RESET FLASH AT RESTART GND
10K
5% 23 39
1/16W
MF
2 603

DISABLE WRITES TO BOOT BLOCK

CARDSLOT(WIRELESS) INTERFACE & BOOTROM

DESCRIPTION:
NOTE: 5V TOLERENCE LEAVE NC
ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
A NOTICE OF PROPRIETARY PROPERTY
A
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

D 051-6130-C ACI: C
ECS:1.0
APPLE COMPUTER INC.
SCALE SHT OF
NONE 20 53

8 7 6 5 4 3 2 1
 CR-21

8 7 6 5 4 3 2 1
PULL-UPS TRACKPAD CONN. L28
40C4 36D2 33C7
R23 400-OHM-EMI
+3_3V_PMU
10 +3_3V_REF_PMU +5V_IO_SLEEP 1 2
33B6 33A4 32D2 33A4 32D2 31D3 31D2 31C5 21D8 21C6 21B8 21B7 21B1 21A4 1 2 21B6 35A5 40C4
31D3 31D2 31C5 40C4 36D2 33C7 33B6 5% SM-1 NOSTUFF
21B7 21B1 21A4 +3_3V_PMU 1/16W
MF
1 C318 1 C633 1 C322
21D6 21C6 21B8 1 0.1UF 0.01UF
21C5 21B7 KEYBOARD_X2_L 1 8 NEED TO CONFIRM THE PMU POWER MANAGEMENT HOOKUP TO PANGEA. R214 603
TEMP 21B3 35A6 N20P80% 10PF 20%
21C5 21B8 KEYBOARD_X1_L 2
RP1
10K 7 WHAT HAPPENED TO IOCLKSTOP?
1
C16 1 C11 1 C32 5%
10 2 16V
CERM
5%
50V
2 CERM
50V
2 CERM
5% 10UF 0.1UF 0.1UF 1/16W NOSTUFF
603
603 603
21C5 21B7 KEYBOARD_X0_L 3 1/16W 6 20% N20P80% N20P80% MF
SM 2 6.3V 16V 16V 1
21C5 21A8 21A3 DELTA_KEY_L 4 5 TANT
2 CERM 2 CERM 2 603 1 C33 R212 POWER2_CHGND
SMA 603 603
1.0UF 10K L30
N20P80% 1% 400-OHM-EMI
21C5 21B8 KEYBOARD_X3_L 1 8 +3V_PMU_AVCC 2 16V 1/16W
RP12 +3V_MAIN CERM MF
21C4 TRKPAD_TXD 1 2
D
D 21C5 21B7
21C5 21B8
KEYBOARD_X4_L
KEYBOARD_X5_L
2
3
10K
5%
1/16W
7
6 1 C186
805 2 603
SM-1
1 C323 1 C634 J11
21C5 21B7 KEYBOARD_X6_L 4 SM 5
2
Q4 0.1UF
N20P80%
0.001UF 10PF SM
2N3906 R193 16V 5% 5%
SM 2 CERM 2 50V 2 50V 8 1
5 4 1 2.2K 2 603
CERM CERM
21C5 21B8 KEYBOARD_X7_L
KEYBOARD_X8_L RP10 1
L31
21C2 21C1 POWER2_CHGND
603 603
7 2
21C5 21B7 6 10K 3 5% 400-OHM-EMI
39C2 21D1
5% 1/16W
21C6 21B8 KEYBOARD_X9_L 7 2
1/16W
SM R199 3
MF
603
14 60 97 21C4 TRKPAD_RXD 1 2 6 3
21B8 21B5 COMMAND_KEY_L 8 1 200 Q2 VCC SM-1
21B8 NUMLCK_LED 1 2
2 2N3906 AVCC 1 C326 1 C635 5 4
5% SM R186 0.001UF 10PF
21B7 21B5 21A8 CONTROL_KEY_L 1 8 1/16W 2.2K 2 5% 5%
21B8 21B5 21A8 SHIFT_KEY_L 2
RP11
10K 7
MF
603
1 1
21B7 KEYBOARD_Y0 86 44 CPU_VCORE_HI_OC 4A4 4B6 6B8 6C5 38A4 38B4 L32 2 50V
CERM
50V
2 CERM
5% 5% P00/KEYBRDY0 P50/MONON_10K_PULL_CE_VCC 43 400-OHM-EMI 603 603
21B7 21B5 21A8 OPTION_KEY_L 3 1/16W 6 1/16W 21B8 KEYBOARD_Y1 85
U13 P51/UNIN_RESET UNI_RESET* 10C3 20B3 21B1 21D2 21D1 21C1 POWER2_CHGND
SM R1 MF P01/KEYBRDY1 42 39C2
21B8 21B5 FN_KEY_L 4 5 3 603 21B7 KEYBOARD_Y2 84 M16C62 EQ_RESET_L 1 2
CAPLCK_LED
200 P02/KEYBRDY2 P52/PCI_RESET 41
GND_TRACKPAD
21B7 1 2
21B8 KEYBOARD_Y3 83 FLAS
NC SM-1
P03/KEYBRDY3 CRITICAL P53/CPU_SRST_0 40
21B3 PMU_NMI_L 8 1 21B7 5%
21B7 KEYBOARD_Y4 82 PMU_NMI_IRQ* 13C7 14C3 1 C636 1 C637
21C3 21C2 RESET_BUTTON_L 6 RP3
10K 3 21A4 1/16W
MF +3_3V_PMU
21B8 KEYBOARD_Y5 81
P04/KEYBRDY4 P54/CPU_SRST_1 39 DNLOAD_CONFIG_L 21C8 10PF 470PF
5% 33B6 33A4 32D2 21B1 603 P05/KEYBRDY5 P55/PRCSLPREQ_100KEMP_GND 38
5% 10%
21C3 DNLOAD_CONFIG_L 5 4 31D3 31D2 31C5 21D8 21D6 21B8 KEYBOARD_Y6 80 UNI_PU_RESET* 10C3 21B1 2 50V 50V

21C3 21C2 NMI_BUTTON_L 7

1/16W
SM 2 40C4 36D2 33C7
1
R187 21B8 KEYBOARD_Y7 79
P06/KEYBRDY6 P56/POWERONCLEAR 37 CPU_HRST 14A8 15B3
CERM
603
2 CERM
603
470K 21B7 P07/KEYBRDY7 P57/CPU_HRST 39C2 21D2 21D1 21C2 POWER2_CHGND
5%
1/16W 78 36
R222 NUMLOCK_LED_L T_PMU_ACK* 21C2
MF P10/NUMBLOCK_LED P60/CPU_SMI_0 35
21B3 RUN_OK 1
10K 2
2 603 CAPSLOCK_LED_L 77
P11/CAPSLOCK_LED P61/CPU_SMI_1 PMU_SCK 13C5 R206
R189 31D7 CHARGE_LED_L 76
P12/RUN_LED P62/TRACKPAD_OUTPUT
34
PMU_MISO 13C5
21C3 T_PMU_ACK* 1
0 2 PMU_ACK* 13C5
5%
DC_DC_EN_L
100K 2 21B2 POWER_UP_L 75 33 PMU_MOSI 13C5
1/16W
MF
34A8 1
P13/SLEEP_LED P63/TRACKPAD_INPUT R216 5%
32 1/16W
603 5% 74
P14/BACKUP_SELECT P64/RUN_OK_BUSY
PMU_REQ* 13C5 14C3 4.7K 2 +5V_IO_SLEEP MF
1/16W
DELTA_KEY_L 73 31 LID_CLOSED_L 21B2
1 21D2 25D8 28D5 35B2 35B5 40C6 603
35D4 35B5 35B3 34B2 28C5 26D6 25B4 MF
603
21D8 21A8 21A3 P15/DELTAKEY P65/LID_SWITCH_SCLK 5%
18C7 18B6 18A4 16D4 15D7 15D3 15C2 16C3 14B3 13C7 RING_DETECT* 72 30 RESET_BUTTON_L 24A4 1/16W21C2
13A8 11C8 11B8 11A5 10D7 10D4 9D3 P16 P66/RXD MF NOSTUFF
60321C8
KW_WATCHDOG* 71 29 NMI_BUTTON_L 21C2
7C7 7B4 7B2 6D4 6B5 5D6 3A4 +3V_MAIN 13A7 P17/WATCHDOG_KW P67/TXD R213
C 9D2
14D2
8D7
14C3
8D6
14B3
8D4
13D6
8B6
13C8
7D4
13C3
7D2
13B8 2
Q10
2N3906 21D8 21B7 KEYBOARD_X0_L 70
P20/KEYBOARDX0
21D3
P70/CC_SDA
28 TRKPAD_RXD
21C8
R218
10K
21C8 21C3 RESET_BUTTON_L 1
0 2 C
22B1 21D7 21C3 20C3 20C2 20B3 19C3 SM R27 21D8 21B821D8 KEYBOARD_X1_L 69 21D3 27 TRKPAD_TXD 1 2 5%
2.2K 2 CPU_STATE_LED_L 21C3 21B7 P21/KEYBOARDX1 P71/CC_SCL 26 1/10W NOSTUFF
46B7 40D6 36C6 1 1 KEYBOARD_X2_L 68
P22/KEYBOARDX2 P72/CC_0
STOPXTAL* 6C8 13A8 5%
1/16W
FF
805
R215
5% 21D8 21B8 KEYBOARD_X3_L 67 25 CPU_STOP_CLK* 5A8 MF 0
R25 1/16W P23/KEYBOARDX3 P73/CC_1 24 603 21C8 21C3 NMI_BUTTON_L 1 2
MF 21D8 21B7 KEYBOARD_X4_L 66 CHARGE_V 32B1
10 3 603 P24/KEYBOARDX4 P74/CHARGEV 23 ADD SILKSCREEN BOX 1/10W
5%
21A8 SLEEP_LED 1 2 21D8 21B8 KEYBOARD_X5_L 65 PMU_CHRG_BATT_0 33C7
P25/KEYBOARDX5 P75/CHG_BATT_0 FF
5% 21D8 21B7 KEYBOARD_X6_L 64 22
CHARGE_I 32C1 MUST BE PLACE TOP OF MLB 805
1/16W P26/KEYBOARDX6 P76/CHARGE1 21 35D4 36C6
MF
603 R3 KEYBOARD_X7_L 63
P27/KEYBOARDX7 NC R26 21D7 22B1 R213 AND R215 PADS FOR DEVELOPMENT ONLY
0 2 21D8 P77/CHG_BATT_1 100K 2 13C8 13D6 14B3 14C3 14D2 15C2 15D3 15D7 16D4 18A4 18B6 RP2
40C4 36D2 33C7 20
21B8 JIS_KBD 1 21B7 KEYBOARD_X8_L 61
P30/KEYBOARDX8 P80/DC_DC CPU_STATE_LED_L 21C6 1 +3V_MAIN 3A4 5D6 6B5 6D4 7B2 7B4 7C7 7D2 7D4 8B6 8D4 8D6 100K
31D3 31D2 31C5 KEYBOARD CONN. R2631 5% 21B8 KEYBOARD_X9_L 59 19
5% 8D7 9D2 9D3 10D4 10D7 11A5 11B8 11C8 13A8 13B8 13C3 5%
21B7 21B1 21A4 +3_3V_PMU 0 1/16W
21D8 P31/KEYBOARDX9 P81/ACK 18 1/16W 18C7 19C3 20B3 20C2 20C3 21C7 21C3 10C3 UNI_PU_RESET* 8 1
21D8 21D6 21C6 5% MF IO_RESET_L 58 MAIN_GOOD MF 25B4 26D6 28C5 34B2 35B3 35B5
33B6 33A4 32D2 1/16W 603 P32/KEYBOARDX10 P82/REQ 17 603 7 2
MF 21D8 21B8 COMMAND_KEY_L 57 PME* 13B8 25B2 40D6 46B7 21C3 20B3 10C3 UNI_RESET*
1
R190 603 2 P33/COMMAND_KEY P83/PME 16
21D8 21B7 21A8 CONTROL_KEY_L 56 KW_PEND_PROC_INT 13B7 21B5 5B8 PANGEA_SUSP_REQ* 6 3
100K P34/CONTROL_KEY P84/PENDINGPROCINT 15 5 4
5% 21D8 21B8 21A8 SHIFT_KEY_L 55 PMU_NMI_L 21C8 22B8 21B5 20B6 IO_RESET_L
P35/SHIFT_KEY P85/100K_PULL_UP
1/16W
MF J6 21C8 21B7 21A8 OPTION_KEY_L 54
P36/OPTION_KEY
45A4
P86/32KHZ_XTAL
9 PMU_32KHZ_XOUT 1/16W
2 603 SM 45A4 8 PMU_32KHZ_XIN
SM
21C8 21B8 FN_KEY_L 53
P37/FN_KEY NOSTUFF
P87/32KHZ_XTAL
21B5 KBD_ID 1 2 INTL_KBD
NOSTUFF 14C3 13C7 PMU_INT 52 5
BATT_IN_0_L 33A4 R223 R17
21C6 JIS_KBD 3 4 CAPLCK_LED 21C7 R550 P40/PMU_INT P90/SCK 4 0 100K 2
21B8 KBD_ID 51
P41/KBD_ID P91/MISO BATT_IN_1_L 21B2 1 2 31D7 31B5 AC_ID 1
21C8 21B5 FN_KEY_L 5 6 CONTROL_KEY_L 21A8 21B5 REESEPLACE ON TOP SIDE 100K
RESERVE FOR TEST 1 3
2 4C6 CPU_PLL_STOP_OC 50
P42/CPU_PLL_0 P92/MOSI NC (RUN_BATT_0) 5% 5%
21D8 21B5 COMMAND_KEY_L 7 8 OPTION_KEY_L 21D8 21A8 21B5 21C8 49 2 1/16W R14 1/16W
MF
33B6 33C7 36D2
5% NC NC (RUN_BATT_1) MF 21D8 31C5 31D2
21D8 21B5 21A8 SHIFT_KEY_L 9 10 KEYBOARD_X0_L 21C5 21D8 1/16W 38B8 35D4 P43/CPU_PLL_1 P93/SMB_SEL 1 603 1 7.68K2 603

21D8 21C5 KEYBOARD_X1_L 11 12 KEYBOARD_X2_L 21C5 21D8

MF
603
27C8 7B7 SLEEP 48
P44/SLEEP P94/SMB_SCK
KW_PROC_SLEEP_REQ* 13B7 R224 33B4 21B3 SMB_SDA1 +3_3V_PMU 21A4 21B1 21B7
21B8 21C6 21D6
35C4 34A8 IOCLOCKSTOP_L 47 100 RUN_OK 21C8 0 1%
21D8 21C5 KEYBOARD_X3_L 13 14 P45/SUSPENDREQ_IOCLOCKSTOP P95/SMB_SDA 99 5% 1/16W 31D3 32D2 33A4
21D7 NUMLCK_LED 15 16 KEYBOARD_X4_L 21C5 21D8
5B7 PANGEA_SUSP_ACK* 46
P46/SUSPENDACK P96/OOPS_RESET 98
NC CRITICAL
1/16W
MF
MF
603 R202 40C4
R2 21B1 5B8 PANGEA_SUSP_REQ* 45 OOPS 21A2 2 603 7.68K2
21D8 21C5 KEYBOARD_X5_L 17 18 KEYBOARD_X6_L 21C5 21D8 100K 2
P47/SUSPENDREQ P97/OOPS
95
Y2
SM
33B4 21B3 SMB_CLK 1

B 21D8
21D8
21C5
21C6
KEYBOARD_X7_L
KEYBOARD_X9_L
19
21
20
22
KEYBOARD_X8_L
KEYBOARD_Y0
21C5 21D8
21D5
1
5%
P100/TEMP
P101/AC_VOLT
93
TEMP 21D3 35A6
PMU_AC_IN 31B4 4 1
1%
1/16W
MF
603
B
1/16W 92
21C5 KEYBOARD_Y1 23 24 KEYBOARD_Y2 21C5 MF BYTE 6 PMU_AC_DET 31B4
603 BYTE P102/AC_ID 91 32.768K RP13
21C5 KEYBOARD_Y3 25 26 KEYBOARD_Y4 21C5 45A4 PMU_10MHZ_XOUT 11
XOUT P103 NC (SMB_SEL)
KEYBOARD_Y5 45A4 PMU_10MHZ_XIN 13 90 PMU_IIC_CLK 6D5 1 C38 1 C37 100K 33B6 33C7 36D2
21C5 27 28
XIN P104/BATT_IN_0 15C8 5%
KEYBOARD_Y6 40C4 10 89 PMU_IIC_DAT 10PF 10PF 21D8 31C5 31D2
21C5 29 30 KEYBOARD_Y7 21C5 35A5 RESET P105/BATT_IN_1 6C5 5% 5% 1 8 +3_3V_PMU 21A4 21B1 21B7
50V 50V
21D3 +3_3V_REF_PMU 96 88 SMB_CLK 15B8 21B2 2 CERM 2 CERM
21B3 BATT_IN_1_L 2 7 21B8 21C6 21D6
VREF P106/RUN_BATT_0 603 603 31D3 32D2 33A4
21A2 CNVSS 7 CNVSS
87 SMB_SDA 21B2 33B4 LID_CLOSED_L 3 6
P107/RUN_BATT_1 24A4 21C3 40C4
33B4 POWER_UP_L 4 5
VSS AVSS 21C6
40C4
31C5 21D8 21D6 21C6 21B8 21B1 21A4 +3_3V_PMU R226 1
R21
1/16W
36D2 33C7 33B6 33A4 32D2 31D3 31D2 10M 12 62 94
SM
1 2 1K S1
21D8 21C5 21A3 DELTA_KEY_L 10
14
74LVC32 5%
1/16W
5%
1/16W
MF
DELTA KEY 3
SM-2MT
TSSOP
8
MF
603 2 603 R594 R20
U800 10K
21D8 21B7 21B5 CONTROL_KEY_L 9 14
NOSTUFF
DELTA_KEY_L 1K 1
21B6 CNVSS 1 2
32
74LVC32 21D8 21C5 21A8 1 2
5%
14 1 2
74LVC32 7 TSSOP 1
R225 32D2 33A4 33B6 33C7 36D2 40C4
+3_3V_PMU 21B1 21B7 21B8 21C6 21D6 NOSTUFF
5%
1/16W
1/16W
MF R217

3
13 3 RESET_KEY_L 21A3 MF 603 10K
TSSOP
U800 0 21D8 31C5 31D2 31D3 603 21B3 OOPS 1 2
U800 11
NC
2 32 5%
1/16W 3 NOSTUFF
ZD4 4
5%
12 32 MF NOSTUFF 1N5233B 1/16W
14
74LVC32
7
2 603 VCC R30 3 NOSTUFF
NOSTUFF
SOT23
MF

1
603
7
21D8 21B8 21B5 SHIFT_KEY_L 4 4.7K 2 1
R19
21C8
TSSOP U14 1 D5 10K
21B7 U800 6 SOT23-2.63V
5% 1N914
SOT23 5%
21B5 GND_VCOREOUTPUT OPTION_KEY_L 5
32 21A3 38B2 38B5 38B7 38C1 38C4 38C5 38C8 Y3 MAX6326 1/16W
MF
1 1/16W
MF PMU (POWER MANAGEMENT UNIT)
38D3 10MHZ 2
603
7 1 2 RESET 2 603
R1554 DESCRIPTION:
SM
GND 10K RESET_KEY_L
1 2 21A3 21A6 ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
A S2
SM-2MT
1 C42
12PF
1 C41
1
CRITICAL
NOSUTFF
1 C1540 1
NOSTUFF

C1541 1
NOSTUFF

C1542
5%
1/16W
MF NOTICE OF PROPRIETARY PROPERTY
A
12PF Q11 470PF 10PF 18PF 603
L61 3 5%
50V
2 CERM
5%
50V SOT
10% 5% 5%
400-OHM-EMI 603
2 CERM 2 MC33465 NOSTUFF 2
50V
CERM 2 50V
CERM
50V
2 CERM THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
603 INPUT 603 603 AGREES TO THE FOLLOWING
1 2 1 603
21C8 SLEEP_LED PMU_RESET_L MC33465 1 C188 GND_VCOREOUTPUT
2 21A8 38B2 38B5 38B7 38C1 38C4 38C5 38C8 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
SM-1 RESET* 1 4.7UF 38D3
1 C473 1 C477 5 CD 20% S4 II NOT TO REPRODUCE OR COPY IT
2 16V
CERM SM-2MT
470PF 0.01UF 4 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
10% 5% NC 4 1206 3 NOSTUFF
PLACE C543, C544 VERY
2 50V
CERM
603
2 50V
CERM
603 CLOSE TO PIN 12 U39
1 C192
0.1UF
GND
3
RESET BUTTON VGA_CHASS_GND 1
SIZE DRAWING NUMBER REV.

N20P80% 39A7 25B6 25B5 25B3 25A5 D 051-6130-C ACI: C

ECS:1.0
2 16V
CERM 21A6 21A3 RESET_KEY_L 2
APPLE COMPUTER INC.
603
SCALE SHT OF
4 NONE 21 53

8 7 6 5 4 3 2 1
 CR-22

8 7 6 5 4 3 2 1

+3V_VGA_MAIN 44D5 44C5 22D6 22C6 9D2 9D1 9C2 9B2 AGPAD<31..0> U200
RAGE_MOBILITY_M6_31X31
R900 44D5 22D7 9D1 9B2 AGPAD<31> T25 PBGA
DQ63 R3 NC
10K 2 AGP_SUS_STAT_L_PU 31 AD31 (1 OF 3)
1 22B6 22C8 44D5 22D7 9D1 9B2 T23 DQ62 R2 NC
5%
30 AGPAD<30>
R26
AD30 U200
1/16W 44D5 22D7 9D1 9B2 29 AGPAD<29> AD29 DQ61 R1 NC RAGE_MOBILITY_M6_31X31
R901 603 MF
44D5 22D7 9D1 9C2 28 AGPAD<28> R24 AD28 DQ60 P4 NC
PBGA
(2 OF 3)
10K 2 ATI_AUXWIN_PU 22B6 R25
1 44D5 22D7 9D1 9C2 27 AGPAD<27> AD27 DQ59 P3 NC NC
AA4 ZV_LCDDATA0 ROMCSB Y3NC
5% 44D5 22D7 9D1 9C2 26 AGPAD<26> P24 AD26 DQ58 P2 NC AB1
1/16W NC ZV_LCDDATA1
MF 44D5 22D7 9D1 9C2 25 AGPAD<25> P26 AD25 DQ57 P1 NC AB2 R AF24NC
603 NC ZV_LCDDATA2
44D5 22D7 9D1 9C2 P23 DQ56 N4 NC AB3
AGPAD<24> AD24 G AF23 NC
D NOSTUFF 44D5 22D7 9D1 9C2
24

23 AGPAD<23> N26 AD23 DQ55 N1 NC

NC
NC
AB4
ZV_LCDDATA3
ZV_LCDDATA4
B AF22NC
D
44C5 22D7 9D1 9C2 AGPAD<22> M25 AD22 DQ54 M3 NC AC1
R902 22
N25
NC ZV_LCDDATA5
1K 2 44C5 22D7 9D1 9C2 21 AGPAD<21> AD21 DQ53 M2 NC NC
AC2 ZV_LCDDATA6
1 AGP_AD_STBB0_PD 22B6 44C5 22D7 9D1 9C2 20 AGPAD<20> M24 AD20 DQ52 M1 NC AC3 VSYNC AE23 NC
NC ZV_LCDDATA7
5%
1/16W
NOSTUFF
44C5 22D7 9D1 9C2 19 AGPAD<19> M26 AD19 DQ51 L4 NC AD1 V2SYNC AF13 ATI_VSYNC 25C2
NC ZV_LCDDATA8
MF
603 R903 44C5 22D7 9D1 9C2 18 AGPAD<18> L24 AD18 DQ50 L3 NC NC
AD2 ZV_LCDDATA9 HSYNC AE24 NC
1K 44C5 22D7 9D1 9C2 L26
1 2 AGP_AD_STBB1_PD 22B6 17 AGPAD<17> AD17 DQ49 L2 NC NC
AD3 ZV_LCDDATA10 H2SYNC AE14 ATI_HSYNC 25C2
5% 44C5 22D7 9D1 9C2 16 AGPAD<16> L23 AD16 DQ48 L1 NC AE1
NC ZV_LCDDATA11
R904 1/16W MF 44C5 22D7 9D1 9C2 15 AGPAD<15> H25 AD15 DQ47 J3 NC AE2 ZV_LCDDATA12
RSET AE22 ATI_RSET
1K 603 ATI_TESTEN
NC
R2SET AE16 ATI_R2SET
1 2 22B3 44C5 22D7 9D1 9C2 14 AGPAD<14> H26 AD14 DQ46 J2 NC NC
AF1 ZV_LCDDATA13
NOSUTFF
5% 44C5 22D7 9D1 9C2 13 AGPAD<13> H24 AD13 DQ45 J1 NC M6_Y4 AF2
1/16W
MF R905 44C5 22D7 9D1 9C2 AGPAD<12> G26 AD12 DQ44 H3 NC
TP100 A 1 NC
AF3
ZV_LCDDATA14 R9381R9391
603 1K 2
12
NC ZV_LCDDATA15
Y_G AF15 25C8 ATI_Y_G 845 499
1 AGP_SB_STB_L_PD 22A6 44C5 22D7 9D1 9C2 11 AGPAD<11> G24 AD11 DQ43 H2 NC AE3 1% 1%
NC ZV_LCDDATA16 25C8 ATI_C_R 1/16W 1/16W
44C5 22D7 9D1 9C2 G25 DQ42 H1 NC
1 M6_AA1 C_R AF16
5%
1/16W
10 AGPAD<10> AD10 TP101A NC
AF4 ZV_LCDDATA17
COMP_B AF14 25D8 ATI_COMPVID_B
MF
603 2
MF
603 2
MF 44C5 22D7 9D1 9C2 9 AGPAD<9> G23 AD9 DQ41 G3 NC +3V_VGA_MAIN AE4
603 NC ZV_LCDDATA18
44C5 22D7 9D1 9C2 8 AGPAD<8> F26 AD8 DQ40 G2 NC M6_AA3 NC
AD4 ZV_LCDDATA19 R9351R9361R9371
1
44C5 22D7 9D1 9C2 7 AGPAD<7> E26 AD7 DQ39 F1 NC TP102 A NC
AF5 ZV_LCDDATA20 75
1% 1%
75 75
1% PLACE CLOSE TO M6
44C5 22D7 9D1 9C2 6 AGPAD<6> E24 AD6 DQ38 E2 NC NC
AE5 ZV_LCDDATA21 DIGON AB10 LCD_PWR_EN 24C3 1/16W 1/16W 1/16W
MF MF MF
44C5 22D7 9D1 9C2 5 AGPAD<5> E25 AD5 DQ37 E1 NC AD5 BLONB AB9 BKLIGHT_PWM 24C5 603 2 603 2 603 2
R906 ATI RECOMMEND ITS PULLUP TO VDDC
44C5 22D7 9D1 9C2 E23 DQ36 D2 NC
NOSTUFF NOSTUFF NOSTUFF NOSTUFF NOSTUFF NOSTUFF NOSTUFF
NC
NC AC5
ZV_LCDDATA22 R940
100K 2 4 AGPAD<4> AD4 1 1 ZV_LCDDATA23 0 2
ATI_CORE_MAIN 1 AGPREF_PU 22B6
44C5 22D7 9D1 9C2 AGPAD<3> D26 AD3 DQ35 D1 NC
R9181R9191R9201R9211R9221R923 R924 HPD AD21 VID_HOTPLUG1 VID_DETECT* 25C3
3
10K 10K 10K 10K 10K 10K 10K Y4 ZV_LCDCNTL0 5% CLAMPING PROTECTION CIRCUITRY?
5% D25
1/16W 44C5 22D7 9D2 9D1 2 AGPAD<2> AD2 DQ34 C2 NC 5% 5% 5% 5% 5% 5%
1/16W
5%
1/16W 1/16W ZENER AND RESISTOR TO GROUND
MF 1/16W 1/16W 1/16W 1/16W 1/16W AA1 ZV_LCDCNTL1 MF
44C5 22D7 9D2 9D1 1 AGPAD<1> C26 AD1 DQ33 C1 NC MF MF MF MF MF MF MF 603
603 603 2 603 2 603 2 603 2 603 2 603 2 603 2 AA2
44C5 22D7 9D2 9D1 AGPCBE<3..0> 0 AGPAD<0> D24 AD0 DQ32 B1 NC NC ZV_LCDCNTL2 LTGIO0 AD7VGA_VCORE_HI 22B2 37B7 +3V_SLEEP
44B5 22C6 9B2 9B1 AA3 ZV_LCDCNTL3 LTGIO1 AD6 LVDS_DDC_CLK 25A6
N23 DQ31 C13 NC
NOSTUFF 44B5 22C7 9B2 9B1 3 AGPCBE<3> CBEB3 LTGIO2 AC7 LVDS_DDC_DATA R9411R9421 25A6
L25 DQ30 D13 NC ATI_AGP_FBSKEW<0> Y2 GPIO0
R966 44B5 22C7 9B2 9B1 2 AGPCBE<2> CBEB2 10K 10K 1
C AGP_SUS_STAT_L_PU 1
0 2 AGPSTOP* 9D4 14C5 22A6
44B5 22C7 9B2 9B1
44B5 22C7 9B2 9B1
1 AGPCBE<1>
AGPCBE<0>
J25
F23
CBEB1
DQ29 A14 NC
DQ28 B14NC
ATI_AGP_FBSKEW<1>
M6GPIO2
Y1
W3
GPIO1
GPIO2
MONID0 AD24
NC
MONID1 AD25
NC
5%
1/16W
MF
5%
1/16W
MF G
Q200
2N7002 1
Q201
C
0 CBEB0 603 2 603 2 SM
2N7002
1/16W
5% DQ27 C14NC M6GPIO3 W2 GPIO3 G
VGADDCCLK AC25 ATI_DDC_CLK_OUT 2 S D 3 DDC_CLK SM 25C3
MF 44D5 9C5 AGP_CLK AA26 PCICLK DQ26 D14NC ATI_BUS_CFG<0> W1
603 GPIO4 2 S D 3 DDC_DAT
24D5 RAGPFRAME_L K25 FRAMEB DQ25 A15 NC V4 VGADDCDATA AC26 ATI_DDC_DAT_OUT
ATI_BUS_CFG<1> GPIO5
24D5 RAGPIRDY_L K26 DQ24 B15 NC V3
IRDYB ATI_BUS_CFG<2> GPIO6 DVIDDCCLK AD20
NC
24D5 RAGPTRDY_L K24 DQ23 B16 NC 35D4 36C6 40D6
TRDYB 22A4 ATI_GPIO7 V2 GPIO7 DVIDDCDATA AC20
NC 25B4 26D6 28C5
24D4 RAGPSTOP_L J24 DQ22 C16 NC V1
STOPB NC GPIO8 20B3 20C2 20C3
24C5 RAGPDEVSEL_L J26 DEVSELB DQ21 D16 NC ATI_GPIO9 U3 CRT2DDCCLK AF6NC 15D7 16D4 18A4
22A4 GPIO9
13D6 14B3 14C3
44B5 9B1 AGPPAR J23 PAR DQ20 A17 NC ATI_GPIO10 U2 CRT2DDCDAT AF7NC
22A4 GPIO10 11B8 11C8 13A8
24D4 RAGPREQ_L AA25 DQ19 B17 NC
REQB 40D4 NC
U1 GPIO11 TXOUT_U0N AD11NC R956 8D7
7C7
9D2
7D2
9D3
7D4
24D4 RAGPGNT_L Y24 GNTB DQ18 C17 NC 27C6 NC
T4 GPIO12 TXOUT_U0P AC11
NC VGA_VCORE_HI 10K +3V_MAIN
R907 AA24 25B5 37B7 22C2 1 2 3A4 5D6 6B5
14D3 13C7 AGP_INTA* INTAB DQ17 A18 NC 22C1 NC
T3 GPIO13 TXOUT_U1N AE11 6D4 7B2 7B4
47 AA23
NC 5%
21B5 21B1 20B6 IO_RESET_L 1 2 AGPRST_L RSTB DQ16 B18 NC 20C8 TXOUT_U1P AF11
NC
1/16W 8B6 8D4 8D6
A19 QS0 MF 10D4 10D7 11A5
5% NC
W24 SERRB DQ15 C19 NC 15C5 NC
TXOUT_U2N AD12 603
23D3 23B5 +2_5V_ATI_VDDR_MAIN 1/16W
AGP_SUS_STAT_L_PU AE25 15B5 L200 NC
B19 QS1 NC 13B8 13C3 13C8
MF 22D7 22C8 STEREOSYNC DQ14 A20NC 13B3 100-OHM-EMI TXOUT_U2P AC12
NC 14D2 15C2 15D3
603 D18 QS2
R9081 +1.25V_ATI_VREF T2 VREF DQ13 B20 NC 6C5
4C6 +3V_SLEEP 1 2 +3V_ATI_OSC_SLEEP
NC
C18 QS3
TXOUT_U3N AD13
NC
18B6
21C3
18C7
21C7
19C3
21D7
10K DQ12 C20 NC NC
TXOUT_U3P AE13NC 34B2 35B3 35B5
1% 6B5 SM NC
J4 QS4
1/16W DQ11 D20 NC 9D4 TXCLK_UN AE12
NC 46B7
K1
MF
603 2 DQ10 A21 NC 15A5 NOSTUFF 1
R925 14 1 C902 NC
K2
QS5
TXCLK_UP AF12
DQ9 B21 NC
15B7 100K VCC 0.1UF NC QS6 NC
15C7 1 N20P80% TXOUT_L0N AC8 LVDS0_MINUS 25B8
DQ8 C21 NC 20D6
C901 5% 2 16V NC
K3 QS7
TXOUT_L0P AD8 LVDS0_PLUS 25B8
R909 1 1 C900 25A6
3.3UF 1/16W
MF G100 CERM
603
DQ7 B22 NC 10%
2 603 27.0000M NC
AE19 TX0M TXOUT_L1N AC9 LVDS1_MINUS 25B8
10K 0.1UF 25D4 2 16V
1% N20P80% R910 DQ6 C22 NC 35D2
TANT OSC AF19 TX0P TXOUT_L1P AD9 LVDS1_PLUS 25B8
1/16W 16V 22 F25
SMA 1 OE SM-1 8 ATI_OSCOUT NC
MF 2 CERM AGPADSTB<0> 1 2 R_AGPADSTB<0> AD_STB0 DQ5 A23 NC 46B7 OUT AE20 TX1M TXOUT_L2N AE8 LVDS2_MINUS 25B8
1/16W 1 22
603 5% NC
603 2 P25
AGPADSTB<1> 2 R_AGPADSTB<1> AD_STB1 DQ4 B23 NC AF20 TX1P TXOUT_L2P AF8 LVDS2_PLUS 25B8
5% GND NC
22D7 1/16W AGP_AD_STBB0_PD F24 AD_STBB0 DQ3 A24 NC R9261 AE21 TXOUT_L3N AC10
B R911 22D7 AGP_AD_STBB1_PD N24 AD_STBB1 DQ2 A25 NC 7 301
1%
NC
NC
AF21
TX2M
TX2P TXOUT_L3P AD10
NC
NC
B
9C4 AGPBUSY* AB26 AGP_BUSYB DQ1 B25 NC 1/16W AE18 AE9
MF NC TXCM TXCLK_LN LVDSCLK_MINUS 25A8
22C7 AGPREF_PU B26 DQ0 A26 NC 603 2 AF18
AGPREF R928 NC TXCP TXCLK_LP AF9 LVDSCLK_PLUS 25A8
C25 AGPTEST 22
NC
ATI_AUXWIN_PU AC22 DQMB7 N3 NC DIVIDE DOWN TO 1.8V CLOCK INPUT
ATI_OSCOUT_DIV 1 2 ATI_XTALIN AF25 XTALIN
22D7 AUXWIN
44B5 22B6 9B1 9A1 AGPST<2..0> DQMB6 N2 NC 5%
1/16W
44B5 22B7 9B1 0 AGPST<0> Y26
Y23
ST0 DQMB5 G1 NC R9271 MF
603
NC
AF26 XTALOUT
44B5 22B7 9A1 1 AGPST<1>
ST1 DQMB4 F2 NC 365
1% 22D7 ATI_TESTEN AC6 TESTEN
44B5 22B7 9A1 2 AGPST<2> Y25 DQMB3 C15 NC 1/16W
AGPSBA<7..0> ST2 MF
44C5 44B5 22B6 22A6 9B1 DQMB2 A16 NC AE6 SSIN
44C5 22B7 9B1 7 AGPSBA<7> T24 SBA7/IDSEL
603 2 43B4 22A2 ATI_SSIN SSOUT AE7 ATI_SSOUT 22A4
T26 DQMB1 D21 NC
44B5 22B7 9B1 6 AGPSBA<6> SBA6
U24 DQMB0 A22 NC
44B5 22B7 9B1 5 AGPSBA<5> SBA5
44B5 22B7 9B1 4 AGPSBA<4> U26 SBA4 RASB A9 NC
44B5 22B7 9B1 3 AGPSBA<3> V23 SBA3 CASB C8 NC
44B5 22B7 9B1 2 AGPSBA<2> V26 SBA2 CKE A8 NC
L201
100-OHM-EMI
44B5 22B7 9B1 1 AGPSBA<1> V24 SBA1
WEB D8 NC R913 23C8 23C1 23B8 22D8 22C5 14D4 14D3 +3V_VGA_MAIN 1 2 +3V_ATI_SS
44B5 22B7 9B1 0 AGPSBA<0> W25 SBA0 46C7 46B7 36C4 25D2 25C2 24C2
W26 R914 33 SM
44B5 14B5 9A1 AGPRBF* RBFB CLK0 A6 ATI_CLK0 1 2 2 1
C903 1 C904
R912 22C7 AB25 STP_AGPB CLK1 A4 ATI_CLK1 1 2 5%
VDD 4.7UF 0.1UF
39 2 9D4
AGPSTOP* 1/16W N20P80%
603 33 MF U201
20% 16V
44B5 14C5 9B1 AGPSBSTB 1 14C5 RAGPSBSTB V25 SB_STB CLK0_IN A7 ATI_CLK0_IN 603 2 6.3V 2 CERM
U25 SB_STBB
R929 MK1708 TANT
SMA 603
5% 22C7 AGP_SB_STB_L_PD CLK1_IN A5 ATI_CLK1_IN
R915 33 1 SOI
1/16W
33 22B2 ATI_SSOUT 1 2 R_ATI_SSOUT ICLK LEE 5 NC
MF
603 NC
C9 A13 CLK0B B6 ATI_CLK0_L R916 1 2 5% SS_S0 6 S0 R934
1/16W 33
NC
D9 A12 CLK1B B4 ATI_CLK1_L 1 2 5%
1/16W
MF SS_S1 7 S1 43B4 CLK 4 MK1708_SSOUT 1 2 ATI_SSIN 22B3 43B4 GRAPHICS CONTROLLER
A10 A11 603 33 MF
603
SS_SD 8 SD 5% DESCRIPTION:
NC CLK0B_IN B7 ATI_CLK0_L_IN 603 1/16W
NC B10 GND
A NC
C10
A10
A9
CLK1B_IN B5 ATI_CLK1_L_IN
R9301 R9311 R9321 R9331 3
MF
603
ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
NOTICE OF PROPRIETARY PROPERTY
A
A11 NOSTUFF
NC A8 0 0 0 0
B11 5% 5% 5% 5%
NC A7 1/16W 1/16W 1/16W THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
CLKFB B3 NC MF
1/16W MF MF PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
NC C11 A6 ATI_CORE_MAIN 603 2
MF
603 2 603 2 603 2 AGREES TO THE FOLLOWING

NC
D11 A5 CSB0 B9 NC I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
22C3 ATI_GPIO7
NC
A12 A4 CSB1 B8 NC R917 II NOT TO REPRODUCE OR COPY IT
B12 A3 10K ATI_GPIO9 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
NC
MEMVMODE T1 ATI_MEMVMODE 1 2 22C3
C12 A2
NC ATI_GPIO10 SIZE DRAWING NUMBER REV.
5% 22C3
A13 A1 1/16W
NC ACI: C
NC
B13 A0
MF
603
APPLE COMPUTER INC.
D 051-6130-C ECS:1.0
SCALE SHT OF
NONE 22 53

8 7 6 5 4 3 2 1
 CR-23

8 7 6 5 4 3 2 1
R1106
+2_5V_MAIN 40C6
23B7 23A8 +1_8V_MAIN 1
0 2
R943
1
0 2 46B7 23B7 +1_8V_PVDD_MAIN +2_5V_MAIN
36B6 36B5 23D8 5%
1/16W
U202 MF
5%
C913
LTC1761ES5-1.8 603
NOSTUFF
1/16W
MF
1 C907 1 C908 1 C909 1 C910 1 C911 1 C912 1
SOT-23 603 10UF 10UF 0.1UF 0.1UF 0.1UF 0.01UF 0.01UF
N20P80% N20P80%
16V
20% 20% 20%
10V
20% 20%
50V
AE26 PVDD PVSS AD26 1 C729 1 C730 1 C731 1 C732 1 C733 1 C734 1 C735 1 C736
1 IN OUT 5 16V
2 CERM 2 CERM 10V
2 CERM 2 10V 2 CERM 50V
2 CERM 2 CERM AD23 AVDD AVSSQ AC21 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 1
R944 1206 1206 402
CERM
402 402 402 402 20% 20%
10V
20% 20% 20% 20% 20% 20% R952
0 2 10V 2 CERM 2 10V 2 10V 10V
2 CERM 2 10V 2 10V 2 10V 0
3 SHDN BYP 4 1 C906 1 2 +1_8V_AVDD_MAIN
AD16 A2VDD A2VSSQ AE15 CERM
402 402
CERM
402
CERM
402 402
CERM
402
CERM
402
CERM
402 5%
0.1UF 5% 46B7 +1_8V_A2VDDQ_MAIN AD15 A2VDDQ AVSSN AD22
1/16W
GND 20%
2 10V
1/16W 1 C914 1 C915 MF
2 603
2 CERM MF
603 10UF 0.1UF A2VSSN0 AC15
402 N20P80% 20%
10V R947 AB12
A2VSSN1 AC16 ROUTE A WIDE TRACE FROM TV JACK TO A2VSSN
2 16V 2 CERM 0
D R945
1
0 2
CERM
1206 402 +2_5V_MAIN 1
5%
2 +2_5V_A2VDD_MAIN AB14
AB17 VDDRH C5 +2_5V_ATI_VDDR_MAIN D
1/16W AB19
NOSTUFF 5%
MF
603 1 C918 1 C919 AB7
E11 1
C959 1 C960 1 C961 1 C962 1 C963 1 C964 1 C965 1 C968 1 C967
1
1/16W
MF
1 C916 1 C917 0.1UF E13
10UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.01UF 0.01UF 0.01UF
36B5 23D8 23B7 23A8 +1_8V_MAIN R946 603 3.3UF 0.1UF 20% 0.1UF
20%
AB8
E14 20%
20%
10V
20% 20% 20% 20% 20%
50V
20%
50V
20%
50V
40C6 36B6 0 N20P80%
16V
20%
10V
10V
2 CERM 10V E10 2 6.3V 2 CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM 2 10V
CERM
2 CERM 2 CERM 2 CERM
5% 2 CERM 2 CERM 2 CERM E16 TANT 402 402 402 402
1/10W 402 SMA 402 402 402 402
1206 402 402 E12
FF E18
2 805 E15
46B7 E20
E17
37C8 22C8 22A5 ATI_CORE_MAIN E21
E19
E6 1 C966 1 C737 1 C738 1 C739 1 C740 1 C741 1 C742 1 C743 1 C744
1
C920 1 C921 1 C922 1 C923 1 C924 1 C925 1 C926 1 C927 1 C928 1 C929 1 C930 1 C931 1 C932 1 C933 1 C934 E8
VDDR1 E7 0.01UF
20%
0.01UF
20% 20%
0.01UF 0.01UF
20%
0.01UF 0.01UF 0.01UF 0.01UF 0.01UF
22UF 10UF 10UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.01UF 0.01UF 0.01UF 0.01UF H22 20% 20% 20% 20% 20%
N20P80% N20P80% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% VDDC E9 50V
2 CERM 2 50V
CERM 2 50V
CERM 2 50V
CERM
50V
2 CERM 2 50V 50V
2 CERM 2 50V
50V
2 CERM
20% H5 CERM
2 10V
16V
2 CERM
16V
2 CERM
10V
2 CERM 2 10V 2 10V 2 10V 10V
2 CERM 2 10V
10V
2 CERM
10V
2 CERM
50V
2 CERM 2 50V
CERM
50V
2 CERM
50V
2 CERM G5 402 402 402 402 402 402 402
CERM
402 402
TANT CERM CERM CERM CERM
1206 1206 402 402 402 402 402 402 402 402 402 402 402 402 K22
SMB H4
K5
J5
M22
K4
M5
L5
R22
M4
1 C712 1 C711 1 C710 1 C709 1 C708 1 C707 C706 C704 1 C703 1 C702 1 C701 1 C700
R5
N5
0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF
1 1 C705 1
0.01UF 0.01UF 0.01UF 0.01UF U22
20% 20% 20% 20% 20%
0.01UF 0.01UF 0.01UF 20% 20% U5
P5
2 10V 2 10V
20% 20% 20% 20% 20% 20%
CERM CERM 2 10V 2 10V 2 10V 10V
2 50V 50V 2 50V
50V
2 CERM 50V 2 50V R4
402 402
CERM CERM CERM 2 CERM CERM 2 50V
CERM 2 CERM CERM 2 CERM CERM W22
402 402 402 402 402 402 402 402 402 402 D7
402
W5 R953
+3V_VGA_MAIN AB11 46B7 AA5 +3V_VDDR3_MAIN 1
0 2 +3V_VGA_MAIN
AB15 5%
AA22 AB16 1
C969 1 C970 1 C971 1 C972 1 C973 1 C974 1/16W
MF
1
R948 AB23 AB18 10UF 0.1UF 0.01UF 0.01UF 0.1UF 0.1UF 603
20% 20% 20% 20% 20% 20%
0
C 5%
1/16W
MF
AB24
E22
AB20
AB21
2 6.3V
TANT
SMA
2 10V
CERM
402
2 50V
CERM
402
2 50V
CERM
402
2 10V
CERM
402
2 10V
CERM
402
C
2 603 F22 AB22
G22 AB5
46B7 +3V_VDDP_MAIN
H23 VDDR3 AB6
J22 U200 AC17
1 C713 1 C714 1 C715 1 C940 1 C941 1 C942 1 C943 1
C935 1 C936 1 C937 1 C938 1 C939 RAGE_MOBILITY_M6_31X31 1 C754 1 C755
0.1UF 0.1UF 0.1UF 0.01UF 0.01UF 0.01UF 0.01UF 10UF 0.1UF 0.1UF 0.1UF 0.1UF K23
PBGA
AC23 1 C749 1 C750 1 C751 1 C752 1 C753 0.01UF 0.01UF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% L22 AC24 0.01UF 0.01UF 0.01UF 0.01UF 0.01UF
2 10V 2 10V
CERM
10V
2 CERM 2 50V 50V
2 CERM 2 50V 2 50V
20% 10V
2 CERM
10V
2 CERM
10V
2 CERM
10V
2 CERM
(3 OF 3)
20% 20% 20% 20% 20% 20% 20%
50V
CERM CERM CERM CERM 2 6.3V M23 VDDP AC4 50V 50V 2 50V 2 50V 2 CERM
402 402 402 402 402 402 402 TANT 402 402 402 402 50V
2 CERM 2 50V
CERM 2 CERM 2 CERM CERM CERM
402
SMA 402 402 402 402
N22 T5 402 402
P22 U4
R23 V5
T22 W4
U23 Y5

+2_5V_MAIN
V22
A1
1 C756 1 C757 1 C758
+3V_VGA_MAIN
W23 0.1UF 0.1UF 0.1UF
B2 20% 20% 20%
10V
Y22 2 10V
CERM 2 10V
CERM 2 CERM
NOSTUFF C3 402 402 402
1 C24
1
R949 R950 D23
C4
0 0 D3
5% 5%
1/16W 1/16W D4
MF MF C23
2 603 2 603 C7
D5
E4
D10
+2_5V_VDDM_MAIN E5
D12
F5
1 D17 VDDM
1 C726 1 C727 C944 1 C945 1 C946 1 C947 1 C948 1 C949 E3
K10
0.01UF 0.01UF 10UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF K11
20% 20% 20% 20%
B 2 50V
CERM
402
50V
2 CERM
402
2 6.3V
TANT
SMA
20%
2 10V
CERM
402
20%
2 10V
CERM
402
20%
2 10V
CERM
402
2 10V
CERM
402
20%
2 10V
CERM
402
F4
K12
K13
B
22B8 +2_5V_ATI_VDDR_MAIN B24 K14
R951 23D3 C6 K15
+1_8V_MAIN 0 D15 K16
40C6 36B6 36B5 23D8 23A8 1 2
D19 K17
5% NOSTUFF
1/16W D22 VDDQM L10
MF
603 D6 L11
VSS
R1117 F3 L12
0 G4 L13
46B7 23D6 +1_8V_PVDD_MAIN 1 2
L14
5%
1/16W L15
MF AE10 LPVDD
603 L16
40C6
R1107 46B7 +1_8V_LVDDR_MAIN
AE17 TPVDD
L17
36B7 23D8 23D6 +1_8V_MAIN
0
11D8 10D3 3B4 +2_5V_MAIN 23D8 23B7 1 2 AC13 LVDDR0 M10
23D1 23B7 18D7 36B6 36B5 5%
1 C950 1 C951 1 C952 1 C953 1 C728 AD14 LVDDR1 M11
40C4 37C1 1/16W 10UF 0.1UF 0.1UF 100PF 0.01UF
MF N20P80% 20% 20% 5% 20% M12
U203 603 2 16V
CERM 2 10V 2 10V 2 50V 2 50V AC19 TXVDDR0
NOSTUFF CERM CERM CERM CERM M13
LTC1761ES5-1.8 1206 402 402 603 402 AD19 TXVDDR1
SOT-23 R1116 M14
1 0 46B7 A2 MPVDD M15
IN OUT 5 1 2 +1_8V_MPVDD_MAIN
5% M16
1/16W AF10 LPVSS
3 SHDN BYP 4 1 C954 MF
1
C955 1 C956 1 C957 1 C958 AF17 TPVSS
M17
0.1UF 603 10UF 0.1UF 0.01UF 0.01UF N10
GND 20% 20% 20%
10V
20% 20% GRAPHICS CONTROLLER POWER
10V
2 CERM
2 6.3V
TANT 2 CERM 2 50V
CERM 2 50V
CERM
AB13 LVSSR0 N11
2 402
402 SMA 402 402 AC14 LVSSR1 N12 DESCRIPTION:
N13 ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
A AC18 TXVSSR0
AD18 TXVSSR1
N14
NOTICE OF PROPRIETARY PROPERTY
A
N15
AD17 TXVSSR2
N16
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
A3 MPVSS N17 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
VSS I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
U17
U16
U15
U14
U13
U12
U11
U10
T17
T16
T15
T14
T13
T12
T11
T10
R17
R16
R15
R14
R13
R12
R11
R10
P17
P16
P15
P14
P13
P12
P11
P10
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

ACI: C
APPLE COMPUTER INC.
D 051-6130-C ECS:1.0
SCALE SHT OF
NONE 23 53

8 7 6 5 4 3 2 1
 CR-24

8 7 6 5 4 3 2 1

AGP BUS SERIES TERM

+5V_MAIN
16C2 17B7 19D4 28C4 34C2 35D8 36B3 37B4 37D4 38B3 38B8
R472 38C5 40D6 46C7
0
44B5 14C5 9B1 AGPFRAME* 1 2 RAGPFRAME_L 22C6
+5V_INV_UF_SW
5%
1/16W R471 24A6
MF 0
603 14B5 9B1 PCISTOP* 1 2 RAGPSTOP_L 22C6
D R482 44B5 5%
1/16W
1
R239
100K
D
0 MF 1%
44B5 14C5 9B1 AGPIRDY* 1 2 RAGPIRDY_L 22C6 603 1/16W
MF
5%
1/16W R452 2 603 3
MF 0 D
603 14C5 9D1 AGPGNT* 1 2 RAGPGNT_L 22B6
R236 Q39
R478 5% 100K 2 TP0610
1/16W 1 1 G S SM
0 MF
44B5 14C5 9B1 AGPTRDY* 1 2 RAGPTRDY_L 22C6 603 1%
1/16W 2
5%
1/16W R450 MF
603
MF 0
603 14C5 9D1 AGPREQ* 1 2 RAGPREQ_L 22C6
R465 5%
1/16W
C207
0 MF
44B5 14C5 9B1 AGPDEVSEL* 1 2 RAGPDEVSEL_L 22C6 603 2200PF
5% INV_PWREN_L 1 2
1/16W
MF 5%
603 50V
CERM
603
R430 46C7
0 BKLIGHT_PWM_REG 24A6 +3V_VGA_MAIN 14D3 14D4 22A4 22C5 22D8 23B8
22C2 BKLIGHT_PWM 1 2
5%
23C1 23C8 25C2 25D2 36C4 46B7
1/16W
MF
603
LCD_R_PWREN_L
Q22
SI3443DV
R143 TSOP 1
LCD_PWR_EN_L 1
10K 2 2
TBD 5
5%
1/16W
MF 3 6

C 3
603
4 C
D Q25 1 C93
2N7002 3300PF
SM 10%
22C2 LCD_PWR_EN 1 G S 2 50V
CERM
603
2
+3V_LCDVDD_SW 25B7
1 C94 1
C95
0.1UF 10UF
N20P80% 20%
2 16V
CERM 2 6.3V
TANT
603 SMA

B B
INVERTER CONNECTOR

39D2 24A4 INVT_CHGND

1 C201
L62 100PF
5%
400-OHM-EMI 2 50V
1 2
CERM
603
J4
SM-2MT
24D1 +5V_INV_UF_SW
SM-1 L65 7
FERRITE-700MA
39C6 39C3 38D6 38C4 38C3 37D8 34D8 34D5 34B4 32D5 19D4 +PBUS 1 2 1

L63 43A4 SM 2
400-OHM-EMI 3

24C4 BKLIGHT_PWM_REG 1 2 4
SM-1 L66 5 EMC_GND DETERMINED BY ATC LAYOUT
400-OHM-EMI 6
L64 21B2 LID_CLOSED_L 1 2 LCD I/F
FERRITE-700MA
21C3 SM-1 8
1 2
DESCRIPTION:
SM 1 C484 ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
0.1UF
A 1 C223 N20P80%
16V
2 CERM NOTICE OF PROPRIETARY PROPERTY
A
100PF 603
5%
2 50V
1 C206 L67 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
CERM 100PF 400-OHM-EMI PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
603 5% AGREES TO THE FOLLOWING
50V
2 CERM
603
1 C642 1 2
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
100PF SM-1
5%
50V
2 CERM
1 C643 1 C644 II NOT TO REPRODUCE OR COPY IT

603
100PF 100PF III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
5% 5%
50V 50V
2 CERM 2 CERM SIZE DRAWING NUMBER REV.
39D2 603 603
24B4 INVT_CHGND D 051-6130-C ACI: C
ECS:1.0
APPLE COMPUTER INC.
SCALE SHT OF
NONE 24 53

8 7 6 5 4 3 2 1
 CR-25

8 7 6 5 4 3 2 1

NOTES:
DUE TO EMI CONCERNS,THE FOLLOWING PINS(WHICH ARE LOCATED OVER THE
Video Connectors EXTERNAL VIDEO (VGA) INTERFACE
CORRECT PORTION OF THE VGA_CHASS_GND1 PLANE) ARE CONNECTED TO THE
VGA_CHASS_GND1 PLANE AS WELL AS DIGITAL GROUND.....
R90-2, C69-2, C70-2, C76-2, FL2-3/4, FL4-3/4, J12-1/4/6/14, C338-2,
C339-2, C340-2, C344-2,

F3 L33
0.5AMP 400-OHM-EMI
D 35B2 28D5 21D2 21C3
40C6 35B5
+5V_IO_SLEEP 1 2 46C7 40C6 +5V_VGA_FUSE
FL2
46C7 +5V_VGADDCPWR_SLEEP_F
SM-1
+3V_SLEEP 4C6 6B5 6C5 9D4 13B3 15A5 15B5 15B7 15C5 15C7 20C8
20D6 22B5 22C1 25A6 25B5 27C6 35D2 40D4 46B7
D
SM LCFILTER
SM-100MHZ

1 2
NOSTUFF
3 4

J12
TCX3160
1
R322 1R335 1
+3V_VGA_MAIN
14D3 14D4 22A4 22C5 22D8 23B8 23C1 23C8
L5 L4 4.7K R338 24C2 25C2 36C4 46B7 46C7
TH-2MT 5% 1K 1K
0.068UH 0.068UH 1/16W 5% 5%
MF 1/16W 1/16W
22C2 ATI_COMPVID_B 1 2 ATI_B_FILTR 1 2 17
2 603
MF
2 603
MF
SM SM 2 603
15
FL3 5
74AHC1G32
LCFILTER 1 C70 VID_DETECT* 22C1 22D2 ATI_VSYNC 1 SM R350
C69 1 SM-100MHZ
3.3PF ATI_VSYNC_BUF 33
4.7PF
+/-0.25PF 1 2 5%
1 11 DDC_CLK 22C1 U21 4 1 2 VGA_VSYNC 25C4
50V 8 2 32 5%
50V 2 CERM 1/16W
CERM 2 NOSTUFF 603 MF
603 13 2 VGA_VSYNC 25C1 3
3 4 603
14
VGA_B 9 3 VGA_HSYNC 25C1
CLOSE TO VGA CONNECTOR J12 6
L6 L7 7 10 DDC_DAT
0.068UH 0.068UH VGA_G 22C1
4
22C2 ATI_Y_G 1 2 ATI_G_FLTR 1 2
5 12
+3V_VGA_MAIN 14D3 14D4 22A4 22C5 22D8 23B8 23C1 23C8
SM SM 24C2 25D2 36C4 46B7 46C7
VGA_R
C72 1 C73 5
4.7PF 1
3.3PF
16 1 C338 1 C340 1 C344 1
74AHC1G32 R346
+/-0.25PF 100PF 100PF 100PF 22D2 ATI_HSYNC SM
L8 50V L9 5%
50V 18 5% 5% 5% 4 33
C 22C2 ATI_C_R 1
0.068UH
2
CERM
603 2
ATI_R_FILTR 1
0.068UH
2
2 CERM
603
2 50V
CERM
603
2 50V
CERM
603
2 50V
CERM
603 2
U204
32
1
5%
1/16W
2 VGA_HSYNC 25C4
C
MF
SM SM 3 603
C78 FL4
4.7PF
1
LCFILTER 1 C76
+/-0.25PF
50V
SM-100MHZ 3.3PF
5%
CERM
603 2 1 2 2 50V
CERM
VGA_CHASS_GND1
NOSTUFF 603
3 4

LCD (LVDS) INTERFACE C975

0.01UF
1 2
L11 46B7 40D4 35D2 27C6 25D4 25A6 22C1 22B5 39A7 25B6 25B5 25A5 21A3 VGA_CHASS_GND CHGND3 28A4 28A5 28B1 28B2 28C1 28D1 28D3
FERR-250-OHM
15B7 15B5 15A5 13B3 9D4 6C5 6B5 4C6 +3V_SLEEP
20%
24C1 +3V_LCDVDD_SW 1 2 +3V_LCDVDD_SW_F
20D6 20C8 15C7 15C5 C357 50V
CERM
SM 0.001UF 603
1 2
C356 1 J15
0.001UF 20%
20%
50V 1
50V
CERM
F-RT-20228
CERM
603 2 R380 1
R381 603 SM
10K 10K
5% 5%
1/16W 1/16W 24
MF MF
VGA_CHASS_GND 2 603 2 603
21A3 25A5 25B3 25B5 25B3 25A5 21A3 VGA_CHASS_GND 22
39A7 39A7 25B6
1 C379 1 C375 1 C378 1 C377 1

10PF 10PF 10PF 10PF 2

5% 5% 5% 5%
50V 50V 3
2 50V 2 50V 2 CERM 2 CERM
B CERM
603
CERM
603 603 603 4
5
PME* 13B8 21B3 B
22B2 LVDS0_MINUS 3
22B2 LVDS0_PLUS 6
7
R959
D Q211
8 28C3 2N7002
22B2 LVDS1_MINUS SCC_RXDA
470K 2 1 SM
9 13C5 1 G S
22B2 LVDS1_PLUS 16D4
10 R967 5%
1/16W
SCC_RTSA*
1K SLINK_TX_ENABLE_L MF
2
22B2 LVDS2_MINUS 11 13D5 1 2
603
22B2 LVDS2_PLUS 12 16D2 5%
1 C1210
1/16W 0.01UF
13 MF 5%
+3V_MAIN 603 2 50V
CERM
22B2 LVDSCLK_MINUS 14
15 5 1
U210 R960 R961 603
22B2 LVDSCLK_PLUS 470 47K
16 13D5 SCC_TXDA* 2 4 1 2 1 2
1 C376 1 C374 17 16C1 125 5% 5%
3 SOT 1/16W 1/16W
10PF 10PF 18 MF MF
5% 5% NC 603 603
50V
2 CERM
50V
2 CERM 22C2 LVDS_DDC_CLK 19 74LVC1G125
603 603 22C2 LVDS_DDC_DATA 20
1 C381 1 C380
10PF 46B7 40D4 35D2 27C6 25D4 25B5 +3V_SLEEP
5% 10PF 15B5 15A5 13B3 9D4 6C5 6B5 4C6 21 VIDEO CONNECTOR
2 50V
CERM
5%
22C1 22B5 20D6 20C8 15C7 15C5 15B7
603 2 50V
CERM
603 (LVDS DDC POWER) 23
C359
39A7 0.001UF
25B3 21A3 VGA_CHASS_GND 1 2
25B6 25B5 DESCRIPTION:
20%
50V ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
CERM
1 C358 603
A 0.001UF
20% NOTICE OF PROPRIETARY PROPERTY
A
50V
2 CERM
603
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

APPLE COMPUTER INC.

D 051-6130-C ACI: C
ECS:1.0
SCALE SHT OF
NONE 25 53

8 7 6 5 4 3 2 1
 CR-26

8 7 6 5 4 3 2 1

D D

INTUSB

40D6 36C6 35D4 35B5 35B3 34B2 28C5 25B4 22B1 21D7
L74
400-OHM-EMI
15D7 15D3 15C2 14D2 14C3 14B3 13D6 13C8 13C3 13B8 +3V_MAIN
8D4 8B6 7D4 7D2 7C7 7B4 7B2 6D4 6B5 5D6 3A4 1 2 +3V_MAIN_USB
13A8 11C8 11B8 11A5 10D7 10D4 9D3 9D2 8D7 8D6 SM
21C7 21C3 20C3 20C2 20B3 19C3 18C7 18B6 18A4 16D4 BK2125HS601-T TAIYO YUDEN NOSTUFF NOSTUFF
46B7 C490
1 C485 1
10PF 0.01UF
5% 20%
50V
2 CERM 2 50V
CERM
603 603
BT_CHGND
39D2 26C4 26B5 26B4

INTUSB

L76
R579 30-OHM-EMI
24 1 2 USB_DBM_B
13C5 USB_DBM 1 2 USB_DBM_A
5% SM-1
1/16W BLM11P300SPT MURATA INTUSB
MF
603
PLACE CLOSE TO PANGEA
1
R351 1 C488
15K 33PF
C 5%
1/16W
MF
5%
50V
2 CERM
C
603 26C5
2 603 BT_CHGND
26B4
26B5
39D2

INTUSB

L75
R578 30-OHM-EMI
USB_DBP
24 1 2 USB_DBP_B
13C5 1 2 USB_DBP_A
5% SM-1
1/16W INTUSB
MF BLM11P300SPT MURATA
603
PLACE CLOSE TO PANGEA
1
R362 1 C489
15K 33PF
5%
5%
1/16W 2 50V
CERM
MF 603
2 603 26C5 INTUSB
BT_CHGND 26B5
26C4
J101
39D2 F-RT-SM04B-SRSS-TB
SM1
5

1
INTUSB
L73 2
400-OHM-EMI 3
1 2 USB_B_GND 4

B SM
BK2125HS601-T TAIYO YUDEN NOSTUFF NOSTUFF 6
B
1 C486 1 C491
10PF 0.01UF
5% 20%
2 50V
CERM 2 50V
603 CERM
603
BT_CHGND
39D2 26C5 26C4 26B4

IRDA/BT USB CONNECTOR

DESCRIPTION:

ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC

A NOTICE OF PROPRIETARY PROPERTY
A
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

D 051-6130-C ACI: C
APPLE COMPUTER INC. ECS:1.0
SCALE SHT OF
NONE 26 53

8 7 6 5 4 3 2 1
 CR-27

8 7 6 5 4 3 2 1

D D
NC_LP1_5VTAP

PLUS5VTAP
U31 L45
LP2951 1000-OHM-EMI PLACE THESE CAPS NEAR TAS3004
SOI 46C7
46C7 28C6 28B8 +5V_MAIN_A 8
IN OUT
1 46C7 +AUD3.3V 1 2 FIL2_AUD3.3V
2 5 NC_ERR1 SM
NC_LP_S
SENSE ERR C453 1C420 1 C422
3
SHUT FDBK 7 0.01UF 1 C447 0.01UF 4.7UF
FDBK1 1 2 1
R511 10UF 20% N20P80%
GND N20P80% 10V
1 C468 100K 2 16V L47 2 50V
CERM 2 CERM
20% CERM 805
1.0UF 4 50V 1%
1/16W 1206 1000-OHM-EMI 603 SPKR_STAR_GND 27B3 27B4 27C3 27C6 28B3 28B8 28C4 28C8 29A5 29C2 39B8 46D7 NOSTUFF
N20P80% CERM MF
2 16V 603 1 2 27C2 27B6 FIL2_DIG3.3V 46C7 27C5 27B6 FIL2_DIG3.3V R1006
CERM 2 603
805 SM 46C7 0
L46 C1000 1 2
1
R514 1000-OHM-EMI 0.1UF 5%
1 2 1/16W
60.4K SPKR_STAR_GND MF
1
1%
1/16W
+3V_SLEEP 1 2
R1000 1 C1001 17 35
603
MF SM 24.9K 1000PF 20%
25V
NOSTUFF 1% 5% DVDD AVDD
2 603 1/16W 25V
2 CERM
CERM
MF 805
603 AINLM 46 AINLM AOUTL 39 AOUTL 28A8 28D8
2 603
35D4 C419
1 1 C408 AINLP 47 AINLP U300
34A8 29A5 29C2 0.01UF 4.7UF
7B7 SLEEP
20% N20P80% AINRM 43 AINRM
TAS3004 AOUTR 37 28B8 28D8
28B3 28B8 50V 10V PQFP AOUTR
21B6 SPKR_STAR_GND 27B3 27B4 2 CERM 2 CERM 42
35C4 6 603 805
AINRP AINRP
27C3 27C4
38B8 28C4 28C8 1
R1001
C PLUS5VTAP 39B8 46D7
1 C1002 LINA 1 LINA C
U33 24.9K 1000PF
1% 5% 48
LP2951 1/16W 25V
LINB LINB
MF 2 CERM
8 SOI 1
29C3 17D7 17C7 +6V_AUDIO
IN OUT +AUD5V 29B3 29C3 29D5 46C7 2 603 603 40 RINA
46C7 34D3 29D5 2 5 NC_ERR2
3
SENSE ERR
7
C461
0.01UF
29B3 1 C1003 1C1004 MIC_IN 41 RINB
R1007
SHUT FDBK 0.1UF 0.1UF
GND FDBK2 1 2
1 C449 46D7
13B4
N20P80% N20P80%
SCR_DATAIN 22 SDIN1 SDOUT0 25 1
47 2 KW_AUD_DTI 13B4
10UF 39B8 16V 2 16V
1 C472 20%
N20P80% 29C2
2 CERM
603
CERM
603 23 SDIN2 SDOUT1 26 5%
1.0UF 4 50V 2 16V
CERM 29A5
NC 1/16W
N20P80% CERM SDOUT2 24 MF
1210_1 28C8 NC
2 16V
CERM 603 28
603
805 28C4 NC GPI0
1
28B8
28B3
R1004 NC
29 GPI1
INPA 5
0 30 GPI2 NC
27C6 5% NC
27C4 1/16W 31 GPI3
MF NC 19
27C3 32 GPI4 LRCLK/O SCR_SYNC 13B4
2 603 NC
27B3 SPKR_STAR_GND
33 GPI5 12
NC MCLKO NC

SCL 15 KW_IIC_CLK 13B5 15A8 16C3

1
46C7 27C5 27C2 FIL2_DIG3.3V
R1002 21 IFM/S
10K 27 ALLPASS SCLK/O 20 SCR_SCLK 13B4
1 C1025 5%
1/16W
0.01UF MF CAP_PLL 10 CAP_PLL SDA 16 KW_IIC_DAT 13A5 15A8 16C2
20%
2 603 11
2 50V
CERM CLKSEL 2
603 TAS_CS1 7 CS1 VRFILT VRFILT

VCOM 38 VCOM
VREFM 45
NOSTUFF VREFM
1
R1003 C1008 VREFP C1010 1C1011
5
10K C1007 1 1
44 VREFP 1
0.1UF
1
C10121 C1013
AUDIO_HP_MUTE_L 1
74LVC1G32 5% R1005
1
1.0UF 0.1UF
10UF
20% N20P80%
22UF
20%
0.1UF
N20P80%
28C8 13C7 SM 5.11 PANAUDCLKOUT 13 XTIN1/MCLK 2 16V
1/16W
MF
N20P80% N20P80% 2 6.3V
TANT CERM 2 10V 2 16V
CERM
4 TAS_RESET_L 27B3 1% 2 16V 2 16V 14 603
TANT
2 603 1/10W CERM CERM XTLIN0 SMA SMB 603
B 28B8 13C7 AUDIO_AMP_MUTE_L 2 32
1 C1005
0.01UF
FF
2 805
805 603 NC
8 PWR_DN NC0 34
NC
B
5% 36
3 U302 2 50V 27B5 TAS_RESET_L 6 RESET NC1 NC
CERM 1 C1009
603 1 C1006 0.1UF 9 TEST
1.0UF N20P80%
16V
N20P80%
16V
2 CERM AVSS
2 CERM 603 DVSS AVSS (REF)
805
18 4 3

46D7 39B8 SM
28B3 27C6 27C4 27C3 27B4 SPKR_STAR_GND 1 2
29C2 29A5 28C8 28C4 28B8 AUD_AVSS_REF

XW100

SNAPPER, CONTROL & D/A

DESCRIPTION:
ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
A NOTICE OF PROPRIETARY PROPERTY
A
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

ACI: C
APPLE COMPUTER INC.
D 051-6130-C ECS:1.0
SCALE SHT OF
NONE 27 53

8 7 6 5 4 3 2 1
 CR-28

8 7 6 5 4 3 2 1
C1014
180PF
C605 R568
1 2
0.47UF 20.5K2
1 2 5%
27C1 AOUTL 1 50V
CERM
28A8
20%
1%
1/16W
C1023 603
16V
CERM
MF 180PF R566
805
603 1 2 32.4K2
1
C606 R569 5%
50V
1%
0.47UF 20.5K2 CERM
1/16W
MF
27C1 AOUTR 1 2 1 603 603
28B8 1% R567
20%
16V
1/16W 32.4K2
1
CERM
MF
603 DZ5
D
805 1%
1/16W
MF
603
L901
100-OHM-EMI
SOT23
15V
2
D
1 2 GND_SLINK_F 3
CHGND3
28D3
SM 1 25B2 28A4 28A5
1 28B1 28B2 28C1
R570 L69
100K 1000-OHM-EMI 28D1 28C1 28B2 28B1 28A5 28A4 25B2 CHGND3
5%
1/16W
MAX4298 C978
3 U36 1 2 21C3 21D2 25D8 35B2 35B5 40C6 1000PF
NOSTUFF MF IN1 VCC 10 +5V_IO_SLEEP

1
1 2
2 603
D100 8 IN2 SOI OUT1 1 SM LINE_OUT_L 28B4
NOTE: L37 NEAR J13 DZ4 1 C352 1 C351
HP_MUTE 6
4
MUTE
BIAS
OUT2
SVCC
9
5
LINE_OUT_R 28A4
L37
SOT23
15V
5%
100PF
50V
2 CERM
0.001UF
20%
2 50V
CERM
5%
25V
CERM 10 J900
1N914 3 Q81 7 CBYPASS GND 2 D37 100-OHM-EMI 603 603
603
7 TH

3
SOT23 SOT23 LINE_OUT_COM
D
2N7002 29C2 29A5 28C8 28B8 28B3 27C6 27C4 27C3 27B4 27B3 SPKR_STAR_GND 1 2 6
1 3
R1033 SM 46D7 39B8 SM 28B2 LINE_OUT_LO 2
100K 4
AUDIO_HP_MUTE_L 1 G S
BAS40-4 L34 NC 5
5% 1 C607 1 C608 1 C609 1 C610 F100 L900 FERR-220-OHM 28A2 LINE_OUT_RO 3
1/16W 2 1UF 1UF 1 100-OHM-EMI
1
R556 MF
603 C1026 20% 20%
0.01UF
20%
4.7UF
N20P80%
C611 0.5AMP
2 28C2
25B4 16D4 13C5 SCC_RXDA 1 2 SLINK_F 1
10V 10V
2 CERM 50V 10V 220UF +3V_MAIN 1 2 +3V_SLINK 1 +3V_SLINK_F SM 28C4 +3V_SLINK_F 8
100K 0.1UF 2 CERM 2 CERM 2 CERM 20%
SM
5% 20% 805 805 603 805 2 6.3V
1/16W
MF
16V
CERM
POSCAP
SMD SM DZ3 9
2 603
603 SOT23
15V
DZ2
SOT23
2 15V
SPKR_STAR_GND 2
3
38B8 38B3 37D4 37B4 36B3 35D8 34C2 24D2 19D4 17B7 16C2 +5V_MAIN 3
46C7 40D6 38C5 1
1
1
R962 1 C977
25MIL TRACE TO C101 PIN1 5%
100K R139 1000PF C371
34C3 +5V_MAIN_P 470K 1 2
C 1/16W
MF
2 603
1%
1/16W
MF 5%
100PF
1 2
C
2 603 25V

1XW10 2
13B7 AUDIO_HP_SENSE_L CERM 5%

JUMPER
603 50V
L38

OPEN
3 R138 100-OHM-EMI C355 CERM
603
100K 2 1000PF
C393 46C7
28B8 Q900 D 1 1 2 1 2 CHGND3 25B2 28A4 28A5 28B1
100PF 27D8 2N7002 5% SM 28B2 28D1 28D3
+5V_MAIN_A SM 1/16W 5%
1 2 S G 1 MF 25V
603 CERM
603
5%
50V C395 1 1 C391 2 1 C976
CERM 0.1UF 1UF 100PF
603 N20P80% 20%
16V 5%
C397 CERM 2 2 10V
CERM 2 50V
0.047UF R424 R423 603 805 CERM
603
28D8 27C1 AOUTR 1
20.5K2 SCREAMER_OUT_CL_F 1
36K 2
CP1
I494
1% 5% FINGER_PAD
5% 1/16W 1/16W
16V MF MF 1
CERM 603 603
603
35B8 SLEEP_LS 28D3 28D1 28C1 28B2 28A5 28A4 25B2 CHGND3 2
R131
25MILS TRACE 1
0 2 R_SPKR_POS 3
46C7 28C6 27D8 +5V_MAIN_A
5% C385 L41
1
R399 13
1/16W
MF 33UF R134 400-OHM-EMI
4 603 1 2 16 1 2 LINE_OUT_LO
100K VDD1 VDD C366 1 28D5 LINE_OUT_L COLO 1 2 AOLO 28C2
1% SM
NOSTUFF 1/16W 6 IN_A- OUT_A- 5 10PF 5%
1
MF 20% 1/16W
D101 2 603 8 IN_A+ OUT_A+ 3 5%
50V
CERM
2 20V
TANT 1
MF
603
DZ6 1 C370
10 BYPASS
CRITICAL 603 SMD R135 SOT23
15V
3
5%
100PF
U25 4.7K 50V
1N914
AMP_MUTE
AUDIO_LM4863_SOI R132 5% 2 CERM
0 1/16W 603
B SOT23
3 11
9
IN_B-
IN_B+
SOI
OUT_B-
OUT_B+
12
14
R_SPKR_NEG_UF 1
5%
2 R_SPKR_NEG MF
2 603
2
B
R1034
D Q82 1/16W
MF
39B8 46D7 CHGND3 25B2 28A4 28A5 28B1 28C1 28D1 28D3
2N7002 1 603 J14 SPKR_STAR_GND 27B3 27B4 27C3 27C4 27C6
AUDIO_AMP_MUTE_L
100K 1 G S
SM SHUTDOWN
SM-2MT 28B8 28C4 28C8 29A5 29C2
16 HP_IN 6
5%
1 1/16W 2 GND1 GND GND2 1 1
R571 MF
603 C1027 1 C398 2 15 C365 1
4
R136 DZ7 1 C86
100K 0.1UF 0.33UF 7 4.7K SOT23 3 100PF
5%
1/16W 20% 20% 10PF 3 5% 15V 5%
MF 16V 2 16V 5% 2
1/16W 50V
2 603
CERM
603
CERM
805 XW11
SM
50V
CERM
603
2
C384
MF
2 603 L39 2 CERM
603
SPKR_STAR_GND 1 2 PS_GND
1
33UF R137 400-OHM-EMI 2

1 2 CORO 16 1 2 LINE_OUT_RO
25MILS TRACE 25MIL TRACE TO C101 PIN2 28D5 LINE_OUT_R 1 2 AORO 28C2
C402 R431 R428 5
5% SM
0.047UF 20.5K 36K 20% 1/16W
28D8 27C1 AOUTL SCREAMER_OUT_CR_F 28B2 28B1 28A4 25B2 CHGND3 20V MF
603
28D3 28D1 28C1 TANT
1% 5% SMD
5%
16V
1/16W
MF
1/16W
MF
R130
CERM 603 603 L_SPKR_NEG_UF 1
0 2 L_SPKR_NEG
603
5%
C396 1/16W
MF
100PF 603
1 2

5%
R129
50V 1
0 2 L_SPKR_POS
CERM
603 5%
1/16W
MF
603
DESCRIPTION:
1 C368 ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
10PF
A C367 1
5%
50V
2 CERM
NOTICE OF PROPRIETARY PROPERTY
A
10PF 603
5%
50V 2 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
CERM PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
603
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
CHGND3 25B2 28A5 28B1 28B2 28C1 28D1 28D3 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

SNAPPER AUDIO, SPEAKER & HEADPHONE DRIVER APPLE COMPUTER INC.

D 051-6130-C ACI: C
ECS:1.B
SCALE SHT OF
NONE 28 53

8 7 6 5 4 3 2 1
 CR-29

8 7 6 5 4 3 2 1

D D

46C7 34D3 29C3 27C8 17D7 17C7 46C7 29C3 29B3 27C6 +6V_AUDIO +AUD5V

1
R1008
15K
5%
1/16W
MF
2 603
C1015
3 10UF
1 2 46C7 29D5 29B3
Q300 1 34D3 29D5 27C8 17D7 17C7 +6V_AUDIO 27C6 +AUD5V

2N3904 N20P80% 46C7 NOSTUFF

16V 1
SM
2 1
CERM
1206
R1013
R1009 15K
5%
36K 1/16W
5% MF
1/16W
MF 2 603
3
2 603
1
R1010 C1016 NOSTUFF
2.2K 3 4.7UF Q302 1
5% 1 2
L60 L57 1/16W
MF Q301 1 2N3904
1000-OHM-EMI 1000-OHM-EMI SM NOSTUFF
C MIC1HIGH 1 2 M1FH 1 2 MIC_POS_F
2 603 2N3904
SM
2
N20P80%
10V
CERM
2
R1015 1 1
NOSTUFF

C1018
C
SM SM 805 82K 10UF
5%
N20P80%
1 C474 NOSTUFF 1/16W
MF 16V
2 CERM
47PF 1
R1014 2 603 1206
10%
2 50V 1 3.3K
CERM
603 1 C1017 R1011 1
R1012 5%
1/16W
0.047UF 1.6K 47K MF
5% 5%
10% 1/16W 1/16W 2 603
50V MF MF
2 CERM
805 2 603 2 603 SPKR_STAR_GND 27B3 27B4 27C3 27C4 27C6 28B3 28B8 28C4 28C8 29A5 39B8 46D7
J17
SM-2MT
4
R1020
L59 L56 1
0 2 +AUD5V 27C6 29C3 29D5 46C7
1 1000-OHM-EMI 1000-OHM-EMI
M1FL 5%
2 MIC1LOW 1 2 1 2 MIC_GND_REF 29B5 1/16W
MF
3 SM SM 29B6 1 C1019 603
0.1UF
1 C469 U301 20%
5 47PF 3 5 TLV2361 2 25V
CERM
10% SOT23-5 805
50V
2 CERM 4
603 R1016
1
47K 2 1
5% 2
1/16W
MF 29B6 MIC_GND_REF
603
R1017 R1018 C1022
0.1UF
L300 L58 1
1K 2 1
100K 2 1 2 MIC_IN 27C3
1000-OHM-EMI 1000-OHM-EMI R520
1 2 1 2
100 MIC_GND_REF
5% 5%
10%
29B5 29B6
B MIC1SHLD
SM
SM
MIC1S1 1
5%
1/16W
2 1/16W
MF
603
1/16W
MF
603
50V
CERM
805
B
1 C1024 MF C1021
47PF 603
47PF R1019
10%
50V 1 2 1
10K 2
2 CERM
603 1 C1020 10%
50V
5%
1/16W
4.7UF CERM
MF
603
N20P80% 603
10V
2 CERM
805

XW101
SM

SPKR_STAR_GND 27B3 27B4 27C3 27C4 27C6 28B3 28B8 28C4 28C8 29C2 39B8 46D7

DESCRIPTION:
ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
A NOTICE OF PROPRIETARY PROPERTY
A
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

ACI: C
APPLE COMPUTER INC.
D 051-6130-C ECS:1.0

SNAPPER AUDIO, MICROPHONE PREAMP SCALE

NONE
SHT
29
OF
53

8 7 6 5 4 3 2 1
 CR-30

8 7 6 5 4 3 2 1
POWER SYSTEM ARCHITECTURE

D AC BACKLIGHT INVERTER D
ADAPTER INPUT14_28V
IN

BUCK PBUS
MAIN 3V/5V
REGULATOR
DCDC_EN SD +6.5V ---SOUND
CHARGER DC/DC CONVERTER
(LCT1625) DCDC_EN ON3 +3.3V ---SDRAM,PANGEA PLL,USB,FW
DCDC_EN ON5 +5V ---USB,HD,DVD/CD,MODEM

VL
C C
R
DCDC_EN_L DCDC_EN
VALID SLEEP
ADAPTER
VOLTAGE RUN/SS
DETECT CPU_VCORE (+1.4V/+1.2V)
DC/DC
(MAX1717)
CPU_VCORD_H
SHDN

DCDC_EN
B B

DC/DC ATI_CORE_MAIN
(MAX1715)
+2_5_MAIN NOSTUFF

ATI M128/ PANGEA R

SHDN
9.0V-12.XV 1.8V REG +VIO_CPUBUS_MAIN
(SONY=12.6) POWER SYSTEM ARCHITECTURE
(PANASONIC=12.45) DCDC_EN +VIO_CPU_SLEEP
DESCRIPTION:

ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC

A A
3S 2P LITHIUM ION NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
SLEEP PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

D 051-6130-C ACI: C
NOMINAL 11.1V APPLE COMPUTER INC.
SCALE SHT OF
ECS:1.0

NONE 30 53

8 7 6 5 4 3 2 1
 CR-31

8 7 6 5 4 3 2 1

CHARGE_LED_L 21C6
1 C107
470PF
10%
33A4 32D2 31D3 31C5 21D8 21D6 21C6 21B8 21B7 21B1 21A4 +3_3V_PMU
40C4 36D2 33C7 33B6
2 50V
CERM
603
+28V_INPUT14_SW 32D8
BATT_CHGND 31C6 33B2 33C4 1
J20 34C6 34D8 36C6 37A7 37B1 37B8 37C4 37D8 39A6 39B3
PS_GND 28B5 31C2 31C4 32A2 32A3 32A7 32B1 32B3 32B8 32C1 32C6 32D1
R142
DF14-8P-1_25H 330K
33A4 33A6 33B3 33B6 33B7 33C7 34A2 34B3 34B4 34C1 34C3 5%
TH L13 1/16W
D
D 1
2
FERR-250-OHM
1 2
Q54
SI4435DY
MF
2 603
PS_GND_IN SOI
3 SM
4 L12 3 S3 D4
8 D19 Q55
5 FERR-250-OHM 32A8 2 S2 D3 7 +ADAPTER_SW 1
SM
2
2
TP0610
6 PMU_CHRG_EN 1 SM
6 +ADAPTER_IN 1 2 33D4 +ADAPTER 1 D2
S1 5 G S
7 D1
SM
GATE 30BQ040

330K 2
NOSTUFF

R114
8 AC_ID 21B2 C87 D

1/16W
1
31B5 1 C97 0.1UF 4 40C4 3

603
5%
MF
3
1 C631 1 C630 1 C622 1 C98 470PF
10%
20%
50V +3_3V_PMU 32D2 33A4 33B6 33C7 36D2 D Q21
470PF 10PF 470PF 470PF 50V CERM 2 1
21A4 21B1 21B7 21B8 21C6 2N7002 +3V_PMU_CHGR 32B8 32D2

1
10%
2 50V
5%
50V
10%
50V
10%
50V
2 CERM
603 33C4
805
R378 21D6 21D8 31C5 31D2 1 G S
SM
CERM 2 CERM 2 CERM 2 CERM 93.1K
603 603 603 33B2 1%

100K 2
603

R364
BATT_CHGND 31D7 AC_SW_G
1/16W 2

1/16W
MF
36D2 40C4

603
1%
MF
2 603
+3_3V_PMU 21A4 21B1 21B7 21B8 21C6 21D6 21D8
31D2 31D3 32D2 33A4 33B6 33C7 39A6 39B3

470K 2
R115
1
33B6 33B7 33C7 34A2 34B3 34B4 34C1 34C3

1/16W
PS_GND 28B5 31C2 31C4 31D6 32A2 32A3 32A7 32B1

603
CRITICAL

1%
MF
32B3 32B8 32C1 32C6 32D1 33A4 33A6 33B3
2 U7 34C6 34D8 36C6 37A7 37B1 37B8 37C4 37D8

PBUS_DIV

1
31C6 1V20_REF 4
LMC7211
1
R122 C364 1

AC_SW
SM
100K 0.01UF 1 GTR_THAN_13_0V 32C5 33C8
20% AC_VOLT 18A8

2
1%

R101
1/16W 50V
CERM 2 31B5

1/10W
3

10K
MF

805
603

1%
FF
2 603 3 5
2 U5 D
Q18 R379

1
4
31C4 1V20_REF LMC7211 2N7002 NOSTUFF
SM SM 1 1
412K 2 D18
1 1 G S 1 C383 R128 RUN/SS
C 3 2
0.1UF
20%
16V
1%
10K
1/16W
1%
1/16W
MF
1 C89
0.01UF
3

1N914
1 32B5
C
2 CERM MF 603
5 20% SOT23
603
R102 2 603

470K 2
2 50V

R127
CERM

1/16W
412K 2 603

603
1%
MF
1

2
R100

57.6K2
R376
1/16W
10K
1% 34B3 34B4 34C1 34C3 34C6 34D8 36C6 37A7 37B1 37B8

603

1/16W
1%
MF
1/16W PS_GND 28B5 31C2 31C4 31D6 32A2 32A3 32A7 32B1 32B3 32B8

603

1
1%
MF
MF
603 32C1 32C6 32D1 33A4 33A6 33B3 33B6 33B7 33C7 34A2
37C4 37D8 39A6 39B3
1

1
34C6 34D8 36C6 37A7 37B1 37B8 37C4 37D8 39A6 39B3
PS_GND 28B5 31C2 31D6 32A2 32A3 32A7 32B1 32B3 32B8 32C1 32C6 32D1
33A4 33A6 33B3 33B6 33B7 33C7 34A2 34B3 34B4 34C1 34C3
GREATER THAN 13.5V DETECT

R16
AC_ID 10K PMU_AC_DET
31D7 21B2 1 2 21B3
B 1%
1/16W
B
MF
603

R421
1K
31C5 18A8 AC_VOLT 1 2 PMU_AC_IN 21B3
5%
1/16W
MF
603

DC-JACK INTERFACE
DESCRIPTION:

ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC

A NOTICE OF PROPRIETARY PROPERTY
A
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

APPLE COMPUTER INC.

D 051-6130-C ACI: C
ECS:1.0
SCALE SHT OF
NONE 31 53

8 7 6 5 4 3 2 1
 CR-32

8 7 6 5 4 3 2 1
R167
BATT_ISNS 0.0252 BATT_LINE
1 33D8
2%
1W

5AMP-125V
MF

2
2512
31D1 +3V_PMU_CHGR

F2

SM-2
TABLE_5_HEAD

PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION 32B8

110S2873 1 CHIP RES 1/16W 1% 2.87K 0603 ACI R539 SLOW_CHRG
TABLE_5_ITEM

32A6 ITH_1625

1
TABLE_5_ITEM

110S2613 1 CHIP RES 1/16W 1% 2.61K 0603 ACI R539 FAST_CHRG +28V_PWRBUS_SW 32C7 +3_3V_PMU

PBUS_FUSE
D SWCHG
D
R175
Q29 8 1
820K 2 37D8 39A6
XW6 SI4435DY CRITICAL 37B1 37B8
39C6 39C3 38D6 38C4 38C3 37D8 34D8 34D5 34B4 24A4 19D4 +PBUS 1 2 SOI
V+
1%
1/16W
34D8 36C6
43A4 JUMPER
OPEN 8 U8 MF C159 34B4
1
33B7
34C1
33C7
3 S3 D4 MAX4172
603 0.1UF
7
HWCHG 20% 33A4 33A6
2 S2 D3 1
RS+
SOI
RS-
2 R178 16V
2 CERM 32B3 32B8
1 D2 6 20.5K2 603 32A2 32A3
1XW12 2 S1 1 PS_GND 28B5
D1 5 7 31C2
3 NC1 PG 1% 31C4 31D6
JUMPER GATE
31D2 +28V_INPUT14_SW OPEN
1
4
NC2 OUT
6
1/16W
MF 32A7
32C1
32B1
32C6
HWCHG R475 4
GND
603
C467 33B3

IBATTX0_65
470K 33B6
R477 R536 0.1UF 34A2 34B3
32D2 +28V_PWRBUS_SW 5%

IBATT_FB
0.05 1/16W
5 1
1K 2 IBATT_RC_COMP 34C3 34C6
MF
2 603
37A7
1% 1% 37C4
1W 1/16W 20%
MF
2512
1 C155 1 C429 1 C154 MF
603
16V
CERM
39B3
1.5UF 1 C153 1
C157 C149 1 603
20%
50V
1.5UF
20%
1.5UF
20% 1.5UF 100UF
BF_FET_G
0.01UF
R535 2 U11
2 CERM 50V 50V 20% 20% 1
10K 2 4
1812 2 CERM 2 CERM 50V
2 CERM
20%
2 35V
50V LMC7111 D35
1812 1812 ELEC CERM 2 1% SM
1 C438 1812 SM-1 603 1/16W 1 3 1

19.6K2
R519
NOSTUFF MF
1.5UF C451 C147 C446

1/16W
1 1 1 1

SWCHG
C143 1 R474 C430 603

603
20% 1 IBATT_SERVO 3 1N914

1%
MF
2 50V
CERM
1.5UF
20%
1.5UF
20% 20%
1.5UF 0.01UF
20% 31C1
GTR_THAN_13_0V 5%
330K 0.01UF SWCHG
5
SOT23
1812 2 50V 2 50V 2 50V 20% 1 C161

15.8K2
50V 1/16W

R540
33C8 ICHRG_REG

1
CERM CERM CERM CERM 2 MF 2 50V 1UF

8.87K2

2.61K2
1812 1812 1812 CERM

1/16W
R181

R539
603 2 603

603
603 20%

1%
MF
1/16W

1/16W
SWCHG

HWCHG
10V

603

603
2 CERM 39B3

1%
MF

1%
MF
OMIT
8 HWCHG
1
R473 3 805 34D8
37A7 37B136C6

1
FET_DRAIN 33B7
34A2 34B333C7
CRITICAL 330K D30

1
32B3
32C6 32D132B8
C V+
U9
5%
1/16W
MF 1
1N914
SOT23 PS_GND 28B5
31C4 31D6
32A2
32A7 32B1
31C2
32A3
C
MAX4172 2 603 3 33A4
33B3 33B633A6
37D8 37C4 37B8 37B1 37A7 36C6 34D8 34C6 34C3 34C1 34B4
34C3 34C634C1
1
RS+SOI RS-
2
32C1 32B8 32B3 32B1 32A7 32A3 32A2 31D6 31C4 31C2 28B5 PS_GND D Q65 R173
SWCHG
37B8
37D8 39A637C4
34B4 34B3 34A2 33C7 33B7 33B6 33B3 33A6 33A4 32D1 2N7002 32A7 CURRENT_ADJ
PG
7
PWR_STABLE_DELAY 1
SM 100K 2 21C3 CHARGE_I 34B4
HWCHG 3 NC1 39B3 39A6 G S 1
34A2
C152 4
NC2 OUT
6
1 C431 1%
1/16W
SWCHG 33B7
0.01UF GND
2 37B8 MF
1
R174 33B3
20%
50V
0.047UF 34C3 603
10K 33A4
5%
CERM 2 16V
33B7 5% 32C6
39B3 603 5 CERM 32C6 1/16W
32B8
1.1K 2
R488

37C4 37B8 603 MF

HWCHG

32A2 32A7
1/16W

603
36C6 34D8 31C4 2
603
1%
MF

34C1 34B4 PS_GND 32A2

28B5 31C4
33C7 33B7 31C2 19D2 CHGR_OUT PS_GND 28B5
1

33A6 33A4 31D6 31C2

32C1 32B3 32A3 32A7 32B1 32B8 32C1 31D6
32A3 32A2 32D1 33A4 33A6 33B3 33B6

48.7K2
32A3

R493
31C2 28B5 PS_GND 33C7 34A2 34B3 34B4 34C1

1/16W
32B3

0.1%
31D6 31C4

603
34C6 34D8 36C6 37A7 37B1

MF
32B1 32A7 32C1
37C4 37D8 39A6 39B3 32D1
32D1 32C6 33A6

1
33B6 33B3 33B6
34B3 34A2

PBUS_DIV1
34C6 34C3 33C7
37B1 37A7 5 6 7 8 34B3
39A6 37D8 34C1
2
R171

34C3
1/16W

IINX0_62 34C6
603

1
C151
5%
MF
1

31D1 +3V_PMU_CHGR Q72 100UF

34D8
36C6
32D2 1625_TG SI4410DY 20% 37A7
1

4 2 35V

100K 2
R494
SOI ELEC 37B1
1

1/10W
IAC_RC_COMP

SM-1 37B8

.1%

805
31C1 RUN/SS

MF
EXTVCC 37C4
B U32 D31 1 2 3 21C3 CHARGE_V 37D8 B

1
16
LTC1625
10 SM 39A6
1625_VIN VIN SSOP BG 1 2 1625_BST 39B3
15 TK CRITICAL TG 13
1 C156 L17 1625_VFB 1
R507
C160

32A4 1625_INTVCC 2 7
0.1UF

SYNC VOSENSE 0.33UF 15UH

R177 MBR0540 OMIT 1K
HWCHG

3 RUN/SS INTVCC 11 20% 1%

CERM

HWCHG 150 R1557 2 16V 1 2 1

R495 1/16W
20%
2 16V
603

2 1 1625_COMP 5 CERM
HWCHG
R172 4
ITH
12 0 805 SM-2 15.4K MF
2 603
IAC_FB 1K 1% FCB BOOST 1625_BOOST 1 2 0.1%
1

1
R537 1 2 1/16W
MF 8 VPROG SW 14 5% CHGR_VSW 1/16W
4.99K2

FF
R510

24.9K 1% 603 1/16W

2 603
1/16W

1% 1/16W MF
_VCHRG
603

SGND PGND
1%
MF

1/16W MF 603
MF HWCHG 603
HWCHG
2 603 R534 HWCHG 1 C464 6 9
U34 1625_INTVCC 32B6 5 6 7 8
C433
1

10K 2 1
1 2 4
LMC7111 D11 0.1UF
20% C463 1 4.7UF
1 C442 3
COMP_RC

BAT54 4.7UF

MBRS140T3
SM 50V 20%
HWCHG
1%
1/16W 1 3 1 ITH_1625 2 CERM
805 32D1
4700PF
5%
25V
2 CERM 20% Q69 D
MF 25V Q73 25V 2N7002

2
2 CERM
C479 VCHRG_GATE

D34
1 603 CERM 2 1812 OMIT SM
1_02V_AUX 3 603 SI4410DY 1812 S G 1

SM
SOT23
0.1UF
20%
1625_BG 4
SOI
1
R496
16V HWCHG 5
C450 1 1 C458 NOSTUFF 39A6 39B3 301

1
2 CERM 2
603
1
R176 ADAPTER_I_REG
4700PF 470PF 1 1 C1543
37B1 36C6 37A7 1% 1 C454
14.3K 5% 10% C455 0.01UF
34C6 34C1 34C3 1/16W
MF 0.001UF
1% 25V 2 2 50V 4.7UF 1 2 3 34A2 33B7 33C7 20%
1/16W CERM CERM 20% 10%
33A4 32C6 32D1 2 603 2 50V
MF 603 603 2 10V 2 50V CERM
34C6 34D8 36C6 37A7 TANT CERM 32B8 32B1 32B3 603
2 603 SMB 603
31C4 28B5 31C2 PS_GND
32D1
HWCHG
PS_GND 28B5 1625_SGND 32A7 31D6
32C1
32A3
31C2 31C4 31D6 32A2 32A3 32A7 32B1 32B3 32B8 32C1 32C6 R517 39B3
1 33A4 33A6 33B3 33B6 33B7 33C7 34A2 34B3 34B4 34C1 34C3 33B6 33B3 33A6 BATTERY CHARGER
R180 37B1 37B8 37C4 37D8 39A6 39B3 1
0 2
37D8 37C4 37B8 37B1 37A7 36C6 34D8 34C6 34C3 34C1 34B4 34B3
32.4K 32C6 32C1 32B8 32B3 32B1 32A7 32A2 31D6 31C4 31C2 28B5 PS_GND 34D8
DZ1
SOT23
1%
1/16W
5% 39A6 34B4 34B3 34A2 33C7 33B7 33B6 33B3 33A6 33A4 32D1 37D8 37C4 37B8
DESCRIPTION:
1/16W ENGINEERING RELEASE P72/73 MLB & SCHEMATIC
31D4 +ADAPTER_SW 3 1 MF MF
A 2 603
CURRENT_ADJ 32C3 PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S)
603

BOM OPTION
TABLE_5_HEAD

NOTICE OF PROPRIETARY PROPERTY

A
1N5248B
TABLE_5_ITEM

3 103S0568 1 CHIP RES 1/16W .1% 15.4K 0603 ACI R495 3SBAT THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
D Q31 103S0612 1 CHIP RES 1/16W .1% 11.3K 0603 ACI R495 4SBAT
TABLE_5_ITEM

AGREES TO THE FOLLOWING

2N7002 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
SM
ZENER_GTR_THAN_20V 1 G S 110S3012 1 CHIP RES 1/16W 1% 301 0603 ACI R496 3SBAT
TABLE_5_ITEM

II NOT TO REPRODUCE OR COPY IT

TABLE_5_ITEM

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

R179 2
34C3 34C6 34D8 36C6 37A7
110S1502 1 CHIP EWS 1/16W 1% 150 0603 ACI R496 4SBAT

1
3.3K 2 PS_GND 28B5 31C2 31C4 31D6 32A2 32A3 32A7 32B1 32B3 32B8 32C1 32C6 SIZE DRAWING NUMBER REV.
ACI: C
5%
1/16W
32D1 33A4 33A6 33B3 33B6 33B7 33C7 34A2 34B3 34B4 34C1
37B1 37B8 37C4 37D8 39A6 39B3 APPLE COMPUTER INC.
D 051-6130-C
ECS:1.0
MF
603 SCALE SHT OF
NONE 32 53

8 7 6 5 4 3 2 1
 CR-33

8 7 6 5 4 3 2 1
D20 D21 D22
1N914 1N914 1N914
31D6 +ADAPTER 1 3 ADAPT_D1 1 3 ADAPT_D2 1 3

BATTERY INTERFACE SOT23 SOT23 SOT23

32D1 BATT_LINE

D R490
OMIT
D32
SM
D
BATT_RES 1
56 2 BATT_POS_F 1 2 REG2_IN 36D8
5%
1W
FF MBR0540
2512
OMIT

6
R483
NOSTUFF NOSTUFF NOSTUFF
1
56 2

D1

S1

D2

S2
1 C435 1 C436 1 C441 Q67 5%
0.01UF 0.01UF 0.01UF 1W
20% 20% 20%
2 50V 2 50V 2 50V
FDS6975 FF
2512
CERM CERM CERM SM

G1

G2
603 603 603 34A2 34B3 34B4 OMIT
32D1 33A4 33A6 R506
32A7 32B1 32B3 56

3
PS_GND 28B5 31C2 31C4 1 2
STATE +3_3V_PMU GTR_THAN_13_0V PMU_CHRG_BATT_0
31D6 32A2 32A3 5%
1W
32B8 32C1 32C6 FF ONLY
33B3 33B6 33B7 2512
BATTERY H L L
34C1 34C3 34C6
34D8 36C6 37A7 PWR_FET_S2 D10
SM 1
37B1 37B8 37C4 ONLY
D33 37D8 39A6 39B3 2 1
ADAPTER H H L
1N914 1
R169 L50
21C3 PMU_CHRG_BATT_0 1 3 AC_OR_BATT_PWR 470K 30BQ040 60-OHM-EMI
1%
1/16W
SM CHARHER H H H CHANGE L
SOT23 MF
2 603 Q30 2
SI4435DY
SOI
GTR_THAN_13_0V C459 1 1
R168
33B6 36D2 0.01UF 330K 8
31D2 31D3 20% 5% 3 S3 D4
50V 7
21C6 21D6 CERM 2 1/16W 2 S2 D3
MF
+3_3V_PMU 603 6
C 21A4
21B7
21D8
21B1
21B8
31C5
2 603 1
S1
D2
D1 5 33B2
31C6 BATT_CHGND
C
1 32D2 33A4 ADAPTER_PWR_DRAIN GATE 31D7
3 1
R459 R163 40C4 4 1 C625

1
330K

R512
39.2K2
D29 470K 5% 10PF 1 C629

1/16W
1N914

603
5% 1/16W 5% 10PF

MF
1%
3
SOT23 1/16W MF 2 50V
CERM 5%
1 MF
2 603
2 603 D Q71
1 C626 603 2 50V
CERM
R162 2N7002 10PF 603
5%
BATT_FET_DRAIN 1
10K 2 1 G S
SM
2 50V C144 1 1 C140 C148 1 1 C623 1 C624 1 C146
CERM
1%
603 47PF 47PF 1000PF 470PF 10PF 47PF OMIT
10% 10% 5% 10%
1/16W
MF
ADAPTER_PWR_SW 2 50V
CERM 2
50V
2 CERM
25V
CERM 2
10%
2 50V
5%
50V
2 CERM 2 50V
CERM J16
3 CERM
603 603 603 603 603 603 603 M-ST

35.7K2 BYPASS_R_GATE
TH
D
Q28 BATT_CHGND 7
2N7002 34D8 36C6 37A7 37B1 37B8 37C4
BATT_RC 1 G S
SM
32D1 33A4 33A6 33B3 33B7 33C7 BATT_POS 1
PS_GND 28B5 31C2 31C4 31D6 32A2 32A3 BATT_IN 2
32A7 32B1 32B3 32B8 32C1 32C6
1 C427
2
34A2 34B3 34B4 34C1 34C3 34C6 BATT_CLK 3

0.047UF 37D8 39A6 39B3 BATT_DATA 4

5%
2 16V
PMU_BATT_DET_L 5
CERM
603 BATT_NEG 6
34C6 34D8 36C6 37A7 37B1 37B8 37C4 37D8 39A6 39B3

R170
PS_GND 28B5 31C2 31C4 31D6 32A2 32A3 32A7 32B1 32B3 32B8 32C1 32C6 BATT_CHGND 8
C627

1/16W
1
32D1 33A4 33A6 33B3 33B6 33C7 34A2 34B3 34B4 34C1 34C3

603
R4671

1%
MF
1 C136 10PF
470K 47PF
5% 1 C132 1 C628
5% 2 50V 10PF

1
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
TABLE_5_HEAD

1/16W 10% CERM

603
47PF 5%
MF 2 50V
CERM
10%
50V 2 50V
603 2 CERM
110S4755 1 CHIP RES 1/16W 1% 475K 0603 ACI R513 3SBAT
TABLE_5_ITEM

L49 603 2 CERM

603 603
TABLE_5_ITEM
100-OHM-EMI
B 110S6655 1 CHIP RES 1/16W 1% 665K 0603 ACI R513 4SBAT 21B2 SMB_CLK 2 1
B
TABLE_5_ITEM

21B3 SM BATT_CHGND 31C6 31D7 33B2 33C4

101S6561 1 CHIP RES 1W 5% 56 2512 ACI R490 3SBAT
32A2 32A3 32A7 32B1 32B3 32B8 32C1 32C6 32D1 33A4 33A6
PS_GND
TABLE_5_ITEM

28B5 31C2 C132,C628 STUFF WITH 0 OHM RESISTOR FOR EMC FIX
101S6102

101S6561
1

1
CHIP RES 1W 5% 100 2512 ACI

CHIP RES 1W 5% 56 2512 ACI

R490

R506
4SBAT

3SBAT
TABLE_5_ITEM
BYPASS_R_DRV 100-OHM-EMI
L48 31C4
33B6
31D6 AND CONSIDER FOR CURRENT LIMIT,CHANGE SIDE TO 0805
33B7
40C4 36D2 33C7 33C7 34A2 34B3 34B4 34C1 34C3 34C6 34D8 36C6 37A7
101S6102 1 CHIP RES 1W 5% 100 2512 ACI R506 4SBAT
TABLE_5_ITEM

31D2 31C5 21D8 21B2 SMB_SDA 2 1

37B1 37B8 37C4 37D8 39A6 39B3
TABLE_5_ITEM 21B7 21B1 21A4 +3_3V_PMU 21B3 SM
101S6102 1 CHIP RES 1W 5% 100 2512 ACI R483 4SBAT 21D6 21C6 21B8
TABLE_5_ITEM
33A4 32D2 31D3 40C4 36D2
516-1002 1 CONN FOXCONN BP24067-R1 DIP BATT PLUG ACI J16 3SBAT OMIT 32D2
518-0016 1 J16 4SBAT
TABLE_5_ITEM

1 C475 1
R533 1
R513 31C5
21C6
CONN MOLEX22-05-7065 6P P2.5 TIN DIP
0.01UF
20% 100K 475K 21B7
R456
110S9314 2 R518,R538 3SBAT
TABLE_5_ITEM

50V 1% 1%
+3_3V_PMU 470K 2
CHIP RES 1W 1% 93.1K 0603 ACI
39B3 39A6 37D8 37C4 2 CERM 1/16W 1/16W 21A4 1
MF MF 21B1
TABLE_5_ITEM

36C6 34D8 34C6 34C3 603

2 603 2 603
5%
110S1005 2 CHIP RES 1W 1% 100K 0603 ACI R518,R538 4SBAT 34A2 33C7 33B7 33B6 21B8 1/16W

BATT_OK_REF 21D8 21D6 MF

32C6 32C1 32B8 32B3 603
31D6 31C4 31C2 28B5 PS_GND 31D3 31D2
3
32B1 32A7 32A3 32A2 33C7 33B6 R454
33B3 33A6 33A4 32D1
BATT_IN_0_L 1K
Q74 D 34C1 34B4 34B3 U10 2 21B3 1 2
37B8 37B1 37A7 LMC7211 4 5%
2N7002 SM
1/16W
SM MF
S G 1 BATT_V_GOOD 1 603

2 3 BATT_OK
5
OMIT

R538 OMIT
BATTERY INTERFACE
93.1K
1% R518 1 C1539 DESCRIPTION:
1/16W
MF 93.1K 0.22UF ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
20%
A 603 1%
1/16W
MF
25V
2 CERM
805 A
603 L44 NOTICE OF PROPRIETARY PROPERTY
30-OHM-EMI
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PS_GND 1 2 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
SM
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
34C3 34C6 34D8 36C6 37A7 37B1 37B8 37C4 37D8 39A6 39B3
PS_GND 28B5 31C2 31C4 31D6 32A2 32A3 32A7 32B1 32B3 32B8 32C1 32C6 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
32D1 33A4 33A6 33B3 33B6 33B7 33C7 34A2 34B3 34B4 34C1
SIZE DRAWING NUMBER REV.

D 051-6130-C ACI: C
APPLE COMPUTER INC. ECS:1.A
SCALE SHT OF
NONE 33 53

8 7 6 5 4 3 2 1
 CR-34

8 7 6 5 4 3 2 1

3V/5V Main Switchers

TABLE_5_HEAD

PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION

TABLE_5_ITEM

126S2228 1 ELEC 220UF/16V 20% C75 3SBAT

TABLE_5_ITEM

126S1024 1 ELEC 100UF/35V 20% C75 4SBAT

D D
43A4 39C6 39C3 38D6
34B4 32D5 24A4 19D4 +PBUS
38C4 38C3 37D8 34D5 OMIT
D27
SM
1
39C6 39C3 38D6 38C4 38C3 37D8 34D8 34B4 32D5 24A4 19D4 +PBUS 1 2
+6V_AUDIO
39B3
C75 43A4 17C7 17D7 27C8 29C3 29D5 46C7
220UF
37B1 37A7 36C6 34C6 1 C416 1 C417

+6V_AUDIO_PS
20%
34A2 33C7 33B7 33B6 2 16V
ELEC 4.7uF 4.7uF MBR0540

100K 2
R445
32C6 32C1 32B8 32B3 SM-2 20% 20%
28B5 PS_GND 2 25V 2 25V

1/16W
1
31D6 31C4 31C2 C412

603
CERM CERM

1%
MF
32B1 32A7 32A3 32A2 37C4 37B8 37B1 37A7 36C6 34D8 34C3 34C1 34B4 1812 1812 47uF
33B3 33A6 33A4 32D1 32C1 32B8 32B3 32B1 32A7 32A3 32A2 31D6 31C4 31C2 28B5 PS_GND 20%
34B3 34A2 33C7 33B7 33B6 33B3 33A6 33A4 32D1 32C6 5 6 7 8 2 16V

1
34C3 34C1 34B4 34B3 TANT
34C6 34D8 36C6 37A7 37B1 37B8 37C4 37D8 39A6 39B3
39A6 37D8 37C4 37B8 39B3 39A6 37D8 SMD
PS_GND 28B5 31C2 31C4 31D6 32A2 32A3 32A7 32B1 32B3 32B8 32C1 32C6
32D1 33A4 33A6 33B3 33B6 33B7 33C7 34A2 34B3 34B4 34C1

XFR-HM00-98734
PBUS HOLD-UP CAP
Q63

3
5

4
FDS6612A
SOI
4

CRITICAL
T2
SM
PS_RSNS_5V
1 1
D24 D25 1 2 3 SHOULD R56 CHANGE TO IBOOK 20M TO KEEP LOW POWER MODE FROM ’RINGING’
1N914 1N914 R422
C104

1
2

7
8
1 SOT23 SOT23
3 3 0.0152 28C6 XW4 +5V_MAIN 16C2 17B7 19D4 24D2 28C4 35D8 36B3
0.1UF 1 +5V_MAIN_P 1 2
20% 37B4 37D4 38B3 38B8 38C5 40D6 46C7
50V 2 2% JUMPER
CERM 1W OPEN
805 MF
2512
1 C399 5 6 7 8 R426 1 1
C100
34B7 786_GND 0.1UF 22 150UF
C 20%
2 25V
2 5%
1/16W
20%
2 6.3V 1
C99 C
CRITICAL CERM
805
Q61 D26
SM
MF
603 2
TANT
SMD 150UF
U24 4
FDS6680A MBRS130LT3 C394 1
NOSTUFF 20%
2 6.3V
MAX785
SSOI
SM 1 4700PF C101 TANT
SMD
34B7 PS_VL 22
VL VPLUS 23 1 2 150UF
20%
13
ON5 DH5 16 PS_PGATE_5V 10% 2 6.3V
TANT
R396 3
ON3 18 PS_BST_5V 1 2 3 50V SMD 37B8 37C4 37D8 39A6 39B3
36B7 34B6
DCDC_EN 1
100K 2 MAX785_EN 12
BST5
17 PS_LX_5V
CERM
603 33A6 33B3 33B6 33B7 33C7 34A2 34B3
38B8 37A6 SHDN LX5 PS_GND 28B5 31C2 31C4 31D6 32A2 32A3 32A7
1% PS_SS_5V 14
SS5 DL5 19 PS_NGATE_5V 32B1 32B3 32B8 32C1 32C6 32D1 33A4
1/16W
MF PS_SS_3V 2
SS3 CS5 15 PS_CS_5V 34B4 34C3 34C6 34D8 36C6 37A7 37B1
603
PS_REF 10
REF FB5 21
PS_SYNC 11
SYNC DH3 27 PS_PGATE_3V ROUTE AS PAIR SHORT TRACE XW1
NOSTUFF 4 25 PS_BST_3V 37D8 37C4 37B8 37B1 37A7 36C6 34D8 34C6 34C3 34C1 SM
5
GND0 BST3
PS_LX_3V 32C1 32B8 32B3 32B1 32A7 32A3 32A2 31D6 31C4 31C2 28B5 PS_GND 1 2
1 C102 C389 1 R397 GND1 LX3 26
34B4 34A2 33C7 33B7 33B6 33B3 33A6 33A4 32D1 32C6
3.3UF 0.001uF 0 6
GND2 DL3 24 PS_NGATE_3V 39B3 39A6
N20P80% 20%
1 2
7 28
ROUTE AS PAIR SHORT TRACE XW2
16V
2 CERM
50V
CERM 2 5% GND3 FB3 SM
1206 603 1/16W
1
8
GND4 CS3 1 PS_CS_3V 1 2
MF
603 R144 9 20 34D8 37D8
1 C387 1 C388 5%
0 GND5 PGND +PBUS 19D4 24A4
1/16W 32D5 34D5 XW13
0.01UF 1.0UF MF 5 6 7 8 38C3 38C4
20% N20P80% SM
2 50V 2 16V 2 603 R398 1 C126 1 C125 38D6 39C3 1 2
CERM CERM 39C6 43A4
603 805 0 4.7uF 4.7uF
34C6 786_GND 1 2
Q64 20% 20%
XW14
5% 2 25V
CERM 2 25V
CERM
1/16W FDS6612A 1812 1812 37C4 37D8 39A6 39B3 SM
MF SOI
34B3 34C1 34C3 34C6 34D8 1 2
603 4
C401 1 PS_GND
32C1 32C6 32D1 33A4 33A6
0.1UF 28B5 31C2 31C4 31D6 32A2
32A3 32A7 32B1 32B3 32B8
B 20%
25V
CERM
2
33B3 33B6
36C6
33B7
37A7
33C7
37B1
34A2
37B8
B
34C6 PS_VL 805 1 2 3 L14 35D4 36C6 40D6 46B7
10UH R429 18A4
10D7
18B6
11A5
18C7
11B8
19C3
11C8
20B3
13A8
20C2
13B8
20C3
13C3
21C3
13C8
0.0252 1 XW5 2 +3V_MAIN 3A4
1 +3V_MAIN_P 5D6 6B5 6D4 7B2 7B4 7C7 7D2
1 SM-5 2% JUMPER 7D4 8B6 8D4 8D6 8D7 9D2 9D3 10D4
R145 1W
MF
OPEN 13D6 14B3 14C3 14D2 15C2 15D3 15D7 16D4
470K 2512 21C7 21D7 22B1 25B4 26D6 28C5 35B3 35B5
5% 5 6 7 8
1/16W
MF 2
2 603 D28 1
C103 1
C96
DCDC_EN 34C8 36B7 37A6 38B8 SM 220UF 220UF
Q62 MBRS130LT3 20%
2 4V
20%
2 4V
4
FDS6680A 1 POSCAP
SMD
POSCAP
SMD
3 SM
D Q1
2N7002
SM 1 2 3
21C7 DC_DC_EN_L 1 G S 39B3
33B6 33B7 33C7 34B3 34B4 34C1 34C3 34C6
2
PS_GND 28B5 31C2 31C4 31D6 32A2 32A3 32A7 32B1
32B3 32B8 32C1 32C6 32D1 33A4 33A6 33B3
34D8 36C6 37A7 37B1 37B8 37C4 37D8 39A6
3
D
Q3 1 C4
2N7002 0.01UF
38B8 35D4 SM 5%
21B6 7B7 SLEEP
35C4 27C8
1 G S 2 50V
CERM
603
3V/5V Main Switchers
2
DESCRIPTION:
DC_DC__EN_L DCDC_EN SLEEP SLEEP_L_LS STATE
ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
A 0 1 0 1 RUN
NOTICE OF PROPRIETARY PROPERTY
A
X 1 1 0 SLEEP THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

1 0 0 0 SHUTDOWN I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

D 051-6130-C ACI: C
ECS:1.0
APPLE COMPUTER INC.
SCALE SHT OF
NONE 34 53

8 7 6 5 4 3 2 1
 CR-35

8 7 6 5 4 3 2 1

NOSTUFF

LOW CURRENT. CAN WE CHANGE TO CHEAPER FET? C59

0.01UF
1 2 Q14
SI3443DV
POWER FOR: 5% TSOP 1
R62 50V

TRACKPAD 38B8 35C4 34A8 27C8 21B6 7B7 SLEEP 1

100K 2 CERM
603
2
5
+3V_SLEEP 4C6 6B5 6C5 9D4 13B3 15A5 15B5 15B7 15C5 15C7 20C8 20D6
VGA DDC POWER 5% 22B5 22C1 25A6 25B5 25D4 27C6 40D4 46B7
40D6 36C6 35B5 35B3 34B2 28C5 26D6 25B4 22B1 21D7 1/16W 3 6
MF
15D7 15D3 15C2 14D2 14C3 14B3 13D6 13C8 13C3 13B8
8D4 8B6 7D4 7D2 7C7 7B4 7B2 6D4 6B5 5D6 3A4 +3V_MAIN 603
4
D
D 13A8
21C7
11C8
21C3
11B8
20C3
11A5
20C2
10D7
20B3
10D4
19C3
9D3
18C7
9D2
18B6
8D7
18A4
8D6
16D4
46B7 1 C62
2200PF
5%
C456 50V
2 CERM
0.1UF 603
1 2

20%
16V
38C5 38B8 38B3 37D4
24D2 19D4 17B7 16C2
37B4 36B3 34C2 28C4
+5V_MAIN CERM
603

46C7 40D6 C296

Q70 0.01UF
1 2
SI3443DV Q45
TSOP 1 SI3447DV
R508 R281 5%
50V TSOP 1
100K 2 2
100K 2 CERM
1
5 38B8 35D4 34A8 27C8 21B6 7B7 SLEEP 1 603 2 +VIO_CPU_SLEEP
5%
1/16W 3 6 +5V_HD_SLEEP 16A5 16B8 16D7 5%
1/16W
5
MF MF 3 6
603 1
4 1 C457 +VIO_CPUBUS_MAIN
603 R598
2200PF 36B5 11D8 10D7 4 200
5% 5%
1/16W
2 50V
CERM MF
603 2 603
NOSTUFF
1 C293
2200PF
Q66
SI3443DV
5%
2 50V
CERM
C452 TSOP 1 +5V_CD_SLEEP 16A3 16A6 16B2 603 3

0.01UF 2 D Q85
1 2
5 2N7002
1 SM
G
C 5%
50V
CERM
3 6 S

2
C
603 4

Q68
SI3443DV
TSOP 1
R504 2
1
330K 2
5
5%
1/16W 3 6
MF
603
4

11

12
3

4
NC1

NC2

NC3

NC4
14 16 UNI_IIC_CLK1
INT* SCL 10B7 15C8
Q48 ADM1030 SDA 15
SI3443DV 13 UNI_IIC_DAT1 10A7 15C8
R299
100K 2
TSOP 1 +5V_IO_SLEEP 21C3 21D2 25D8 28D5 35B2 40C6 ADD SSOI

10
1 2 8 D+
FAN_FAULT*
5% 5 THERM_OD*
1/16W 35A5 7 9 TO_THERMDIODE_2
MF 3 6 THERM* D-
603 3 J1
4
35B2 TACH_FAN 2
U1200 6 +3V_MAIN PLACE Q1000 CLOSE TO CPU
4
SM-2MT

NOSTUFF TACH VCC 1 Q1000

1 C317 5 2N3904 +5V_IO_SLEEP
SM 1
2200PF 1 PWM_OUT GND 2
5% 35B4 TACH_FAN 2
2 50V
CERM 40D6 3
B 28B8 SLEEP_LS 603 1 C621
0.1UF
21D7
16D4
B
PLACE ADM1030 CLOSED TO HARD DRIVE
20%
10V 13B8 5
2 CERM 8D6
402 7D4 R1201
3
7B4 7B2 +3V_MAIN 10K
5D6 3A4 1 2
D Q47 6D4 6B5 5%
2N7002 7D2 7C7 1/16W
MF
46B7 40D6 36C6 35D4 35B3 8D4 8B6
38B8 19D3 18A6 3A4 SLEEP_L_LS 1 SM
25B4 22B1 21D7 21C7 21C3 20C3 20C2 20B3 19C3 18C7 13A8 11C8 11B8 11A5 10D7 10D4 9D3 9D2 8D7
603

+3V_MAIN R1200
G S
15D7 15D3 15C2 14D2 14C3 14B3 13D6 13C8 13C3 13B8 10K 15D7 15D3 15C2 14D2 14C3 14B3 13D6 13C8 13C3 Q1001
2 8D4 8B6 7D4 7D2 7C7 7B4 7B2 6D4 6B5 5D6 3A4 1 2 21C7 21C3 20C3 20C2 20B3 19C3 18C7 18B6 18A4 SI2302DS
13A8 11C8 11B8 11A5 10D7 10D4 9D3 9D2 8D7 8D6 36C6 35D4 35B5 35B3 34B2 28C5 26D6 25B4 22B1 SM
5%
+3_3V_REF_PMU 21B6 21D3 40C4 18B6 18A4 16D4 1/16W 46B7
34B2 28C5 26D6 MF
603
FAN CIRCUIT
1
R1204
100K
5%
1/16W
MF
2 603
R1206
TEMP
0 THERM_OD*
21D3 21B3 1 2 35B4
5%
NOSTUFF
1/16W
MF
POWER SUPPLY LOAD FET SWITCHES
1 603
R1205 DESCRIPTION:
220K
5% ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC5
1/16W
A MF
2 603
NOTICE OF PROPRIETARY PROPERTY
A
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

APPLE COMPUTER INC.

D 051-6130-C ACI: C
ECS:1.B
SCALE SHT OF
NONE 35 53

8 7 6 5 4 3 2 1
 CR-36

8 7 6 5 4 3 2 1

R581
1
0 2
5%
1/16W
MF
603

VR2 D
D 1
R582 CRITICAL
6 CRITICAL 0 6
I155
5%
PLUS5VTAP 1/16W PLUS5VTAP
MF
D23 2 603 VR1
R400 LP2951 LP2951
33D1 REG2_IN 1
390 2 PWR_OR_R 8
IN
SOI
OUT
1 +5V_BU_RAW
1N914
1 3 +5V_BU 8
IN
SOI_3_3V
OUT
1 +3_3V_PMU 21A4 21B1 21B7 21B8 21C6 21D6 21D8 31C5
5% 10 MILS 2 5 10MILS 2
SENSE ERR
5
NOSTUFF 31D2 31D3 32D2 33A4 33B6 33C7 40C4
1/4W SENSE ERR SOT23 3 7
3 7 1 1 NOSTUFF
FF
1210 1 C392 SHUT FDBK R209 1
R414
SHUT FDBK R211 1
R580
1UF GND 357K 1 C105 GND 165K 1 C40 1

3V_BU_DIV
20% 1% 470PF 100 1% 470PF 5%
1/16W 5% 1/16W
2 50V
CERM 4 MF 10% 1/4W 4 MF 10% 1/16W
1812 2 603 2 50V
CERM FF 2 603 2 50V
CERM
MF
603 2 1210 603 2 603

NOSTUFF
1
R149 BUPBAT_POS C221
1 C400 100K
1 1 C222 1
R33 1 C200
1% 1
C91 0.1UF 0.1UF 100K 4.7UF
0.1UF 1/16W
20% 20% 1% 20%
20% MF 0.22F 2 16V
CERM
16V
2 CERM 1/16W 2 16V
2 16V
CERM 2 603
N20P80% 603 603 MF CERM
2 5.5V 1206
603 DLC 2 603
A395-D510
NOSTUFF
R1112
1
0 2
37D8 37C4 37B8 37B1 37A7 34D8 34C6 34C3 34C1 34B4 5% CKT USED TO POWER SEQUENCE. CPU VIO
32C1 32B8 32B3 32B1 32A7 32A3 32A2 31D6 31C4 31C2 28B5 PS_GND 1/10W
FF
34B3 34A2 33C7 33B7 33B6 33B3 33A6 33A4 32D1 32C6 805 MUST BE POWERED BEFORE CPU VCORE.
39B3 39A6 R1110
1
100K 2 THERE IS A 7 MILLISECOND DELAY.
5% Q809
C 1/16W
MF
603
SI3443DV
TSOP 1 +3V_VGA_MAIN 14D3 14D4 22A4 22C5 22D8 23B8 23C1 23C8 24C2 25C2 25D2 46B7
C
2 46C7
40D6 35D4 35B5 35B3 34B2 28C5 26D6 25B4 22B1 21D7 C1109 5
15D7 15D3 15C2 14D2 14C3 14B3 13D6 13C8 13C3 13B8 0.01UF
8D4 8B6 7D4 7D2 7C7 7B4 7B2 6D4 6B5 5D6 3A4 +3V_MAIN 1 2 3 6
13A8 11C8 11B8 11A5 10D7 10D4 9D3 9D2 8D7 8D6
21C7 21C3 20C3 20C2 20B3 19C3 18C7 18B6 18A4 16D4 10% 4
50V
46B7 CERM
603

3
C1110
R1111 2200PF
100K 2 1 2
40C6 36B5 23D8 23B7 23A8 +1_8V_MAIN 1 1 Q810
5% 2N3904 5%
1/16W SM 50V
MF
603
2 CERM
603 38B8 38B3 37D4 37B4 35D8 34C2 28C4 24D2 19D4 17B7 16C2 +5V_MAIN
46C7 40D6 38C5
1
1
R41 R42
100K 100K
5% 5%
1/16W
R1516 1/16W
MF MF
0 2 603 2 603
1 2 +VIO_CPUBUS_MAIN 10D7 11D8 35C4 D6

CPU_VCORE_PWR_SEQ
5% 1N914
1/10W
FF
805
CPUVCORE_PWR_OFF 3 1 VCORE_SHDN_L 38B8
+2_5V_MAIN
23D8 23D6 23D1 23B7 23A8 18D7 11D8 10D3 3B4 U3 SOT23
40C4 37C1 +1_8V_MAIN 23A8 23B7 23D8 36B6 40C6
1 C302 1 1
R285
1UF
20%
R63 1 MAX1792 8 10K
3
100K IN1
B D7
10V
2 CERM
805
5%
1/16W 2
OUT1

7
1%
1/16W
MF 1 C303
1 Q12 B
MF IN2 SOI OUT2
2 603
2N3904
DCDC_EN 1N914
3 1
2 603
4
10UF
N20P80%
SM
38B8 37A6 34C8 34B6 6 2
’SHDN SET 2 16V
CERM
1
SOT23 3 5
R284 1206
R47 3
’RST GND 22.6K 10K
1%
1/16W 14D8 14D6 14C6 14A7 14A6 13D1 5C2 4D5 4B4 3D5 3C4 +VIO_CPU_SLEEP 1 2 CPU_VCORE_PWR_EN 1 Q13
MF 46B7 35C3 15D2 15B1 5% 2N3904
2 603 1/16W SM
MF 2
603

SUPER CAP CIRCUIT

DESCRIPTION:
ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
A NOTICE OF PROPRIETARY PROPERTY
A
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

D 051-6130-C ACI: C
APPLE COMPUTER INC. ECS:1.0
SCALE SHT OF
NONE 36 53

8 7 6 5 4 3 2 1
 CR-37

8 7 6 5 4 3 2 1

D 34D8 34D5 34B4 32D5 24A4 19D4

43A4 39C6 39C3 38D6 38C4 38C3
+PBUS D
40D6
38B8
37B4
35D8
1 C1520 1 C1500 1 C1501 1 C1502 1 C1503 28C4
4.7UF 4.7UF 4.7UF 0.01UF 0.01UF 19D4
20% 20% 20% 20% 20% +5V_MAIN 16C2
2 25V
CERM 2 25V
CERM 2 25V
CERM 2 50V
CERM 2 50V
CERM 17B7
1812 1812 1812 603 603 24D2
1 34C2
R1512 36B3
37B8 37B1 37A7 36C6 34D8 34C6 20 1 C1514
5% 38B3
33B7 33B6 33B3 33A6 33A4 32D1 1/16W 4.7UF 38C5
32A3 32A2 31D6 31C4 31C2 28B5 PS_GND MF
2 603
20%
46C7
32C6 32C1 32B8 32B3 32B1 32A7 2 16V
CERM
34C3 34C1 34B4 34B3 34A2 33C7 1715_VCC 1206
39B3 39A6 37C4

D1505

D1504
1 C1515

1N914

1N914
1

1
SOT23

SOT23
4.7UF
20%
16V
2 CERM
37B1 37B8
34C3 34C6

3
1206
33C7 34A2
32D1 33A4 33A6
32A7 32B1 32B3
PS_GND 28B5 31C2 31C4
37B5 31D6 32A2 32A3
R1503 MAX1715_GND 37A6 32B8 32C1 32C6 5 6 7 8

20

21
4.7

4
5% 37B2 33B3 33B6 33B7
1/16W 37B7 34B3 34B4 34C1
R1511

7
8
MF

V+

VDD

VCC
1
603
2 25 4.7 34D8 36C6 37A7 Q1501
ATI_CORE_MAIN 22A5 22C8 23D7 46B7 Q1500 BST1 BST2 18 1 2 37D8 39A6 39B3 FDS6612A
SI4936 2 26 DH1 SOI
5%
SM DH2 17 1/16W 4

C G2 1 C1507 MF
603
C1513 40C4 C

1
L1500 0.1UF U1500 1
23D8
20% MAX1715
5UH 25V
2 CERM
0.1UF L1501 23D1
SSOI 20% 1 2 3
1 XW3 2 ATI_CORE_MAIN_P 1 2 805 27 LX1 25V
2 CERM 10UH 23A8
11D8
JUMPER SM-1 LX2 16 1715_LX2 805 1 2 +2_5V_MAIN_P 1XW15 2 +2_5V_MAIN 3B4
OPEN
1 24 DL1
R1500 1 SMA-2 10D3
1 R1502 23 NC3 DL2 19 1715_DL2 NOSTUFF JUMPER
OPEN 18D7
39B3 C1504 10K 100 NC 5 6 7 8 1
R1513 1

5
6
37D8 220UF 0.5% 1% NC 28 NC2 R1514 23B7
1/16W 22 100 23D6
37B1 20% FF
1/16W 2 NC 15 NC1 PGND 0
2 4V
2 603
MF
4 1% 5% NOSTUFF 36B7
36C6
34C6
POSCAP
SMD 2 603 D1500 141715_OUT2 37B3 Q1502 1/16W
MF 1/16W 1
C1518 1
34C1 37B5 1715_FB1
1715_OUT1 37C5 SM
MBR0540
37C6 1715_OUT1 1 OUT1 OUT2
FDS6680A 2 603
MF
2 603 220UF
C1519
FB2 13 1715_FB2 37B2 4 220UF
34B3 1 37C7 1715_FB1 2 SM
37C4 1715_OUT2 37C4 1715_FB2 20% 20%

3
FB1 2 2 4V 2 4V
33C7 POSCAP
33B6 1 C1505
1
R1501 1 C1506 1715_REF_2V
NOSTUFF 9 PGOOD 7
NC D1501 1 NOSTUFF SMD
POSCAP
SMD
1000PF R1504 REF
C1516 R1515
33A6 680PF 16.5K 12
SM
1 C1517
32D1 5%
0.5% 5%
25V 1
0 2 5 ILIM2
1 2 3 MBRS130LT3 1
10K
32C1 50V
2 CERM
1/16W
MF
2 CERM TON 1 1000PF 1% 0.01UF 37D8 39A6 39B3
603 3 5% 1/16W 10%
32B3 2 603 5% ILIM1 MF 2 50V 34C6 34D8 36C6

AGND
603 6 25V
37C4 1/16W SKIP 2 CERM CERM

ON1

ON2
32A7 MF 2 603 603 33C7 34A2 34B3
32A2 37B5 603 603
32D1 33A4 33A6
37A6 MAX1715_GND MAX1715_GND
31C4 PS_GND 1 32A7 32B1 32B3
R1509 PS_GND

10

11
28B5 37B2 1 C1508 28B5 31C2 31C4

8
31C2 1UF 1 100K 31D6 32A2 32A3
31D6 20% R1505 1
5%
1/16W 32B8 32C1 32C6
32A3 2 10V
CERM 1M R15081 C1511 MF 33B3 33B6 33B7
5%
32B1 1
805 1/16W 150K 0.01UF 2 603 1 C1512 34B4 34C1 34C3
32B8 R1519 MF
2 603
1%
1/16W 10% 0.001UF 37A7 37B8 37C4
32C6 49.9K C15091 1 C1510 MF 2 50V
CERM
5%
50V
33A4 0.5%
1/16W 0.01UF 0.001UF 2 603 603
2
CERM
33B3 MF 10% 5% 603
VGA_VCORE_HI 50V 50V
33B7 22B2 22C2 2 603 CERM 2 2
CERM
34A2 603 603 R1510
34B4 0
B 34C3
34D8
3
37C4 37B7 37B2 37A6 MAX1715_GND
38B8 38C5 40D6 46C7
1
5%
2
B
37A7 D Q1504
1 C1521 +5V_MAIN 16C2 17B7 19D4 24D2 28C4 1/16W
MF
37C4 R1518 1000PF 34C2 35D8 36B3 37D4 38B3 603
2N7002 5%
39A6 1K 1 SM 25V
2 CERM
1 2 G S 1 1
1%
603 R1506 R1507
1/16W 2
100K 100K
MF 5% 5%
603 D1502 1/16W
MF
1/16W
MF
1 C1523 1N914 2 603 2 603
220PF 3 1
5%
2 25V
CERM
603 SOT23
38B8 36B7 34C8 34B6 DCDC_EN
D1503
37D8 37C4 37B8 37B1 36C6 34D8 34C6 34C3 34C1 34B4 1N914
32C1 32B8 32B3 32B1 32A7 32A3 32A2 31D6 31C4 31C2 28B5 PS_GND MAX1715_GND 37B2 37B5 37B7 37C4 3 1
34B3 34A2 33C7 33B7 33B6 33B3 33A6 33A4 32D1 32C6
39B3 39A6 SOT23

VGA_VCORE_HI_OC H : 1.8V
L : 1.6V

A NOTICE OF PROPRIETARY PROPERTY

A
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

APPLE COMPUTER INC.

D 051-6130-C ACI: C
ECS:1.0
SCALE SHT OF
NONE 37 53

8 7 6 5 4 3 2 1
 CR-38

8 7 6 5 4 3 2 1

CPU_VCORE(1.225/1.5V)
D +PBUS
D
39C6 39C3 38C4 38C3 37D8 34D8 34D5 34B4 32D5 24A4 19D4
43A4
NOSTUFF NOSTUFF
1 C6 1 C31 1 C171 1 C23 1 C175 1 C12
0.01UF 0.01UF 4.7uF 4.7uF 4.7uF 4.7uF
20% 20% 20% 20% 20% 20%
50V
2 CERM
50V
2 CERM 2 25V
CERM 2 25V
CERM 2 25V
CERM 2 25V
CERM
603 603 1812 1812 1812 1812
GND_VCOREOUTPUT 21A3 21A8 38B2 38B5 38B7 38C1 38C4 38C5 38C8

38C5 38B5 1717_VCC_5V

1717_VCC_5V 46C7
38B5 38D8
40D6
1 C1533 38B8 39C6 43A4
38B3 +PBUS
1
R1530 1R1531 1R1532 1R1533 1R1534 1UF
20% 37D4 +PBUS 19D4 24A4 32D5 34B4 34D5 19D4 24A4 32D5 34B4 34D5 34D8 37D8 38C4 38D6 39C3 39C6 43A4
1K 100K 1K 1K 1K 10V 37B4 34D8 37D8 38C3 38D6 39C3
5% 5% 5% 5% 2 CERM
5% 35D8
1/16W 1/16W 1/16W 1/16W 1/16W 805
MF
2 603
MF
2 603
MF
2 603
MF
2 603
MF
2 603
R1549 MAX1717_GND 38B6 38B7
28C4
19D4 4SBAT
NOSTUFF NOSTUFF 20 OMIT
NOSTUFF 1 2 +5V_MAIN 16C2 1
1
C620
5% 17B7 C1 100UF
1/16W
MF
1 C1534 24D2 220UF 20%
603 10UF 34C2 20% 2 35V
ELEC
N20P80% 36B3 2 16V
1 ELEC SM-1
2 16V
CERM D1510 SM-2
1206
1N914 38C1 38C5 38C8
GND_VCOREOUTPUT
GND_VCOREOUTPUT SOT23 21A3 21A8 38B2

15
38B5 38B7

1
7
1 1 3
1
R1535 R1536 1R1537 1R1538 R1539 R1548 PBUS HOLD-UP CAP 38D3
5 6 7 8

V_PLUS

VCC

VDD
1K 1K 1K 1K 100K 17 0
5% 5% 5% 5% 5% D4 BST 22 1 2
1/16W 1/16W 1/16W 1/16W 1/16W
5%
C MF
2 603
MF
2 603
NOSTUFF
MF
2 603
MF
2 603
NOSTUFF
MF
2 603
18 D3 DH
24 1/16W
MF
603
Q33 XW9
C
38D3 38C5 38C4 19
D2 4
IRF7805 SM
38B2 21A8 21A3 GND_VCOREOUTPUT 1 C1535 SM
1 2 GND_VCOREOUTPUT 21A3 21A8 38B2 38B5 38B7 38C4
38C1 38B7 38B5 20 D1 SSOI
U1 0.1UF 38C5 38C8 38D3
20%
NOSTUFF 21 D0 MAX1717 25V
2 CERM 1 2 3
XW7
SM
38B6 38B5 1717_REF_2V R1540 805 L1
0 8 2.0UH 1 2
C1532 1 2 TON LX 23
2 1 FAT FAT 1 XW8 2 +VCORE_SLEEP 3D4
1UF 5%
1/16W
38B3
1 2 9 DL 14 NOSTUFF SM JUMPER 40C6 46B7
C1531 MF
603
REF
1 1
NOSTUFF SHORT SHORT OPEN
20% 470PF 13 R1551 R1555 1
R1550
46C7 40D6 38C5 38B3
10V
CERM
1 2 6
CC
GND 2.2 0 100 NOSTUFF
28C4 24D2 19D4 17B7 16C2 +5V_MAIN 38C5 805
10%
R1541 FBS 5 5 6 7 8
5%
1/4W
5%
1/16W
1%
1/16W 1
R28
37D4 37B4 36B3 35D8 34C2 38B6 MAX1717_GND 50V
120K 2 3
FF 2 MF MF
CERM
1
4 2 1210 2 603 2 603 0.200
1
1
R6 603 5%
TIME FB D12
SM
1
C179 1
C189 1
C185 1
C173 1
C169 5%
1/2W
R5 1/16W

VGATE
100K 330UF MF
330UF 330UF
GNDS
MF 2 A/B 16 Q32 MBRS130LT3 330UF 330UF

10 ILIM
470K 5% 603 SKP/SDN 20% 20% 20% 20% 20% 2 1210
5% 1/16W
MF 4
FDS6672 1 2 2.5V
POSCAP
2 2.5V
POSCAP
2 2.5V
POSCAP
2 2.5V
POSCAP
2 2.5V
POSCAP
1/16W SM NOSTUFF
2 603 SMD SMD SMD
MF R1547 SMD SMD
11

12

NOSTUFF
603 2 D1 0
1 C1537 1 C1536
3 1 R1542 NC 1 2 1717_VCC_5V 1 C1538 0.0022UF
10% 5%
1000PF
162K 2 5% 4700PF 1 2 3 2 50V 2 25V
38B5 1717_REF_2V 1 1/16W 10% CERM CERM
1N914 38C7 MF 2 50V 603 603

VCORE_DISCHRG
SOT23 1% 603 CERM
NOSTUFF 603
R1543 R1546
1/16W
35B8 19D3 18A6 3A4 SLEEP_L_LS MF
603
1
15K 2 1717_REF_2V SHORT SHORT GND_VCOREOUTPUT
3
NOSTUFF 1.62K 1
FAT FAT
1%
1/16W 1% R1556
1 C172 C1530 1/16W
R1544

1
D Q5 MF 0
2

MF
2N7002 0.01UF 0.01UF 2 603 603 1 2 +VCORE_SLEEP 3D4 38C1 40C6 46B7
1/16W
15K

5% NOSTUFF
603

10%
SLEEP SM
B
1%
MF

B 35C4 34A8 27C8 21B6 7B7

35D4
1 G S 2 50V
CERM
603
2 50V
CERM
603
NOSTUFF

R1552
5%
1/16W
MF
603
1

2 0 CPU_VCORE_HI_OC
38C5 R1545 38B2
1 2 4A4 4B6 6B8 6C5 21D3 38A4
38C8 38C5 38C4 38C1 38B5 38B2 21A8 21A3 GND_VCOREOUTPUT 38B7 MAX1717_GND 0 2 GND_VCOREOUTPUT
5%
38D3
1 21A3 1/16W
MF
38B8 37D4 37B4 36B3 35D8 34C2 28C4 24D2 19D4 17B7 16C2 +5V_MAIN
21A8 46C7 40D6 38C5

3
D2 5% 603

D
1/16W 38B7
37A6 36B7 34C8 34B6 DCDC_EN 3 1 R1560 MF 38C1
NOSTUFF 5 6 7 8
R1553

G
0 603 1
38C4 R15

Q6
TP0610
SM
1 2
0

NOSTUFF
10K NOSTUFF
1N914 38C5 1 2 VCORE_CTL 13D7 14D3

1
5%
36B1
VCORE_SHDN_L SOT23
1/16W
MF
38C8
38D3 5%
1/16W
5%
1/16W
MF
Q8
FDS6612A
603 MF NOSTUFF 2 603 SOI
603
C177 CPU_VCORE_DISCHRG 4
4700PF
38B4 21D3 6C5 6B8 4B6 4A4 CPU_VCORE_HI_OC 1 2
NOSTUFF NOSTUFF
TABLE_5_HEAD 10%
1 1 2 3
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION 50V
CERM
1 C20 R11
TABLE_5_ITEM 603 4700PF 10K
126S2226 1 ELEC 220UF/16V 20% C1 3SBAT 10% 5%
TABLE_5_ITEM
2 50V
CERM
1/16W
MF
126S2215 1 ELEC 22UF/35V 20% CV-BD C1 4SBAT 603 2 603

CPU_VCORE(1.2/1.4V) & 2.5V SWITCHERS

DESCRIPTION:

ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC

A NOTICE OF PROPRIETARY PROPERTY
A
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
NOTE: SINCE ALL POWER SUPPLIES
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
RESIDE ON THE SYSTEM BOARD
II NOT TO REPRODUCE OR COPY IT
JUMPERS HAVE BEEN INCORPORATED
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
TO ALLOW ISOLATION OF THESE
CIRCUITS FOR LOAD TESTING W/O SIZE DRAWING NUMBER REV.
THE RISK OF DAMAGE TO THE REST
OF THE SYSTEM APPLE COMPUTER INC.
D 051-6130-C ACI: C
ECS:1.B
SCALE SHT OF
NONE 38 53

8 7 6 5 4 3 2 1
 CR-39

8 7 6 5 4 3 2 1

I244 EMC1
I182 ZD10
D83 24B4 24A4 INVT_CHGND 1 I245
ZH1
D ETHERNET_CHGND 2
3
355D197 1 EMCPAD_SMD1 D
4
5
1 C3 1 C2 6
7
1000PF 0.01UF
5% 20% 8
9 EMC2
25V
2 CERM 2 50V
CERM 1 26C5 26C4 26B5 26B4 BT_CHGND 1
603 I243 I246
603
ZD11
D83
EMCPAD_SMD1
I236
ZH9 1
276D106
19C1 19B2 18C1 18B3 18B1 17D3 17D2 17B2 CHGND2 2
3
4
5
6 FOR CPU THERMAL MODULE FOR EMC SMD FINGER
1 C480 1 C481 7
8
I232
ZH10
1000PF 0.01UF 9
5% 20% 1
355D197 25V
P54_CHGND 2 CERM 2 50V
CERM
2 603
3 603
4
5
6
7
8
9
1

C C
I186
1 C181 1 C180 39C6 38D6 38C4 38C3 37D8 34D8 34D5 34B4 32D5 24A4 19D4 +PBUS
ZH6 0.01UF 1000PF
355D197 20% 5% 43A4
2 50V 2 25V
2
3 38D6 38C4 CERM
603
CERM
603
1 C74 1 C71
4 34D8 34D5 +PBUS
0.001UF 0.01UF
5 24A4 19D4 20% 20%
1 C166 6
7 34B4 32D5
50V
2 CERM 21D2 2 50V
CERM
I237
ZH5
1000PF 8 38C3 37D8 603 21D1 603 276D106_2
5%
25V
9
1 43A4 39C3 I233
21C2 21C1 POWER2_CHGND 2
2 CERM ZH3 3
603 276D106_1 4
5
PMU_CHGND 2
3
1 C82 1 C84 6
7
4 0.001UF 0.01UF 8
5 20% 20% 9
NOSTUFF NOSTUFF 1 C174 6 2 50V
CERM 50V
2 CERM 1
1 C163 1000PF
1 C178 7
8 37B8 37B1 37A7 36C6 34D8 34C6 34C3 34C1 34B4 34B3 603 603
1000PF
1 C164 5%
25V
0.01UF
20%
9
1
32B8 32B3 32B1 32A7 32A3 32A2 31D6 31C4 31C2 28B5 PS_GND
5% 0.01UF I235 2 CERM 50V 34A2 33C7 33B7 33B6 33B3 33A6 33A4 32D1 32C6 32C1
25V 20% ZH8 603 2 CERM 39A6 37D8 37C4
2 CERM 2 50V
CERM 276D106_1 603
603 603
28C8 28C4 28B8 2
SPKR_STAR_GND 3
27C3 27B4 27B3 4
28B3 27C6 27C4 1 C165 5
6
46D7 29C2 29A5 0.01UF 7
20% 8
50V 9
2 CERM 1
603 I226 I227
ZH2
D83 ZD1
D83
1 1

B B
I238
I234 ZH7
ZH4 276D106_3
276D106
2
3
4
POWER1_CHGND 2 BATTERY LOCK HOLE 4MM
5 3
4
1 C79 1 C80
6
7 1 C158 1 C162 5
6
1000PF 8 1
5%
25V
0.01UF 9 0.001UF 0.01UF
2 CERM 20% 1 20% 20%
603 2 50V
CERM 2 50V
CERM 2 50V
CERM
603 39B3 37D8 37C4 37B8 37B1 37A7 36C6 603 603
33C7 33B7 33B6 33B3 33A6 33A4 32D1 32C6 32C1
VGA_CHASS_GND 21A3 25A5 25B3 25B5 25B6 28B5 PS_GND
32B8 32B3 32B1 32A7 32A3 32A2 31D6 31C4 31C2
34D8 34C6 34C3 34C1 34B4 34B3 34A2
1 C360
33PF
5%
2 50V
CERM
603

TOOLING HOLES

DESCRIPTION:
ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
A NOTICE OF PROPRIETARY PROPERTY
A
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

D 051-6130-C ACI: C
ECS:1.0
APPLE COMPUTER INC.
SCALE SHT OF
NONE 39 53

8 7 6 5 4 3 2 1
 CR-40

8 7 6 5 4 3 2 1

D D
SIG_NAME MIN_LINE_WIDTH VOLTAGE SIG_NAME MIN_LINE_WIDTH VOLTAGE
25 3.3
+3V_SLEEP OUT 4C6 6B5 6C5 9D4 13B3 15A5 15B5 15B7 15C5 15C7 20C8
+5V_MAIN 5 38B3 38B8 38C5 46C7 20D6 22B5 22C1 25A6 25B5 25D4 27C6 35D2 46B7
OUT 16C2 17B7 19D4 24D2 28C4
+3V_MAIN 3.3 34C2 35D8 36B3 37B4 37D4 10 3.3
OUT +3V_VDDA3_PANGEA_MAIN OUT 13D6 40D4
10 3.3
+3V_VDDA3_PANGEA_MAIN OUT 13D6 40D4
0 10 3.3
OUT +3V_VDDA3_PANGEA_MAIN OUT 13D6 40D4
0 10 3.3
OUT VDD_USB OUT 13C5
+2_5V_SLEEP
10 2.5
USB_PWR_A
3.3
13C5 17A7 XWS SHORT OPEN
OUT OUT
10 1.8 3.3
+VCORE_SLEEP OUT 3D4 38B3 38C1 46B7 USB_PWR_B OUT 13C5 17A7 XW1 X
10 3.3 5
USB_PWR_FLT_AB
+3V_AVDD5_PANGEA_MAIN OUT 5D6 5 OUT XW2 X
10 3.3 USB_PWR_FLT_CD 5
+3V_AVDD4_PANGEA_MAIN OUT 6D3 OUT
XW3 X
10 3.3 X
+3V_AVDD6_PANGEA_MAIN OUT 9D2 10 3.3 XW4
10
+3_3V_PMU OUT 21A4 21B1 21B7 21B8 21C6 21D6 21D8 31C5 31D2 31D3 32D2
10 3.3 XW5 X
AGPVREF OUT 9D4 +3_3V_REF_PMU OUT 21B6 21D3 35A5 33A4 33B6 33C7 36D2
10 3.3 XW6 X
+3V_AMVDD_PANGEA_MAIN OUT 10C7 11A8
0 10 2.5 XW7 X
PANGEA_TEI OUT 10B7 +2_5V_ATILPVDD_MAIN OUT X
0 +2_5V_F_A2VDDATI_MAIN
10 2.5 XW8
ETH_RXD_PD OUT 10B7 10D2 OUT
XW9 X
0 10 2.5
GBE_REFCLK OUT 10B7 10D2 +2_5V_MAIN OUT 3B4 10D3 11D8 18D7 23A8 23B7 23D1 23D6 23D8 36B7 37C1 XW10 X
10 3.3
+3V_PHY_AVDD_MAIN +3V_AGPVDD_MAIN OUT 9D3
3.3
OUT 19B5 19B7 19D6 40C6 10 3.3 XW11 X
+3V_VDDA1_PANGEA_MAIN OUT 13D6
+VP_CPS
OUT 19C7 10 3.3 XW12 X
+3V_FW_MAIN
+3V_VDDA2_PANGEA_MAIN OUT 13D6 XW13 X
3.3 19B3 19B5 19B7 19C6 10
OUT 0
+3V_PHY_AVDD_MAIN 3.3
MOBM3G1
10
OUT XW14 X
19B5 19B7 19D6 40C6
C +PBUS_FW_SW
OUT
OUT 19C8 19D3
MOBM3G2

MOBM3G3
10
0
0
OUT

OUT
C
+FW_VP_FUSE_SW OUT 19D2 MOBM3V1
10 2.5
OUT
+VP_SW OUT 19D2 MOBM3V2
10 2.5
OUT
+VP_CONN_SW OUT 19D2 MOBM3V3
10 2.5
OUT
GNDRET_FW OUT 19C1 19C2 TXVSSR1
10
0 OUT
20 10
+5V_IO_SLEEP OUT 21C3 21D2 25D8 28D5 35B2 PANGEA_ACS_REF 0 OUT 5A7
20 35B5 10 0
+5V_VGA_FUSE
OUT 25D6 46C7 PANGEA_SD_REF OUT 6B2
10 3.3
10 VREF_VDDQ
+1_8V_MAIN 1.8
OUT 23A8 23B7 23D8 36B5 36B6 OUT

+1_8V_1644_LX 10
OUT
+1_8V_1644_FB 10
OUT

I/O CONNECTORS
USB SHEET 17 J7,J10
ETHERNET SHEET 18 J3
FIREWIRE SHEET 19 J5
RGB SHEET 24 J12
HEADPHONE SHEET 27 J13

B DC IN SHEET 32 J20
B

Holes and Slots

AND EMC INFO

CONSTRAINTS -- POWER
A NOTICE OF PROPRIETARY PROPERTY
A
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

ACI: C
APPLE COMPUTER INC.
D 051-6130-C ECS:1.0
SCALE SHT OF
NONE 40 53
8 7 6 5 4 3 2 1
 CR-41

8 7 6 5 4 3 2 1
SIG_NAME PULSE_PARAM MAX_VIA_COUNT NET_SCHED DELAY_RULE STUB_LENGTH/ ECL NET_SPACING_TYPE SIG_NAME PULSE_PARAM MAX_VIA_COUNT NET_SCHED DELAY_RULE STUB_LENGTH/ ECL NET_SPACING_TYPE

100 5 U2.E2 U1.AJ15 ::2500:3500 200 TRUE 5 MIL SPACING KEY PANGEA TIMING
CPU_DATA<0> OUT 3B6 3B8 5D3 5D4 100 5 U2.N1 RP26.4 U1.AP16 TRUE 5 MIL SPACING
CPU_BR* OUT 3D8 5D7 14C8
100 5 U2.D2 U1.AK6 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<1> OUT 3B6 3B8 5D3 5D4 KEY PANGEA TIMING 100 5 U2.J19 R774.1 U1.AN14 ::2300:4400 TRUE 5 MIL SPACING
TS* OUT 3D8 5D7 14C8
100 5 U2.C1 U1.AJ9 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<2> OUT 3B6 3B8 5D3 5D4 100 5 ::2300:4400 TRUE 5 MIL SPACING
TBST* OUT 3C8 5B7 14C8
100 5 U2.A3 U1.AK14 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<3> OUT 3B6 3B8 5D3 5D4 100 5 U2.N18 U1.AN20 ::2300:4400 200 TRUE 5 MIL SPACING
AACK* OUT 3B8 5B7 14B6
100 5 U2.B4 U1.AM6 ::2500:3500 200 TRUE 5 MIL SPACING KEY PANGEA TIMING
CPU_DATA<4> OUT 3B6 3B8 5D3 5D4 100 5 U2.M3 R350.1 U1.AP14 200 TRUE 5 MIL SPACING
ARTRY* OUT 3B8 5B7 14A8
100 5 U2.D6 U1.AH12 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<5> OUT 3B6 3B8 5D3 5D4 100 5 ::2300:4400 200 TRUE 5 MIL SPACING
3B8 5A4 14D6
D CPU_DATA<6> 100 5 U2.B5 U1.AM11 ::2500:3500 200 TRUE 5 MIL SPACING
OUT 3B6 3B8 5D3 5D4
DBWO*
KEY PANGEA TIMING
QREQ*
100 5 U2.L1 R353.1 U1.AN15 :::2900 200 TRUE 5 MIL SPACING
OUT

3A6 5B7 14C8

D
OUT
100 5 U2.C6 U1.AN18 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<7> OUT 3B6 3B8 5D3 5D4 100 5 U2.K2 R174.1 ::2300:3500 200 TRUE 5 MIL SPACING
QACK* OUT 3A3 3A6
100 5 U2.B6 U1.AM18 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<8> OUT 3B6 3B8 5D3 5D4 100 4 ::450:650 200 TRUE 5 MIL SPACING
PAN_QACK* OUT 3A4 5B7 14B6
100 5 U2.A5 U1.AJ16 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<9> OUT 3B6 3B8 5D3 5D4 100 5 U2.M20 RP24.1 U1.AJ24 ::2100:4200 200 TRUE 5 MIL SPACING
TA* OUT 3A6 5A4 14C8
100 5 U2.C7 U1.AK8 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<10> OUT 3B6 3B8 5D3 5D4 100 5 U2.M2 RP26.2 U1.AP20 200 TRUE 5 MIL SPACING
TEA* OUT 3A6 5A4 14B8
100 5 U2.A6 U1.AH16 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<11> OUT 3B6 3B8 5D3 5D4 100 5 ::2500:3500 TRUE 5 MIL SPACING
TT<0> OUT 3C8 5B7
100 5 U2.B7 U1.AH8 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<12> OUT 3B6 3B8 5D3 5D4 100 5 ::2500:3500 TRUE 5 MIL SPACING
TT<1> OUT 3C8 5B7
100 5 U2.A7 U1.AM14 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<13> OUT 3B6 3B8 5C4 5D3 100 5 ::2500:3500 TRUE 5 MIL SPACING
TT<2> OUT 3C8 5B7
100 5 U2.C8 U1.AP3 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<14> OUT 3B6 3B8 5C4 5D3 100 5 ::2500:3500 TRUE 5 MIL SPACING
TT<3> OUT 3C8 5B7
100 5 U2.A8 U1.AJ10 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<15> OUT 3B6 3B8 5C4 5D3 100 5 U2.K20 RP24.4 U1.AH26 ::2500:3500 TRUE 5 MIL SPACING
TT<4> OUT 3C8 5B7
100 5 U2.A9 U1.AN4 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<16> OUT 3B6 3B8 5C4 5D3 100 5 U2.L20 U1.AP30 ::2500:3500 200 TRUE 5 MIL SPACING
TSIZ<0> OUT 3C8 5B7
100 5 U2.C9 U1.AJ12 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<17> OUT 3B6 3B8 5C4 5D3 100 5 U2.M19 U1.AN29 ::2500:3500 200 TRUE 5 MIL SPACING
TSIZ<1> OUT 3C8 5B7
100 5 U2.B9 U1.AM9 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<18> OUT 3B6 3B8 5C4 5D3 100 5 U2.M18 U1.AH25 ::2500:3500 200 TRUE 5 MIL SPACING
TSIZ<2> OUT 3C8 5B7
100 5 U2.A10 U1.AN13 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<19> OUT 3A8 3B6 3B8 5C4 100 5 U2.C15 U1.AK23 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<0> OUT 3D8 5D7
100 5 U2.A11 U1.AK12 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<20> OUT 3A8 3B6 3B8 5C4 100 5 U2.B16 U1.AP27 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<1> OUT 3D8 5D7
100 5 U2.B12 U1.AK15 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<21> OUT 3A8 3B6 3B8 5C4 100 5 U2.D15 U1.AP28 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<2> OUT 3D8 5D7
100 5 U2.C12 U1.AM12 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<22> OUT 3A8 3B6 3B8 5C4 100 5 U2.B17 U1.AN26 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<3> OUT 3D8 5D7
100 5 U2.A12 U1.AP4 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<23> 3A8 3B6 3B8 5C4 5 U2.A18 U1.AK24 ::2500:3500 200 TRUE 5 MIL SPACING
C CPU_DATA<24> 100 5 U2.A13 U1.AH13 ::2500:3500 200 TRUE 5 MIL SPACING
OUT

OUT
5D3
3A8 3B6 3B8 5C4
CPU_ADDR<4> 100

100 5 U2.C20 U1.AN24 ::2500:3500 200 TRUE 5 MIL SPACING

OUT 3D8 5D7 C
5D3 CPU_ADDR<5> OUT 3D8 5D7
100 5 U2.C13 U1.AP5 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<25> OUT 3A8 3B6 3B8 5C4 100 5 U2.D19 U1.AM26 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<6> OUT 3D8 5C7 5D7
100 5 U2.A14 U1.AH15 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<26> OUT 3A8 3B6 3B8 5C4 100 5 U2.F17 U1.AJ23 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<7> OUT 3D8 5C7 5D7
100 5 U2.B14 U1.AN5 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<27> OUT 3A8 3B6 3B8 5C4 100 5 U2.E19 U1.AM24 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<8> OUT 3D8 5C7 5D7
100 5 U2.A15 U1.AN6 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<28> OUT 3A8 3B6 3B8 5C4 100 5 U2.F18 U1.AH23 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<9> OUT 3D8 5C7 5D7
100 5 U2.C14 U1.AP6 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<29> OUT 3A8 3B6 3B8 5C4 100 5 U2.F19 U1.AM23 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<10> OUT 3D8 5C7 5D7
100 5 U2.A16 U1.AJ13 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<30> OUT 3A8 3B6 3B8 5C4 100 5 U2.E20 U1.AN23 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<11> OUT 3D8 5C7 5D7
100 5 U2.B15 U1.AM15 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<31> OUT 3A8 3B6 3B8 5C4 100 5 U2.G18 U1.AJ22 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<12> OUT 3D8 5C7 5D7
100 5 U2.W15 U1.AJ17 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<32> OUT 3B6 3B8 3C7 5C4 100 5 U2.F20 U1.AN22 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<13> OUT 3D8 5C7 5D7
100 5 U2.Y16 U1.AN12 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<33> OUT 3B6 3B8 3C7 5C4 100 5 U2.G19 U1.AP26 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<14> OUT 3D8 5C7 5D7
100 5 U2.V14 U1.AN19 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<34> OUT 3B6 3B8 3C7 5C4 100 5 U2.G20 U1.AP21 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<15> OUT 3D8 5C7 5D7
100 5 U2.Y15 U1.AN17 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<35> OUT 3B6 3B8 3C7 5C4 100 5 U2.P20 U1.AH22 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<16> OUT 3D8 5C7 5D7
100 5 U2.W14 U1.AN11 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<36> OUT 3B6 3B8 3C7 5C4 100 5 U2.P19 U1.AM21 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<17> OUT 3D8 5C7 5D7
100 5 U2.Y14 U1.AH17 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<37> OUT 3B6 3B8 3C7 5C4 100 5 U2.R20 U1.AJ21 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<18> OUT 3C8 3D8 5C7 5D7
100 5 U2.V13 U1.AN10 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<38> OUT 3B6 3B7 3B8 5C4 100 5 U2.P18 U1.AK20 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<19> OUT 3C8 3D8 5C7 5D7
100 5 U2.Y13 U1.AK17 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<39> OUT 3B6 3B7 3B8 5B4 100 5 U2.T20 U1.AK21 ::2500:3500 220 TRUE 5 MIL SPACING
5D3 CPU_ADDR<20> OUT 3C8 3D8 5C7 5D7
100 5 U2.Y12 U1.AN9 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<40> OUT 3B6 3B7 3B8 5B4 100 5 U2.R19 U1.AN25 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<21> OUT 3C8 3D8 5C7 5D7
B CPU_DATA<41> 100 5

5
U2.V12 U1.AP19

U2.W12 U1.AM17
::2500:3500

::2500:3500
200

200
TRUE

TRUE
5 MIL SPACING

5 MIL SPACING
OUT 3B6
5D3
3B7 3B8 5B4 CPU_ADDR<22> 100 5 U2.R18 U1.AP24 ::2500:3500 200 TRUE 5 MIL SPACING
OUT 3C8 3D8 5C7 5D7 B
CPU_DATA<42> 100 3B6 3B7 3B8 5B4 5 U2.T19 U1.AP25 ::2500:3500 200 TRUE 5 MIL SPACING
OUT 100
5D3 CPU_ADDR<23> OUT 3C8 3D8 5C7 5D7
100 5 U2.Y11 U1.AM8 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<43> OUT 3B6 3B7 3B8 5B4 100 5 U2.R17 U1.AH20 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<24> OUT 3C8 3D8 5C7 5D7
100 5 U2.Y10 U1.AJ11 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<44> OUT 3B6 3B7 3B8 5B4 100 5 U2.U19 U1.AH21 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<25> OUT 3C8 3D8 5C7 5D7
100 5 U2.W9 U1.AK18 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<45> OUT 3B6 3B7 3B8 5B4 100 5 U2.V20 U1.AP23 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<26> OUT 3C8 3D8 5C7 5D7
100 5 U2.V9 U1.AH14 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<46> OUT 3B6 3B7 3B8 5B4 100 5 U2.Y18 U1.AM20 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<27> OUT 3C8 3D8 5C7 5D7
100 5 U2.Y9 U1.AM5 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<47> OUT 3B6 3B7 3B8 5B4 100 5 U2.W17 U1.AJ20 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<28> OUT 3C8 3D8 5C7 5D7
100 5 U2.Y8 U1.AH11 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<48> OUT 3B6 3B7 3B8 5B4 100 5 U2.U15 U1.AN21 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<29> OUT 3C8 3D8 5C7 5D7
100 5 U2.V8 U1.AK9 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<49> OUT 3B6 3B7 3B8 5B4 100 5 U2.W16 U1.AJ19 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<30> OUT 3C8 3D8 5C7 5D7
100 5 U2.Y7 U1.AJ8 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<50> OUT 3B6 3B7 3B8 5B4 100 5 U2.V15 U1.AP22 ::2500:3500 200 TRUE 5 MIL SPACING
5D3 CPU_ADDR<31> OUT 3C8 3D8 5C7 5D7
100 5 U2.W7 U1.AJ14 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<51> OUT 3B6 3B7 3B8 5B4 GBL*
100 5 U2.R2 RP24.3 U1.AP29 ::2300:4400 TRUE 5 MIL SPACING
5D3 OUT 3C8 5B7 14C8
100 5 U2.Y6 U1.AK11 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<52> OUT 3B6 3B7 3B8 5B4 CPU_DBG*
100 5 TRUE 5 MIL SPACING
5D3 OUT 3B8 5A4 14A8
100 5 U2.V7 U1.AH9 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<53> OUT 3B6 3B7 3B8 5B4 CPU_BG*
100 5 U2.P1 U1.AH19 ::2300:4400 200 TRUE 5 MIL SPACING
5D3 OUT 3D8 5D7 14C6
100 5 U2.Y5 U1.AH10 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<54> OUT 3B6 3B7 3B8 5B4 WT*
100 5 U2.R1 U1.AK26 ::2300:4400 200 TRUE 5 MIL SPACING
5D3 OUT 3B8 5B7 14B6
100 5 U2.W6 U1.AP10 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<55> OUT 3B6 3B7 3B8 5B4 CI*
100 5 U2.T2 U1.AJ25 ::2300:4400 210 TRUE 5 MIL SPACING
5D3 OUT 3B8 5B7 14B6
100 5 U2.V6 U1.AP12 ::2500:3500 200 TRUE 5 MIL SPACING
CPU_DATA<56> OUT 3B6 3B7 3B8 5B4
5 U2.W5 U1.AP8 ::2500:3500 200 TRUE 5 MIL SPACING 5D3
CPU_DATA<57> 100 3B6 3B7 3B8 5B4 5D3
OUT
5 U2.U6 U1.AP9 ::2500:3500 200 TRUE 5 MIL SPACING CONSTRAINTS -- CPU BUS
A CPU_DATA<58> 100

100 5 U2.W4 U1.AP13 ::2500:3500 200 TRUE 5 MIL SPACING

OUT 3B6 3B7 3B8 5B4 5D3
NOTICE OF PROPRIETARY PROPERTY
A
CPU_DATA<59> OUT 3B6 3B7 3B8 5B4 5D3
100 5 U2.Y3 U1.AP11 ::2500:3500 200 TRUE 5 MIL SPACING THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
CPU_DATA<60> OUT 3B6 3B7 3B8 5B4 5D3 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
5 U2.V1 U1.AN7 ::2500:3500 200 TRUE 5 MIL SPACING AGREES TO THE FOLLOWING
CPU_DATA<61> 100 3B6 3B7 3B8 5B4 5D3
OUT I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
100 5 U2.U2 U1.AN8 ::2500:3500 200 TRUE 5 MIL SPACING II NOT TO REPRODUCE OR COPY IT
CPU_DATA<62> OUT 3B6 3B7 3B8 5B4 5D3
5 U2.T1 R9.2 R10.1 U1.AP7 200 TRUE 5 MIL SPACING III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
CPU_DATA<63> 100 ::2500:3500 3B6 3B7 3B8 5B3 5B4 5D3
OUT
SIZE DRAWING NUMBER REV.
ACI: C
CONSTRAINTS -- CPU BUS APPLE COMPUTER INC.
D 051-6130-C ECS:1.0
SCALE SHT OF
NONE 41 53

8 7 6 5 4 3 2 1
 CR-42

8 7 6 5 4 3 2 1
MIN_LINE_WIDTH
SIG_NAME PULSE_PARAM MAX_VIA_COUNT DELAY_RULE STUB_LENGTH ECL NET_SPACING_TYPE NET_SCHED SIG_NAME PULSE_PARAM MAX_VIA_COUNT NET_SCHED DELAY_RULE MAX_EXPOSED_LENGTH STUB_LENGTH ECL NET_SPACING_TYPE

8D5 100 3 6 ::300:500 250 100 TRUE

7C3 PANGEAMCLK<0> OUT 6B2
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.AG1 J1.3 U23.2
MDATA<0> OUT 6D38D5 100 3 6 ::300:500 250 100 TRUE
6D47C3 PANGEAMCLK<1> OUT 6B2
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.AF3 J1.5 U23.4
MDATA<1> OUT 7D56D3 100 100 TRUE
6D4 PANGEAMCLK<2> 3 6 ::300:500 250 OUT 6B2
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.AF1 J1.7 U23.5
MDATA<2> OUT 7D5 100 3 6 ::300:500 250 100 TRUE
PANGEAMCLK<3> OUT 6B2
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.AE2 J1.9 U23.7
MDATA<3> OUT
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.AE1 J1.13 U23.8 8D5
MDATA<4> 100 7D56D3 6D4 7C3 7D5 8D5
OUT
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.AD2 J1.15 U23.10 7C3
D
MDATA<5> 100

100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.AD1 J1.17 U23.11

OUT 6D3
6D4 D
MDATA<6> OUT 8D56D3 6D4 7C3 7D5 8D5
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.AC2 J1.19 U23.13 7C3
MDATA<7> 100
OUT 6D3 4 6 ::1100:3500 TRUE 7C4
MCLK<0> 100 250 100 6D6 7A2
6 200 TRUE 5 MIL SPACING U1.Y1 J1.37 U23.42 6D47C3 OUT
MDATA<8> 100 ::1930:4400 OUT 7D56D3 4 6 ::1100:3500 TRUE 7A4 7C2
100 250 100
6D4 MCLK<1> OUT 6D6 8B4
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.Y2 J1.39 U23.44
MDATA<9> OUT 7D5 8C5
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.W1 J1.41 U23.45 7C3 7D5 8C5
100
MDATA<10> OUT 8C56D3 MCLK<3> 100 4 6 ::1100:3500 250 100 TRUE
6C5 8C5
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.W2 J1.43 U23.47 7D56D4 OUT
MDATA<11> 100 7C36D3 6D4 7C3 7D5 8C5
OUT
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.V2 J1.47 U23.48 6D4
MDATA<12> 100 6C3
OUT
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.U2 J1.49 U23.50 8C5
MDATA<13> 100 7D56C3 6D4 7C3 7D5 8C5
OUT
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.T1 J1.51 U23.51 7C3
MDATA<14> 100 6C3
OUT
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.T2 J1.53 6D4
MDATA<15> 100 8B56C3 6D4 7C3 7D5 8C5
OUT
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.R1 J1.83 U24.2 7D1 OUT
MDATA<16> 100 6C3
OUT
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.R2 J1.85 U24.4 6D47D1 7D5 8B5 OUT
MDATA<17> 100 7D56C3 4 ::400:1200 200 TRUE 5 MIL SPACING
OUT 100
6D4 M_ADDR<0> OUT 6B8 6D1
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.P3 J1.87 U24.5 6D2
MDATA<18> OUT 4 ::400:1200 200 TRUE 5 MIL SPACING
M_ADDR<1> 100 6B8 6D1
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.P2 J1.89 U24.7 8B5 OUT
6D2
MDATA<19> OUT 7D5 M_ADDR<2> 100 4 ::400:1200 200 TRUE 5 MIL SPACING
6A8 6D1
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.N1 J1.93 U24.8 8B57C1 OUT
6D2
MDATA<20> OUT 7D56C3 M_ADDR<3> 100 4 ::400:1200 200 TRUE 5 MIL SPACING
6B8 6D1
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.N2 J1.95 U24.10 7C16D4 OUT
6D2
MDATA<21> 100 6C38B5 4 ::400:1200 200 TRUE 5 MIL SPACING
OUT 100
6D47C1 M_ADDR<4> OUT 6A8 6D1
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.M1 J1.97 U24.11 6D2
MDATA<22> OUT 8B56C3 100 4 ::400:1200 200 TRUE 5 MIL SPACING
7C16D4 M_ADDR<5> OUT 6B8 6D1
C MDATA<23> 100 6

6
::1930:4400

::1930:4400
200

200
TRUE

TRUE
5 MIL SPACING

5 MIL SPACING
U1.M2 J1.99 U24.13

U1.J2 J1.121 U24.42

OUT 6C37D5
6D4 M_ADDR<6> 100 4 ::400:1200 200 TRUE 5 MIL SPACING
OUT
6D2
6A8 6D1 C
MDATA<24> 100
OUT 7D58B5 4 ::400:1200 200 TRUE 5 MIL SPACING 6D2
M_ADDR<7> 100 6A8 6D1
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.H2 J1.123 U24.44 7C1 OUT
MDATA<25> 100
OUT 8A56C3 4 ::400:1200 200 TRUE 5 MIL SPACING 6D2
M_ADDR<8> 100 6A8 6D1
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.G1 J1.125 U24.45 7C16D4 OUT
MDATA<26> 100
OUT 6C37D5 4 ::400:1200 200 TRUE 5 MIL SPACING 6D2
M_ADDR<9> 100 6A8 6D1
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.G2 J1.127 U24.47 6D48A5 OUT
MDATA<27> 100
OUT 7D57D5 4 ::400:1200 200 TRUE 5 MIL SPACING 6D2
M_ADDR<10> 100 6A8 6D1
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.F1 J1.131 U24.48 8A57C1 OUT
6D2
MDATA<28> OUT 7D56C3 M_ADDR<11> 100 4 ::400:1200 200 TRUE 5 MIL SPACING
6A8 6D1
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.F2 J1.133 U24.50 7C16D4 OUT 8C5
MDATA<29> 100
OUT 6C38A5 4 ::400:1200 200 TRUE 5 MIL SPACING 6D2 7D5
M_ADDR<12> 100 6A8 6C2
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.E1 J1.135 U24.51 6D47C1 OUT 7D2
MDATA<30> 100
OUT 8A56C3 8 RP23.2 J1.29 ::1100:3200 TRUE 5 MIL SPACING 6D1 7D4 7C4
TERM_M_ADDR<0> 100 200 6B7 7B2 7B4
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.H3 J1.137 U24.53 7C16D4 OUT
7B4 7D2
MDATA<31> 100
OUT 6C37D5 8 RP14.4 J1.31 ::1100:3200 TRUE 5 MIL SPACING 7B2
TERM_M_ADDR<1> 100 200 7D5 8C5 6B7
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.AD3 J1.4 U22.2 6D4 OUT
MDATA<32> 100
OUT 7D58D4 8 RP15.1 J1.33 ::1100:3200 TRUE 5 MIL SPACING 7D2 7D5
TERM_M_ADDR<2> 100 200 6A7 7B2
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.AD5 J1.6 U22.4 7D5 OUT
7B4 7C4
MDATA<33> OUT 8D47A3 TERM_M_ADDR<3> 100 8 RP14.3 J1.30 ::1100:3200 200 TRUE 5 MIL SPACING
8C5
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.AC3 J1.8 U22.5 7D56D4 OUT
MDATA<34> OUT 7A36C3 100 8 RP15.2 J1.32 ::1100:3200 200 TRUE 5 MIL SPACING
6D48D4 TERM_M_ADDR<4> OUT 7D5 8C4
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.AC5 J1.10 U22.7 7C4 7D2
MDATA<35> 100
OUT 6C37D5 100 8 RP14.1 J1.34 ::1100:3300 TRUE 5 MIL SPACING 8B5
TERM_M_ADDR<5> 200 6B7 7A4 7D2
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.AC6 J1.14 U22.8 8D47A3 OUT
MDATA<36> 100
OUT 7D56C3 100 8 RP21.1 J1.103 ::1100:3200 TRUE 5 MIL SPACING 8B4 7B2 7B2
TERM_M_ADDR<6> 200 7C4 7D5 6A7
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.AC7 J1.16 U22.10 7A36D4 OUT
MDATA<37> 100
OUT 6C38D4 8 RP2.2 J1.104 ::1100:3200 TRUE 5 MIL SPACING 7B2 7C2 7A4
TERM_M_ADDR<7> 100 200 6A7 7A4 7C4
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.AB6 J1.18 U22.11 6D47A3 OUT
MDATA<38> 100 8D46B3 8 RP21.2 J1.105 TRUE 5 MIL SPACING 7C4 7D5 7D5
OUT 100 ::1100:3200 200
7A36D4 TERM_M_ADDR<8> OUT 6A7 7A4
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.AB7 J1.20 U22.13 7B2 7C2
MDATA<39> OUT 6B37D5 100 8 RP21.3 J1.109 ::1100:3200 200 TRUE 5 MIL SPACING
6D4 TERM_M_ADDR<9> OUT 8B5
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.AA5 J1.38 U22.42 7C4 7D5
MDATA<40> 7D5 8 RP21.4 J1.111 ::1050:3200 TRUE 5 MIL SPACING
B MDATA<41> 100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.AA6 J1.40 U22.44
OUT

OUT 8C4
TERM_M_ADDR<10> 100

100 8 RP2.3 J1.112 ::1100:3200

200

200 TRUE 5 MIL SPACING

OUT 6A7 7A4
7B2 7C2 B
7D57A3 TERM_M_ADDR<11> OUT 8B56A7
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.AA7 J1.42 U22.45 7B27A4
MDATA<42> OUT 7A36B3 100 8 R208.2 J1.70 200 TRUE 5 MIL SPACING
6D46D4 TERM_M_ADDR<12> OUT 6A77B2
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.AC1 J1.44 U22.47 7A47C2
MDATA<43> OUT 6B37D5 8C4
8C4 7C27C4
MDATA<44> 100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.V3 J1.48 U22.48
7D56B3 6D4 7A3 7D5 8C4 7C47D5
OUT 7D58B4
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.V5 J1.50 U22.50 7A3 8C4
MDATA<45> 100 6B3
OUT
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.V6 J1.52 U22.51 6D4
MDATA<46> 100 8C46B3 6D4 7A3 7D5 8C4
OUT
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.W7 J1.54 U22.53 7A3
MDATA<47> 100 6B3
OUT
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.U3 J1.84 U25.2 6D4
MDATA<48> 100 7D56B3 6D4 7B1 7D5 8B4
OUT
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.U5 J1.86 U25.4
MDATA<49> OUT
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.U6 J1.88 U25.5 8B4
MDATA<50> OUT 7D56B3 6D4 7B1 7D5 8B4
6 ::1930:4400 TRUE 5 MIL SPACING U1.U7 J1.90 U25.7 7B1
MDATA<51> 100 6B3
OUT
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.R6 J1.94 U25.8 6D4
MDATA<52> 100 6B3
OUT
6 ::1930:4400 200 TRUE 5 MIL SPACING U1.R7 J1.96 U25.10 6D4 7B1 7D5 8B4
MDATA<53> 100 6B3 6D4 7B1 7D5 8B4
OUT
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.P5 J1.98 U25.11
MDATA<54> OUT 6B3 6D4 7B1 7D5 8B4
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.P6 J1.100 U25.13
MDATA<55> OUT 6B3 6D4 7B1 7D5 8B4
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.L6 J1.122 U25.42
MDATA<56> OUT 6B3 6D4 7B1 7D5 8B4
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.L7 J1.124 U25.44
MDATA<57> OUT 6B3 6D4 7B1 7D5 8B4 CONSTRAINTS -- MEMORY PAGE (1)
A MDATA<58> 100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.K6 J1.126 U25.45
OUT 6B3 6D4 7B1 7D5 8A4
NOTICE OF PROPRIETARY PROPERTY
A
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.K7 J1.128 U25.47
MDATA<59> OUT 6B3 6D4 7A1 7D5 8A4
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.J3 J1.132 U25.48 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
MDATA<60> OUT 6B3 6D4 7A1 7D5 8A4 AGREES TO THE FOLLOWING

100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.J5 J1.134 U25.50 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
MDATA<61> OUT 6B3 6D4 7A1 7D5 8A4
II NOT TO REPRODUCE OR COPY IT
100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.J6 J1.136 U25.51
MDATA<62> OUT 6B3 6D4 7A1 7D5 8A4 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

100 6 ::1930:4400 200 TRUE 5 MIL SPACING U1.J7 J1.138 U25.53

MDATA<63> OUT 6B3 6D4 7A1 7D5 8A4 SIZE DRAWING NUMBER REV.

CONSTRAINTS -- MEMORY PAGE 1 APPLE COMPUTER INC.

D 051-6130-C ACI: C
ECS:1.0
SCALE SHT OF
NONE 42 53

8 7 6 5 4 3 2 1
 CR-43

8 7 6 5 4 3 2 1
PULSE_PARAM
SIG_NAME MAX_VIA_COUNT ASSIGN_TOPOLOGY NET_SCHED DELAY_RULE STUB_LENGTH/ ECL NET_SPACING_TYPE
SIG_NAME PULSE_PARAM MAX_VIA_COUNT DELAY_RULE STUB_LENGTH/ ECL NET_SPACING_TYPE NET_SCHED

100 5 ::1100:2400 200 TRUE 5 MIL SPACING RP2.1 J1.106

T_M_BA0 OUT 6A6 7A4 7B2 7C2 7C4 8B4 100 4 200 TRUE 5 MIL SPACING
DQM0* ::3000:4000 6C2 7C4
5 ::1100:2400 TRUE 5 MIL SPACING RP2.4 J1.110 OUT
T_M_BA1 100 200 6A6 7A2 7A4 7C2 7C4 8B4 4 8C5
OUT 100 200 TRUE 5 MIL SPACING
DQM1* ::3000:4000 6C2 7C4
5 TRUE 5 MIL SPACING RP15.4 J1.65 OUT
T_SDRAS* 100 6A6 7A2 7A4 7C2 7C4 8C5 4 8C5
OUT 100 200 TRUE 5 MIL SPACING
DQM2* ::3000:4000 6C2 7C2
5 ::1100:2400 200 TRUE 5 MIL SPACING RP15.3 J1.66 OUT
T_SDCAS* 100 6A6 7A2 7A4 7C2 7C4 8C4 4 8B5
OUT 100 ::3000:4000 200 TRUE 5 MIL SPACING
5 ::1100:2400 200 TRUE 5 MIL SPACING R202.1 J1.67
DQM3* OUT 6C2 7C2
T_MEMWE* 100 6A6 7A2 7A4 7C2 7C4 8C5 4 8B5
OUT 100 200 TRUE 5 MIL SPACING

D
DQM4*
100 4
::3000:4000

::3000:4000 200 TRUE 5 MIL SPACING

OUT 6C2
8C4
7A4 D
DQM5* OUT 6C2 7A4
100 4 200 TRUE 5 MIL SPACING 8C4
DQM6* ::3000:4000 6C2 7A2
OUT
100 4 200 TRUE 5 MIL SPACING 8B4
DQM7* ::3000:4000 6C2 7A2
OUT
8B4

MIN_LINE_WIDTH
SIG_NAME PULSE_PARAM MAX_VIA_COUNT NET_SCHED DELAY_RULE MAX_EXPOSED_LENGTH STUB_LENGTH/ ECL NET_SPACING_TYPE
100 2 5 ::300:500 250 100 TRUE
PANGEA_CPU_CLK OUT 5A7
6 5 ::2700:5500 200 TRUE 6C6
CPU_CLK 100 250 3A4
OUT
2 5 ::100:600 100 TRUE 10 MIL SPACING 3A8
CPUFBOUT 100
OUT 5
100 U1.M3 RP8.7 ::600:1100 200 TRUE 5 MIL SPACING
100 2 5 ::475:700 100 TRUE 10 MIL SPACING CS0* OUT 6A4 6C2
TCPUFBOUT OUT 5B1 5
6C5 100 U1.M5 RP8.8 ::600:1100 200 TRUE 5 MIL SPACING
100 2 5 ::900:1000 100 TRUE 10 MIL SPACING CS1* OUT 6A4 6C2
CPUFB7 OUT 5B2 5
100 U1.R3 RP8.5 ::600:1100 200 TRUE 5 MIL SPACING
100 2 5 ::1800:2000 100 TRUE 10 MIL SPACING CS2* OUT 6A4 6C2
CPUFB6 OUT 5B2 5
100 U1.P7 RP8.6 ::600:1100 200 TRUE 5 MIL SPACING
100 2 5 ::1800:2000 100 TRUE 10 MIL SPACING CS3* OUT 6A4 6C2
CPUFB5 OUT 5B3 4 7C4
100 ::300:1400 200 TRUE 5 MIL SPACING
100 2 5 ::950:1100 100 TRUE 10 MIL SPACING T1CS0* OUT 6A5 7A2
CPUFB4 OUT 5B3 4 7A4 7C2
100 ::300:1400 200 TRUE 5 MIL SPACING
2 5 ::1800:2000 100 TRUE 10 MIL SPACING T1CS1* 6A5
C CPUFB3 100

100 2 5 ::1800:2000 100 TRUE 10 MIL SPACING

OUT 5B3
4
OUT
C
CPUFB2 OUT 5B2 100 ::300:1400 200 TRUE 5 MIL SPACING
RAM_CKE0 OUT 6C2 7B8
100 2 5 ::900:1000 100 TRUE 10 MIL SPACING 100 4 ::300:1400 200 TRUE 5 MIL SPACING
CPUFB1 OUT 5B2 RAM_CKE1 OUT 6C2 7B8
100 6 5 ::475:1200 100 TRUE 10 MIL SPACING
CPUFBIN OUT 5B1
66 2 5 ::950:1000 100 TRUE 10 MIL SPACING 5B8
AGPFB0 OUT 9B3
66 2 5 ::475:700 100 TRUE 10 MIL SPACING
AGPFB1 OUT 9B4
66 2 5 ::950:1100 100 TRUE 10 MIL SPACING
AGPFB2 OUT 9B4 100 4 ::400:1400 200 TRUE 5 MIL SPACING
66 2 5 ::475:700 100 TRUE 10 MIL SPACING M_BA0 OUT 6A5 6C2
AGPFB3 OUT 9C4 100 4 ::400:1400 200 TRUE 5 MIL SPACING
100 2 10 MIL SPACING
M_BA1 OUT 6A5 6C2
FBOUT_CLK 10
OUT 5A8 100 4 ::400:1000 200 TRUE 5 MIL SPACING
6D8 SDRAS* OUT 6A5 6C2
28507_CLK1 100 2 10 10 MIL SPACING 6C7
OUT 100 4 ::400:1000 200 TRUE 5 MIL SPACING
100 10 10 MIL SPACING
SDCAS* OUT 6A5 6C2
28507_CLK2 2 OUT 6C7 100 4 ::400:1000 200 TRUE 5 MIL SPACING
100 10 10 MIL SPACING
MEMWE* OUT 6A5 6C2
28507_CLK3 2 OUT 6D7
28507_CLK4 100 2 10 10 MIL SPACING 6D7
OUT
28507_CLK5 100 2 10 10 MIL SPACING 6D7
OUT

MK1708_SSOUT 2 5 10 MIL SPACING 22A3

OUT

ATI_SSIN 2 5 10 MIL SPACING 22A2 22B3

OUT
TBENDIVCLK 100 2 5 10 MIL SPACING 6B8 6C6
OUT
33 2 4 10 MIL SPACING
TBEN OUT 3A6 6B6 14B8
B 574_CLK 100 2 10 10 MIL SPACING
OUT 6C6 7B8 B

VCORE_CSH U19.1:R354.1::590 VCORE_CS

OUT
VCORE_CSL U19.2:R354.2::590 VCORE_CS
OUT

2_5V_CSH U20.1:R355.1::590 2_5V_CS OUT

2_5V_CSL U20.2:R355.2::590 2_5V_CS
OUT
VCORE_DH U19.18:Q53.4::780 OUT

VCORE_DL U19.15:Q42.4::780
OUT

VCORE_LX U19.19:L59.1::590
OUT

2_5V_DH U20.18:Q41.4::780
OUT
2_5V_DL U20.15:Q10.4::780
OUT

2_5V_LX U20.19:L38.1::590
OUT

+PBUS C442.1:Q53.5::390 19D4 24A4 32D5 34B4 34D5 34D8 37D8 38C3 38C4 38D6 39C3
OUT
C444.1:Q53.6::390 39C6 43A4
+PBUS OUT 19D4 24A4 32D5 34B4 34D5 34D8 37D8 38C3 38C4
C446.1:Q53.7::390 38D6 39C3 39C6 43A4 CONSTRAINTS -- MEMORY PAGE (2)
+PBUS OUT 19D4 24A4
A +PBUS C447.1:Q53.8::390
OUT
32D5 34B4 34D5
19D4 24A4 32D5
34D8
34B4
37D8
34D5
38C3
34D8
38C4 38D6 39C3 39C6 43A4
37D8 38C3 38C4 38D6 39C3 NOTICE OF PROPRIETARY PROPERTY
A
C443.1:Q41.5::390 39C6 43A4
+PBUS OUT 19D4 24A4 32D5 34B4 34D5 34D8 37D8 38C3 38C4
38D6 39C3 39C6 43A4 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
C313.1:Q41.6::390 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
+PBUS OUT 19D4 24A4 32D5 34B4 34D5 34D8 37D8 38C3 38C4 38D6 39C3 AGREES TO THE FOLLOWING
39C6 43A4 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
VCORE_BST U19.17:D31.3::780
OUT
II NOT TO REPRODUCE OR COPY IT
2_5V_BST U20.17:D30.3::780 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
OUT

SIZE DRAWING NUMBER REV.

ACI: C
APPLE COMPUTER INC.
D 051-6130-C ECS:1.0

CONSTRAINTS -- MEMORY PAGE 2 SCALE

NONE
SHT
43
OF
53

8 7 6 5 4 3 2 1
 CR-44

8 7 6 5 4 3 2 1

AGP RELATED DOO-DAHS MIN_LINE_WIDTH

CONSTRAINTS -- AGP, FIREWIRE
PULSE_PARAM MAX_EXPOSED_LENGTH DELAY_RULE (THE
SIG_NAME / MAX_VIA_COUNT / STUB_LENGTH NET_SCHED NET_SPACING_TYPE DELAY_RULE SEQUEL!)
::3800:3900 5
AGP_CLK 66 / 12 250 / 200 R213.1 U5.AG16 10 MIL SPACING OUT 9C5 22C6
::0225:0275 5
PANGEA_AGP_CLK 66 / 3 250 / 200 10 MIL SPACING 9C4
D AGP_FB_IN
AGP_FB_OUT
66
66
/
/
3
3
/
/
200
200
10 MIL SPACING
10 MIL SPACING
::1325:1350
::0320:0335
5
5
OUT
OUT
OUT
9C3
9C3
FIREWIRE RELATED DOO-DAHS D
/ / ::3750:3980 PULSE_PARAM
AGPAD<31> 66 8 200 U1.B11 U5.AK14 5 MIL SPACING OUT 9B2 9D1 22D6 22D7 SIG_NAME / MAX_VIA_COUNT MAX_EXPOSED_LENGTH STUB_LENGTH NET_SPACING_TYPE
AGPAD<30> 66 / 8 / 200 U1.E11 U5.AG14 5 MIL SPACING ::3750:3980 9B2 9D1 22D6 22D7
OUT
AGPAD<29> 66 / 8 / 200 U1.F12 U5.AG15 5 MIL SPACING ::3750:3980 9B2 9D1 22D6 22D7 FW_XI 24.576 / 2 250 200 10 MIL SPACING 19B7
OUT OUT
AGPAD<28> 66 / 8 / 200 U1.C9 U5.AH14 5 MIL SPACING ::3750:3980 9C2 9D1 22D6 22D7 FW_XO 24.576 / 2 250 200 10 MIL SPACING 19B7
OUT OUT
AGPAD<27> 66 / 8 / 200 U1.A9 U5.AJ15 5 MIL SPACING ::3750:3980 9C2 9D1 22D6 22D7 FW_LINK_SCLK 49.152 / 4 250 200 10 MIL SPACING 10B3 19A8
OUT OUT
AGPAD<26> 66 / 8 / 200 U1.F11 U5.AH15 5 MIL SPACING ::3750:3980 9C2 9D1 22D6 22D7 PHYSCLK 49.152 / 4 250 200 10 MIL SPACING 19A7 19B7
OUT OUT
AGPAD<25> 66 / 8 / 200 U1.A8 U5.AK16 5 MIL SPACING ::3750:3980 9C2 9D1 22D6 22D7 FW_LINK_D<7> 49.152 / 4 200 10B3 19A7
OUT OUT
AGPAD<24> 66 / 8 / 200 U1.G11 U5.AK17 5 MIL SPACING ::3750:3980 9C2 9D1 22D6 22D7 FW_LINK_D<6> 49.152 / 4 200 10B3 19A7
OUT OUT
AGPAD<23> 66 / 8 / 200 U1.B10 U5.AJ16 5 MIL SPACING ::3750:3980 9C2 9D1 22D6 22D7 FW_LINK_D<5> 49.152 / 4 200 10B3 19A7
OUT OUT
AGPAD<22> 66 / 8 / 200 U1.A10 U5.AH18 5 MIL SPACING ::3750:3980 9C2 9D1 22D6 22D7 FW_LINK_D<4> 49.152 / 4 200 10B3 19A7
OUT OUT
AGPAD<21> 66 / 8 / 200 U1.B9 U5.AK19 5 MIL SPACING ::3750:3980 9C2 9D1 22D6 22D7 FW_LINK_D<3> 49.152 / 4 200 10C3 19A7
OUT OUT
AGPAD<20> 66 / 8 / 200 U1.B8 U5.AJ18 5 MIL SPACING ::3750:3980 9C2 9D1 22D6 22D7 FW_LINK_D<2> 49.152 / 4 200 10C3 19A8
OUT OUT
AGPAD<19> 66 / 8 / 200 U1.E12 U5.AG18 5 MIL SPACING ::3750:3980 9C2 9D1 22D6 22D7 FW_LINK_D<1> 49.152 / 4 200 10C3 19A8
OUT OUT
AGPAD<18> 66 / 8 / 200 U1.C8 U5.AJ19 5 MIL SPACING ::3750:3980 9C2 9D1 22D6 22D7 FW_LINK_D<0> 49.152 / 4 200 10C3 19A8
OUT OUT
AGPAD<17> 66 / 8 / 200 U1.C11 U5.AH19 5 MIL SPACING ::3750:3980 9C2 9D1 22D6 22D7 FW_LINK_CNTL1 49.152 / 4 200 10B3 19A8
OUT OUT
AGPAD<16> 66 / 8 / 200 U1.A7 U5.AG19 5 MIL SPACING ::3750:3980 9C2 9D1 22D6 22D7 FW_LINK_CNTL0 49.152 / 4 220 10B3 19A8
OUT OUT
AGPAD<15> 66 / 8 / 200 U1.E14 U5.AJ22 5 MIL SPACING ::3020:3270 9C2 9D1 22D6 22D7 FW_LINK_LREQ 49.152 / 4 200 10B3 19B8
OUT OUT
AGPAD<14> 66 / 8 / 200 U1.F14 U5.AH22 5 MIL SPACING ::3020:3270 9C2 9D1 22D6 22D7 PHYD7 49.152 / 4 200 19A7 19B7
OUT OUT
200 ::3020:3270
AGPAD<13> 66 / 8 / U1.C12 U5.AK22 5 MIL SPACING OUT 9C2 9D1 22D6 22D7 PHYD6 49.152 / 4 200 OUT 19A7 19B7
AGPAD<12> 66 / 8 / 200 U1.F15 U5.AG23 5 MIL SPACING ::3020:3270 9C2 9D1 22C6 22D7 PHYD5 49.152 / 4 200 19A7 19B7
OUT OUT
AGPAD<11> 66 / 8 / 200 U1.C14 U5.AH23 5 MIL SPACING ::3020:3270 9C2 9D1 22C6 22D7 PHYD4 49.152 / 4 200 19A7 19B7
OUT OUT
AGPAD<10> 66 / 8 / 200 U1.F13 U5.AK25 5 MIL SPACING ::3020:3270 9C2 9D1 22C6 22D7 PHYD3 49.152 / 4 200 19A7 19B7
OUT OUT
AGPAD<9> 66 / 8 / 200 U1.A12 U5.AK23 5 MIL SPACING ::3020:3270 9C2 9D1 22C6 22D7 PHYD2 49.152 / 4 200 19A7 19B7
OUT OUT
AGPAD<8> 66 / 8 / 200 U1.B12 U5.AH24 5 MIL SPACING ::3020:3270 9C2 9D1 22C6 22D7 PHYD1 49.152 / 4 200 19A7 19B7
OUT OUT
/ / ::3020:3270 9C2 9D1 22C6 22D7 / 19A7 19B7
C AGPAD<7>
AGPAD<6>
66
66 /
8
8 /
200
200
U1.B13 U5.AK27
U1.C15 U5.AK24
5 MIL SPACING
5 MIL SPACING ::3020:3270
OUT
OUT 9C2 9D1 22C6 22D7
PHYD0
PHYCNTL1
49.152
49.152 /
4
4
200
200 5 MIL SPACING
OUT
OUT 20 19A7 19B7
C
AGPAD<5> 66 / 8 / 200 U1.B14 U5.AH26 5 MIL SPACING ::3020:3270 9C2 9D1 22C6 22D7 PHYCNTL0 49.152 / 4 200 5 MIL SPACING 20 19A7 19B7
OUT OUT
AGPAD<4> 66 / 8 / 200 U1.F16 U5.AG24 5 MIL SPACING ::3020:3270 9C2 9D1 22C6 22D7 PHYLREQ 49.152 / 4 200 5 MIL SPACING 19B7
OUT OUT
AGPAD<3> 66 / 8 / 200 U1.A11 U5.AJ27 5 MIL SPACING ::3020:3270 9C2 9D1 22C6 22D7
OUT
AGPAD<2> 66 / 8 / 200 U1.A13 U5.AK26 5 MIL SPACING ::3020:3270 9D1 9D2 22C6 22D7
OUT
AGPAD<1> 66 / 8 / 200 U1.A14 U5.AH27 5 MIL SPACING ::3020:3270 9D1 9D2 22C6 22D7
OUT
AGPAD<0> 66 / 8 / 200 U1.E15 U5.AJ28 5 MIL SPACING ::3020:3270 9D1 9D2 22C6 22D7
OUT
AGPADSTB<1>
AGPADSTB<0>
66
66
/
/
8
8
/
/
200
200
R779.2 U5.AG17
R778.2 U5.AH25
10 MIL SPACING
10 MIL SPACING
::0500:0550
::0600:0650
OUT
OUT
9A1
9A1
14C5
14C5
22B7
22B7
FIREWIRE DIFFERENTIAL THINGIES
AGPSBA<7> 66 / 8 / 200 5 MIL SPACING OUT 9B1 22B6 22B7 PULSE_PARAM
SIG_NAME / MAX_VIA_COUNT MAX_EXPOSED_LENGTH NET_SPACING_TYPE ECL NET_SPACING_TYPE DIFFERENTIAL_PAIR
AGPSBA<6> 66 / 8 / 200 5 MIL SPACING OUT 9B1 22A6 22B7
AGPSBA<5> 66 / 8 / 200 5 MIL SPACING OUT 9B1 22A6 22B7 PHYTPA0T 400 / 2 250 TRUE PHYTPA0 OUT 19C3
AGPSBA<4> 66 / 8 / 200 5 MIL SPACING OUT 9B1 22A6 22B7 PHYTPA0C 400 / 2 250 TRUE PHYTPA0 OUT 19B1
AGPSBA<3> 66 / 8 / 200 5 MIL SPACING OUT 9B1 22A6 22B7 PHYTPB0T 400 / 2 250 TRUE PHYTPB0 OUT
19B6
AGPSBA<2> 66 / 8 / 200 5 MIL SPACING OUT 9B1 22A6 22B7 PHYTPB0C 400 / 2 250 TRUE PHYTPB0 OUT
AGPSBA<1> 66 / 8 / 200 5 MIL SPACING OUT 9B1 22A6 22B7 PHYTPA0T_FL 400 / 2 250 TRUE PHYTPA0_FL OUT 19C2
AGPSBA<0> 66 / 8 / 200 5 MIL SPACING OUT 9B1 22A6 22B7 PHYTPA0C_FL 400 / 2 250 TRUE PHYTPA0_FL OUT 19C2
AGPSBSTB 66 / 5 / 200 10 MIL SPACING ::4385:4490 OUT 9B1 14C5 22A7 PHYTPB0T_FL 400 / 2 250 TRUE PHYTPB0_FL OUT 19C2
AGPCBE<3> 66 / 8 / 200 U1.E9 U5.AK18 5 MIL SPACING ::3750:3980 OUT 9B1 9B2 22C6 22C7 PHYTPB0C_FL 400 / 2 250 TRUE PHYTPB0_FL OUT 19C2
AGPCBE<2> 66 / 8 / 200 U1.F9 U5.AK21 5 MIL SPACING ::3750:3980 OUT 9B1 9B2 22C6 22C7
AGPCBE<1> 66 / 8 / 200 U1.A6 U5.AG22 5 MIL SPACING ::3020:3270 OUT 9B1 9B2 22C6 22C7
AGPCBE<0> 66 / 8 / 200 U1.F10 U5.AJ24 5 MIL SPACING ::3020:3270 OUT 9B1 9B2 22C6 22C7
AGPST<2> 66 / 8 / 200 U1.A15 U5.AK12 5 MIL SPACING ::3500:4500 OUT 9A1 22B6 22B7
AGPST<1> 66 / 8 / 200 U1.G16 U5.AJ12 5 MIL SPACING ::3500:4500 OUT 9A1 22B6 22B7
AGPST<0> 66 / 8 / 200 U1.B15 U5.AG12 5 MIL SPACING ::3500:4500 OUT 9B1 22B6 22B7
AGPPAR 66 / 8 / 200 U1.A16 U5.AJ21 5 MIL SPACING ::3500:4500 9B1 22C6
B AGPFRAME* 66 / 8 / 200 U1.B17 U5.AH20 5 MIL SPACING ::3500:4500
OUT
OUT 9B1 14C5 24D6 B
AGPTRDY* 66 / 8 / 200 U1.B16 U5.AK20 5 MIL SPACING ::3500:4500 OUT 9B1 14C5 24D6
AGPIRDY* 66 / 8 / 200 U1.C17 U5.AG20 5 MIL SPACING ::3500:4500 OUT 9B1 14C5 24D6
PCISTOP* 66 / 8 / 200 U1.E17 U5.AH21 5 MIL SPACING ::3500:4500 OUT 9B1 14B5 24D5
AGPDEVSEL* 66 / 8 / 200 U1.B7 U5.AG21 5 MIL SPACING ::3500:4500 OUT 9B1 14C5 24C6
AGPPIPE* 66 / 8 / 200 U1.B5 U5.AG13 5 MIL SPACING ::3500:4500 OUT 9A1 14B5
AGPRBF* 66 / 8 / 200 U1.B6 U5.AH12 5 MIL SPACING ::3500:4500 OUT 9A1 14B5 22A6

CONSTRAINTS -- AGP, FIREWIRE

A NOTICE OF PROPRIETARY PROPERTY
A
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

APPLE COMPUTER INC.

D 051-6130-C ACI: C
ECS:1.0
SCALE SHT OF
NONE 44 53

8 7 6 5 4 3 2 1
 CR-45

8 7 6 5 4 3 2 1

SIG_NAME PULSE_PARAM MAX_EXPOSED_LENGTH ECL DIFFERENTIAL_PAIR MAX_VIA_COUNT STUB_LENGTH DELAY_RULE NET_SPACING_TYPE SIG_NAME ECL DIFFERENTIAL_PAIR NET_SPACING_TYPE

66 6 ::5170:5920 5 MIL SPACING USB_DCM TRUE USB_DC

UIDE_DA<0> OUT 12B6 12C5 OUT 13C5 17D8
66 6 ::5170:5920 5 MIL SPACING USB_DCP TRUE USB_DC
UIDE_DA<1> OUT 12B6 12C5 OUT 13C5 17D8
66 6 ::5170:6100 5 MIL SPACING USB_DAM TRUE USB_DA
UIDE_DA<2> OUT 12A6 12C5 OUT 13C5 17B8
66 6 ::5170:5920 5 MIL SPACING USB_DAP TRUE USB_DA
UIDE_IORDY OUT 12A6 16B8 OUT 13C5 17B8
66 6 ::5170:5920 5 MIL SPACING
D
UIDE_CS0_L
66 6 ::5170:5920 5 MIL SPACING
OUT 12A6 12C5 D
UIDE_CS1_L OUT 12A6 12C5
66 6 ::1600:2000 5 MIL SPACING USB_DCM_R TRUE USB_DC_R
UIDE_RESET_L OUT 12A6 12C5 OUT 17D5
66 6 :::5920 10 MIL SPACING USB_DCP_R TRUE USB_DC_R
UIDE_DIOW_L OUT 12A6 12C5 OUT 17D5
66 6 :::5920 10 MIL SPACING USB_DAM_R TRUE USB_DA_R
UIDE_DIOR_L OUT 12A6 12C5 OUT 17B5
66 6 ::5170:5920 5 MIL SPACING USB_DAP_R TRUE USB_DA_R
UIDE_DMAACK_L OUT 12A6 12B5 OUT 17B5
66 6 ::5170:5920 5 MIL SPACING
UIDE_DMAREQ OUT 12A6 12D5
66 6 ::5170:5920 5 MIL SPACING
UIDE_IRQ OUT 12A6 12D5
66 6 ::5170:5920 5 MIL SPACING USB_DCM_OUT TRUE USB_DC_OUT
UIDE_D<0> OUT 12B5 12B6 OUT 17D2
66 6 ::5170:5920 5 MIL SPACING 12B7 USB_DCP_OUT TRUE USB_DC_OUT
UIDE_D<1> OUT 12B5 12B6 OUT 17D2
66 6 ::5170:5920 5 MIL SPACING 12B7 USB_DAM_OUT TRUE USB_DA_OUT
UIDE_D<2> OUT 12B5 12B6 OUT 17B1
66 6 ::5170:5920 5 MIL SPACING 12B7 USB_DAP_OUT TRUE USB_DA_OUT
UIDE_D<3> OUT 12B5 12B6 OUT 17B1
66 6 ::5170:5920 5 MIL SPACING 12B7
UIDE_D<4> OUT 12B5 12B6
66 6 ::5170:5920 5 MIL SPACING 12B7
UIDE_D<5> OUT 12B5 12B6
66 6 ::5170:5920 5 MIL SPACING 12B7
UIDE_D<6> OUT 12A5 12B6
66 6 U1.J30:RP19.4:5170:5920 5 MIL SPACING 12B7
UIDE_D<7> OUT 12A5 12B6
66 6 ::5170:5920 5 MIL SPACING 12B7 SIG_NAME NET_SCHED
UIDE_D<8> OUT 12A5 12B6 SIG_NAME NET_SCHED
66 6 ::5170:5920 5 MIL SPACING 12B7 U1.P34 R323.2 R324.1 U3.25 J11.30 20C2 U1.W28 RP43.4 J11.42
UIDE_D<9> OUT 12A5 12B6 IODATA<0> OUT 12D6 12D7 13B3 CB_CE2* OUT 12B6 15C6
12B7 13B4 20B8 20C1 20C6
C UIDE_D<10>
66
66
6

6
::5170:5920

::5170:5920
5 MIL SPACING
5 MIL SPACING
OUT 12A5
12B7
12B6 IODATA<1>
U1.R32 R325.2 R326.1 U3.26 J11.31

U1.T29 R327.2 R328.1 U3.27 J11.32

OUT 12D6 12D7 13B3
13B4 20B2 20B8
CB_CE1*
U1.W29 RP43.3 J11.7

U1.W33 RP43.1 J11.44

OUT 12B6
20C8
15C6 C
UIDE_D<11> OUT 12A5 12B6 IODATA<2> OUT 20C112D6 12D7 13B3 CB_IORD* OUT 13B5 15C6
66 6 ::5170:5920 5 MIL SPACING 12B7 U1.T28 R329.2 R330.1 U3.28 J11.2 20C813B4 20B2 20B8 20C1 U1.W34 RP43.2 J11.45 20C6
UIDE_D<12> OUT 12A5 12B6 IODATA<3> OUT 12D6 12D7 13B3 CB_IOWR* OUT 13B5 15C6
66 6 ::5170:5920 5 MIL SPACING 12B7 U1.R33 R334.2 R335.1 U3.32 J11.3 13B4 20B2 20C1 U1.A32 R370.1 J11.16 20B6
UIDE_D<13> OUT 12A5 12B6 IODATA<4> OUT 12D6 12D7 13B3 CB_IREQ* OUT 13C7 15B6
66 6 ::5130:5920 5 MIL SPACING 12B7 U1.R34 R336.2 R327.1 U3.33 J11.4 13B4 20B2 20C1 U1.B31 R368.1 J11.61 20B8
UIDE_D<14> OUT 12A5 12B6 IODATA<5> OUT 20C812D6 12D7 13B3 CB_REG* OUT 13C7 15B6
66 6 ::5170:5920 5 MIL SPACING 12B7 U1.U29 R338.2 R339.1 U3.34 J11.5 20C813B4 20B2 20C1 20C8 U1.AE33 R306.2 J11.58 20B6
UIDE_D<15> OUT 12A5 12B6 IODATA<6> OUT 12D6 12D7 13B3 CB_RESET OUT 13C8 15A6
12B7 U1.T33 U3.35 J11.6 13B4 20B2 20C1 U1.Y34 R369.1 J11.59 20B6
T_UIDE_RESET_L
66 6 100 R300.2:710.1:3508:3858 5 MIL SPACING IODATA<7> OUT CB_WAIT* OUT 13B5 15B6
OUT 12C4 16B6 20B6
16C7 U1.N28 U3.21 J11.29
IOADDR<0> OUT 12C6 20B8 20C3
2.5,25 TRUE 4 100 ::300:500 10 MIL SPACING U1.J34 U3.20 J11.28 U1.V29 RP44.2 J11.15
MII_TX_CLK_F OUT 18D6 IOADDR<1> OUT 12C6 20B3 20B8 CSWE* OUT 12C6 15C6
2.5,25 TRUE 4 ::300:500 10 MIL SPACING U1.M30 U3.19 J11.27 U1.Y33 RP44.1 J11.9 20B8
MII_RX_CLK_F OUT 18C6 IOADDR<2> OUT 12C6 20B3 20B8 CSOE* OUT 12C6 15C6
2.5,25 TRUE 4 100 :::6000 10 MIL SPACING U1.L32 U3.18 J11.26 20C8
MII_TX_CLK 250 10C7 18D7 IOADDR<3> 12C6 20B3 20B8
OUT OUT
2.5,25 250 TRUE 4 100 :::6000 10 MIL SPACING U1.K34 U3.17 J11.25
MII_RX_CLK OUT 10C7 18C7 IOADDR<4> OUT 12C6 20B3 20B8
10,100 2 100 10 MIL SPACING U1.L33 U3.16 J11.24
MII_TPTDP OUT 18D3 IOADDR<5> OUT 13C5 20B3 20B8
10,100 2 100 10 MIL SPACING U1.N29 U3.15 J11.23
MII_TPTDN OUT 18D3 IOADDR<6> OUT 13B5 20B3 20B8
10,100 2 100 10 MIL SPACING U1.M32 U3.14 J11.22
MII_TPRDP OUT 18C3 IOADDR<7> OUT 13B5 20B3 20B8
10,100 2 100 10 MIL SPACING U1.L34 U3.8 J11.12
MII_TPRDN OUT 18C3 IOADDR<8> OUT 13B5 20B3 20B8
U1.P28 U3.7 J11.11
2KV_ISO===100 MIL SPACING
IOADDR<9> OUT 13B5 20B3 20B8
U1.M33 U3.36 J11.8
IOADDR<10> 13B5 20B3 20C8
B RJ45_TXP
10,100 RJ45_TX 2 100 1
OUT 18D1 IOADDR<11>
U1.P29 U3.6 J11.10
OUT

OUT 13B5 20B3 20C8

B
10,100 2 100 1 U1.M34 U3.5 J11.21
RJ45_TXN RJ45_TX OUT 18D1 IOADDR<12> OUT 13B5 20B3 20B8
10,100 RJ45_RX 2 100 1 U1.P30 U3.4 J11.13
RJ45_RXP OUT 18D1 IOADDR<13> OUT 13B5 20B3 20B8
10,100 RJ45_RX 2 100 1 U1.N33 U3.3 J11.14
RJ45_RXN OUT 18C1 IOADDR<14> OUT 13B5 20B3 20B8
U1.R28 U3.2 J11.20
IOADDR<15> OUT 13B5 20B3 20B7
U1.P32 U3.1 J11.19
IOADDR<16> OUT 13B5 20B3 20B8
U1.N34 U3.40 J11.46
IOADDR<17> OUT 13B5 20B3 20B6
U1.R29 U3.13 J11.47
IOADDR<18> OUT 13B5 20B3 20B6
18.432 TRUE 3 :::1000 10 MIL SPACING U1.P33 U3.37 J11.48
PAN_XIB OUT 13B7 IOADDR<19> OUT 13B5 20B3 20B6
18.432 TRUE 2 100 :::1000 10 MIL SPACING U1.R30 U3.38 J11.49
PAN_XO OUT 13B7 IOADDR<20> OUT 13B5 20B3 20B6
18.432 TRUE 2 :::500 10 MIL SPACING
PAN_XT OUT 13B7
10 TRUE 2 100 :::1000 10 MIL SPACING
PMU_10MHZ_XOUT OUT 21B5
10 TRUE 2 100 :::1000 10 MIL SPACING
PMU_10MHZ_XIN OUT 21B5

0.032768 TRUE 2 100 :::1000 10 MIL SPACING

PMU_32KHZ_XOUT OUT 21B4
0.032768 TRUE 2 100 :::1000 10 MIL SPACING
PMU_32KHZ_XIN OUT 21B4

CONSTRAINTS -- MISCELLANEOUS
A NOTICE OF PROPRIETARY PROPERTY
A
2KV_ISO === 100MIL SPACING
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
MANUALLY TAKE CARE OF 2KV FOR ETHERNET PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
66 6 ::5170:5920 10 MIL SPACING II NOT TO REPRODUCE OR COPY IT
T_UIDE_DIOW_L OUT 12C4 16B6
66 6 ::5170:5920 10 MIL SPACING III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
T_UIDE_DIOR_L OUT 12C4 16B6
SIZE DRAWING NUMBER REV.

APPLE COMPUTER INC.

D 051-6130-C ACI: C
ECS:1.0
SCALE SHT OF
NONE 45 53

8 7 6 5 4 3 2 1
 CR-46

8 7 6 5 4 3 2 1

NET ATTRIBUTES
I1

I2
F_ACOUT
ACOM_IN_RL
VOLTAGE=0V
VOLTAGE=0V
MIN_LINE_WIDTH=10MIL
MIN_LINE_WIDTH=10MIL
MLB STACKUP
A_COM_IN_RC VOLTAGE=0V MIN_LINE_WIDTH=10MIL
I3 THICKNESS TRACE WIDTH
D I4
A_COM_IN
SPKR_STAR_GND
VOLTAGE=0V
VOLTAGE=0V
MIN_LINE_WIDTH=10MIL
MIN_LINE_WIDTH=10MIL 27B3 27B4 27C3 27C4 27C6 28B3 28B8 28C4 28C8 29A5 29C2
LAYER
(MILS) (MILS) D
I5

I6
MB_IN_STAR_GND VOLTAGE=0V MIN_LINE_WIDTH=10MIL 39B8 46D7 -------------------------------------------------------------------------
LINE_STAR_GND VOLTAGE=0V MIN_LINE_WIDTH=10MIL
I8
L1 SIGNAL(TOP) 1.560 5.0
LINE_OUT_GND VOLTAGE=0V MIN_LINE_WIDTH=10MIL
I7 46D7
I10
SPKR_STAR_GND VOLTAGE=0V MIN_LINE_WIDTH=10MIL 27B3 27B4 27C3 27C4 27C6 28B3 L1-L2 3.740
I9
DIG_STAR_GND VOLTAGE=0V MIN_LINE_WIDTH=10MIL 28B8 28C4 28C8 29A5 29C2 39B8
SCREAMER_AGND VOLTAGE=0V MIN_LINE_WIDTH=10MIL L2 GROUND1(GND) 1.170
I11
VOLTAGE=0V MIN_LINE_WIDTH=10MIL
---
I12
LINE_OUT_COM_STAR

I13
ACOUT_RL VOLTAGE=0V MIN_LINE_WIDTH=10MIL L2-L3 6.500
ACOUT_LCL VOLTAGE=0V MIN_LINE_WIDTH=10MIL
I14
ACOUT VOLTAGE=0V MIN_LINE_WIDTH=10MIL L3 SIGNAL(IN1) 1.170 5.0
I15

I17
SCREAMER_RET VOLTAGE=0V MIN_LINE_WIDTH=10MIL
MIN_LINE_WIDTH=10MIL
L3-L4 6.300
I16
SPEAKER_RET VOLTAGE=0V

I18
SCREAMER_DVDD_RET VOLTAGE=0V MIN_LINE_WIDTH=10MIL L4 SIGNAL(IN2) 1.170 5.0
MIN_LINE_WIDTH=10MIL
I19
+AVCC_SCREAMER VOLTAGE=5V
MIN_LINE_WIDTH=10MIL
L4-L5 6.500
I23
+AVCC_F_SCREAMER VOLTAGE=5V

I21
+DVDD_F_SCREAMER VOLTAGE=5V MIN_LINE_WIDTH=10MIL L5 POWER(VCC) 1.170 ---
+6V_AUDIO VOLTAGE=6V MIN_LINE_WIDTH=10MIL 17C7 17D7 27C8 29C3 29D5 34D3
I22
+5V_MAIN VOLTAGE=5V MIN_LINE_WIDTH=10MIL 46C716C2 17B7 19D4 24D2 28C4 L5-L6 6.500
I20
FILT_MIC_PWR VOLTAGE=5V MIN_LINE_WIDTH=10MIL 34C2 35D8 36B3 37B4 37D4 38B3 L6 SIGNAL(IN3)
I24
38B8 38C5 40D6 1.170 5.0
MIC_PWR VOLTAGE=5V MIN_LINE_WIDTH=10MIL
I25

I27
+24V_EXT VOLTAGE=24V MIN_LINE_WIDTH=50MIL
L6-L7 6.500
ADAPTER_+24V VOLTAGE=24V MIN_LINE_WIDTH=50MIL
I26

I28
+24V_EXT_GND VOLTAGE=0V MIN_LINE_WIDTH=50MIL L7 GROUND2(GND) 1.170 ---
+5V_VGADDCPWR_SLEEP_F VOLTAGE=5V MIN_LINE_WIDTH=10MIL 25D5
I29
+5V_VGA_FUSE VOLTAGE=5V MIN_LINE_WIDTH=10MIL 25D6 40C6 L7-L8 3.540
C I30

I31
+3V_VGA_MAIN VOLTAGE=3V MIN_LINE_WIDTH=10MIL 14D3 14D4 22A4 22C5 22D8 23B8 23C1
MIN_LINE_WIDTH=10MIL 27D6 23C8 24C2 25C2 25D2 36C4 46B7 L8 SIGNAL(BOTTOM) 1.560 5.0
C
+AUD3.3V VOLTAGE=3V
I32
+5V_MAIN_A VOLTAGE=5V MIN_LINE_WIDTH=20MIL 27D8 28B8 28C6 -------------------------------------------------------------------------
I33 -------------------------------------------------------------------------
VOLTAGE=6V MIN_LINE_WIDTH=20MIL 17C7 17D7 27C8 29C3 29D5 34D3 46C7
I34
+6V_AUDIO
TOTAL ---
+AUD5V VOLTAGE=5V MIN_LINE_WIDTH=10MIL 27C6 29B3 29C3 29D5
I35
FIL2_AUD3.3V VOLTAGE=3V MIN_LINE_WIDTH=10MIL 27D4
I36
FIL2_DIG3.3V VOLTAGE=3V MIN_LINE_WIDTH=10MIL 27B6 27C2 27C5 SIGNAL TRACE IMPEDANCE OF ? OHMS
I37
+AVDD_CPU_SLEEP VOLTAGE=1.4V MIN_LINE_WIDTH=10MIL 3B3
I38
+A1VDD_CPU_SLEEP
CPU ROUTES ARE ? OHMS?
VOLTAGE=1.4V MIN_LINE_WIDTH=10MIL 3B2 AGP ROUTES ARE 5 MILS OHMS?
I39
+A2VDD_CPU_SLEEP VOLTAGE=1.4V MIN_LINE_WIDTH=10MIL 3A2 RAM ROUTES ARE ? OHMS?
I40
+A1VDD_CPU_F_SLEEP VOLTAGE=1.4V MIN_LINE_WIDTH=10MIL 3B1 3D6
I41
+A2VDD_CPU_F_SLEEP VOLTAGE=1.4V MIN_LINE_WIDTH=10MIL 3A1 3D6
I42

+VCORE_SLEEP VOLTAGE=1.4V MIN_LINE_WIDTH=10MIL 3D4 38B3 38C1 40C6

I43
+VIO_CPU_SLEEP VOLTAGE=1.8V MIN_LINE_WIDTH=10MIL 3C4 3D5 4B4 4D5 5C2 13D1 14A6 14A7 14C6 14D6 14D8 15B1
I44
+3V_MAIN VOLTAGE=3V MIN_LINE_WIDTH=10MIL 15D2 35C3 36B4
I45
+2.5V_MAIN VOLTAGE=2.5V MIN_LINE_WIDTH=10MIL
I46

+3V_SLEEP VOLTAGE=3V MIN_LINE_WIDTH=10MIL 4C6 6B5 6C5 9D4 13B3 15A5 15B5 15B7 15C5 15C7 20C8 20D6
I47
+3V_CLKGEN_AVDD_SLEEP VOLTAGE=3V 22B5 22C1 25A6 25B5 25D4 27C6 35D2 40D4
I48
MIN_LINE_WIDTH=10MIL 6B4 6D8
+3V_CLKGEN_SLEEP VOLTAGE=3V MIN_LINE_WIDTH=10MIL 6C4 6C8 6D4 6D8
I49

I50 +1_8V_PVDD_MAIN VOLTAGE=1.8V MIN_LINE_WIDTH=10MIL 23B7 23D6

I51 +1_8V_AVDD_MAIN VOLTAGE=1.8V MIN_LINE_WIDTH=10MIL 23D6

I52 +1_8V_A2VDDQ_MAIN VOLTAGE=1.8V MIN_LINE_WIDTH=10MIL 23D6

B I53

I54
ATI_CORE_MAIN
+1_8V_LVDDR_MAIN
VOLTAGE=1.8V
VOLTAGE=1.8V
MIN_LINE_WIDTH=10MIL 22A5 22C8 23D7 37C8
MIN_LINE_WIDTH=10MIL 23A5
B
I55 +1_8V_MPVDD_MAIN VOLTAGE=1.8V MIN_LINE_WIDTH=10MIL 23A5

I56 +3V_VDDP_MAIN VOLTAGE=3V MIN_LINE_WIDTH=10MIL 23C6

I57 +3V_VGA_MAIN VOLTAGE=3V MIN_LINE_WIDTH=10MIL 14D3 14D4 22A4 22C5 22D8 23B8 23C1 23C8 24C2 25C2 25D2 36C4

I58
+3V_VDDR3_MAIN VOLTAGE=3V MIN_LINE_WIDTH=10MIL 23C3 46C7

I59 +2.5V_ATI_VDDR_MAIN VOLTAGE=2.5V MIN_LINE_WIDTH=10MIL

NET ATTRIBUTES
A NOTICE OF PROPRIETARY PROPERTY
A
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.

D 051-6130-C ACI: C
ECS:1.0
APPLE COMPUTER INC.
SCALE SHT OF
NONE 46 53

8 7 6 5 4 3 2 1
 CR-47

8 7 6 5 4 3 2 1
7) ACCORDING RADAR#2804787 - SCHEMATIC CHANGE-MOVE FAN TO SLEEP RAIL
REVISION HISTORY (1) A) USE J900(NEW FOXCONN AUDIO JACK) TO REPLACE J13
8) ACCORDING RADAR#2801304 - RETURN JOLLY ROGER OPTION
A) CONNECT SCC_RTSA* TO PIN6 OF J2 THROUGH A NOSTUFF 0 OHM RESISTOR
B) CONNECT SCC_RXDA TO PIN9 OF J2 THROUGH A NOSTUFF 0 OHM RESISTOR
SAHARA QUAL PCB(REV:0.0) C)
D)
E)
CONNECT
CONNECT
CONNECT
SCC_TXDA*
SCC_DTRA
SCC_TRXCA
TO
TO
TO
PIN12 OF J2 THROUGH A NOSTUFF 0 OHM RESISTOR
PIN8 OF J2
PIN14 OF J2
1) CHANGE CPU FROM SIDEWINDER TO SAHARA
2) CHANGE VGA FROM ATI-M3 TO ATI-M6 9) ACCORDING RADAR#2804786 - REMOVE CPU_VOCRE_LO_OC CIRCUIT
D 3) CHANGE AUDIO FROM TUMBLER TO SNAPPER A) REMOVE R832 AND Q808 D
10) ACCORDING RADAR#2803484 - ADD SLOW_CHRG AND FAST_CHRG BOM OPTION
A) ADD TWO ROW OF BOM OPTION FOR - SLOW_CHRG FOR P72, FAST_CHRG FOR P73
PROTO (REV:0.1) B) REMOVE THE HWCHG BOM FROM R539 AND ADD THE OMIT LABEL
C) ADD A BOM OPTION FOR R539 - SLOW_CHRG 3.16K AND FAST_CHRG 2.61K
1) ACCORDING RADAR#2773492 - UPDATES TO THE P72 SCHEMATICS 11) ACCORDING RADAR#2792009 - REMOVE UNUSED SCC LINES FOR MODEM
A) REMOVE NETS SCC_DTRA* AND SCC_TRXCA
2) ACCORDING RADAR#2774277 - P72 M6 SCHEMATICS FIXES FOR PROTO2 B) KEEP THE PULLDOWN RESISTORS ON SCC_GPIOA* AND SCC_TRXCA
A) UNSTUFF R902,R903,R905 12) ACCORDING RADAR#2800865 - I CAN’T CHARGE IPOD WHILE IB00K IS SLEEPING
B) CHANGE R906 TO 100K AND PULL UP TO VDDC
C) STUFF R914,R916 FOR M6 16MB VERSION A) ADD A 10BQ040 ,CATHODE CONNECT TO +FW_VP_FUSE_SW AND ANODE TO +28V_PWRBUS_SW
D) ADD R1116(0OHM) BETWEEN C954 AND C955
E) UNSTUFF R395 AND Q56 13) ACCORDING RADAR#2802944 - ATI SUGGESTION FOR AGP SUSPEND
A) ADD A 0 OHM RESISTOR R966 BETWEEN AGP_SUS_STAT_L_PU AND AGPSTOP*
3) ACCORDING RADAR#2775061 - CHANGE P72 TO HARDWARE CHARGING
14) ACCORDING RADAR#2803479 - CHANGE SOME TANTALUM AUDIO CAPS TO CERAMIC
4) ACCORDING RADAR#2777820 - NEW AVC CABLE CONNECTIONS A) CHANGE C607,C608 AND C391 FROM 1.0U TANT(127S1001) TO 1.0U CERMIC (132S1061)
A) ADD U210(74LVC1G125),F100,Q210,Q211,C1210,R957,R958,R959
FOR NEW AVC CONNCETOR. 15) ACCORDING RADAR#2803487 - MODIFICATION TO BATTERY CHARGING CIRCUIT
5) ACCORDING RADAR#2780508 - CHANGE TO THE AUDIO POWER DOWN CIRCUIT A) ADD A 0 OHM RESISTOR SERIES BETWEEN PIN12 OF U32 AND PIN2 OF D31
B) ADD A NOSTUFF 0.01U 003 CAP BETWEEN PIN4 OF Q73 AND PS_GND
A) REMOVE R462,R599,R600,R601,R602,R603,C638,Q86,Q87
B) CONNECT U300/PIN8 TO DGND 16) ACCORDING RADAR#2794253 - TBEN CIRCUIT-CHANGE D FLIP FLOPS TO JK
C) CONNECT U300/PIN6 TO IO_RESET_L A) REPLACE THE DIVIDEBY THREE CIRCUIT WITH A DUAL J-K FLIP FLOP 74LVC109
D) CHANGE U4/PIN AA33 NAME FROM AUDIO_HW_RESET_L TO PAN_GPIO1
C E) ADD 10K PULLUP FOR PAN_GPIO1 17) ACCORDING RADAR#2800233 - CHANGE POWER SUPPLY FOR INTERNAL M6 DDR MEMORY C
A) CHANGE THE VDDM OF M6 TO 2.5V. SO, UNSTUFF R949 AND STUFF R950
6) ACCORDING RADAR#2779003 - ADD A BOM OPTION TO PREPARE FOR SAHARA
DD2.0 18) ACCORDING RADAR#2794264 - AC CONNECTOR WAKE FROM SLEEP CIRCUIT CAHNGE
7) ACCORDING RADAR#2780490 - NEW FAN SPEED CONTROL CIRCUIT A) MOVE F100 FROM PAGE 25 TO PAGE 28
A) ADD U1200(ADM1030) AND Q1000 FOR NEW FAN CONTROL CIRCUIT B) REMOVE TP210 AND TP211
8) ACCORDING RADAR#2782007 - DASH MODEM PERFORMANCEIMPACTED BY 19) ACCORDING RADAR#2794755 - HSYNC AND VSYNC NEED TO BE MOVED TO DAC2
VCORE SWITCHER A) MOVE ATI_VSYNC FROM PIN AE23 TO PIN AF13
A) DISCONNECT ZH2 FROM GND B) MOVE ATI_HSYNC FROM PIN AE24 TO PIN AE14
9) ACCORDING RADAR#2782669 - ADD OPTIONAL CONTROL FOR VCORE VLOTAGE 20) ACCORDING RADAR#2795893 - VGA_VCORE_HI NEEDS TO BE HIGH AT POWERON
A) CHANGE U4/PIN AA33 NET NAME FROM PAN_GPIO1 TO VCORE_CTL A) CHANGE R956 TO 10K AND CONNECT TO +3V_MAIN
B) REMOVE THE NET NAME "CPU_VCORE_HI_OC" FROM U1/PIN16
C) ADD R1552 BETWEEN U1/PIN16 AND THE NET "CPU_VCORE_HI_OC" 21) ACCORDING RADAR#2795903 - UNSTUFFED COMPONENTS ON SCHEMATICS
D) ADD R1553(NOSTUFF) BETWEEN U1/PIN16 AND NET "VCORE_CTL" A) UNSTUFF R1112 AND STUFF R1111,R1110,C1109,C1110,Q810 AND Q809
10) ACCORDING RADAR#2782721 - ADDITIONAL M6 CHANGES FOR OK TO FAB 22) ACCORDING RADAR#2797834 - REMOVE PMU RESET BUTTON
A) ADD R954 FOR VGA_CORE_HI_OC SIGNAL PULLUP
B) CHANGE Q1504/PIN2 CONNECTION FROM PS_GND TO MAX1715_GND A) NOSTUFF S4
C) CHANGE THE NET NAME FROM VGA_VCORE_HI_OC TO VGA_VCORE_HI
23) ACCORDING RADAR#2754201- LENGTH CONSTRAINTS FOR CPU BUS SIGNALS
11) ACCORDING RADAR#2782641 - EXTERNAL VIDEO SCHEMATICS CHANGE A) CHANGE THE CONSTRAINTS OF CPU BUS TO 2500:3500 AND THE MAX COUT OF VIA TO 5
A) REMOVE R394,R393,R395,Q56,R392.C905
B) CHANGE R935,R936,R937 CONNECTION FROM U200/PIN AF22,AF23,AF24 24) ACCORDING RADAR#2794312 - FAN CIRCUITRY CHANGE
TO U200/PIN AF14,AF15,AF16 A) CHANGE THE NAME OF THERM* TO THERM_OD*
C) REMOVE COMPVSS SIGNAL AND L36
B) CHANGE R1206 TO 39K
B 12) ACCORDING RADAR#2784789 - PROTO BUILD BOM CHANGES 25) ACCORDING RADAR#2794262- INVESTIGATE M6 PLL POWER RAIL ARRANGEMENT B
A) STUFF R803(113S1102),R805(113S1473,R820(113S1000),R1110,R1111, A) UNSTUFF R951 AND CONNECT +1_8V_PVDD_MAIN TO +1_8V_LVDDR_MAIN
C1109,C1110,Q809,Q810
B) UNSTUFF R1115,R1112,Q211 26) ACCORDING RADAR#2794249 - NEW SPREAD SPECTRUM PART
C) CHANGE R539 TO 3.16K,1% (110S3163)
A) CHANGE THE SPREAD SPECTRUM CHIP FROM IMI C9531 TO CYPRESS CY28507
B) ADD 2 RESISTORS - ONE BETWEEN PMU_IIC_CLK AND +3_3V_PMU
ANOTHER IS PMU_IIC_DAT AND +3_3V_PMU
EVT (REV:0.2) 27) ACCORDING RADAR#2779003 - ADD A BOM OPTION TO PREPARE FOR SAHARA DD2.0
A) SET DD1X BOM OPTION FOR P72/P73 AND CHANGE THE BOM OPTION OF Q800,Q801,R804,R805 TO DD1X
1) ACCORDING RADAR#2798007 - ADD AUDIO/CONTROL CONNECTOR
A) USE J900(NEW FOXCONN AUDIO JACK) TO REPLACE J13 28) ACCORDING RADAR#2780490 - NEW FAN SPEED CONTROL CIRCUIT
B) ADD CONTROL CIRCUITS FOR I-POD A) ADD A NEW FAN CONTROL CIRCUIT ADM1030 TO REPLACE THE TWO THERMOSTATS
2) ACCORDING RADAR#2794270 - SCHEMATICS CHANGE-NEW BLUETOOTH CONN. 29) ACCORDING RADAR#2791511 - ADD PMU RESET FROM KEYBOARD CIRCUIT
A) USE 4PIN J100 CONN TO REPLACE J100(6PIN)
B) CHANGE THE USB-D CIRCUITS FOR BLUETOOTH MODULE. A) ADD RESET FUNCTION BY PRESSING THE SHIFT-CONTROL-FN-POWER KEY TO REPLACE RESET SWITCH
3) ACCORDING RADAR#2805677 - CHANGES FROM EVT LAYOUT REVIEW 30) ACCORDING RADAR#2794257 - CHANGE NAME OF AGPREF_PD
A) ADD R1300 BETWEEN J200-1 AND PAN_XIB A) CHANGE THE NAME OF AGPREF_PD TO AGPREF_PU
B) ADD BYPASS CAP C1100 NEAR U802 ON +3V_CLKGEN_SLEEP
C) MOVE RESISTORS R963,R964 AND R965 NEAR PANGEA 31) ACCORDING RADAR#2794329 - REMOVE BLEED CIRCUIT FOR ATI_CORE_MAIN
D) CHANGE C803,C804 AND C805 FORM 1.0U TO 10.0U WITH 0805 PACKAGE A) REMOVE THE CURRENT BLEED CIRCUIT FOR ATI_CORE_MAIN REVISION HISTORY (1)
E) ADD 4 MORE VIAS WHERE +3VCORE_SLEEP OF C800,C801,C836 IN THE BOTTOM LEFT CORNER ON PAGE 37 DESCRIPTION:
F) ADD AN EXTRA VIA ON PIN9 OF U32 TO GROUND ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
G) MAKE THE TRACE FROM PIN2 OF D31 GO FIRST TO PIN1 OF C156,THEN TO PIN2 OF R1557
A H) MOVE R1555 CLOSER TO U1 AND L1
NOTICE OF PROPRIETARY PROPERTY
A
4) ACCORDING RADAR#2805288 - CHANGE TO OVERTEMP CIRCUIT THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
A) CHANGE R1206 FORM 39K TO 27K PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
5) ACCORDING RADAR#2805242 - ADD RESISTOR TO SCC RTS SIGNAL FOR I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

TESTING PURPOSES II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
A) ADD R967 BETWEEN PIN1 OF U210 AND SCC_RTSA*
B) NAMED SLINK_TX_ENABLE_L ON U210 PIN1 SIZE DRAWING NUMBER REV.
ACI: C
6) ACCORDING RADAR#2794331 - REMOVE BLEED CIRCUIT FOR VCORE RAIL APPLE COMPUTER INC.
D 051-6130-C ECS:1.0
A) NOSTUFF C177,R15,Q6,C20,R11,Q8 SCALE SHT OF
NONE 47 53

8 7 6 5 4 3 2 1
 CR-48

8 7 6 5 4 3 2 1
5) ACCORDING RADAR#2831587 - P72 EVT : POP HEARD WHEN PLUG HEADPHONES INTO
ANALOG LINE OUT
REVISION HISTORY (2) A) CHANGE R139 FROM 100K TO 470K
6) ACCORDING RADAR#2862391 - CHANGE NAME OF BOM OPTION
A) CHANGE R1123 BOM OPTION TO "HIGH_PLL_RANGE_NO_PWRSTEP"
32) ACCORDING RADAR#2791719 - SCHEMATIC CHANGE - REMOVE R1115 B) CHANGE PAGE 1 BOM TABEL FROM "HIGH PLL RANGE NO PWRSTEP" TO "HIGH_PLL_RANGE_NO_PWRSTEP"
A) REMOVE R1115 BECAUSE SLEEP_L_LS IS ALREADY PULLED UP TO 5V RAIL 7) ACCORDING RADAR#2865479 - CHANGE CPU VCORE SETTING (LOW SETTING AND
33) ACCORDING RADAR#2792071 - REMOVE UNUSED RGB SIGNALS ON PAGE 22 VOLTAGE POSITIONING)
A) REMOVE THE UNUSED RGB SINGALS ON PAGE 22 (PIN AF22,AF23,AF24 ON M6) AND ADD NC FOR THEM A) CHANGE R1531 FROM 1K TO 100K FOR P72 GOOD CONFIGURATION
B) CHANGE R1535 FROM 100K TO 1K
D 34) ACCORDING RADAR#2792085 - REMOVE OLD HP_DETECT SIGNALS ON PAGE 22 C)
D)
DELETE R1542 AND R1543
ADD A 0 OHM RESISTOR R1560
D
A) REMOVE THE COMPVID_HP_TEST AND COMPVID_HP_DETECT FROM PAGE 22 (AC20 AND AD20 ON M6)

PVT (REV: A)
DVT (REV:0.3) 1) ACCORDING RADAR#2868519 - SOUND LEVEL RESETS TO LOW - UPDATE FOR PVT
1) ACCORDING RADAR#2843372 - ADD BACK FIREWIRE DIODE B) ADD A NAND GATE 74LVC1G32 FOR AUDIO RESET CIRCUIT
A) STUFF D1506 2) ACCORDING RADAR#2874422 - FIREWIRE DEAD ON P25 AND P92 DVT
2) ACCORDING RADAR#2823008 - P72 EVT UNITS PLUG IN A BUS POWERED YANO FW A) ADD TWO QUAD DIODE FOR PHYTPA0T,PHYTPA0C,PHYTPB0T,PHYTPB0C
HARD DRIVE - SCREEN GOES DARK. POWER PROBLEM 3) ACCORDING RADAR#2878614 - P72/P73 POPS FROM INTERNAL SPEAKERS POST
A) CHANGE THE NET OF D1506 PIN1 FROM +28V_PWRBUS_SW TO CHRG_OUT AND NOSTUFF D1506
B) CHANGE C160 FROM 0.01UF TO 0.1UF AUDIO REWORK
A) NOSTUFF D100 AND D101
3) ACCORDING RADAR#2838736 - SCHEMATIC CHANGE - 700 MHZ AND 1.5V B) CHANGE C1026 AND C1027 FROM 0.047UF TO 0.1UF
A) CHANGE BOM TABLE OF CPU FROM 750MHZ TO 700MHZ
B) REMOVE THE BOM OPTION ON R825 4) ACCORDING RADAR#2882917 - FIREWIRE AND BATTERY CHARGING PROTECTION
C) CHANGE 600MHZ CPU VCORE TO 1.5V A) STUFF DZ8 AND DZ9
4) ACCORDING RADAR#2840812 - CHANGE ALL MCLK LINES TO USE 0 OHM SEIES B) CHANGE VALUE OF C467 TO 0.1UF
TERMINATION RESISTORS
A) CHANGE R841,R843,R847 TO 0 OHM
5) ACCORDING RADAR#2831933 - P72 PLL RANGE CONFIGURATIONS
PVT (REV: A)
A) ALL CONFIGS SHOULD NOW HAVE THE "MID" PLL RANGE OPTIONS (NO POWERSTEP)
C B) ADD "MID OR HIGH RANGE NO PWRSTEP" AND LOW OR MID PLL RANGE" ROW FOR P72 GOOD CONFIG 1) ACCORDING RADAR#2890158 - P72 DEPLETED BATTERY MAY NOT CHARGE IN SYSTEM C
C) REMOVE "LOW PLL RANGE" ROW UNDER THE P72 CONFIGURATION A) CHANGE R518 AND R538 FROM 100K TO 93.1K
6) ACCORDING RADAR#2830139 - P72 IMPLEMENT POWERPLAY ON M6 ON P72
A) CHANGE C1505 TO 680P AND ADD C1521 1000P
7) ACCORDING RADAR#2831140 - P72 SCHEMAITC REVIEW ACTION ITEMS
PVT2 (REV: A)
1) ACCORDING RADAR#2910360 - MATCH P72 SPEAKER AMP TO P92
8) ACCORDING RADAR#2824938 - REQUIRED WAKEUP PULSE ON P72 HEADPHONE JACK A) CHANGE C397 AND C402 FROM 0.01UF(132S1045) TO 0.047UF(132S4743)
TAKES TOO LONG (H/W) B) CHANGE R424 AND R431 FROM 27K(113S1274) TO 20.5K(110S2054)
A) CHANGE C1210 WITH 0.047UF CAP AND PACKAGE FROM 0805 TO 0603 C) CHANGE R428 AND R423 FROM 47K(113S1474) TO 36K(113S1364)
9) ACCORDING RADAR#2829465 - AUDIO FIX - Q900 2) ACCORDING RADAR#2917330 - ADD BOOTBANGER BOARD TO P72/73
A) PIN 2 AND 3 OF Q900 ARE REVERSED. PIN2 SHOULD CONNECT TO GROUND. A) ADD OASIS AND MIRAGE OPTIONS TO THE BOM OPTION TABLE AT PAGE 1
10) ACCORDING RADAR#2820867 - TBEN DIVIDE-BY-THREE SCHEMATIC REPAIR B) CHANGE THE BOM OPTION OF J19 FROM NONPRODUCTION TO OMIT AT PAGE 15
C) ADD OMIT BOM OPTION TO R1531 AND R1535 AT PAGE 38.
A) CHANGE NET OF U802 PIN1 AND PIN15 FORM +3V_CLKGEN_SLEEP TO CPU_VCORE_HI_OC
11) ACCORDING RADAR#2825538 - KEYBOARD CHORD RESET OF PMU BOOTS
A) CHANGE NET OF U800 PIN5 FROM FN_KEY_L TO OPTION_KEY_L
B) NOSTUFF R19
RAMP (REV: B)
C) CHANGE R1554 FROM 1K(113S1103) TO 10K(113S1104) 1) ACCORDING RADAR#2917330 - ADD BOOTBANGER BOARD TO P72/P73
A) PAGE 38: CHANGE CPU VCORE SETTING TO 1.2V/1.5V
12) ACCORDING RADAR#2828251 - PMU IIC PULLUPS WRONG AT EVT B) PAGE 14: ADD MIRAGE BOMOPTION TO R268
A) ADD R1120 10K RESISTOR BETWEEN +3V_SLEEP AND THE SIGNAL PMU_IIC_DAT C) PAGE 15: ADD MIRAGE BOMOPTION TO R274
B) ADD R1121 10K RESISTOR BETWEEN +3V_SLEEP AND THE SIGNAL PMU_IIC_CLK
C) CHANGE THE VOLTAGE ON R1118-2 FROM +3_3V_PMU TO +3V_CLKGEN_SLEEP 2) ACCORDING RADAR#2933296 - DIFFERENT CPU ACI P/N AND UPDATE SCH VERSION
D) CHANGE THE VOLTAGE ON R1119-2 FROM +3_3V_PMU TO +3V_CLKGEN_SLEEP
B A) PAGE 1 : ADD OASIS AND MIRAGE BOMOPTIONS FOR P72/P73 B
13) ACCORDING RADAR#2829528 - UPDATE NO PWRSTEP BOM OPTION FOR NEW PLL B) PAGE 3 : ADD MIRAGE CPU ACI P/N
RANGE BITS C) CHANGE SCHEMATICS VERSION TO B
A) ADD R1122 10K (BETWEEN Q806 PIN2 AND PIN3) WITH "MID OR HIGH RANGE NO PWRSTEP"
B) ADD R1123 4.7K (BETWEEN Q807 PIN2 AND PIN3) WITH "HIGH PLL RANGE NO PWRSTEP" 3) ACCORDING RADAR#2933252 - CHNAGE THE FAN FET TO A STRONGER PART
C) CHANGE Q806 BOM OPTION TO "MID OR HIGH RANGE PWRSTEP"
D) CHANGE Q807 BOM OPTION TO "HIGH PLL RANGE PWRSTEP" A) PAGE 35: CHANGE Q1001 FROM 2N7002 TO SI2302DS(372S0027)
E) DELETE TWO ROWS ON PAGE 1 "MID RANGE PLL" AND "MID OR HIGH RANGE PLL"
F) ADD 4 ROWS ON PAGE 1 - "MID OR HIGH RANGE NO PWRSTEP" , "HIGH PLL NO PWRSTEP"
"MID OR HIGH RANGE PWRSTEP" , "HIGH PLL RANGE PWRSTEP"
14) ACCORDING RADAR#2830159 - FAST CHARGE FOR ALL SYSTEM CONFIGS RAMP (REV: C)
A) CHANGE ALL SYSTEM CONFIGS TO USE THE FAST_CHRG OPTION ON PAGE 1 1) ACCORDING RADAR#2942313 - MORE POST-RAMP SCHEMATIC MODIFICATIONS
15) ACCORDING RADAR#2841691 - SERIAL LINE REMAINSAT INTERMEDIATE LEVEL A) PAGE 19: STUFF FIREWIRE PROTECTION DIODES DZ8 AND DZ9
A) CHANGE R959 FORM 100K(113S1105) TO 470K (113S1475) B) PAGE 16: CHANGE J2 ACI P/N TO 516S0002
B) CHANGE C1210 FROM 0.047UF (132S4743) TO 0.01UF (132S1045) C) UPDATE SCHEMATICS VERSION TO REV.C
2) ACCORDING RADAR#2945017 - F3 BOOTROM
DVT2 (REV:0.4) A) PAGE 20: CHANGE BOOTROM ACI P/N TO 341S1036

1) ACCORDING RADAR#2855154 - SNAPPER AUDIO CHIP NEEDS SEPARATE RESET

A) ADD Q901,Q902 (2N7002), AND R1031 (100K,5%) REVISION HISTORY (2)
B) CHANGE NET NAME OF U300 PIN6 FROM IO_RESET_L TO TAS_RESET_L DESCRIPTION:

2) ACCORDING RADAR#2856224 - SCHEMATIC CHANGE - ARTRY PULL UP ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
A A) DISCONNECT ARTRY* FROM RP101
B) PULL UP ARTRY* WITH 1K RESISTOR (R1032) TO +VIO_CPU_SLEEP NOTICE OF PROPRIETARY PROPERTY
A
3) ACCORDING RADAR#2856231 - MORE BYPASS CAPACITORS ON SAHARA THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
A) ADD C980,C981(10U 0805) FOR +VCORE_SLEEP I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

4) ACCORDING RADAR#2862722 - INCREASE BANDWIDTH OF MICROPHONE AMPLIFIER II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
A) CHANGE C1017 FROM 0.022UF TO 0.047UF
B) CHANGE C1021 FROM 150P TO 47P SIZE DRAWING NUMBER REV.
C) CHANGE C1022 FROM 0.047UF TO 0.1UF 051-6130-C ACI: C
D) CHANGE R1019 FROM 36K TO 10K APPLE COMPUTER INC.
D ECS:1.C
SCALE SHT OF
NONE 48 53

8 7 6 5 4 3 2 1
 CR-49

8 7 6 5 4 3 2 1

*** Signal Cross-Reference *** AC_SW_G 30 CHGND2 17 18 19 37 GBE_REFCLK 10 38 MII_CRS 10 18 PMU_IIC_CLK 15 21

--- for the entire design -- AC_VOLT 18 30 CHGND3 24 27 GBL* 3 5 14 39 MII_MDC 10 18 PMU_IIC_DAT 15 21
ADAPTER_+24V 44 CHGR_OUT 31 GIOCLAMP 22 MII_MDIO 10 18 PMU_INT 13 14 21
+2_5V_ATILPVDD_MAIN 22 38 ADAPTER_I_REG 31 CHGR_VSW 31 GNDRET_FW 19 38 MII_PWR_EN_L 18 PMU_MISO 13 21
+2_5V_ENET_MAIN 18 ADAPTER_PWR_DRAIN 32 CHKSTP_IN* 3 14 GND_TRACKPAD 21 MII_RXD<3..0> 10 18 PMU_MOSI 13 21
+2_5V_F_A2VDDATI_MAIN 22 38 ADAPTER_PWR_SW 32 CHKSTP_OUT* 3 14 15 GND_VCORECONTROLLER 35 MII_RX_CLK 10 18 43 PMU_NMI_IRQ* 13 14 21
+2_5V_MAIN 10 11 18 22 35 36 38 ADAPT_D1 32 CI* 3 5 14 39 GND_VCOREOUTPUT 35 MII_RX_CLK_F 18 43 PMU_NMI_L 21
+2_5V_SLEEP 38 ADAPT_D2 32 CLKRUN_PD 22 23 GPIO0 22 MII_RX_DV 10 18 PMU_REQ* 13 14 21
+2_5V_VCC 35 ADC_POWER 28 CNVSS 21 GPIO1 22 MII_RX_ER 10 18 PMU_RESET_L 21
+3V_AGPVDD_MAIN 9 38 AGPAD<31..0> 9 22 42 COLO 27 GPIO2 22 MII_TPRDN 18 43 PMU_SCK 13 21
+3V_AMVDD_PANGEA_MAIN 10 11 38 AGPADSTB<1..0> 9 14 22 42 COMMAND_KEY_L 21 GPIO8 22 MII_TPRDP 18 43 POS_HRESET 3

D +3V_ATI_OSC_SLEEP 22
+3V_AVDD4_PANGEA_MAIN 6 38
AGPBUSY*
AGPCBE<3..0>
9 22
9 22 42
COMPVSS
COMP_RC
22 24 27
31
GPIO9
GPIO10
22
22
MII_TPTDN
MII_TPTDP
18 43
18 43
POWER1_CHGND
POWER2_CHGND
37
37
D
+3V_AVDD5_PANGEA_MAIN 5 38 AGPDEVSEL* 9 14 23 42 COMP_VID 22 24 27 GTR_THAN_13_0V 30 31 32 MII_TXD0_F 18 POWER_UP_L 21
+3V_AVDD6_PANGEA_MAIN 9 38 AGPFB0 9 41 CONTROL_KEY_L 21 HIT* 5 14 MII_TXD1_F 18 PS_BST_3V 33
+3V_FW_MAIN 19 38 AGPFB1 9 41 CORO 27 IAC_FB 31 MII_TXD2_F 18 PS_BST_5V 33
+3V_LCDVDD_SW 22 23 24 AGPFB2 9 41 CPUFB1 5 41 IAC_RC_COMP 31 MII_TXD3_F 18 PS_CS_3V 33
+3V_LCDVDD_SW_F 24 AGPFB3 9 41 CPUFB2 5 41 IBATTX0_65 31 MII_TXD<3..0> 10 18 PS_CS_5V 33
+3V_MAIN 3 5 6 7 8 9 10 11 13 14 15 16 18 19 AGPFRAME* 9 14 23 42 CPUFB3 5 41 IBATT_FB 31 MII_TX_CLK 10 18 43 PS_GND 27 30 31 32 33 35 36 37
20 21 22 23 24 25 33 34 38 AGPGNT* 9 14 23 CPUFB4 5 41 IBATT_RC_COMP 31 MII_TX_CLK_F 18 43 PS_GND_IN 30
+3V_MAIN_P 33 AGPIRDY* 9 14 23 42 CPUFB5 5 41 IBATT_SERVO 31 MII_TX_EN 10 18 PS_LX_3V 33
+3V_PHY_AVDD_MAIN 19 38 AGPPAR 9 22 42 CPUFB6 5 41 ICHRG_REG 31 MII_TX_ER 10 18 PS_LX_5V 33
+3V_PMU_AVCC 21 AGPPIPE* 9 14 42 CPUFB7 5 41 IINX0_62 31 MII_XTALIN 18 PS_NGATE_3V 33
+3V_PMU_CHGR 30 31 AGPPIPE_IDSEL 22 CPUFBIN 5 41 INTL_KBD 21 MII_XTALOUT 18 PS_NGATE_5V 33
+3V_SLEEP 4 13 15 20 22 24 26 34 38 AGPRBF* 9 14 22 42 CPUFBOUT 5 41 INV_PWREN_L 23 MOBM3G1 22 38 PS_PGATE_3V 33
+3V_SS_SW_F 22 AGPREQ* 9 14 23 CPUVCORE_PWR_OFF 36 IOADDR<20..0> 12 13 20 43 MOBM3G2 22 38 PS_PGATE_5V 33
+3V_VDDA1_PANGEA_MAIN 13 38 AGPRST_L 22 23 CPU_ADDR<31..0> 3 5 39 IOCLOCKSTOP_L 21 MOBM3G3 22 38 PS_REF 33
+3V_VDDA2_PANGEA_MAIN 13 38 AGPSBA<7..0> 9 22 42 CPU_BG* 3 5 39 IODATA<15..0> 12 13 20 43 MOBM3V1 22 38 PS_RSNS_5V 33
+3V_VDDA3_PANGEA_MAIN 13 38 AGPSBSTB 9 14 22 42 CPU_BR* 3 5 14 39 IO_RESET_L 20 21 22 MOBM3V2 22 38 PS_SS_3V 33
+3_3V_PMU 21 30 31 32 36 38 AGPST<2..0> 9 22 42 CPU_CLK 3 5 41 ITH_1625 31 MOBM3V3 22 38 PS_SS_5V 33
+3_3V_REF_PMU 21 38 AGPSTOP* 9 14 22 CPU_DATA<63..0> 3 5 39 I_CAP 26 MODEM_RESET* 13 14 16 PS_SYNC 33
+5V_BU 36 AGPTRDY* 9 14 23 42 CPU_DBG* 3 5 14 39 JIS_KBD 21 MODEM_SDOWN 13 14 16 28 PS_VL 33
+5V_BU_RAW 36 AGPVREF 9 38 CPU_HRESET* 3 15 KBD_ID 21 M_ADDR<12..0> 6 40 PWR_FET_S2 32
+5V_CD_SLEEP 16 34 AGP_CLK 9 22 42 CPU_HRST 14 15 21 KEYBOARD_X0_L 21 M_BA0 6 41 PWR_OR_R 36
+5V_HD_SLEEP 16 34 AGP_FB_IN 9 42 CPU_INT* 3 13 KEYBOARD_X1_L 21 M_BA1 6 41 PWR_STABLE_DELAY 31
+5V_INV_UF_SW 23 AGP_FB_OUT 9 42 CPU_INTR* 13 KEYBOARD_X2_L 21 NC_ERR1 26 QACK* 3 39
+5V_IO_SLEEP 21 24 27 28 34 38 AGP_INTA* 13 14 22 CPU_PLL_00 4 KEYBOARD_X3_L 21 NC_ERR2 26 QREQ* 3 5 14 39
+5V_MAIN 16 17 19 22 23 25 27 33 34 35 36 38 AINLM 26 28 CPU_PLL_01 4 KEYBOARD_X4_L 21 NC_LP1_5VTAP 26 R2SET 22
44 AINLP 26 28 CPU_PLL_10 4 KEYBOARD_X5_L 21 NC_LP_S 26 RAGPDEVSEL_L 22 23
+5V_MAIN_A 26 27 AINRM 26 28 CPU_PLL_CFG<3..0> 3 4 KEYBOARD_X6_L 21 NET43 28 RAGPFRAME_L 22 23
+5V_MAIN_P 27 33 AINRP 26 28 CPU_PLL_STOP_OC 4 21 KEYBOARD_X7_L 21 NET44 28 RAGPGNT_L 22 23
C +5V_TP_SLEEP_F 21
+5V_USB_A_F_SW 17
AML
AMR
28
28
CPU_STATE_LED_L 21
CPU_STOP_CLK* 5 21
KEYBOARD_X8_L
KEYBOARD_X9_L
21
21
NET45
NET46
28
28
RAGPIRDY_L
RAGPREQ_L
22 23
22 23
C
+5V_USB_A_SW 17 AOLO 27 CPU_TCK 3 15 KEYBOARD_Y0 21 NET47 28 RAGPSTOP_L 22 23
+5V_USB_B_F_SW 17 AORO 27 CPU_TDI 3 15 KEYBOARD_Y1 21 NET48 28 RAGPTRDY_L 22 23
+5V_USB_B_SW 17 AOUTL 26 27 CPU_TDO 3 15 KEYBOARD_Y2 21 NMI_BUTTON_L 21 RAM_CKE0 6 7 41
+5V_VGADDCPWR_SLEEP_F 24 AOUTR 26 27 CPU_TMS 3 15 KEYBOARD_Y3 21 NUMLCK_LED 21 RAM_CKE1 6 7 41
+5V_VGA_FUSE 24 38 ARTRY* 3 5 14 39 CPU_TRST* 3 15 KEYBOARD_Y4 21 NUMLOCK_LED_L 21 REG2_IN 32 36
+6V_AUDIO 17 26 28 33 44 ASIC_TCK 10 15 CPU_VCORE_DISCHRG 35 KEYBOARD_Y5 21 OOPS 21 RESET_BUTTON_L 21
+6V_AUDIO_PS 33 ASIC_TDI 10 15 CPU_VCORE_FB 35 KEYBOARD_Y6 21 OPTION_KEY_L 21 RESET_KEY_L 21
+24V_EXT 44 ASIC_TMS 10 15 CPU_VCORE_HI_OC 4 21 35 KEYBOARD_Y7 21 PANAUDCLKOUT 13 26 28 RING_DETECT* 13 14 16 21
+24V_EXT_GND 44 ASIC_TRST* 10 15 CPU_VCORE_PWR_EN 36 KW_AUD_BITCLK 13 PANGEAMCLK<6..0> 6 7 40 RJ45_4_5 18
+28V_INPUT14_SW 30 31 ATI_B 22 24 CPU_VCORE_PWR_SEQ 36 KW_AUD_DTI 13 26 PANGEA_ACS_REF 5 38 RJ45_7_8 18
+28V_PWRBUS_SW 31 ATI_B_FILTR 24 CS0* 6 41 KW_AUD_DTO 13 PANGEA_AGP_CLK 9 42 RJ45_FILTER 18
+ADAPTER 30 32 ATI_G 22 24 CS1* 6 41 KW_AUD_SYNC 13 PANGEA_CPU_CLK 5 41 RJ45_RREF 18
+ADAPTER_IN 30 ATI_G_FLTR 24 CS2* 6 41 KW_EXTINT3 13 14 PANGEA_SD_REF 6 38 RJ45_RXN 18 43
+ADAPTER_SW 30 31 ATI_HSYNC 22 24 CS3* 6 41 KW_IIC_CLK 13 15 16 26 PANGEA_STOPCPUCLK 5 RJ45_RXP 18 43
+AUD3.3V 26 ATI_R 22 24 CSOE* 12 15 20 43 KW_IIC_DAT 13 15 16 26 PANGEA_STOPXTAL* 13 RJ45_TREF 18
+AUD5V 26 28 ATI_R_FILTR 24 CSWE* 12 15 20 43 KW_PEND_PROC_INT 13 21 PANGEA_SUSP_ACK* 5 21 RJ45_TXN 18 43
+AVCC_F_SCREAMER 44 ATI_TEST_EN 22 CURRENT_ADJ 31 KW_PME* 13 PANGEA_SUSP_REQ* 5 21 RJ45_TXP 18 43
+AVCC_SCREAMER 44 ATI_VSYNC 22 24 DBWO* 3 5 14 39 KW_PROC_SLEEP_REQ* 13 21 PANGEA_SUS_REQ_IN* 5 ROMCS* 6
+AVDD_CPU_SLEEP 3 ATI_VSYNC_BUF 24 DCDC_EN 33 35 36 KW_WATCHDOG* 13 21 PANGEA_TDO 10 15 ROMOE* 6 20
+AVDD_CPU_SL_F 3 AUDIO_AMP_MUTE_L 13 27 DC_DC_EN_L 21 33 LACLK 7 20 PANGEA_TEI 10 38 ROMRW* 6
+DVDD_F_SCREAMER 44 AUDIO_HP_MUTE_L 13 27 DDC_CLK 22 24 LCD104_ID 22 24 PAN_AGPBUSY* 9 ROM_ONBOARD_CS* 20
+FW_VP_FUSE_SW 19 38 AUDIO_HP_SENSE_L 13 27 DDC_DAT 22 24 LCD_PWR_EN 22 23 PAN_AGPSTOP* 9 RSET 22
+PBUS 19 23 31 33 35 37 41 AUDIO_HW_RESET_L 13 26 DELTA_KEY_L 21 LCD_PWR_EN_L 23 PAN_QACK* 3 5 14 39 RUN/SS 30 31
+PBUS_FW_SW 19 38 AUD_MODEM 16 28 DIGCALLPROG 26 28 LCD_R_PWREN_L 23 PAN_XIA 13 RUN_OK 21
+VCORE_SLEEP 3 35 38 AUD_MODEM_RET 16 28 DIG_AUD3.3V 26 LID_CLOSED_L 21 23 PAN_XIB 13 43 R_SPKR_NEG 27
+VCORE_VCC 35 AUTO_MDIX_ENABLE_L 18 DIG_STAR_GND 44 LINE_OUT_COM 27 PAN_XO 13 43 R_SPKR_NEG_UF 27
+VIO_CPUBUS_MAIN 10 11 34 36 A_COM_IN 44 DNLOAD_CONFIG_L 21 LINE_OUT_COM_STAR 44 PAN_XT 13 43 R_SPKR_POS 27
B +VIO_CPU_SLEEP 3 4 5 13 14 15 34 36
+VP_CONN_SW 19 38
A_COM_IN_RC
BATT_CLK
44
32
DQM0*
DQM1*
6 7 8 41
6 7 8 41
LINE_OUT_GND
LINE_OUT_L
44
27
PBUS_DIV
PBUS_DIV1
30
31
SCC_DTRA*
SCC_GPIOA*
13 16
13 14 16
B
+VP_CPS 19 38 BATT_DATA 32 DQM2* 6 7 8 41 LINE_OUT_LO 27 PBUS_FUSE 31 SCC_RTSA* 13 16
+VP_SW 19 38 BATT_FET_DRAIN 32 DQM3* 6 7 8 41 LINE_OUT_R 27 PCI33EN 22 23 SCC_RXDA 13 16
1.5V_CPU_VCORE_EN 35 BATT_IN 32 DQM4* 6 7 8 41 LINE_OUT_RO 27 PCISTOP* 9 14 23 42 SCC_TRXCA 13 14 16
1.5V_CPU_VCORE_PATH 35 BATT_IN_0_L 21 32 DQM5* 6 7 8 41 LINE_STAR_GND 44 PHYCNTL0 19 42 SCC_TXDA* 13 16
1V20_REF 30 BATT_IN_1_L 21 DQM6* 6 7 8 41 LVDS0_MINUS 22 24 PHYCNTL1 19 42 SCREAMER_AGND 44
1_02V_AUX 31 BATT_ISNS 31 DQM7* 6 7 8 41 LVDS0_PLUS 22 24 PHYD0 19 42 SCREAMER_DVDD_RET 44
2_5V_BST 35 41 BATT_LINE 31 32 DRDY* 5 14 LVDS1_MINUS 22 24 PHYD1 19 42 SCREAMER_OUT_CL_F 27
2_5V_CC 35 BATT_NEG 32 DTI<2..1> 5 LVDS1_PLUS 22 24 PHYD2 19 42 SCREAMER_OUT_CR_F 27
2_5V_CSH 35 41 BATT_OK 32 ENET_ENRGYDET_IRQ_H 13 14 18 LVDS2_MINUS 22 24 PHYD3 19 42 SCREAMER_RET 44
2_5V_CSL 35 41 BATT_OK_REF 32 EQ_RESET_L 21 LVDS2_PLUS 22 24 PHYD4 19 42 SCR_DATAIN 13 26
2_5V_DH 35 41 BATT_POS 32 ETHERNET_CHGND 37 LVDSCLK_MINUS 22 24 PHYD5 19 42 SCR_SCLK 13 26 28
2_5V_DL 35 41 BATT_POS_F 32 ETHPHYRESETL 13 14 18 LVDSCLK_PLUS 22 24 PHYD6 19 42 SCR_SYNC 13 26 28
2_5V_FB 35 BATT_RC 32 ETH_RXD_PD 10 38 LVDS_DDC_CLK 22 24 PHYD7 19 42 SDCAS* 6 41
2_5V_GND 35 BATT_RES 32 FDBK1 26 LVDS_DDC_DATA 22 24 PHYLREQ 19 42 SDRAS* 6 41
2_5V_LX 35 41 BATT_V_GOOD 32 FDBK2 26 L_SPKR_NEG 27 PHYSCLK 19 42 SHIFT_KEY_L 21
2_5V_REF 35 BF_FET_G 31 FET_DRAIN 31 L_SPKR_NEG_UF 27 PHYTPA0C 19 42
2_5V_SHDN_L 35 BIASON 22 23 FIL2_AUD3.3V 26 L_SPKR_POS 27 PHYTPA0C_FL 19 42
2_5V_SYNC 35 BKLIGHT_PWM 22 23 FIL2_DIG3.3V 26 M1FH 28 PHYTPA0T 19 42
3V_BU_DIV 36 BKLIGHT_PWM_REG 23 FILT_MIC_PWR 44 M1FL 28 PHYTPA0T_FL 19 42
5V_TOL 20 BOOTWP* 20 FIL_AUD3.3V 26 M1HFILT 28 PHYTPB0C 19 42
10X_9X_MODE 3 4 BUPBAT_POS 36 FIL_AUD_STAR 26 M2GPIO2 22 24 PHYTPB0C_FL 19 42
786_GND 33 BYPASS_R_DRV 32 FN_KEY_L 21 M2GPIO3 22 24 PHYTPB0T 19 42
1625_BG 31 BYPASS_R_GATE 32 FPAR_AR<7..0> 8 MA<11..0> 22 23 PHYTPB0T_FL 19 42
1625_BST 31 BYTE 21 FW_C_LKON 10 19 MAIN_GOOD 21 PHYTPBIAS0 19 REFERENCE DESIGNATOR LOCATION INDEX (1)
1625_COMP 31 CAPLCK_LED 21 FW_LINK_CNTL0 10 19 42 MAX785_EN 33 PHY_LPS 19 DESCRIPTION:
1625_INTVCC 31 CAPSLOCK_LED_L 21 FW_LINK_CNTL1 10 19 42 MB_IN_STAR_GND 44 PHY_PD 19
ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
1625_SGND 31 CB_CE1* 12 15 20 43 FW_LINK_D<7..0> 10 19 42 MCK 22 PME* 13 21 25
A 1625_TG 31 CB_CE2* 12 15 20 43 FW_LINK_GPIO1 10 MCKIN 22 PMU_10MHZ_XIN 21 43
NOTICE OF PROPRIETARY PROPERTY
A
1625_VFB 31 CB_IORD* 13 15 20 43 FW_LINK_LPS 10 19 MCLK<3..0> 7 8 40 PMU_10MHZ_XOUT 21 43
1625_VIN 31 CB_IOWR* 13 15 20 43 FW_LINK_LREQ 10 19 42 MCP* 3 14 PMU_32KHZ_XIN 21 43
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
AACK* 3 5 14 39 CB_IREQ* 13 15 20 43 FW_LINK_SCLK 10 19 42 MDATA<63..0> 6 7 8 40 PMU_32KHZ_XOUT 21 43 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
ACOM_IN_RL 44 CB_REG* 13 15 20 43 FW_PHY_PD 13 19 MEMWE* 6 41 PMU_ACK* 13 21
ACOUT 44 CB_RESET 13 15 20 43 FW_PHY_RST* 19 MIC1HIGH 28 PMU_AC_DET 21 30 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
ACOUT_LCL 44 CB_WAIT* 13 15 20 43 FW_R0 19 MIC1LOW 28 PMU_AC_IN 21 30 II NOT TO REPRODUCE OR COPY IT
ACOUT_RL 44 CHARGE_I 21 31 FW_R1 19 MIC1S1 28 PMU_BATT_DET_L 32 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
AC_ID 21 30 CHARGE_LED_L 21 30 FW_XI 19 42 MIC1SHLD 28 PMU_CHGND 37
SIZE DRAWING NUMBER REV.
AC_OR_BATT_PWR 32 CHARGE_V 21 31 FW_XO 19 42 MIC_PWR 44 PMU_CHRG_BATT_0 21 32
AC_SW 30 CHGND1 18 F_ACOUT 44 MII_COL 10 18 PMU_CHRG_EN 30
APPLE COMPUTER INC.
D 051-6130-C ACI: C
ECS:1.0
SCALE SHT OF
NONE 49 53

8 7 6 5 4 3 2 1
 CR-50

8 7 6 5 4 3 2 1

TCPUFBOUT 5 41 VGA_CHASS_GND1 24
TEA* 3 5 14 39 VGA_DETECT* 22 24
TEMP 21 VGA_G 24
TERM_M_ADDR<12..0> 6 7 8 40 VGA_HSYNC 24
TI_CAP_PLL 26 VGA_R 24
TI_CS1 26 VGA_VSYNC 24
TI_CS2 26 VREFM 26
TI_MOD0 26 VREFP 26
TI_MOD1 26 VREF_VDDQ 22 38
TI_MOD2 26 VRFILT 26
TI_TI_SD 26 V_ADJ_NODE 35

D TI_VCOM
TRKPAD_RXD
26
21
WT*
XTALIN
3 5 14 39
22
D
TRKPAD_TXD 21 XTALOUT 22
TS* 3 5 14 39 ZENER_GTR_THAN_20V 31
TSIZ<2..0> 3 5 39 _VCHRG 31
TT<4..0> 3 5 39 SLEEP 21 26 33 34 35
TXVSSR1 38 SLEEP_LED 21
T_MEMWE* 6 7 8 41 SLEEP_LS 27 34
T_M_BA0 6 7 8 41 SLEEP_L_LS 18 19 25 34 35
T_M_BA1 6 7 8 41 SMB_CLK 21 32
T_PANGEAMCLK<6..6> 7 SMB_SDA 21 32
T_PMU_ACK* 21 SPEAKER_RET 44
T_RAM_CKE0 7 8 SPKR_STAR_GND 26 27 28 37 44
T_RAM_CKE0_L 7 SRESET* 3 14 15
T_RAM_CKE0_MLB 7 SSIN 22
T_RAM_CKE0_MLB_R 7 SSOUT 22
T_RAM_CKE0_R 7 SS_S0 22
T_RAM_CKE1 7 8 SS_S1 22
T_RAM_CKE1_L 7 SS_SD 22
T_RAM_CKE1_R 7 STANDBY_PU 22 23
T_ROMCS* 6 20 STOPXTAL* 13 21
T_ROMOE* 6 20 SUSPEND_PU 22
T_ROMWE* 6 20 T1CS0* 6 7 41
T_SDCAS* 6 7 8 41 T1CS1* 6 41
T_SDO 26 T1CS2* 6 8
T_SDRAS* 6 7 8 41 T1CS3* 6 8
T_UIDE_CS0_L 12 16 TA* 3 5 14 39
T_UIDE_CS1_L 12 16 TBST* 3 5 14 39
T_UIDE_D<15..0> 12 16
T_UIDE_DA<2..0> 12 16
C T_UIDE_DIOR_L
T_UIDE_DIOW_L
12 16 43
12 16 43
C
T_UIDE_DMAACK_L 12 16
T_UIDE_DMAREQ 12 16
T_UIDE_IORDY_L 16
T_UIDE_IRQ_L 12 16
T_UIDE_RESET_L 12 16 43
UIDE_CS0_L 12 43
UIDE_CS1_L 12 43
UIDE_D<15..0> 12 43
UIDE_DA<2..0> 12 43
UIDE_DIOR_L 12 43
UIDE_DIOW_L 12 43
UIDE_DMAACK_L 12 43
UIDE_DMAREQ 12 43
UIDE_IORDY 12 16 43
UIDE_IRQ 12 43
UIDE_RESET_L 12 43
UNI_IIC_CLK 8 10 15 34
UNI_IIC_CLK1 10 15 34
UNI_IIC_DAT 8 10 15 34
UNI_IIC_DAT1 10 15 34
UNI_PU_RESET* 10 21
UNI_RESET* 10 20 21
UPURESET* 10
URESET* 10
USB_DAM 13 17 43
USB_DAM_OUT 17 43
USB_DAM_R 17 43
B USB_DAP
USB_DAP_OUT
13 17 43
17 43
B
USB_DAP_R 17 43
USB_DBM 13 25
USB_DBM_T 25
USB_DBP 13 25
USB_DBP_T 25
USB_DCM 13 17 43
USB_DCM_OUT 17 43
USB_DCM_R 17 43
USB_DCP 13 17 43
USB_DCP_OUT 17 43
USB_DCP_R 17 43
USB_DDM 13 16
USB_DDM_T 16
USB_DDP 13 16
USB_DDP_T 16
USB_GND 17
USB_PWRFLT_A 13 17
USB_PWRFLT_B 13 17
USB_PWR_A 13 17 38
USB_PWR_B 13 17 38
USB_PWR_FLT_AB 38
USB_PWR_FLT_CD 38
VCHRG_GATE 31
VCORE_BST 35 41 REFERENCE DESIGNATOR LOCATION INDEX (2)
VCORE_CC 35 DESCRIPTION:
VCORE_CSH 35 41
ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
VCORE_CSL 35 41
A VCORE_DH 35 41
NOTICE OF PROPRIETARY PROPERTY
A
VCORE_DISCHRG 35
VCORE_DISCHRG_EN 35
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
VCORE_DL 35 41 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
VCORE_LX 35 41
VCORE_REF 35 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
VCORE_SHDN_L 35 36 II NOT TO REPRODUCE OR COPY IT
VCORE_SYNC 35 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
VDD_USB 13 38
SIZE DRAWING NUMBER REV.
VGA_B 24
VGA_CHASS_GND 24 37
APPLE COMPUTER INC.
D 051-6130-C ACI: C
ECS:1.0
SCALE SHT OF
NONE 50 53

8 7 6 5 4 3 2 1
 CR-51

8 7 6 5 4 3 2 1

*** Unit Cross-Reference *** A108 CAP 11 C52 CAP 19 C163 CAP 37 C273 CAP 3 C383 CAP 30
--- for the entire design -- A109 CAP 11 C53 CAP 19 C164 CAP 37 C274 CAP 3 C384 CAP_P 27
A110 CAP 11 C54 CAP 3 C165 CAP 37 C275 CAP 3 C385 CAP_P 27
A1 CAP 13 A111 CAP 11 C55 CAP 3 C166 CAP 37 C276 CAP 3 C386 CAP_P 22
A2 CAP 13 A112 CAP 11 C56 CAP 3 C167 CAP 18 C277 CAP 3 C387 CAP 33
A3 CAP 11 A113 CAP 11 C57 CAP_P 3 C168 CAP 18 C278 CAP 3 C388 CAP 33
A4 CAP 11 A114 CAP 11 C58 CAP 20 C169 CAP_P 35 C279 CAP 14 C389 CAP 33
A5 CAP 11 A115 CAP 11 C59 CAP 34 C170 CAP 34 C280 CAP 3 C390 CAP 22
A6 CAP 11 A116 CAP 11 C60 CAP 20 C171 CAP 35 C281 CAP 8 C391 CAP_P 27
A7 CAP 11 A117 CAP 11 C61 CAP 20 C172 CAP 35 C282 CAP 3 C392 CAP 36
A8 CAP 13 A118 CAP 11 C62 CAP 34 C173 CAP_P 35 C283 CAP 3 C393 CAP 27
D A9 CAP 11 A119 CAP 11 C63 CAP 20 C174 CAP 37 C284 CAP 3 C394 CAP 33 D
A10 CAP 11 A120 CAP 11 C64 CAP_P 20 C175 CAP 35 C285 CAP 3 C395 CAP 27
A11 CAP 11 A121 CAP 11 C65 CAP 20 C176 CAP 18 C286 CAP 3 C396 CAP 27
A12 CAP 11 A122 CAP 11 C66 CAP 20 C177 CAP 35 C287 CAP 3 C397 CAP 27
A13 CAP 11 A123 CAP 11 C67 CAP_P 17 C178 CAP 37 C288 CAP 3 C398 CAP 27
A14 CAP 11 A124 CAP 11 C68 CAP 3 C179 CAP_P 35 C289 CAP 3 C399 CAP 33
A15 CAP 5 A125 CAP 11 C69 CAP 24 C180 CAP 37 C290 CAP 3 C400 CAP 36
A16 CAP 11 A126 CAP 9 C70 CAP 24 C181 CAP 37 C291 CAP 3 C401 CAP 33
A17 CAP 11 A127 CAP 9 C71 CAP 37 C182 CAP 18 C292 CAP 17 C402 CAP 27
A18 CAP 11 A128 CAP 11 C72 CAP 24 C183 CAP 18 C293 CAP 34 C403 CAP 26
A19 CAP 11 A129 CAP 11 C73 CAP 24 C184 CAP 18 C294 CAP 17 C404 CAP 28
A20 CAP 11 A130 CAP 9 C74 CAP 37 C185 CAP_P 35 C295 CAP 8 C405 CAP 26
A21 CAP 11 A131 CAP 11 C75 CAP_P 33 C186 CAP 21 C296 CAP 34 C406 CAP 26
A22 CAP 11 A132 CAP 11 C76 CAP 24 C187 CAP 18 C297 CAP 8 C407 CAP 26
A23 CAP 11 A133 CAP 11 C77 CAP 17 C188 CAP 21 C298 CAP 7 C408 CAP 26
A24 CAP 11 A134 CAP 11 C78 CAP 24 C189 CAP_P 35 C299 CAP 7 C409 CAP_P 26
A25 CAP 11 A135 CAP 11 C79 CAP 37 C190 CAP 19 C300 CAP 7 C410 CAP 28
A26 CAP 11 A136 CAP 11 C80 CAP 37 C191 CAP 16 C301 CAP 17 C411 CAP 28
A27 CAP 11 A137 CAP 11 C81 CAP 35 C192 CAP 21 C302 CAP 36 C412 CAP_P 33
A28 CAP 11 A138 CAP 11 C82 CAP 37 C193 CAP 19 C303 CAP 36 C413 CAP 22
A29 CAP 11 A139 CAP 11 C83 CAP 27 C194 CAP 16 C304 CAP 17 C414 CAP 22
A30 CAP 11 A140 CAP 11 C84 CAP 37 C195 CAP 18 C305 CAP 5 C415 CAP_P 22
A31 CAP 11 A141 CAP 11 C85 CAP 35 C196 CAP 16 C306 CAP 8 C416 CAP 33
A32 CAP 11 A142 CAP 11 C86 CAP 27 C197 CAP_P 19 C307 CAP 8 C417 CAP 33
A33 CAP 11 A143 CAP 11 C87 CAP 30 C198 CAP 18 C308 CAP 5 C418 CAP_P 22
A34 CAP 11 A144 CAP 11 C88 CAP_P 35 C199 CAP 19 C309 CAP 17 C419 CAP 26
A35 CAP 11 A145 CAP 11 C89 CAP 30 C200 CAP 36 C310 CAP 8 C420 CAP 26
A36 CAP 11 A146 CAP 11 C90 CAP_P 35 C201 CAP 23 C311 CAP 8 C421 CAP 26
A37 CAP 11 A147 CAP 11 C91 CAP_P 36 C202 CAP_P 3 C312 CAP 7 C422 CAP 26

C A38
A39
CAP
CAP
11
11
A148
A149
CAP
CAP
11
11
C92
C93
CAP_P
CAP
33
23
C203
C204
CAP_P
CAP_P
3
3
C313
C314
CAP
CAP
7
7
C423
C424
CAP_P
CAP
26
22
C
A40 CAP 11 A150 CAP 11 C94 CAP 23 C205 CAP 19 C315 CAP 7 C425 CAP 26
A41 CAP 11 A151 CAP 11 C95 CAP_P 23 C206 CAP 23 C316 CAP 17 C426 CAP 28
A42 CAP 11 A152 CAP 11 C96 CAP_P 33 C207 CAP 23 C317 CAP 34 C427 CAP 32
A43 CAP 11 A153 CAP 11 C97 CAP 30 C208 CAP 18 C318 CAP 21 C428 CAP 26
A44 CAP 11 A154 CAP 11 C98 CAP 30 C209 CAP 3 C319 CAP 8 C429 CAP 31
A45 CAP 11 A155 CAP 11 C99 CAP_P 33 C210 CAP 3 C320 CAP 8 C430 CAP 31
A46 CAP 11 A156 CAP 11 C100 CAP_P 33 C211 CAP 3 C321 CAP 17 C431 CAP 31
A47 CAP 13 A157 CAP 11 C101 CAP_P 33 C212 CAP 3 C322 CAP 21 C432 CAP 28
A48 CAP 11 A158 CAP 11 C102 CAP 33 C213 CAP 3 C323 CAP 21 C433 CAP 31
A49 CAP 11 A159 CAP 11 C103 CAP_P 33 C214 CAP 3 C324 CAP 6 C434 CAP 26
A50 CAP 11 A160 CAP 11 C104 CAP 33 C215 CAP 3 C325 CAP_P 8 C435 CAP 32
A51 CAP 11 A161 CAP 11 C105 CAP 36 C216 CAP 3 C326 CAP 21 C436 CAP 32
A52 CAP 11 A162 CAP 11 C107 CAP 30 C217 CAP 3 C327 CAP 11 C437 CAP 26
A53 CAP 11 A163 CAP 11 C108 CAP_P 22 C218 CAP 3 C328 CAP 17 C438 CAP 31
A54 CAP 11 A164 CAP 11 C109 CAP 22 C219 CAP 19 C329 CAP 11 C439 CAP 26
A55 CAP 13 A165 CAP 11 C110 CAP 22 C220 CAP 3 C330 CAP 8 C440 CAP 28
A56 CAP 11 A166 CAP 11 C111 CAP 22 C221 CAP 36 C331 CAP 8 C441 CAP 32
A57 CAP 11 C1 CAP_P 35 C112 CAP 22 C222 CAP 36 C332 CAP 11 C442 CAP 31
A58 CAP 11 C2 CAP 37 C113 CAP_P 22 C223 CAP 23 C333 CAP 11 C443 CAP 28
A59 CAP 6 C3 CAP 37 C114 CAP 22 C224 CAP 7 C334 CAP 7 C444 CAP_P 22
A60 CAP 11 C4 CAP 33 C115 CAP_P 22 C225 CAP 3 C335 CAP 7 C445 CAP 22
A61 CAP 11 C5 CAP 18 C116 CAP 22 C226 CAP 3 C336 CAP 8 C446 CAP 31
A62 CAP 11 C6 CAP 35 C117 CAP 22 C227 CAP 19 C337 CAP 8 C447 CAP 26
A63 CAP 11 C7 CAP 35 C118 CAP 22 C228 CAP 8 C338 CAP 24 C448 CAP 28
A64 CAP 11 C8 CAP 35 C119 CAP 22 C229 CAP 3 C339 RES 24 C449 CAP 26
A65 CAP 11 C9 CAP 18 C120 CAP 22 C230 CAP 3 C340 CAP 24 C450 CAP 31
A66 CAP 11 C10 CAP 18 C121 CAP 22 C231 CAP 3 C341 CAP 11 C451 CAP 31

B A67
A68
CAP
CAP
11
11
C11
C12
CAP
CAP
21
35
C122
C123
CAP
CAP
22
28
C232
C233
CAP
CAP
3
3
C342
C343
CAP
CAP
9
11
C452
C453
CAP
CAP
34
26 B
A69 CAP 11 C13 CAP 18 C124 CAP 22 C234 CAP 3 C344 CAP 24 C454 CAP 31
A70 CAP 11 C14 CAP 18 C125 CAP 33 C235 CAP 3 C345 CAP 11 C455 CAP_P 31
A71 CAP 11 C15 CAP 18 C126 CAP 33 C236 CAP 3 C346 CAP 9 C456 CAP 34
A72 CAP 11 C16 CAP_P 21 C127 CAP 22 C237 CAP 8 C347 CAP 9 C457 CAP 34
A73 CAP 11 C17 CAP_P 18 C128 CAP 28 C238 CAP 3 C348 CAP 9 C458 CAP 31
A74 CAP 11 C18 CAP 18 C129 CAP 22 C239 CAP 3 C349 CAP 17 C459 CAP 32
A75 CAP 11 C19 CAP 18 C130 CAP 22 C240 CAP 19 C350 CAP 16 C460 CAP 16
A76 CAP 11 C20 CAP 35 C131 CAP 22 C241 CAP 3 C351 CAP 27 C461 CAP 26
A77 CAP 11 C21 CAP 18 C132 CAP 32 C242 CAP 3 C352 CAP 27 C462 CAP 16
A78 CAP 11 C22 CAP 18 C133 CAP 22 C243 CAP 3 C353 CAP 13 C463 CAP 31
A79 CAP 11 C23 CAP 35 C134 CAP 22 C244 CAP 3 C354 CAP 35 C464 CAP 31
A80 CAP 11 C24 CAP 35 C135 CAP 22 C245 CAP_P 8 C355 CAP 27 C465 CAP 16
A81 CAP 11 C25 CAP 18 C136 CAP 32 C246 CAP 3 C356 CAP 24 C466 CAP 16
A82 CAP 11 C26 CAP 18 C137 CAP 22 C247 CAP 3 C357 CAP 24 C467 CAP 31
A83 CAP 11 C27 CAP 18 C138 CAP 22 C248 CAP 19 C358 CAP 24 C468 CAP 26
A84 CAP 11 C28 CAP 18 C139 CAP 22 C249 CAP 19 C359 CAP 24 C469 CAP 28
A85 CAP 11 C29 CAP 18 C140 CAP 32 C250 CAP 3 C360 CAP 37 C470 CAP_P 16
A86 CAP 11 C30 CAP 35 C141 CAP 22 C251 CAP 3 C361 CAP 35 C471 CAP_P 16
A87 CAP 11 C31 CAP 35 C142 CAP 22 C252 CAP 3 C362 CAP 34 C472 CAP 26
A88 CAP 11 C32 CAP 21 C143 CAP 31 C253 CAP 19 C363 CAP 35 C473 CAP 21
A89 CAP 11 C33 CAP 21 C144 CAP 32 C254 CAP 19 C364 CAP 30 C474 CAP 28
A90 CAP 11 C34 CAP 35 C145 CAP 22 C255 CAP 3 C365 CAP 27 C475 CAP 32
A91 CAP 11 C35 CAP 35 C146 CAP 32 C256 CAP 8 C366 CAP 27
A92 CAP 11 C36 CAP 35 C147 CAP 31 C257 CAP 8 C367 CAP 27 REFERENCE DESIGNATOR LOCATION INDEX (3)
A93 CAP 11 C37 CAP 21 C148 CAP 32 C258 CAP 19 C368 CAP 27
DESCRIPTION:
A94 CAP 11 C38 CAP 21 C149 CAP 31 C259 CAP 19 C369 CAP 35
A95 CAP 11 C39 CAP 16 C150 CAP 22 C260 CAP 3 C370 CAP 27 ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
A A96
A97
CAP
CAP
11
11
C40
C41
CAP
CAP
36
21
C151
C152
CAP_P
CAP
31
31
C261
C262
CAP
CAP
3
3
C371
C372
CAP
CAP
27
35 NOTICE OF PROPRIETARY PROPERTY
A
A98 CAP 11 C42 CAP 21 C153 CAP 31 C263 CAP 3 C373 CAP 35
A99 CAP 11 C43 CAP_P 3 C154 CAP 31 C264 CAP 3 C374 CAP 24 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
A100 CAP 11 C44 CAP 19 C155 CAP 31 C265 CAP 3 C375 CAP 24 AGREES TO THE FOLLOWING
A101 CAP 11 C45 CAP 19 C156 CAP 31 C266 CAP 3 C376 CAP 24 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
A102 CAP 11 C46 CAP 18 C157 CAP_P 31 C267 CAP 7 C377 CAP 24 II NOT TO REPRODUCE OR COPY IT
A103 CAP 11 C47 CAP 19 C158 CAP 37 C268 CAP 7 C378 CAP 24
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
A104 CAP 11 C48 CAP 19 C159 CAP 31 C269 CAP 7 C379 CAP 24
A105 CAP 11 C49 CAP_P 19 C160 CAP 31 C270 CAP 7 C380 CAP 24 SIZE DRAWING NUMBER REV.
A106 CAP 11 C50 CAP 18 C161 CAP 31 C271 CAP 8 C381 CAP 24
A107 CAP 11 C51 CAP 19 C162 CAP 37 C272 CAP 3 C382 CAP 35
APPLE COMPUTER INC.
D 051-6130-C ACI: C
ECS:1.0
SCALE SHT OF
NONE 51 53

8 7 6 5 4 3 2 1
 CR-52

8 7 6 5 4 3 2 1

C610 CAP 27 L32 IND 21 Q82 TRA_2N7002 27 R113 RES 14 R234 RES 19 R346 RES 24
C611 CAP_P 27 L33 IND 24 R1 RES 21 R114 RES 30 R235 RES 19 R347 RES 6
C612 CAP 21 L34 IND 27 R2 RES 21 R115 RES 30 R236 RES 23 R348 RES 9
C613 CAP 21 L35 IND 13 R3 RES 21 R116 RES 35 R237 RES 19 R349 RES 6
C614 CAP 19 L36 IND 27 R4 RES 18 R117 RES 14 R238 RES 19 R350 RES 24
C615 CAP 19 L37 IND 27 R5 RES 35 R118 RES 14 R239 RES 23 R351 RES 25
C616 CAP 19 L38 IND 27 R6 RES 35 R119 RES 14 R240 RES 19 R352 RES 9
C617 CAP 19 L39 IND 27 R7 RES 18 R120 RES 35 R241 RES 19 R353 RES 16
C618 CAP 7 L40 IND 27 R8 RES 18 R121 RES 35 R242 RES 19 R354 RES 7
C619 CAP 7 L41 IND 27 R9 RES 18 R122 RES 30 R243 RES 19 R355 RES 7
C620 CAP_P 35 L42 IND 28 R10 RES 18 R123 RES 17 R244 RES 19 R358 RES 10

D C621
CP1
CAP 34
FINGER_PAD 27
L43
L44
IND
IND
26
32
R11
R12
RES
RES
35
14
R124
R125
RES
RES
13
10
R245
R246
RES
RES
19
19
R359
R360
RES
RES
15
9
D
D1 DIODE 35 L45 IND 26 R13 RES 35 R126 RES 10 R247 RES 19 R361 RES 17
D2 DIODE 35 L46 IND 26 R14 RES 21 R127 RES 30 R248 RES 19 R362 RES 25
D3 DIODE 35 L47 IND 26 R15 RES 35 R128 RES 30 R249 RES 19 R363 RES 17
D4 DIODE 19 L48 IND 32 R16 RES 30 R129 RES 27 R250 RES 19 R364 RES 30
D5 DIODE 21 L49 IND 32 R17 RES 21 R130 RES 27 R251 RES 14 R365 RES 35
D6 DIODE 36 L50 IND 32 R18 RES 35 R131 RES 27 R252 RES 3 R366 RES 14
D7 DIODE 36 L51 IND 22 R19 RES 21 R132 RES 27 R253 RES 19 R367 RES 17
D8 DIODE 35 L52 IND 26 R20 RES 21 R133 RES 14 R254 RES 19 R368 RES 17
D9 DIODE 35 L53 IND 26 R21 RES 21 R134 RES 27 R255 RES 19 R369 RES 34
D10 DIODE_SCHOT 32 L54 IND 26 R22 RES 14 R135 RES 27 R256 RES 19 R370 RES 14
D11 DIODE 31 L55 IND 26 R23 RES 21 R136 RES 27 R257 RES 19 R371 RES 14
D12 DIODE_SCHOT 35 L56 IND 28 R24 RES 35 R137 RES 27 R258 RES 19 R372 RES 14
D13 DIODE_SCHOT 19 L57 IND 28 R25 RES 21 R138 RES 27 R259 RES 19 R373 RES 14
D16 DIODE 19 L58 IND 28 R26 RES 21 R139 RES 27 R260 RES 14 R374 RES 17
D17 DIODE_SCHOT 35 L59 IND 28 R27 RES 21 R140 RES 17 R261 RES 3 R375 RES 35
D18 DIODE 30 L60 IND 28 R28 RES 35 R141 RES 17 R262 RES 14 R376 RES 30
D19 DIODE_SCHOT 30 L61 IND 21 R29 RES 19 R142 RES 30 R263 RES 21 R377 RES 13
D20 DIODE 32 L62 IND 23 R30 RES 21 R143 RES 23 R264 RES 3 R378 RES 30
D21 DIODE 32 L63 IND 23 R31 RES 21 R144 RES 33 R265 RES 3 R379 RES 30
D22 DIODE 32 L64 IND 23 R32 RES 36 R145 RES 33 R266 RES 14 R380 RES 24
D23 DIODE 36 L65 IND 23 R33 RES 36 R149 RES 36 R267 RES 4 R381 RES 24
D24 DIODE 33 L66 IND 23 R34 RES 14 R152 RES 36 R268 RES 14 R382 RES 24
D25 DIODE 33 L67 IND 23 R35 RES 14 R157 RES 28 R269 RES 4 R383 RES 17
D26 DIODE_SCHOT 33 L68 IHLP_5050CE_01 35 R36 RES 19 R158 RES 28 R270 RES 4 R384 RES 9
D27 DIODE_SCHOT 33 L69 IND 27 R37 RES 19 R159 RES 28 R271 RES 4 R385 RES 9
D28 DIODE_SCHOT 33 L70 IND 7 R38 RES 14 R160 RES 28 R272 RES 4 R386 RES 10
D29 DIODE 32 L71 IND 19 R39 RES 14 R161 RES 22 R273 RES 4 R387 RES 13
D30 DIODE 31 L72 IND 19 R40 RES 3 R162 RES 32 R274 RES 15 R388 RES 35
C D31
D32
DIODE_SCHOT 31
DIODE_SCHOT 32
Q1
Q2
TRA_2N7002 33
TRA_2N3906 21
R41
R42
RES
RES
36
36
R163
R164
RES
RES
32
22
R275
R276
RES
RES
4
4
R389
R390
RES
RES
14
13
C
D33 DIODE 32 Q3 TRA_2N7002 33 R43 RES 4 R165 RES 22 R277 RES 4 R391 RES 22
D34 DIODE 31 Q4 TRA_2N3906 21 R44 RES 4 R166 RES 22 R278 RES 4 R392 RES 24
D35 DIODE 31 Q5 TRA_2N7002 35 R45 RES 4 R167 RES 31 R279 RES 4 R393 RES 24
D37 DIODE_SCHOT 27 Q6 TRA_TP0610 35 R46 RES 4 R168 RES 32 R280 RES 17 R394 RES 24
DZ1 ZENER 31 Q7 TRA_2N7002 18 R47 RES 36 R169 RES 32 R281 RES 34 R395 RES 24
DZ2 ZENER_MMBZ15VDLT1 27 Q8 TRA_FDS6612A 35 R48 RES 4 R170 RES 32 R282 RES 13 R396 RES 33
DZ3 ZENER_MMBZ15VDLT1 27 Q9 TRA_2N7002 19 R49 RES 4 R171 RES 31 R283 RES 17 R397 RES 33
F1 FUSE 19 Q10 TRA_2N3906 21 R50 RES 4 R172 RES 31 R284 RES 36 R398 RES 33
F2 FUSE 31 Q11 MC33465 21 R51 RES 4 R173 RES 31 R285 RES 36 R399 RES 27
F3 MICRO_SMD050 24 Q12 TRA_2N3904 36 R52 RES 15 R174 RES 31 R286 RES 5 R400 RES 36
FL1 FILTER_CHOKE_DUAL 19 Q13 TRA_2N3904 36 R53 RES 15 R175 RES 31 R287 RES 5 R402 RES 23
FL2 FILTER_LC 24 Q14 TRA_SI3443DV 34 R54 RES 4 R176 RES 31 R288 RES 5 R403 RES 23
FL3 FILTER_LC 24 Q17 TRA_2N7002 34 R55 RES 4 R177 RES 31 R289 RES 5 R404 RES 23
FL4 FILTER_LC 24 Q18 TRA_2N7002 30 R56 RES 4 R178 RES 31 R290 RES 5 R405 RES 23
G1 OSC 22 Q19 TRA_2N7002 17 R57 RES 4 R179 RES 31 R291 RES 13 R406 RES 23
J1 DF14_3P_1_25H 34 Q20 TRA_2N7002 17 R58 RES 15 R180 RES 31 R292 RES 5 R407 RES 23
J2 ELCO_5047_30_200 16 Q21 TRA_2N7002 30 R59 RES 15 R181 RES 31 R293 RES 5 R408 RES 28
J3 CON_8RJ45_LP_OCTEK 18 Q22 TRA_SI3443DV 23 R60 RES 15 R182 RES 35 R294 RES 14 R409 RES 22
J4 DF13_6P_1_25V_APPLE 23 Q25 TRA_2N7002 23 R61 RES 20 R183 RES 18 R295 RES 13 R410 RES 22
J5 CON_F6RT_FWIRE_J6 19 Q28 TRA_2N7002 32 R62 RES 34 R184 RES 18 R296 RES 5 R411 RES 22
J6 CON_F30SM_LPS_J3_PCT 21 Q29 TRA_SI4435DY 31 R63 RES 36 R185 RES 34 R297 RES 13 R412 RES 23
J7 CON_F4RT_USB_A 17 Q30 TRA_SI4435DY 32 R64 RES 15 R186 RES 21 R298 RES 5 R413 RES 22
J8 CON_144_3_3V_4MM_SM 8 Q31 TRA_2N7002 31 R65 RES 5 R187 RES 21 R299 RES 34 R414 RES 36
J9 CON_F69SM_8MM 20 Q32 TRA_IRF7805 35 R66 RES 5 R189 RES 21 R300 RES 5 R415 RES 23
J10 CON_F4RT_USB_A 17 Q33 TRA_IRF7807 35 R67 RES 5 R190 RES 21 R301 RES 13 R416 RES 22
J11 CON_8SM 21 Q34 TRA_SI3443DV 34 R68 RES 20 R191 RES 18 R302 RES 5 R417 RES 22
J12 TCX3160 24 Q35 TRA_2N7002 18 R69 RES 20 R192 RES 18 R303 RES 10 R418 RES 23
B J13
J14
HSJ1732_010049 27
DF13_4P_1_25V_APPLE 27
Q36
Q37
TRA_2N7002 18
TRA_NDS9407 19
R70
R71
RES
RES
5
5
R193
R194
RES
RES
21
18
R304
R305
RES
RES
13
13
R419
R420
RES
RES
28
28
B
J15 CON_F20RTSM_20228 24 Q38 TRA_2N7002 35 R72 RES 13 R195 RES 18 R306 RES 7 R421 RES 30
J16 BP0206 32 Q39 TRA_TP0610 23 R73 RES 5 R197 RES 18 R307 RES 17 R422 RES 33
J17 DF13_3P_1_25V_APPLE 28 Q40 TRA_2N7002 3 R74 RES 14 R198 RES 18 R308 RES 6 R423 RES 27
J18 20009A_080_44G2 16 Q41 TRA_2N3904 3 R75 RES 5 R199 RES 21 R309 RES 13 R424 RES 27
J19 KX14_20K5D1 15 Q42 TRA_2N7002 4 R76 RES 5 R200 RES 35 R310 RES 6 R425 RES 22
J20 CON_M8RT_S_TH_J7 30 Q43 TRA_2N3904 4 R77 RES 3 R201 RES 18 R311 RES 13 R426 RES 33
J100 DF9_15P_1V 25 Q44 TRA_2N7002 4 R78 RES 5 R202 RES 21 R312 RES 15 R427 RES 28
L1 CEP123 35 Q45 TRA_SI3447DV 34 R79 RES 7 R203 RES 35 R313 RES 6 R428 RES 27
L2 IND 18 Q46 TRA_2N7002 4 R80 RES 15 R204 RES 15 R314 RES 13 R429 RES 33
L3 IND 19 Q47 TRA_2N7002 34 R81 RES 7 R205 RES 18 R316 RES 13 R430 RES 23
L4 IND 24 Q48 TRA_SI3443DV 34 R82 RES 15 R206 RES 21 R317 RES 10 R431 RES 27
L5 IND 24 Q49 TRA_FDS6612A 35 R83 RES 15 R207 RES 15 R318 RES 6 R432 RES 23
L6 IND 24 Q50 TRA_FDS6680 35 R84 RES 13 R208 RES 35 R319 RES 22 R433 RES 28
L7 IND 24 Q52 TRA_2N7002 17 R85 RES 13 R209 RES 35 R320 RES 15 R434 RES 23
L8 IND 24 Q53 TRA_2N7002 17 R87 RES 13 R210 RES 35 R321 RES 6 R435 RES 23
L9 IND 24 Q54 TRA_SI4401DY 30 R88 RES 6 R211 RES 35 R322 RES 24 R436 RES 22
L10 IND 35 Q55 TRA_TP0610 30 R89 RES 6 R212 RES 21 R323 RES 13 R437 RES 22
L11 IND 24 Q56 TRA_2N3904 24 R90 RES 24 R213 RES 21 R324 RES 13 R438 RES 26
L12 IND 30 Q57 TRA_2N7002 28 R91 RES 24 R214 RES 21 R325 RES 13 R439 RES 22
L13 IND 30 Q58 TRA_2N7002 23 R92 RES 13 R215 RES 21 R326 RES 13
L14 IND 33 Q59 TRA_2N7002 23 R93 RES 13 R216 RES 21 R327 RES 24
L15 IND 22 Q60 TRA_2N7002 28 R96 RES 9 R217 RES 21 R328 RES 13
L16 IND 22 Q61 TRA_FDS6680 33 R97 RES 9 R218 RES 21 R329 RES 13
L17 IND 31 Q62 TRA_FDS6680 33 R98 RES 9 R219 RES 19 R330 RES 6 REFERENCE DESIGNATOR LOCATION INDEX (4)
L18 IND 19 Q63 TRA_FDS6612A 33 R99 RES 9 R220 RES 19 R332 RES 13 DESCRIPTION:
L19 IND 19 Q64 TRA_FDS6612A 33 R100 RES 30 R221 RES 18 R333 RES 13
ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
L20 IND 3 Q65 TRA_2N7002 31 R101 RES 30 R222 RES 21 R334 RES 7
A L21 IND 17 Q66 TRA_SI3443DV 34 R102 RES 30 R223 RES 21 R335 RES 24
NOTICE OF PROPRIETARY PROPERTY
A
L22 IND 17 Q67 TRA_FDS6975 32 R103 RES 9 R224 RES 21 R336 RES 13
L23 IND 17 Q68 TRA_SI3443DV 34 R104 RES 9 R225 RES 21 R337 RES 13
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
L24 IND 17 Q69 TRA_2N7002 31 R105 RES 9 R226 RES 21 R338 RES 24 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
L25 IND 10 Q70 TRA_SI3443DV 34 R106 RES 9 R227 RES 16 R339 RES 15
L26 IND 17 Q71 TRA_2N7002 32 R107 RES 35 R228 RES 18 R340 RES 13 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
L27 IND 17 Q72 TRA_SI4840DY 31 R108 RES 35 R229 RES 18 R341 RES 13 II NOT TO REPRODUCE OR COPY IT
L28 IND 21 Q73 TRA_SI4840DY 31 R109 RES 13 R230 RES 18 R342 RES 9 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
L29 IND 17 Q74 TRA_2N7002 32 R110 RES 13 R231 RES 19 R343 RES 9
SIZE DRAWING NUMBER REV.
L30 IND 21 Q75 TRA_2N7002 28 R111 RES 14 R232 RES 19 R344 RES 10
ACI: C
L31 IND 21 Q81 TRA_2N7002 27 R112 RES 14 R233 RES 19 R345 RES 10
APPLE COMPUTER INC.
D 051-6130-C ECS:1.0
SCALE SHT OF
NONE 52 53

8 7 6 5 4 3 2 1
 CR-53

8 7 6 5 4 3 2 1

R459 RES 32 R574 RES 7 XW11 SHORT 27

R460 RES 26 R575 RES 7 XW12 SHORT_PAD 31
R461 RES 22 R576 RES 16 XW13 JUMPER 33
R462 RES 26 R577 RES 16 XW14 JUMPER 33
R463 RES 28 R578 RES 25 Y1 CRYSTAL 18
R464 RES 26 R579 RES 25 Y2 CRYSTAL_4PIN 21
R465 RES 23 R580 RES 36 Y3 CRYSTAL 21
R466 RES 22 R581 RES 36 Y4 CRYSTAL 19
R467 RES 32 R582 RES 36 Y5 CRYSTAL 13
R468 RES 28 RP1 RPAK4P 21 ZD1 SCREW_D83 37
R469 RES 28 RP2 RPAK4P 21 ZD2 HOLE158 37

D R470
R471
RES
RES
24
23
RP3
RP4
RPAK4P
RPAK4P
21
14
ZH1
ZH2
276D103
HOLE158
37
37
D
R472 RES 23 RP5 RPAK4P 14 ZH3 276D103 37
R473 RES 31 RP6 RPAK4P 14 ZH4 276D103 37
R474 RES 31 RP7 RPAK4P 6 ZH5 276D103 37
R475 RES 31 RP8 RPAK4P 15 ZH6 276D103 37
R476 RES 26 RP9 RPAK4P 6 ZH7 276D103_3 37
R477 RES 31 RP10 RPAK4P 21 ZH8 276D103 37
R478 RES 23 RP11 RPAK4P 21 ZH9 276D103 37
R479 RES 28 RP12 RPAK4P 21 C476 CAP_P 16
R480 RES 26 RP13 RPAK4P 21 C477 CAP 21
R481 RES 28 RP14 RPAK4P 14 15 C478 CAP_P 16
R482 RES 23 RP15 RPAK4P 14 15 C479 CAP 31
R483 RES 32 RP16 RPAK4P 14 C480 CAP 37
R484 RES 28 RP17 RPAK4P 8 C481 CAP 37
R485 RES 26 RP18 RPAK4P 8 C482 CAP 17
R486 RES 26 RP19 RPAK4P 14 C483 CAP_P 17
R487 RES 28 RP20 RPAK4P 6 C484 CAP 23
R488 RES 31 RP21 RPAK4P 15 C600 CAP 25
R489 RES 28 RP22 RPAK4P 6 C601 CAP 25
R490 RES 32 RP23 RPAK4P 6 C604 CAP 7
R491 RES 22 RP24 RPAK4P 20 C605 CAP 27
R492 RES 28 RP25 RPAK4P 12 C606 CAP 27
R493 RES 31 RP26 RPAK4P 12 C607 CAP_P 27
R494 RES 31 RP27 RPAK4P 12 C608 CAP_P 27
R495 RES 31 RP28 RPAK4P 12 C609 CAP 27
R496 RES 31 S1 DF13_2P_1_25V 21 R440 RES 26
R497 RES 22 S2 DF13_2P_1_25H 21 R441 RES 22
R498 RES 22 S3 RYC8220_2M 17 R442 RES 22
R499 RES 22 S4 DF13_2P_1_25V 21 R443 RES 26
C R500
R501
RES
RES
22
22
SH1
SH2
SHORT
SHORT
28
26
R444
R445
RES
RES
22
33
C
R502 RES 22 T1 XFR_100BT_MDIX 18 R446 RES 26
R503 RES 22 T2 XFR_HM00_98734 33 R447 RES 22
R504 RES 34 TP1 TP 13 R448 RES 26
R505 RES 28 TP2 TP 10 R449 RES 26
R506 RES 32 TP3 TP 18 R450 RES 23
R507 RES 31 TP4 TP 18 R451 RES 26
R508 RES 34 TP5 TP 18 R452 RES 23
R509 RES 28 TP6 TP 18 R453 RES 14
R510 RES 31 TP7 TP 18 R454 RES 32
R511 RES 26 TP8 TP 18 R455 RES 22
R512 RES 32 TP9 TP 22 R456 RES 32
R513 RES 32 TP10 TP 22 R457 RES 23
R514 RES 26 TP11 TP 22 R458 RES 22
R515 RES 12 TP12 TP 22
R516 RES 12 TP13 TP 22
R517 RES 31 TP14 TP 22
R518 RES 32 TP15 TP 22
R519 RES 31 TP16 TP 22
R520 RES 28 U1 MAX1636 35
R521 RES 12 U2 SIDEWINDER 3
R522 RES 12 U3 MAX1792 36
R523 RES 12 U4 PANGEA 5 6 9 10 12 13
R524 RES 12 U5 COMPARATOR_LMC7211 30
R525 RES 12 U6 DS1775 34
R526 RES 12 U7 COMPARATOR_LMC7211 30
R527 RES 16 U8 AMP_MAX4172 31
R528 RES 16 U9 AMP_MAX4172 31
B R529
R530
RES
RES
12
12
U10
U11
COMPARATOR_LMC7211 32
AMP_LMC7111 31
B
R531 RES 12 U12 TRANSCEIVER_BCM5221 18
R532 RES 16 U13 M16C62_091598 21
R533 RES 32 U14 MAX6326 21
R534 RES 31 U15 TSB41AB1 19
R535 RES 31 U16 SDRAM_2MX16X4 7
R536 RES 31 U17 SDRAM_2MX16X4 7
R537 RES 31 U18 FEPR_1MX8 20
R538 RES 32 U19 SDRAM_2MX16X4 7
R539 RES 31 U20 SDRAM_2MX16X4 7
R540 RES 31 U21 741G32 24
R541 RES 22 U22 MAX1636 35
R542 RES 22 U23 MK1708 22
R543 RES 22 U24 MAX785 33
R544 RES 22 U25 AUDIO_LM4863_SOI 27
R545 RES 22 U26 ADC_CS5331 28
R546 RES 22 U27 ADDAC_TLC320AD77C 26
R547 RES 22 U28 RAGE_MOBILITY_M3 22
R548 RES 13 U29 TAS3001C 26
R549 RES 13 U30 OPAMP_TS924 28
R550 RES 21 U31 VREG_LP2951 26
R551 RES 35 U32 LTC1625 31
R552 RES 7 U33 VREG_LP2951 26
R553 RES 14 U34 AMP_LMC7111 31
R556 RES 27 U35 74574 7 REFERENCE DESIGNATOR LOCATION INDEX (5)
R560 RES 7 U36 MAX4298 27
DESCRIPTION:
R561 RES 7 U37 DS1775 34
R562 RES 7 VR1 VREG_LP2951 36 ENGINEERING RELEASE P72/P73 MLB & SCHEMATIC
A R563 RES 7 VR2 VREG_LP2951 36
NOTICE OF PROPRIETARY PROPERTY
A
R564 RES 7 XW1 SHORT_PAD 33
R565 RES 7 XW2 SHORT_PAD 33
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
R566 RES 27 XW3 JUMPER 35 PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
R567 RES 27 XW4 JUMPER 33
R568 RES 27 XW5 JUMPER 33 I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
R569 RES 27 XW6 JUMPER 31 II NOT TO REPRODUCE OR COPY IT
R570 RES 27 XW7 SHORT_PAD 35 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
R571 RES 27 XW8 JUMPER 35
SIZE DRAWING NUMBER REV.
R572 RES 24 XW9 SHORT_PAD 35
ACI: C
R573 RES 7 XW10 JUMPER 27
APPLE COMPUTER INC.
D 051-6130-C ECS:1.0
SCALE SHT OF
NONE 53 53

8 7 6 5 4 3 2 1