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ICSP 2020 IOP Publishing
Journal of Physics: Conference Series 1544 (2020) 012111 doi:10.1088/1742-6596/1544/1/012111

Design of Audio Signal Analyzer Based on MCU and FPGA

Meimei Lv1*, Tongguo Gao1, Ding Yan1 and Lufeng Qiao1

1
Jiangsu Automation Research Institute
*
Corresponding author’s e-mail: [email protected]

Abstract. This audio signal analyzer is based on a microcontroller (MCU) and a field
programmable gate array (FPGA). It consists of a controllable gain amplifier circuit, an active
filter circuit, A / D conversion and D / A feedback circuits, and a main control circuit and
liquid crystal display module. Through AD conversion, the audio signal is sampled, the
continuous signal is discretized, and then the FFT fast Fourier transform operation is performed
to analyze and process each frequency component and power of the audio signal in the time
and frequency domain. By controlling the gain of the amplifier to expand the dynamic range of
the input signal and improve the sensitivity, it can also complete the corresponding human-
computer interaction control based on the PS2 keyboard input, while using the high-resolution
LCD to display the signal spectrum. The audio signal frequency range that this system can
accurately measure is 20Hz-10KHz, its amplitude range is 5mVpp-5Vpp, and the resolution is
divided into 20Hz and 100Hz. The measured power accuracy is as high as 1%, and the period
of the periodic signal can be accurately measured, which is the ideal solution for audio signal
analyzers.

1. Introduction
The audio signal analyzer in this system is mainly used to analyze the frequency component of the
audio signal and can be used to measure the distortion of the sinusoidal signal. The system design
requirements are as follows:
(1) Input impedance: 50Ω
(2) Input signal voltage range (peak-to-peak): 100mV ～ 5V
(3) Frequency component range of input signal: 20Hz ～ 10kHz
(4) Frequency resolution: 20Hz and 100Hz
(5) The sum of the power of each frequency component is not less than 95% of the total power
value; the absolute value of the relative error of the power measurement of each frequency component
is less than 10%; the absolute value of the relative error of the total power measurement is less than
5%.

2. System solution
The design consists of a control calculation module, a display input module, and a pre-stage signal
acquisition module. The system block diagram is shown in Figure 1.

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ICSP 2020 IOP Publishing
Journal of Physics: Conference Series 1544 (2020) 012111 doi:10.1088/1742-6596/1544/1/012111

Figure 1 Block diagram of the system

The control computing core consists of ARM and FPGA. FPGA controls AD to sample 1024 points
of data and pass to the ARM via the bus to complete the FFT operation. ARM refreshes the calculation
results on the 240 X128 LCD. The pre-stage signal acquisition module is mainly composed of a
controllable gain amplifier AD603 and a second-order filter network, and uses FPGA and DAC to
cooperate with AD603 to complete automatic gain control.
The input impedance of the audio signal analyzer is 50 ohms, and the peak-to-peak value of the
input voltage range is greater than 100mV ~ 5V. The input signal contains a frequency component
range of 20Hz ~ 10KHz, a frequency resolution of 20Hz, the total power of the input signal and the
relative error of the measured frequency components are within the required range. Within, the power
of each frequency component is guaranteed to be not less than 95% of the total power. The analyzer
refreshes the analysis data in a 5-second cycle, stores and displays the results in order according to the
power, temporarily maintains the display result, and expands the signal dynamics[1].
The ARM core is used as the processor, and the FFT operation code is written in the C language.
The sampled value is recorded regularly and the FFT is performed, and then the analysis and display
are performed. LPC2294 using arm7 as the processing core, arm as a 32-bit reduced instruction set
CPU core, has rich operation instructions and built-in 16K RAM, can run at 40M clock frequency,
which can guarantee the FFT operation requirements, the system can control and display the data
throughout the process to facilitate the processing and query of information[2]. The LM240128 liquid
crystal display is intuitive, friendly and can display more information. Utilizing a gain-controllable
amplifier, the system analyzes the ADC sampling value to control the gain in time, and feeds it back to
the amplifier gain control end through the DAC. Because the system feedback information is added,
the gain adjustment is within the control range of the system, the dynamic range of the input signal is
enlarged, and the measurement sensitivity is improved[3].

3. Theoretical analysis and calculation

3.1. Amplifier design

The input voltage range (peak-to-peak) of the system is 100mV-5V, and the input range of the AD
converter TLC5510 is 0.6V-2.6V, so the first stage needs to add a stage attenuation circuit, and the
attenuated voltage is then increased to within the ADC range by the adder circuit for sampling and
quantization. At the same time, in order to increase the dynamic range of the input signal, it is hoped
that a small signal can also make full use of the ADC's sampling range and accurately measure the
small signal. Similarly, for signals exceeding the ADC range, it can also be attenuated to the range.
this requires the gain of the preamplifier circuit to be reasonably controlled according to the change of
the input signal during the ADC sampling process[4]. To this end, the circuit designed a controllable
gain amplifier based on AD603.

2
ICSP 2020 IOP Publishing
Journal of Physics: Conference Series 1544 (2020) 012111 doi:10.1088/1742-6596/1544/1/012111

In the process of dynamic measurement, first let the gain of the input signal = 1 pass through the
amplifier, sfter the AD sampling is performed, the sampling voltage D′ Sample
is obtained, as shown in
equation (1):
D′Sample
•
V in • G′ = 256 V Fs1 (1)
In the above formula, V Fs1
is the ADC full-scale voltage.

The FPGA compares the sampling voltage D′Sample with the reference voltage V ref (which is the
upper limit voltage close to the ADC range). If it is less than the reference voltage, it starts the counter
to start counting, and at the same time, converts the count value C ount into the DAC output voltage,
which is then converted into a gain G ′ that changes with the count value, as shown in equation (2):

G′ = C ount • V Fs 2
1024 (2)
Where V Fs 2 is the DAC full-scale output voltage.
By continuously comparing the sampling voltage with the reference voltage until the sampling
voltage is close to the reference voltage, then dividing the final sampling voltage D Sample
by the final
gain G to obtain the final actual conversion voltage D , as shown in equation (3).
out

=
DSample
D out
G (3)

3.2. Method of power spectrum measurement

The measurement of power is achieved by the cycle diagram method. First, a suitable window
function ω (n) is used to truncate the infinite sequence x (n ) to a long sequence x N (n ) of N, where N is
an integer power of 2. Then, FFT is used to obtain X N (k ) , which is:
 X N (k )  2

 N 
P (k ) = 
R (4)
k
f = fs (f )
Then according to N , the actual power P at each frequency is obtained, and the total
power P B at each frequency is obtained by adding the power at each frequency.

3.3. Method of total power measurement

The total power is measured using the autocorrelation method, that is, the autocorrelation function
r̂ (m) is estimated from the observed sample value x N (n ) of x(n )
1 N −1
lim  x N (n ) x N (n + m )
r̂ (m) = N →∞ N n =0 (5)

Then Fourier transform is performed on r̂ (m) to obtain the power spectrum Pˆ (ω ) of x N (n ) .

A

Pˆ (ω ) =  rˆ(m)e
− jωm
(6)
A
m=− M

3
ICSP 2020 IOP Publishing
Journal of Physics: Conference Series 1544 (2020) 012111 doi:10.1088/1742-6596/1544/1/012111

Estimate the actual power spectrum with P A

(ω )
and then integrate this power spectrum to get the
actual total power P . A

3.4. Calculation of sampling points and sampling speed

According to the Nyquist sampling theorem, the sampling frequency must be at least twice the signal
frequency, and the highest frequency of the input signal is 10K, so the sampling frequency is at least
k
f = ⋅f
20K[5]. According to N
s
, to achieve the frequency resolution of 100Hz and 20Hz, we set the
number of sampling points = 256, then the basic requirement should be set to 25.6k, and for the
f
maximum requirement N 2 =1024, s should be set to 20.48KHz.

4. Circuit design

4.1. Pre-stage signal processing circuit

The circuit is mainly composed of gain-controllable amplifier PGA103 and high-speed low-noise
operational amplifier OP37. PGA103 can provide 1 times, 10 times, and 100 times programmable gain.
When G = 10, the passband is 750KHz, and G = 1, it is 1.5MHz, which fully meets the 200KHz
requirements of the system. The circuit diagram of the pre-conditioning circuit is shown in Figure 2.
+12V R1
20K +12V +12V
W1
W2 10K
R2 R3
10K W3
10K +12V 10K 10K
U1 +12V U2 +12V U3 U4 +12V
R12
C1 104 GND
R13 R14 R15
1 8 1 8 A0 1 8 GND 1 8
V+ OUT R4 R5 V+ OUT V+ OUT V+ OUT
P3 2 7 2 7 A1 2 7 2 7 P4
R6 +IN OUT +IN OUT +IN OUT R7 +IN OUT
3 6 10K 10K GND 3 6 GND 3 6 3 6
1 -IN GND -IN GND -IN GND -IN GND 1
GND 4 5 4 5 4 5 C2 4 5 GND
2 R810K V- LATCH R9 V- LATCH V- LATCH R16
104
10K R10 V- LATCH R11 2
49.9 C3 C4 5.1K C5 C6 R17 10K C7 C8 10K
Header 2 GND Header 2
104 104 104 104 -12V 104 104
OP37-1 OP37-2 PGA103 OP37-3
-12VR18
GND GND
-12VR19 GND GND GND GND +12V GND GND GND
-12VR20 W4
1k
GND

Figure 2 Circuit diagram of preconditioning

4.2. System core circuit

The FFT operation of the signal is mainly performed by the ARM7 processor, and the output result is
provided to the FPGA. FPGA performs data post-processing, display, and keyboard input control. the
main circuit is as follows.

4
ICSP 2020 IOP Publishing
Journal of Physics: Conference Series 1544 (2020) 012111 doi:10.1088/1742-6596/1544/1/012111

Figure 3 System core circuit

4.3. Sine frequency sweep signal generator

Signal is tested by self-made sinusoidal signal generator, using direct digital frequency synthesizer
(DDS), accumulate the phase increments according to the frequency requirements, use the
accumulated phase value as the address code, read the waveform data stored in the memory, and
obtain the required waveform after D / A conversion and filtering. Amplitude adjustment can be
Vref
achieved through the DA output controlling the of another DA.

5. System test
Test equipment: function generator, spectrum analyzer, oscilloscope, distortion tester, multimeter

5.1. Input impedance test

(1) The input impedance measured by a multimeter is 50.0 ohms.
(2) Observe the input with an oscilloscope.
Table 1. Input signal test
Generator signal peak-to-peak value（V）Meter input signal peak-to-peak（V）
0.83 0.41
2.81 2.44
4.65 2.32

5.2. Resolution test

(1) Use the function generator to generate 20Hz, 40Hz, 3KHz, 10KHz signals and superimposed
signals with integer multiples of resolution. The analysis results differ from the expected values

5
ICSP 2020 IOP Publishing
Journal of Physics: Conference Series 1544 (2020) 012111 doi:10.1088/1742-6596/1544/1/012111

analyzed in matlab on the order of 0.001. The results of the spectrum analyzer and the audio analyzer
are the same. There are values at the input frequency points, all others are 0.
(2) 25Hz and 110Hz sine signal analysis results in audio analyzer
Table 2. Frequency test
Applied signal Audio analyzer test Spectrum analyzer Matlab calculation
frequency results measurement results results
25 Hz 20Hz 25Hz 20Hz
110 Hz 120Hz 110 Hz 120 Hz

Table 3. Relative error test of power measurement of each frequency component

Frequency 20Hz 500Hz 1KHz 2KHz 6140Hz 10KHz
Audio analyzer 0．7283 0.7262 0.7446 0.8086 479.2621 0.0003
Matlab analysis
0.7265 0.7310 0.7431 0.8030 479.2795 0
results

Table 4. Signal periodic test

Signal 1KHz 3KHz 1KHz Square wave Aperiodic signal
Measurements 1.04KHz 2.92KHz 1KHz None

Table 5. Sinusoidal distortion test

Sinusoidal signal Non-sinusoidal signal
Test results of distortion tester 0.2% 8.6%
Test results of audio analyzer 0.7% 9.2%
After testing various indicators, we can conclude that the entire system can successfully complete
the design requirements.

6. Conclusion
This audio signal analyzer uses ARM7 and FPGA as the core components. Through the FFT fast
Fourier transform operation, it analyzes and processes each frequency component and power of the
audio signal in the time and frequency domain, completed the system design requirements and passed
the test.

References
[1] Zheng, YM, Dong XZ. (2006) Programming Logic Device Development Software
QuartusII. National Defense Industry Press, Beijing.
[2] Sun ZJ, Liu XM, Ji ZX. (2009) The Design of Radix-4 FFT by FPGA. Intelligent
Information Technology Application Workshops, Beijing.
[3] Chen R, Chen H. (2006) VHDL Chip Design. Machinery Industry Press, Beijing.
[4] Zhang JT, Feng CC, Yan ZG. (2009) Design of Audio Signal Analyzer Based on DSP. Journal
of Xi'an Shiyou University, 76–83.
[5] Xiong GH, Luo SS, Wang GY. (2006) Design of Virtual Audio Signal Analyzer Based on
Sound Card. Foreign Electronic Measurement Technology, 33–40.