TI Designs

Isolated IGBT Gate-Drive Push-Pull Power Supply with 4

Outputs

TI Designs Design Features

TI Designs provide the foundation that you need • Isolated Power Supply for IGBT Gate Drive
including methodology, testing and design files to • Supports 6 IGBT Gate Drivers for 3 Arms of
quickly evaluate and customize the system. TI Designs Inverter (Each Arm in Half-Bridge Configuration)
help you accelerate your time to market.
• Push-Pull Topology Allows for Parallel Transformer
Design Resources Stages from a Single Controller for 3-Phase Power
• Two Isolated Outputs for Each IGBT: 16 V (x2) and
TIDA-00181 Tool Folder Containing Design Files –8 V (x2)
C2000 LaunchPAD™ Tools Folder • Operates with Pre-Regulated 24-V Input
LP2954A Product Folder
• Output Power: 2W/IGBT
TPS7A3001 Product Folder
LM5030 Product Folder
• Scalable to Support Higher Power IGBTs
ISO5500EVM User's • Option to Shut Down the Power Supply to Facilitate
User's Guide
Guide Safe Torque Off (STO) feature
Power Tip #6: Accurately Measuring • Output ripple: < 200 mV
EE|Times
Power Supply Ripple
• Output Capacitors Rated to Support up to 6 A Peak
Gate Drive Current
ASK Our Analog Experts • Designed to comply with IEC61800-5
WEBENCH® Calculator Tools • Design Validated with TI’s Isolated Gate-Driver
ISO5500 Driving IGBT

Featured Applications
• Variable Speed AC/DC Drives
• Industrial Inverters and Solar Inverters
• UPS Systems
• Servo Drives
• IGBT-Based HVDC systems

VCC_T

VLDO_T
LP2954A

For
TOP
device
REF_T

+ CSD19533QSA × 2 TPS7A3001 VEE_T

VIN ±

VCC_B
LM5030
VLDO_B
LP2954A

For
Shutdown BOTTOM
TPS27082L
signal REF_B device

VEE_B
TPS7A3001

Copyright © 2016, Texas Instruments Incorporated

All trademarks are the property of their respective owners.

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System Description www.ti.com

An IMPORTANT NOTICE at the end of this TI reference design addresses authorized use, intellectual property matters and other
important disclaimers and information.

1 System Description
This reference design provides isolated positive and negative voltage rails required for Insulated Gate
Bipolar Transistor (IGBT) gate drivers from a single 24-volt DC input supply. IGBTs are used in three-
phase inverters for variable-frequency drives to control the speed of AC motors. This reference design
uses a push-pull isolated-control topology and provides isolation compliant to IEC61800-5. This reference
design is intended to operate from a pre-regulated 24-V DC input. With a regulated (within 5%) input
source, a simple open-loop, free-running oscillator can be implemented with a push-pull PWM controller.
The topology is essentially a forward converter with two primary windings used to create a dual-drive
winding. This topology fully utilizes the transformer core's magnetizing current more efficiently than flyback
or forward topologies. Another advantage this configuration has over flyback and forward configurations is
that the supply output can be scaled up for higher power drives.
This reference design also takes advantage of another benefit of the push-pull topology in that multiple
transformers can be controlled in parallel from a single controller to generate all the isolated voltage rails
required for 3-phase IGBT inverters. Finally, larger IGBTs for higher power drives sometimes require more
gate drive current than what is provided by a typical IGBT gate driver. For larger IGBTs, designers often
use additional transistors for gate current boosting. This reference design provides 16 V on the positive
outputs and –8 V on the negative outputs to compensate for the added voltage drop in these additional
transistors.
Three-phase inverters are used for variable-frequency drives that control the speed of AC motors, and for
high-power applications like high-voltage DC (HVDC) power transmission. A typical application of a three-
phase inverter using six isolated gate drivers is shown in Figure 1. Note that each phase uses a high-side
and a low-side IGBT switch to apply positive and negative high-voltage DC pulses to the motor coils in an
alternating mode.
High-Power IGBTs require isolated gate drivers to control their operations. A single, isolated gate driver
drives each IGBT that galvanically isolates the high-voltage output from the low-voltage controlled inputs.
The emitter of the top IGBT floats, which requires use of an isolated gate-driver. In order to isolate the
high-voltage circuit with a low-voltage control circuit, isolated gate-drivers are used to control the bottom
IGBTs.
VBUS VBUS VBUS

+16 V +16 V +16 V

ISOLATION

ISOLATION

ISOLATION

From From From

Controller Controller Controller

±8V ±8V ±8V

TI
'DYH¶V
Control
Center

+16 V +16 V +16 V

+

+5 V
+
ISOLATION

ISOLATION

ISOLATION

+5 V
From From From
Controller Controller Controller

To ADC or Controller

±8V ±8V ±8V

VGND VGND VGND

Figure 1. 3-Phase Inverter with Isolated Gate-Drive

2 Isolated IGBT Gate-Drive Push-Pull Power Supply with 4 Outputs TIDU355A – June 2014 – Revised June 2016
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www.ti.com System Description

1.1 Gate-Drive Supply Requirements

To reduce conduction losses, the gates of the IGBTs are supplied with a much higher voltage than the
actual gate-threshold voltages. Typically, 15 V to 18 V is applied at the gate to reduce VCE(on).
The IGBT is a minority-carrier device with high input impedance and the capacity to carry a large, bipolar
current. The switching characteristics of an IGBT are similar to that of a power MOSFET. Assuming
identical conditions, IGBTs and MOSFETs behave identically when turned on, and both have similar
current rise and voltage fall times. However, the waveforms of the switched current are different at turn-off.
At the end of the switching event, the IGBT has a “tail current”, which does not exist for the MOSFET. This
tail is caused by minority carriers trapped in the “base” of the bipolar output section of the IGBT, which
causes the device to remain turned on. Unlike a bipolar transistor, it is not possible to extract these
carriers to speed up switching, since there is no external connection to the base. Therefore, the device
remains turned on until the carriers recombine.
This "tail current" increases the turn-off losses and requires an increase in the dead-time between the
conduction of two devices in a half-bridge circuit. To reduce the turn-off time, it helps to have a negative
voltage (–5 V to –10 V) at the gate.
When an IGBT is turned on, some voltage spikes are generated on the gate terminal, due to the high dv/dt
and parasitic capacitance between the gate and emitter. The voltage spiked can cause a false turn-on for
the bottom IGBT. A negative voltage at the gate helps to avoid this false turn-on trigger.
Usually 16 V is applied to the gate for turn-on and –8 V is applied for turn-off.
It is important to decide on the power requirement to drive the IGBT. The calculation of gate drive power
requirement for different power ratings of variable speed drives is explained in Equation 1.
As noted earlier, an isolated gate driver is used to turn the IGBT on and off. In this process, power is
dissipated by the driver IC, IGBT gate, and by any RC circuits in the gate drive path. Refer to Figure 2.
+

+ 15 V

RG

RGE
AC
CGE
± 10 V

Figure 2. IGBTs with Gate Drive Circuitry for Gate Power Calculation

The total gate power dissipation is calculated by the following equation:

Pgate = Pdriver +(Qgate × f sw ×ΔVgate)+(Cge× f sw×ΔVgate 2 )
where
• Qgate = Total gate charge
• fsw = Switching frequency
• ΔVgate = Gate driver output voltage swing (1)
Consider the following example:
• An IGBT module with 1200 V and 200 A capacity (appropriate for <100 kW drives) having Qgate = 1.65
μC.
• A switching frequency of 16 kHz, which is on the higher side for typical high power drives.
• A gate voltage, swinging from –15 V to 15 V. These values are a worst case condition, since IGBTs
are typically driven with 15 V and either –5 V or –8 V.
• Gate-to-Emitter capacitance (Cge) = 20 nF (a typical value ranges between 1 nF and 20 nF).
• Gate-driver total power consumption (Pdriver) = approximately 600 mW. This value is estimated using
the typical data sheet for an isolated IGBT gate-driver.

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Using the values above:

Pgate = 0.6W +0.792W +0.288W = 1.68W (2)
With de-rating, Equation 2 comes to 2W/IGBT.
The current output of a gate driver may or may not be sufficient to drive the IGBT, so designers use
transistors for current boosting. This reference design is designed for 16 V on positive output and –8 V on
the negative output, which takes care of the approximately 1 V drop in the transistors.

2 Design Features
The primary objective of this design is to replace the discrete components used in a power supply design
with that of a PWM-controller-based, gate-drive power supply. Replacing these components leads to a
reduced bill of materials (BOM) and increased reliability and performance.

2.1 Design Requirements

The system-level requirements for this design include:
• A PWM controller and a topology that helps scale the output power, while also driving high-power
IGBTs.
• Isolated positive and negative rails should be 16 V and –8 V to power the isolated gate driver, the
gates of the IGBTs, and the power-related sense circuitry (for isolated, current-measurement circuits).
• Continuous output power of 2 W to drive each IGBT.
• Support up to 6-A peak current, with an output voltage ripple of less than 200 mV.
• Ability to shut down the power supply to support Safe Torque Off (STO) feature to comply with
standard IEC61800-5-1 and achieve other safety related compliances.

2.2 Topology Selection:

This reference design is intended to operate with a pre-regulated 24-V input. The open-loop, free-running
oscillator of the PWM controller can be used, since it is a tightly regulated (within 5%) input source. The
push-pull topology is basically a forward converter with two primary windings, which are used to create a
dual-drive winding. This push-pull topology allows for more efficient use of the transformer core than the
flyback or forward converters.
The advantage of push-pull converters over flyback and forward converters is that push-pull converters
can be scaled up to higher powers. Further, both of the MOSFETs are connected to the low-side (unlike a
half-bridge converter, which has one MOSFET connected to the high-side). The push-pull topology does
not require gate drivers for the MOSFETs. Another advantage of using push-pull topology is that multiple
transformers can be connected in parallel to generate the voltage rails required to power other IGBTs in
the inverter. To translate the above requirements to the sub-system level, the requirements of the PWM
controller, MOSFETs, transformer, and LDOs are listed as follows:
PWM Controller
• Should support push-pull topology
• Current control mode
• Shutdown feature to incorporate STO functionality (IEC61800-5-1 compliant)
• Operate from 24-V supply
• Defined dead time to avoid cross conduction
Power MOSFETs
• Should have a rated VDS ≥ 100 V to support a 24-V input supply
• Should support 1 A (min) drain current

4 Isolated IGBT Gate-Drive Push-Pull Power Supply with 4 Outputs TIDU355A – June 2014 – Revised June 2016
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Transformer Specifications (as per IEC61800-5-1)

• Two isolated outputs with Vout1 = 8.7 V at 250 mA and Vout2 = 8.7 V at 250 mA
• Switching frequency = 100 kHz
• Primary to secondary isolation = 7.4 kV for 1.2/50 us impulse voltage
• Type test voltage:
– Primary to Secondary = 3.6 kVrms
– Secondary1 to Secondary2 = 1.8 kVrms
• Spacings:
– Primary to Secondary clearance = 8 mm
– Secondary1 to Secondary2 clearance = 5.5 mm
– Creepage distance = 9.2 mm
• Functional Isolation Primary and secondaries : 1.5k-V DC
• DC Isolation between secondaries: 1.5-kV DC

Figure 3. Push-Pull Transformer Symbol

Positive output LDO

• Adjustable output voltage
• Supports continuous output current up to 100 mA
Negative output LDO
• Adjustable output voltage
• Supports continuous output current up to 100 mA

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Block Diagram www.ti.com

3 Block Diagram
This reference design is intended for motor control, industrial inverters and many other applications where
IGBT drivers are used and should help to significantly reduce design time while meeting all of the design
requirements. The design files include schematics, bill of materials (BOM), layer plots, Altium files, Gerber
files, and test results.

VCC_T

VLDO_T
LP2954A

For
TOP
device
REF_T

+ CSD19533QSA × 2 TPS7A3001 VEE_T

VIN ±

VCC_B
LM5030
VLDO_B
LP2954A

For
Shutdown BOTTOM
TPS27082L
signal REF_B device

VEE_B
TPS7A3001

Copyright © 2016, Texas Instruments Incorporated

Figure 4. System Block Diagram

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www.ti.com Highlighted Products

4 Highlighted Products
This reference design features the following devices, which were selected based on their specifications:
• LM5030 PWM controller
• CSD19533 NexFET™ power MOSFET
• TPS27082 high-side load switch
• LP2954A micro power voltage regulator
• TPS7A3001 linear regulator
For more information on each of these devices, see the respective product folders at www.ti.com or click
on the links for the product folders on the first page of this reference design.

4.1 Component Selection

4.1.1 LM5030
The LM5030 high-voltage PWM controller contains all of the features needed to implement the push-pull
topology, using current-mode control in a small 10-pin package. This device provides two alternating gate
driver outputs. The LM5030 PWM controller includes a high-voltage, start-up regulator that operates over
a wide input range of 14 V to 100 V.
Features include:
• Error amplifier
• Precision reference
• Dual mode current limit
• Slope compensation
• Soft start
• Sync capability
• Thermal shutdown
This high speed IC has a defined dead time of 135 ns and a 1 MHz-capable, single-resistor-adjustable
oscillator.

4.1.2 CSD19533
This 100 V, 7.8 mΩ, SON 5 mm x 6 mm NexFET™ power MOSFET is designed to minimize losses in
power-conversion applications. The maximum drain current capability is much higher than the 1A design
requirement.

4.1.3 TPS27082L
The TPS27082L is a high side load switch that integrates a Power PFET and a control circuit in a tiny
TSOT-23 package. The ON/OFF logic interface features hysteresis, which provides a robust logic
interface even under very noisy operating conditions. The ON/OFF interface supports direct interfacing to
low voltage GPIOs down to 1 V. The TPS27082L level shifts the ON/OFF logic signal to VIN levels without
requiring an external level shifter.

4.1.4 LP2954A
The LP2954A is a micropower voltage regulator with very low quiescent current (90 μA typical at 1 mA
load) and very low dropout voltage (typically 60 mV at light loads and 470 mV at 250 mA load current).
The adjustable LP2954A is provided in an 8-lead surface mount, small outline package. The adjustable
version also provides a resistor network which can be pin strapped to set the output to 5 V. The tight line
and load regulation (0.04% typical), as well as very low output temperature coefficient, make the LP2954A
well suited for use as a low-power voltage reference.

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4.1.5 TPS7A3001
The TPS7A3001, is a negative, high-voltage (–36 V), ultralow-noise (15.1 μVRMS, 72 dB PSRR) linear
regulator capable of sourcing a maximum load of 200 mA. This linear regulator includes a CMOS logic-
level-compatible enable pin and capacitor-programmable soft-start function that allows for customized
power–management schemes.

4.2 Circuit Design

4.2.1 Input Section and Turn-On Mechanism:

In Figure 5, the input is pre-regulated 24-V (with ±5% accuracy) input applied to CONN1. Diode D1 is
used for reverse input polarity protection. An optional LC filter (L1 and C1) may also be used for filtering
out any noise in the input voltage coming from the back-panel in the field.
The LM5030 contains an internal high-voltage startup regulator. The input pin (VIN) can be connected
directly to line voltages as high as 100 V. Upon power up, the regulator is enabled and sources current
into an external capacitor connected to the VCC pin.
In this reference design, one 12-V zener diode is used to power the VCC pin. This will keep the VCC voltage
greater than 8 V, effectively shutting off the internal startup regulator and saving power, and also reducing
the controller dissipation.
The LM5030 Data Sheet, LM5030 100 V Push-Pull Current Mode PWM Controller (SNVS215),
recommends a capacitor for the VCC regulator between 0.1 μF to 50 μF. When the voltage on the VCC pin
reaches the regulation point of 7.7 V, the controller outputs are enabled. The outputs will remain enabled
unless, VCC falls below 6.1 V, the SS/SHUTDOWN pin is pulled to ground, or an over-temperature
condition occurs. MOSFET Q1 A is also provided as a possible turn-on option but is not populated on the
board.
R80

0
D1 L1 Vcc
CONN1
1
2 DNP
C1
47µF
DNP
R1
0 R2
DNP
GND GND 1.00k
7,8

2 Q1A
CSD88539ND
DNP
R3
1

Z1 C3
MMSZ5242B-TP Vc
22uF/16V
12V
D2
GND R13
GD1

1 2
C A
GND U1 0
8 4 DNP DNP
CS CS VCC R12
1 5 22
VIN OUT1
C2 6
1uF/63V OUT2
9
DNP RT R14
10 2
SS VFB
R4 22
26.7k 7 3 R10 D3
GND COMP 0 R15
GND 1 2
DNP C A
LM5030MM/NOPB 0
GND DNP DNP
GND R9 R11
0 0
GD2

C4
0.022µF C5
1000pF GND

GND
GND

Figure 5. Input Section and Turn-On Mechanism

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4.2.2 Oscillator Frequency Setting

Each output switches at half the oscillator frequency in a push-pull configuration. Assuming fsw = 100 kHz:
fosc = 2 * fsw = 2*100 kHz = 200 kHz.
The LM5030 oscillator is set by a single external resistor, which is connected between the RT pin and the
return. To set a desired oscillator frequency, the RT resistor can be calculated as:
(1/f)-172 ´ 10 -9
RT =
182 ´ 10 -12
where
• f = 200 kHz
• RT = 26.5 kΩ (3)
The resistor value can also be approximated using the following graph, which is taken from the LM5030
Data Sheet, LM5030 100 V Push-Pull Current Mode PWM Controller (SNVS215).
Oscillator Frequency vs RT
1000
OSCILLATOR FREQUENCY (kHz)

100
1 10 100
RT (KΩ)

Figure 6. Oscillator Frequency vs. Timing Resistor RT

4.2.3 Soft-Start and Compensation

The soft-start feature allows the converter to gradually reach the initial, steady-state operating point, which
reduces start-up stresses and surges. An internal, 10-uA current source and an external capacitor
generate a ramping voltage signal that limits the error amplifier output during start-up. A reasonable time
for a soft-start is 3 to 5 ms.
Using the standard formula for current in a capacitor (Equation 4):
dV
I =C×
dt (4)
Using Equation 4, and assuming I = 10 uA, t = 3 ms, and dV = 1.4 V, the result is Css = 0.022 µF.
Figure 16 (in Section 5) shows the start-up time for the LM5030.
LM5030 can be run in open-loop operation by connecting the FB pin directly to ground. For open-loop
design, the COMP pin can be connected to ground through a 1000-pF capacitor.

4.2.4 Power MOSFETs and Transformer

The power MOSFETs (CSD19533Q5A) are chosen because they have a drain-to-source voltage rating of
100 V and a drain current rating of at least 1 A. The source terminals of both MOSFETs are connected to
a current-sense resistor for peak-current limiting and then given to the LM5030. There is a provision for a
snubber circuit to be connected across the MOSFET, to avoid any ringing while switching the MOSFETs.
At the output of the transformers, two windings are provided for the two isolated outputs: VCC_T, VEE_T
(for powering the TOP IGBTs) and VCC_B, VEE_B (for powering the BOTTOM IGBTs). The transformer
is designed so that both secondaries provide 8.7 V (a 8-V output with a diode drop of 0.7 V).

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While the negative output voltages (VEE_T and VEE_B) are generated directly, to generate the positive
output voltages (VCC_T and VEE_B), the design uses cascaded voltage doublers (also called Greinacher
voltage doublers). These doubler circuits generate 16 V at the VCC terminals.
Vcc

VCC_U_T
R20
10k

2
C84
D4 LD1 0.1µF

A
Green C13 C14
SW1
C10 47µF 47µF

C
DNP
C11

1
10uF/50V 10uF/50V
D5 REF_U_T
T1 7 REF_U_T
C7 C8 1
DNP DNP
R18 REF_U_T
R19
0 0 8
DNP DNP C9 REF_U_T
3
22uF/35V
13
GND GND C12
5,6,

5,6,
7,8

7,8
D6 10uF/50V
4 Q2 4 GND 5
VEE_U_T
CSD19533Q5A Q3 14
GD2
1,2,3

1,2,3

CSD19533Q5A
GD1 750342312
R16
CS REF_U_B
1.15k
C6 R17
470pF 0.22
SW2

GND
GND

VCC_U_B

R30
10k
C86
0.1µF

2
D7 LD5 C25 C26

A
Green 47µF 47µF
C22 DNP
C23

C
10uF/50V
10uF/50V REF_U_B

1
D8
REF_U_B

REF_U_B

REF_U_B
C24
10uF/50V
D9
VEE_U_B

Figure 7. MOSFETs and Transformer

Turning an IGBT on and off amounts to charging and discharging large capacitive loads, so the peak
charge current needs to be within the capability of the drive circuit. At the same time, the driver will have
to draw this peak charge current from its power supply in a short period of time, so it is important to use
proper by-pass capacitors for the power supply.
To achieve the minimum output ripple with high-current load transients, we use a 47-µF capacitor (with
one more 47-µF capacitor in parallel, which is not populated) at each output.

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4.2.5 Shutdown Operation of PWM Controller

This design provides the option to shut down the power supply to support a Safe Torque Off (STO)
feature. The STO function is the most common and basic drive-integrated safety function. The STO
features ensures that no torque-generating energy can continue to act upon a motor and prevents
unintentional starting.
The SS-pin of the LM5030 can be used to disable the controller. If the SS-pin voltage is pulled down
below 0.45 V (nominal), the controller will disable the outputs and enter a low-power state. The
TPS27092L is a switch that integrates a power PFET and a control circuit. The on/off logic interface of this
device features hysteresis, which provides a robust logic interface even under very noisy operating
conditions. The on/off interface supports direct interfacing to low-voltage GPIOs down to 1 V because it
level shifts the on/off logic signal to VIN levels without requiring an external level shifter.
U1
8 4
CS VCC
1 5
VIN OUT1
6
OUT2
9
RT
10 2
SS VFB
7 3
GND COMP
LM5030MM/NOPB
GND

C4
0.022µF

GND

R5
100k
U2
4 2 R6
VIN VOUT
3 10.0k
VOUT
1
R2 GND
6
R1/C1
5
GND ON/OFF
CONN2 TPS27082LDDC
1
GND Vc
2
SD R7
0
DNP
GND
R8
24.9k

GND

Figure 8. STO Feature Using the TPS27082L

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4.2.6 Positive and Negative Output Regulators

4.2.6.1 Positive Regulator (LP2954A)

From the voltage doubler, the LP2954A is used as a post-regulator. The regulator can be programmed for
any voltage between the 1.23 V reference and the 30 V maximum rating by using an external pair of
resistors.
The complete equation for the output voltage is:
R1
VOUT = VREF ´ ( 1+ R2 )+(I FB ´ R1)
where
• VREF = 1.23 V reference
• IFB = Feedback pin bias current (–20 nA typ.) (5)
The regulator can also be pin-strapped for 5-V operation, using the regulator's internal resistive divider by
tying the OUT and SNS pins together, and then also tying the FB and 5-V TAP pins together. There is an
option in the design to generate a 5-V output by populating the 0Ω-resistors (R21 and R22 in Figure 9).
This 5-V output voltage is also provided at the output connector (VLDO_T and VLDO_B) for each phase.
VCC_U_T
R20
10k
VLDO_U_T
2

C84 U3
LD1 0.1µF 8 1
A

IN OUT
Green C13 C14
47µF 47µF 6 2 C15 R23 R25 C16
5V TAP SNS
C

DNP 100pF 1.2Meg 10k 4.7uF/25V

7 5 R22 DNP
FB ERR
1

2
REF_U_T 3 4 REF_U_T
REF_U_T SD GND R24 LD2

A
LP2954AIM/NOPB 100k Green
R21 DNP

C
0 REF_U_T

1
REF_U_T

REF_U_T

Figure 9. Positive Regulator (Set at 5 V)

As of now, the output of each LP2954A regulator is set to 5 V and the presence of VCC as well as the
VLDO outputs is indicated, using the respective green LEDs. For 16 to 5 V conversion, it is important to
calculate the power dissipation and check whether the LP2954A resistor is suitable for the conversion.
Equation 6 shows the power calculations for the LP2954A resistor:
PD(max) = (Vin - Vout )* I out = 12.4V * 25 mA = 310 mW
where
• Vin = 17.4 V (worst case)
• Vout = 5 V
• Iout = 25 mA (max)
• and assuming TA = 60ºC (6)
Referring to the LP2954A Data Sheet, LP2954/LP2954A 5 V and Adjustable Micropower Low-Dropout
Voltage Regulators (SNVS096), Tj(max) = 125ºC, and a derating of 10ºC gives Tj(max) = 115ºC
θJA £ [ (Tj(max)-TA)/PD(max)]
£ [(115-60)/0.31]
£ 177.4°C/W (7)

Referring to the LP2954A Data Sheet, LP2954/LP2954A 5 V and Adjustable Micropower Low-Dropout
Voltage Regulators, page 2, (SNVS096), it is clear that LP2954A can handle the power for this condition,
as the LP2954A Data Sheet lists θJA = 160°C/W.

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4.2.6.2 Negative Regulator (TPS7A3001)

The output coming from the transformer after diode rectification is given to the TPS7A3001, the negative
regulator. The TPS7A3001 has an output voltage range of –1.174 V to –33 V. The nominal output voltage
of the regulator is set by two external resistors. To ensure stability under no-load conditions, this resistive
network must provide a current equal to or greater than 5 μA.
R1 and R2 can be calculated for any output voltage, using Equation 8:
VOUT
R1 = R2( -1)
VREF
where
VOUT
t 5P A
• R1 R2
• VREF = –1.179 V reference (8)
Using Equation 8, and considering R2 = 102 kΩ to get the output voltage of –5 V, R1 is calculated as
330 kΩ.
LD3
R26
From transformer 10k
1
C A
2

J1 Green
1 2
VEE_U_T
REF_U_T
U4
1 8
OUT IN
C21 R29 R27 C20 2 7 C85 C17 C18
10k 330k 0.01µF SNS/FB DNC 0.1µF 47µF 47µF
10uF/16V
3 6 DNP
1

NC SS/NR
REF_U_T REF_U_T
PWPD

4 5
C

R28 GND EN
LD4 102k C19
0.01µF
A

Green TPS7A3001DGN
9

REF_U_T
2

REF_U_T REF_U_T
REF_U_T REF_U_T

Figure 10. Negative Regulator (Set at –5 V)

As of now, the output of each TPS7A3001 resistor is set to -5 V and the presence of the VEE output is
indicated by a green LED. If it is not necessary to use the negative regulator, and the output of the
transformer is directly required, there is an option to bypass the regulator by using a jumper (J1 in
Figure 10).
For –8.7 V to –5 V conversion, it is important to calculate the power dissipation and to check whether
TPS7A3001 is able to do the conversion.
Equation 9 shows the power calculations for TPS7A3001:
PD(max) = (Vin – Vout) × Iout = 3.7 V × 25 mA = 92.5 mW
where
• Vin = –8.7 V
• Vout = –5 V
• Iout = –25 mA (max)
• and assuming TA = 60°C (9)
Referring to the TPS7A3001 Data Sheet, TPS7A3001 –36 V, –200 mA, Ultralow-Noise, Negative Linear
Regulator,(SBVS125), Tj(max) = 125°C, and a derating of 10°C results in Tj(max) = 115°C.
θJA ≤ [ (Tj(max) – TA) / PD(max) ]
≤ [ (115 – 60) / 0.0925]
≤ 594.59°C/W

Referring to the TPS7A3001 Data Sheet, TPS7A3001 –36 V, –200 mA, Ultralow-Noise, Negative Linear
Regulator, (SBVS125), it is clear that the resistor can handle the required power for this condition, as the
TPS7A3001 Data Sheet shows θJA = 55.09°C/W.

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4.2.7 Three Transformers to Power All Three IGBT Arms of 3-phase Inverter
The push-pull topology allows connection of transformers in parallel, which allows the IGBTs in all three
arms (U, V, and W) to be powered using a single controller..
The outputs are as shown in Table 1:
(1)
Table 1. Outputs for Top and Bottom IGBTs
Phase For TOP IGBT For BOTTOM IGBT
VCC_U_T VCC_U_B
VEE_U_T VEE_U_B
U
VLDO_U_T VLDO_U_B
REF_U_T REF_U_B
VCC_V_T VCC_V_B
VEE_V_T VEE_V_B
V
VLDO_V_T VLDO_V_B
REF_V_T REF_V_B
VCC_W_T VCC_W_B
VEE_W_T VEE_W_B
W
VLDO_W_T VLDO_W_B
REF_W_T REF_W_B
(1)
This table shows outputs for all three arms.

4.2.8 Scalability Option for Higher-Power Industrial Drives:

This design is intended to be used with IGBT modules with ratings of 1200 V/200 A. If higher power IGBT
modules are to be powered, the same reference design can be scaled up to for higher power by changing
the transformer design. The existing transformers have secondary, output current ratings of 250 mA each.
This rating can be increased to meet the requirement for higher-power Industrial drives.

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5 Test Data

5.1 Section 1: Functional Test Results for the LM5030

Figure 11, Figure 12, and Figure 13 show the MOSFET gate drive signals and the dead-time between the
two output pins of the LM5030. It can be seen from Figure 12 and Figure 13 that the dead-time between
the two gate drive signals is 130.8 ns and 134 ns respectively. The typical value of dead time from the
LM5030 datasheet is 135 ns.

Figure 11. Gate Drive Signals for Both MOSFETs (Q2 Figure 12. Dead-Time Between Gate-Drive Signals
and Q3 in Figure 7) (Rising Edge of GATE1 Shown)

Figure 13. Dead-Time Between Gate-Drive Signals (Falling Edge of GATE1 Shown)

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Figure 14 and Figure 15 show the MOSFET gate versus the MOSFET drain signals for Q2 and Q3 (in
Figure 7). The duty cycle is currently set to the maximum (by connecting the COMP pin to ground through
a 1000-pF capacitor shown in Section 4.2.1)

Figure 14. Gate Drive versus Drain Voltage for Q2 Figure 15. Gate Drive versus Drain Voltage for Q3

Figure 16 shows the soft-start operation of the PWM controller LM5030. As per the calculations, the SS
time is set to 3 ms and the test waveform also shows the same start-up time for LM5030.

Figure 16. Soft-Start for LM5030 Figure 17. Zoomed Waveform Showing tss = 3 ms

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TPS27082L is used as a switch to facilitate the STO feature for the industrial drives. The LM5030 SS-pin
has dual functions. The LM5030-SS pin is used for soft-start operation and also for shutdown during STO.
The soft-start operation and shutdown has been tested, and the waveform in Figure 18 shows the
shutdown signal along with the outputs going to zero.

Figure 18. Shutting Down the LM5030 Using an External Signal

LM5030 is a current mode-control device. It contains two levels of overcurrent protection. Therefore, if the
voltage on the current-sense comparator exceeds 0.5 V, the present cycle is terminated (cycle-by-cycle
current limit). If the voltage on the current sense comparator exceeds 0.625 V, the controller will terminate
the present cycle and discharge the soft-start capacitor.
The LM5030 CS and PWM comparators are fast, so they will respond to short-duration noise pulses. The
second level threshold is intended to protect the power converter by initiating a low-duty, cycle hiccup
mode when any abnormally high, fast-rising currents occur. During excessive loading, the first-level
threshold will always be reached. The output characteristic of the converter will be that of current source.
However, this sustained current level can cause excessive temperatures in the power train, especially in
the output rectifiers.
If the second-level threshold is reached, the soft-start capacitor will be fully discharged. A retry will
commence following discharge detection. The second-level threshold will only be reached when a high
dV/dt is present at the current-sense pin. The signal must be fast enough to reach the second-level
threshold before the first-threshold detector turns off the driver. This can usually happen for a saturated
power inductor, or for a shorted load. Excessive filtering on the CS pin, an extremely low-value, current-
sense resistor, or an inductor that does not saturate with excessive loading may prevent the second-level
threshold from ever being reached.

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Figure 19 shows the voltage waveform on the Current-Sense (CS) pin of the LM5030, with all of the
outputs loaded with a 2 W load.

Figure 19. Voltage Waveform Captured on the CS Pin of the LM5030

Figure 20 and Figure 21 show the outputs of MOSFETs when the MOSFETs start to switch, and before
the MOSFETs go to the doubler for further rectification (on both positive and negative outputs).

Figure 20. Transformer Secondary Output #1 Figure 21. Transformer Secondary Output #2

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5.2 Section 2: Output Ripple Under Different Test Conditions

With all of the outputs loaded with 2 W of output power, the ripple at the 16-V output and –8 V outputs are
captured. On the 16-V output, the peak-to-peak ripple voltage is 59 mV and on the –8 V output, the peak-
to-peak ripple voltage is 50 mV. Figure 22 and Figure 23 show the waveforms for the same.

Figure 22. Ripple Voltage on 16 V Output Figure 23. Ripple Voltage on –8 V Output

Both the linear regulators (LP2954A and TPS7A3001) are tested for ripple at the output with load of 25
mA on each. Figure 24 and Figure 25 show the ripple waveforms on the same.

Figure 24. Ripple on 5 V Output (LP2954A) Figure 25. Ripple on –5 V Output (TPS7A3001)

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5.3 Section 3: Regulation and Efficiency

The efficiency is measured with all six outputs loaded with equal loads. When all the outputs were loaded
with 2 W load each, the efficiency is around 78% as shown in Figure 26.
90

80

70

60

Efficency (%)
50

40

30

Vin = 22.8V
20

Vin = 24V
10
Vin = 25.2V
0
0 0.5 1 1.5 2 2.5
Pout (W)
C004

Figure 26. Efficiency at Different Vin Values

The regulation and cross-regulation data is captured at different Vin values as shown in Figure 27,
Figure 28, and Figure 29. While measuring the regulation and cross-regulation, five (out of six) outputs are
loaded with 2 W load each and one output is varied from 0% to 100%. The cross regulation is included so
as to show that there is not much interference when TOP IGBT is powered and Bottom IGBT is not
powered (or TOP IBGT is not powered and Bottom IGBT is powered).
0
+16V Regulation

±1 +16V Cross Regulation (-8V loaded)

±2 -8V Cross Regulation (+16V loaded)

-8V Regulation
±3
Regulation (%)

±4

±5

±6

±7

±8
0.00 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.10 0.11
Load Current (A)
C001

Figure 27. Regulation and Cross Regulation (Vin = 22.8 V)

Figure 28. Regulation and Cross Regulation (Vin = 24 V)

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9.0

8.0

7.0

6.0

Regulation (%)
5.0

4.0

3.0

+16V Regulation
2.0
+16V Cross Regulation
1.0 -8V Cross Regulation
-8V Regulation
0.0
0.00 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.10 0.11
Load Current (A)
C003

Figure 29. Regulation and Cross Regulation (Vin = 25.2 V)

5.4 Section 4: Isolation Test Results

The design is tested for and has successfully passed a 7 kV impulse test (for 1.2/50 us pulse). It has also
passed a type-test isolation voltage tests as per the design specifications.

5.5 Section 5: Testing with ISO5500 and IGBTs

To duplicate the actual drive testing, this reference design is tested with TI ISO5500 EVMs along with
1200 V IGBTs. Two 16-kHz, complementary PWM signals for IGBT gate driving are generated using a
Piccolo LaunchPAD™ from TI. They are fed to two ISO5500 (each connected to one 1200 V IGBT). The
IGBTs are connected in half-bridge form, as shown in Figure 30 with 1-kΩ load connected at the output.
The image of the set-up with all boards is also shown in Figure 31.

VCC_U_T

NPN C

ISO5500-EVM IGBT 1
4 G

PNP E

VCC_U_T VEE_U_T REF_U_T

VEE_U_T

Piccolo 1k
TIDA-00181
LaunchPADTM VCC_U_B
load
VCC_U_B VEE_U_B REF_U_B

NPN C

ISO5500-EVM IGBT 2 600 V

4 G

PNP E

VEE_U_B

Figure 30. Set-Up for Testing TIDA-00181 design with ISO5500 and IGBTs

TIDU355A – June 2014 – Revised June 2016 Isolated IGBT Gate-Drive Push-Pull Power Supply with 4 Outputs 21
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TIDA-00181 3LFFROR /DXQFK3$'Œ

Board

Two ISO5500
EVMs

Figure 31. Set-Up

To measure the ripple, both ISO5500s are applied with the TIDA-00181 power supply and the IGBT arm is
applied with a 600 V supply. Figure 32 and Figure 33 show the 200 mV ripple which meets the
specification of the reference design.

Figure 32. Ripple on 16 V output (For dv/dt = 11.9*E9 on Figure 33. Ripple on –8 V Output (for dv/dt = 11.9*E9 on
the Output Load) the Output Load)

The current boost transistors (NPN and PNP) are used to boost the output current of the ISO5500 in order
to drive the IGBTs. With 6-A peak current while charging the internal capacitance of IGBTs, the ripple on
the VCC and VEE outputs of power supply are also measured. Figure 34 and Figure 35 show the ripple
voltage along with the IGBT gate capacitor charging current spikes.

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Figure 34. Ripple on 16-V output (for 6 A peak load Figure 35. Zoomed Waveforms
current with IGBTs)

Figure 36. Ripple on –8 V output for 6-A peak load Figure 37. Zoomed Waveforms
current with IGBTs

6 Layout Guidelines for LM5030

The LM5030 contains two levels of over-current protection. If the voltage on the current sense comparator
exceeds 0.5 Volts, the present cycle is terminated (cycle by cycle current limit). If the voltage on the
current sense comparator exceeds 0.625 Volts, the controller will terminate the present cycle and
discharge the soft-start capacitor.
A small RC filter, located near the controller, is recommended for the CS pin. An internal MOSFET
discharges the current sense filter capacitor at the conclusion of every cycle, to improve dynamic
performance. The LM5030 CS and PWM comparators are very fast, and therefore will respond to short
duration noise pulses. Layout considerations are critical for the current sense filter and sense resistor. The
capacitor associated with the CS filter must be placed very close to the device and connected directly to
the pins of the IC (CS and RTN).
If a current sense resistor located in the drive transistor sources is used, for current sense, a low
inductance resistor should be chosen. In this case, all of the noise sensitive low power grounds should be
commoned together around the IC. Then a single connection should be made to the power ground
(sense-resistor ground point). The RT resistor should also be located very close to the device and
connected directly to the pins of the IC (RT and GND).

TIDU355A – June 2014 – Revised June 2016 Isolated IGBT Gate-Drive Push-Pull Power Supply with 4 Outputs 23
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7 Design Files

7.1 Schematics
R80

0
D1 L1 Vcc
CONN1
1
VCC_U_T
2 DNP
C1 R20
47µF 10k
DNP VLDO_U_T
R1

2
0 R2 C84
DNP U3
GND GND 1.00k D4 LD1 0.1µF 8 1

7,8

A
IN OUT
Green C13 C14
SW1 C15 R23 R25 C16
2 Q1A C10 47µF 47µF 6 2
5V TAP SNS

C
CSD88539ND DNP 100pF 1.2Meg 10k 4.7uF/25V
DNP C11 7 5 R22 DNP
R3 FB ERR
1

1
10uF/50V 10uF/50V 0

2
0 D5 REF_U_T 3 4 REF_U_T
T1 REF_U_T SD GND R24 LD2
7

A
C7 C8 1 LP2954AIM/NOPB 100k Green
Z1 C3 DNP DNP R21 DNP
MMSZ5242B-TP Vc REF_U_T

C
22uF/16V R18 R19 0 REF_U_T
12V 0 0 8
DNP C9

1
D2 DNP 3 REF_U_T REF_U_T
GND R13 22uF/35V

GD1
1 2 13
C A C12
GND U1 GND GND REF_U_T

5,6,

5,6,
0

7,8

7,8
8 4 DNP D6 10uF/50V
CS CS VCC DNP LD3
R12 4 Q2 4 GND 5 R26 1
CSD19533Q5A C A
1 5 22 Q3 14 10k
VIN OUT1 GD2

1,2,3

1,2,3
C2 6 CSD19533Q5A J1 Green

GD1
1uF/63V OUT2
9 750342312 1 2
DNP RT R14 VEE_U_T
10 2 REF_U_T
SS VFB R16
R4 22 U4
R10 CS REF_U_B
26.7k 7 3 D3 1.15k 1 8
GND COMP 0 R15 C6 R17 OUT IN
GND 1 2
DNP C A 470pF 0.22 R29 R27 C20 2 C85 C17 C18
LM5030MM/NOPB 0 C21 7
GND DNP 10k 330k 0.01µF SNS/FB DNC 0.1µF 47µF 47µF
DNP SW2 10uF/16V
GND R9 R11 3 6 DNP

1
0 0 GND NC SS/NR
GND REF_U_T REF_U_T

PWPD
4 5

C
GD2

C4 R28 GND EN
0.022µF C5 102k C19
LD4
1000pF 0.01µF

A
GND Green TPS7A3001DGN

9
REF_U_T

2
GND
GND REF_U_T REF_U_T
R5 REF_U_T REF_U_T
100k
VCC_U_B
U2
4 2 R6
VIN VOUT
3 10.0k
VOUT R30 VLDO_U_B
1
R2 GND 10k
6 C86 U5
R1/C1
5 0.1µF 8 1
ON/OFF IN OUT

2
GND
CONN2 TPS27082LDDC D7 C25 C26 6 2 C27 R33 R35 C28
LD5 5V TAP SNS

A
1 47µF 100pF 1.2Meg 10k 4.7uF/25V
GND Vc Green 47µF
2 C22 DNP 7 5 R32 DNP
SD R7 C23 FB ERR 0

2
0 10uF/50V 3 4 REF_U_B
DNP REF_U_B SD GND R34
10uF/50V

1
LD6

A
D8 LP2954AIM/NOPB 100k
GND Green
R8 R31 DNP
REF_U_B
24.9k 0 REF_U_B

C
REF_U_B REF_U_B

1
GND REF_U_B
C24 REF_U_B
10uF/50V
D9 LD7
R36 1 2
C A
10k
J2 Green
1 2
VEE_U_B
REF_U_B
U6
1 8
OUT IN
CONN3
VLDO_U_T R39 R37 C32 2 C87 C29 C30
1 C33 7
10k 330k 10nF SNS/FB DNC 0.1µF 47µF 47µF
2 10uF/16V
VCC_U_T DNP
3 3 6
REF_U_T NC SS/NR
4

1
REF_U_B REF_U_B

PWPD
4 5
VEE_U_T R38 GND EN
CON-OSTVN04A150

C
LD8 102k C31
Green TPS7A3001DGN 10nF

9
A
CONN4 REF_U_B
VLDO_U_B
1

2
2 REF_U_B REF_U_B REF_U_B
VCC_U_B
3
REF_U_B
4
REF_U_B
VEE_U_B
CON-OSTVN04A150

Figure 38. Schematics Page 1

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VCC_V_T
R40
10k
C88 VLDO_V_T

2
0.1µF C38 C39
LD9 U7
47µF 47µF

A
D10 Green 8 1
DNP IN OUT
C35 6 2 C40 R43 R45 C41

C
5V TAP SNS 100pF 1.2Meg 10k 4.7uF/25V
C36 7 5 R42

1
10uF/50V FB ERR 0
10uF/50V

2
D11 3 4 DNP REF_V_T
REF_V_T SD GND
REF_V_T R44 LD10

A
LP2954AIM/NOPB 100k Green
R41
REF_V_T

C
0 REF_V_T
SW1 DNP
T2

1
7 REF_V_T REF_V_T
1
C37 REF_V_T
D12 10uF/50V LD11
8 R46 1 2
C A
3 10k
Vcc
C34 13 J3 Green
22µF 1 2
VEE_V_T REF_V_T
5 U8
14 1 8
GND OUT IN
750342312 C46 R49 R47 C45 2 7 C89 C42 C43
SW2 10k 330k 10nF SNS/FB DNC 0.1µF 47µF 47µF
10uF/16V
3 6 DNP
NC SS/NR

1
REF_V_B REF_V_T REF_V_T

PWPD
4 5
R48 GND EN

C
102k C44
LD12 TPS7A3001DGN 10nF
Green

9
A
REF_V_T

2
REF_V_T REF_V_T REF_V_T

REF_V_T

VCC_V_B
R50
10k VLDO_V_B

C90 U9

2
0.1µF 8 1
C50 C51 IN OUT
47µF 47µF

A
D13 LD13 6 2 C52 R53 R55 C53
DNP 5V TAP SNS 100pF 1.2Meg 10k 4.7uF/25V
Green
C47 7 5 R52
C FB ERR 0

2
C48
3 4 DNP REF_V_B
1

10uF/50V SD GND
10uF/50V R54 LD14

A
D14 LP2954AIM/NOPB 100k Green
REF_V_B
REF_V_B R51
0

C
REF_V_B
DNP

1
REF_V_B REF_V_B

REF_V_B
REF_V_B
C49
10uF/50V
D15 LD15
R56 1 2
C A
10k
J4 Green
1 2
VEE_V_B
REF_V_B
U10
1 8
OUT IN
CONN5
VLDO_V_T R59 R57 C57 2 C91 C54 C55
1 C58 7
10k 330k 10nF SNS/FB DNC 0.1µF 47µF 47µF
2 10uF/16V
VCC_V_T DNP
3 3 6
1

REF_V_T NC SS/NR
4
REF_V_B REF_V_B

PWPD
4 5
C

VEE_V_T R58 GND EN

CON-OSTVN04A150
LD16 102k C56
Green 10nF
A

TPS7A3001DGN
9

CONN6 REF_V_B
VLDO_V_B
2

1
2 REF_V_B REF_V_B REF_V_B
VCC_V_B
3
REF_V_B REF_V_B
4
VEE_V_B
CON-OSTVN04A150

Figure 39. Schematics Page 2

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VCC_W_T
R60
10k
C92
0.1µF VLDO_W_T
C63 C64

2
47µF 47µF U11
D16 DNP 8 1

A
IN OUT
LD17
C60 Green 6 2 C65 R63 R65 C66
5V TAP SNS

C
REF_W_T 100pF 1.2Meg 10k 4.7uF/25V
C61 7 5 R62 DNP
FB ERR

1
10uF/50V 10uF/50V 0

2
D17 3 4 REF_W_T
REF_W_T SD GND R64 LD18

A
LP2954AIM/NOPB 100k Green
R61 DNP
SW1 REF_W_T 0

C
REF_W_T

T3

1
7 REF_W_T REF_W_T
1
C62 REF_W_T
D18 10uF/50V LD19
8 R66 1 2
C A
3 10k
Vcc
C59 13 J5 Green
22uF/35V 1 2
VEE_W_T
REF_W_T
5 U12
14 1 8
OUT IN
GND
750342312 C71 R69 R67 C70 2 7 C93 C67 C68
10k 330k 10nF SNS/FB DNC 0.1µF 47µF 47µF
10uF/16V
SW2
REF_W_B 3 6 DNP

1
NC SS/NR
REF_W_T REF_W_T

PWPD
4 5

C
R68 GND EN
LD20 102k C69
Green 10nF

A
TPS7A3001DGN

9
REF_W_T

2
REF_W_T REF_W_T REF_W_T
REF_W_T

VCC_W_B
R70
10k C75 C76
C94 VLDO_W_B
47µF 47µF

2
0.1µF DNP U13
8 1

A
IN OUT
LD21
D19 Green 6 2 C77 R73 R75 C78
5V TAP SNS

C
100pF 1.2Meg 10k 4.7uF/25V
C72 REF_W_B 7 5 R72 DNP
C73 1 FB ERR 0

2
10uF/50V 3 4 REF_W_B
SD GND R74 LD22
10uF/50V

A
D20 LP2954AIM/NOPB 100k Green
REF_W_B DNP

C
R71 REF_W_B
0
REF_W_B

1
REF_W_B

REF_W_B
REF_W_B
C74
D21 10uF/50V LD23
R76 1 2
C A
10k
J6 Green
1 2
VEE_W_B REF_W_B
U14
1 8
OUT IN
CONN7 C83 R79 R77 C82 2 7 C95 C79 C80
VLDO_W_T 10k 330k 10nF SNS/FB DNC 0.1µF 47µF 47µF
1 10uF/16V
2 3 6 DNP
1

VCC_W_T NC SS/NR
3
REF_W_T REF_W_B REF_W_B

PWPD
4 4 5
C

R78 GND EN
VEE_W_T LD24 102k C81
CON-OSTVN04A150 Green
A

9
TPS7A3001DGN 10nF
REF_W_B
2

CONN8
VLDO_W_B REF_W_B REF_W_B REF_W_B
1
2
VCC_W_B
3
REF_W_B REF_W_B
4
VEE_W_B
CON-OSTVN04A150

Figure 40. Schematics Page 3

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7.2 Bill of Materials

To download the bill of materials (BOM), see the design files at TIDA00181. Table 2 shows the BoM for this reference design.

Table 2. BOM
SL. NO. FITTED QUANTITY DESIGNATOR DESCRIPTION PARTNUMBER MANUFACTURER ROHS PACKAGE
REFERENCE
1 Fitted 1 !PCB Printed Circuit Board TIDA-00181 Any O
2 Not Fitted 0 C1 CAP, AL, 47uF, 80V, +/-20%, 0.7 ohm, SMD EEE-FK1K470P Panasonic Y SMT Radial G
3 Not Fitted 0 C2 CAP, AL, 1uF, 63V, +/-20%, ohm, SMD EMVE630ADA1R0MD55G Nippon Chemi-Con Y D55
4 Fitted 1 C3 CAP, CERM, 22uF, 16V, +/-20%, X5R, 1206 1206YD226MAT2A AVX Y 1206
5 Fitted 1 C4 CAP, CERM, 0.022uF, 25V, +/-5%, C0G/NP0, C2012C0G1E223J TDK Y 0805
0805
6 Fitted 1 C5 CAP, CERM, 1000pF, 25V, +/-10%, X7R, 0805 GRM216R71E102KA01D MuRata Y 0805
7 Fitted 1 C6 CAP, CERM, 470pF, 50V, +/-10%, X7R, 0805 CC0805KRX7R9BB471 Yageo America Y 0805
8 Not Fitted 0 C7, C8 CAP, CERM, 1000pF, 25V, +/-10%, X7R, 0805 GRM216R71E102KA01D MuRata Y 0805
9 Not Fitted 0 C9, C59 CAP, AL, 22uF, 35V, +/-20%, 1 ohm, SMD EEE-FC1V220P Panasonic Y SMT Radial D
10 Fitted 18 C10, C11, C12, C22, C23, C24, CAP, CERM, 10uF, 50V, +/-10%, X5R, 1206_190 CGA5L3X5R1H106K160AB TDK Y 1206_190
C35, C36, C37, C47, C48, C49,
C60, C61, C62, C72, C73, C74
11 Fitted 12 C13, C17, C25, C29, C38, C42, CAP, AL, 47uF, 35V, +/-20%, 0.36 ohm, SMD EEE-FK1V470P Panasonic Y SMT Radial D
C50, C54, C63, C67, C75, C79
12 Not Fitted 0 C14, C18, C26, C30, C39, C43, CAP, AL, 47uF, 35V, +/-20%, 0.36 ohm, SMD EEE-FK1V470P Panasonic Y SMT Radial D
C51, C55, C64, C68, C76, C80
13 Fitted 6 C15, C27, C40, C52, C65, C77 CAP, CERM, 100pF, 50V, +/-10%, C0G/NP0, C0805C101K5GACTU Kemet Y 0805
0805
14 Fitted 6 C16, C28, C41, C53, C66, C78 CAP, CERM, 4.7uF, 25V, +/-10%, X5R, 0805 C2012X5R1E475K125AB TDK Y 0805
15 Fitted 12 C19, C20, C31, C32, C44, C45, CAP, CERM, 0.01uF, 16V, +/-5%, C0G/NP0, 0805 B37947K9103J62 EPCOS Inc Y 0805
C56, C57, C69, C70, C81, C82
16 Fitted 6 C21, C33, C46, C58, C71, C83 CAP, CERM, 10uF, 16V, +/-20%, X5R, 0805 0805YD106MAT2A AVX Y 0805
17 Fitted 1 C34 CAP, AL, 22uF, 35V, +/-20%, 1 ohm, SMD EEE-FC1V220P Panasonic Y SMT Radial D
18 Fitted 12 C84, C85, C86, C87, C88, C89, CAP, CERM, 0.1uF, 50V, +/-5%, X7R, 0805 08055C104JAT2A AVX Y 0805
C90, C91, C92, C93, C94, C95
19 Fitted 1 CONN1 Terminal Block, 2x1, 5.08mm, TH 282841-2 TE Connectivity Y 10.16x15.2x9mm
20 Fitted 1 CONN2 Terminal Block, 4x1, 2.54mm, TH OSTVN02A150 On Shore Technology Y TERM_BLK, 2pos,
Inc 2.54mm
21 Fitted 6 CONN3, CONN4, CONN5, CONN TERM BLOCK 2.54MM 4POS PCB STVN04A150 On Shore Technology Y TERM_BLK, 4pos,
CONN6, CONN7, CONN8 Inc 2.54mm
22 Fitted 1 D1 Diode, Schottky, 60V, 2A, SMA B260A-13-F Diodes Inc. Y SMA
23 Not Fitted 0 D2, D3 Diode, Signal, 300-mA, 75-V, 350-mW 1N4148W-7-F Diodes SOD-123
24 Fitted 18 D4, D5, D6, D7, D8, D9, D10, Diode, Schottky, 90V, 1A, SMA B190-13-F Diodes Inc. Y SMA
D11, D12, D13, D14, D15, D16,
D17, D18, D19, D20, D21
25 Not Fitted 0 FID1, FID2, FID3, FID4, FID5, Fiducial mark. There is nothing to buy or mount. N/A N/A Fiducial
FID6
26 Fitted 4 H1, H2, H3, H4 Machine Screw, Round, #4-40 x 1/4, Nylon, Philips NY PMS 440 0025 PH BandF Fastener Y Screw
panhead Supply
27 Fitted 4 H5, H6, H7, H8 Standoff, Hex, 0.5"L #4-40 Nylon 1902C Keystone Y Standoff

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Table 2. BOM (continued)

SL. NO. FITTED QUANTITY DESIGNATOR DESCRIPTION PARTNUMBER MANUFACTURER ROHS PACKAGE
REFERENCE
28 Fitted 6 J1, J2, J3, J4, J5, J6 Header, Male 2-pin, 100mil spacing, PEC02SAAN Sullins 0.100 inch x 2
29 Not Fitted 0 L1 Inductor, Shielded, Ferrite, 2.2mH, 0.65A, 1.94 MSS1210-225KE Coilcraft Y Inductor,
ohm, SMD 12.3x10x12.3mm
30 Fitted 1 LBL1 Thermal Transfer Printable Labels, 0.650" W x THT-14-423-10 Brady Y PCB Label 0.650"H x
0.200" H - 10,000 per roll 0.200"W
31 Fitted 24 LD1, LD2, LD3, LD4, LD5, LD6, LED SmartLED Green 570NM LG L29K-G2J1-24-Z OSRAM 0603
LD7, LD8, LD9, LD10, LD11,
LD12, LD13, LD14, LD15, LD16,
LD17, LD18, LD19, LD20, LD21,
LD22, LD23, LD24
32 Not Fitted 0 Q1 MOSFET, N-CH, 60V, 6.3A, SO-8 CSD88539ND Texas Instruments Y SO-8
33 Fitted 2 Q2, Q3 MOSFET, N-CH, 100V, 13A, SON 5x6mm CSD19533Q5A Texas Instruments Y SON 5x6mm
34 Not Fitted 0 R1, R7, R10, R13, R15, R18, RES, 0 ohm, 5%, 0.125W, 0805 CRCW08050000Z0EA Vishay-Dale Y 0805
R19, R41, R42, R51, R52
35 Fitted 1 R2 RES, 1.00k ohm, 1%, 0.125W, 0805 CRCW08051K00FKEA Vishay-Dale Y 0805
36 Fitted 11 R3, R9, R11, R21, R22, R31, RES, 0 ohm, 5%, 0.125W, 0805 CRCW08050000Z0EA Vishay-Dale Y 0805
R32, R61, R62, R71, R72
37 Fitted 1 R4 RES 26.7K OHM 1/8W 1% 0805 SMD RC0805FR-0726K7L Yageo Y 0805
38 Fitted 3 R5, R44, R54 RES, 100k ohm, 1%, 0.125W, 0805 ERJ-6ENF1003V Panasonic Y 0805
39 Fitted 1 R6 RES, 10.0k ohm, 1%, 0.125W, 0805 CRCW080510K0FKEA Vishay-Dale Y 0805
40 Fitted 1 R8 RES, 24.9k ohm, 1%, 0.125W, 0805 ERJ-6ENF2492V Panasonic Y 0805
41 Fitted 2 R12, R14 RES, 22 ohm, 5%, 0.125W, 0805 CRCW080522R0JNEA Vishay-Dale Y 0805
42 Fitted 1 R16 RES, 1.15k ohm, 1%, 0.125W, 0805 CRCW08051K15FKEA Vishay-Dale Y 0805
43 Fitted 1 R17 RES, 0.22 ohm, 1%, 0.25W, 1206 ERJ-8RQFR22V Panasonic Y 1206
44 Fitted 24 R20, R25, R26, R29, R30, R35, RES, 10k ohm, 5%, 0.125W, 0805 CRCW080510K0JNEA Vishay-Dale Y 0805
R36, R39, R40, R45, R46, R49,
R50, R55, R56, R59, R60, R65,
R66, R69, R70, R75, R76, R79
45 Not Fitted 0 R23, R33, R63, R73 RES, 1.2Meg ohm, 5%, 0.125W, 0805 ERJ-6GEYJ125V Panasonic Y 0805
46 Not Fitted 0 R24, R34, R64, R74 RES, 100k ohm, 1%, 0.125W, 0805 ERJ-6ENF1003V Panasonic Y 0805
47 Fitted 6 R27, R37, R47, R57, R67, R77 RES, 330k ohm, 0.5%, 0.1W, 0805 RR1220P-334-D Susumu Co Ltd Y 0805
48 Fitted 6 R28, R38, R48, R58, R68, R78 RES, 102k ohm, 1%, 0.125W, 0805 CRCW0805102KFKEA Vishay-Dale Y 0805
49 Fitted 2 R43, R53 RES, 1.2Meg ohm, 5%, 0.125W, 0805 ERJ-6GEYJ125V Panasonic Y 0805
50 Fitted 1 R80 RES, 0 ohm, 5%, 0.25W, 1206 ERJ-8GEY0R00V Panasonic Y 1206
51 Fitted 3 T1, T2, T3 Transformer, Push-Pull, 12.8uH, TH 750342312 Wurth Elektronik eiSos Y Transformer,
25x16x22.2mm
52 Fitted 1 U1 100V Push-Pull Current Mode PWM Controller, LM5030MM/NOPB Texas Instruments Y MUB10A
10-pin MSOP, Pb-Free (was National
Semiconductor)
53 Fitted 1 U2 1.2V - 8V, 3A PFET Load Switch with Configurable TPS27082LDDC Texas Instruments Y DDC0006A
Slew Rate, Fast Transient Isolation and Hysteretic
Control, DDC0006A
54 Fitted 6 U3, U5, U7, U9, U11, U13 5V Micropower Low-Dropout Voltage Regulator, 8- LP2954AIM/NOPB Texas Instruments Y M08A
pin Narrow SOIC, Pb-Free (was National
Semiconductor)

TIDU355A – June 2014 – Revised June 2016 Isolated IGBT Gate-Drive Push-Pull Power Supply with 4 Outputs 29
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Table 2. BOM (continued)

SL. NO. FITTED QUANTITY DESIGNATOR DESCRIPTION PARTNUMBER MANUFACTURER ROHS PACKAGE
REFERENCE
55 Fitted 6 U4, U6, U8, U10, U12, U14 IC, -3V to -36V, -200mA, Ultralow Noise, High- TPS7A30xxDGN TI MSOP-8
PSRR LDO Negative Linear Regulator
56 Fitted 1 Z1 Diode, Zener, 12V, 500mW, SOD-123 MMSZ5242B-TP Micro Commercial Co Y SOD-123

30 Isolated IGBT Gate-Drive Push-Pull Power Supply with 4 Outputs TIDU355A – June 2014 – Revised June 2016
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7.3 PCB Layout

Note that the total dimension of the board (including all power supply for all three arms of the inverter) is
120 mm x 100 mm.

Figure 41. Top Overlay Figure 42. Top Solder Mask

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Figure 43. Top Layer Figure 44. MidLayer1

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Figure 45. MidLayer2 Figure 46. Bottom Layer

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Figure 47. Bottom Solder Mask Figure 48. Bottom Overlay

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Figure 49. Board Dimensions

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7.4 Altium Project

To download the Altium files, see the design files at TIDA-00181.

Figure 50. Altium All Layers Figure 51. Altium Bottom Layer

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Figure 52. Altium Mid Layer 1 Figure 53. Altium Mid Layer 2

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Figure 54. Altium Top Layer

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7.5 Gerber Files

To download the Gerber files, see the design files at TIDA-00181.

Figure 55. Fabrication Drawing

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7.6 Assembly Drawings

Figure 56. Top Assembly Drawing Figure 57. Bottom Assembly Drawing

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www.ti.com References

8 References
1. LM5030 Data Sheet, LM5030 100 V Push-Pull Current Mode PWM Controller (SNVS215).
2. LP2954/LP2954A Data Sheet, LP2954/LP2954A 5 V and Adjustable Micropower Low-Dropout Voltage
Regulators (SNVS096).
3. TPS7A3001 Data Sheet, TPS7A3001 –36 V, –200 mA, Ultralow-Noise, Negative Linear Regulator
(SBVS125).

9 About the Author

SANJAY PITHADIA is a Systems Engineer at Texas Instruments where he is responsible for developing
subsystem design solutions for the Industrial Motor Drive segment. Sanjay has been with TI since 2008
and has been involved in designing products related to Energy and Smart Grid. Sanjay brings to this role
his experience in analog design, mixed signal design, industrial interfaces and power supplies. Sanjay
earned his Bachelor of Technology in Electronics Engineering at VJTI, Mumbai.
N. NAVANEETH KUMAR is a Systems Architect at Texas Instruments, where he is responsible for
developing subsystem solutions for motor controls within Industrial Systems. N. Navaneeth brings to this
role his extensive experience in power electronics, EMC, analog, and mixed signal designs. He has
system-level product design experience in drives, solar inverters, UPS, and protection relays. N.
Navaneeth earned his Bachelor of Electronics and Communication Engineering from Bharathiar
University, India and his Master of Science in Electronic Product Development from Bolton University, UK.

TIDU355A – June 2014 – Revised June 2016 Isolated IGBT Gate-Drive Push-Pull Power Supply with 4 Outputs 41
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Revision A History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Original (June 2014) to A Revision ......................................................................................................... Page

• Changed the bottom winding of the transformer secondary side .................................................................. 1

• Changed the bottom winding of the transformer secondary side .................................................................. 6

42 Revision History TIDU355A – June 2014 – Revised June 2016

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